WO2003013037A1 - Code generation - Google Patents
Code generation Download PDFInfo
- Publication number
- WO2003013037A1 WO2003013037A1 PCT/GB2002/003580 GB0203580W WO03013037A1 WO 2003013037 A1 WO2003013037 A1 WO 2003013037A1 GB 0203580 W GB0203580 W GB 0203580W WO 03013037 A1 WO03013037 A1 WO 03013037A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- ordinate
- bit
- spreading code
- word
- code
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J13/00—Code division multiplex systems
- H04J13/0007—Code type
- H04J13/004—Orthogonal
- H04J13/0044—OVSF [orthogonal variable spreading factor]
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J13/00—Code division multiplex systems
- H04J13/0007—Code type
- H04J13/004—Orthogonal
- H04J13/0048—Walsh
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J13/00—Code division multiplex systems
- H04J13/10—Code generation
- H04J13/12—Generation of orthogonal codes
Definitions
- the invention relates to the generation of spreading codes and to the use of spreading codes in communications techniques.
- a spreading code is a code that is capable of being used to spread another signal in CDMA (code division multiple access) communications.
- the invention deals with Orthogonal Variable Spreading Factor (OVSF) codes and Hadamard codes, both of which can be used for spreading signals.
- OVSF Orthogonal Variable Spreading Factor
- FDMA frequency division multiple access
- TDMA time division multiple access
- a central part of any CDMA (code division multiple access) system is the use of spreading codes.
- a continuous transmission on a single frequency contains multiple concurrent channels.
- Each symbol in each channel is modulated with a high speed 'spreading code'.
- the mathematical properties of these codes are such that it is possible to transmit many different symbol streams (or channels) with different spreading codes simultaneously in the same radio frequency band and still be able to successfully receive and separate these channels if the spreading code is known.
- Walsh Codes are all the same length (64 elements), and so are 'fixed spreading factor codes'.
- UMTS the type of code used is slightly different - these are of variable length, and have very desirable properties in that careful allocation of these codes allows a system to transmit multiple channels of different speeds on the same frequency band without co-interference. Specifically, any length of a power of 2 is supported as a valid length.
- OVSF Orthogonal Variable Spreading Factor
- the definition of these ONSF codes is given in the UMTS specification and is repeated below for information. This definition can easily be implemented in software, but requires significant amounts of memory and processing power to run, as it involves possibly large (up to 512x512 element) matrix calculations.
- OVSF code C n x may be described as the x th (where x is numbered from 0) row of the OVSF matrix C n .
- C n is described recursively below:
- a spreading code bit can be specified by a pair of co-ordinates, one identifying the code which provides the bit (i.e. x) and the other identifying the position of the specified bit within its code.
- C512.1 For example, to generate C512.1 , one starts with the matrix Ci. From that, one generates C 2 , then C , Cs, C 16 , C 32 , C 6 , C ⁇ 28 , C 256 and finally C512.
- the desired code (C512.1) is the 2 nd row of this matrix (the rows are numbered from 0 to n-1).
- any OVSF codes required are passed to a hardware block where they are stored and used to provide the real spreading signals used to generate the full rate sequence to be transmitted on the air.
- a synchronisation channel is broadcast by a base station in order to provide timing, frequency and identification information for a mobile station (MS) to easily detect and decode. It consists of two separate channels, code multiplexed together.
- the primary synchronisation channel (PSCH) is used to provide slot timing and phase information for automatic frequency correction.
- the secondary synchronisation channel (SSCH) is orthogonal to (i.e. it does not interfere with) the PSCH and gives frame timing and cell identification information.
- Hadamard codes are capable of being used for spreading other signals
- UMTS Hadamard codes are used in the SSCH to provide the cell identification information mentioned in the preceding paragraph.
- the definition of these codes is given in the UMTS specifications, and is repeated below for information. This definition can easily be implemented in software, but requires significant amounts of memory and processing power to run, as it involves possibly large (up to 256x256 element) matrix calculations.
- H n may be described as the x th row (where x is numbered from 0) of the Hadamard matrix H n .
- H n is described recursively below:
- a spreading code bit can be specified by a pair of co-ordinates, one identifying the code which provides the bit (i.e. x) and the other identifying the position of the specified bit within its code.
- any Hadamard codes required are passed to a hardware block where they are stored and used to provide the real spreading signals used to generate the full rate sequence to be transmitted on the air, or against which an input sequence should be correlated.
- the invention seeks to provide an improved technique for spreading code bit generation.
- the invention provides apparatus for spreading code bit generation, comprising masking means arranged to mask a first co-ordinate word with a second co-ordinate word having the opposite bit significance convention to the first co-ordinate word, the first and second co-ordinate words specifying a bit of a spreading code, and parity generating means for determining the parity of the masked first co-ordinate word to obtain the specified bit.
- the invention also consists in a method of spreading code bit generation, comprising providing two co-ordinate words specifying a bit of a spreading code and having opposing bit significance conventions, masking a first one of the co-ordinate words with the second and determining the parity of the masked first co-ordinate word to obtain the specified bit.
- the second co-ordinate word identifies the position of the spreading code containing the specified bit within the matrix containing the code and the first co-ordinate word identifies the position of the specified bit within the code.
- the second co-ordinate word is bit reversed since the bit reversed value does not need to be updated during the issue of the code.
- the co-ordinate words are overlapped by a selectable number n of their least significant bits for the masking process and advantageously n can be selected to determine in a simple manner the OVSF matrix C 2 » providing the code.
- the invention provides apparatus for spreading code bit generation, comprising masking means for masking a first co-ordinate word with a second co-ordinate word, the first and second co-ordinate words specifying a bit of a spreading code, and parity generating means for determining the parity of the masked first co-ordinate word to obtain the specified bit.
- the invention also consists in a method of spreading code bit generation, comprising providing two co-ordinate words specifying a bit of a spreading code, masking a first one of the co-ordinate words with the second and determining the parity of the masked first co-ordinate word to obtain the specified bit.
- the invention also extends to methods and apparatus for manipulating a signal, involving at least one of spreading and despreading the signal with spreading code bits generated by a method or apparatus according to the invention.
- the invention can also be implemented as a computer program which, if necessary, can be provided on a data carrier.
- Figures 1 to 3 each show a block diagram of a OVSF code generator
- Figure 4 is a block diagram of an OVSF code generator in a Hadamard code generating mode.
- Figure 1 shows a block diagram of a code generator 20 for generation of an OVSF code C n>x.
- the code generator 20 comprises a binary counter 22 and a mask register 24, both of which provide inputs to a masking unit 26.
- the output of the masking unit 26 is supplied to a parity generator 28.
- the parity generator 28 outputs one OVSF code bit.
- the mask register 24 is loaded with x written in the opposite endianism (bit significance convention) to the counter value.
- register 24 is effectively loaded with a bit reversed version of x.
- the decimal number 3 is the 4 bit binary number 0011 in the bit significance convention where the rightmost bit is the least significant bit and the leftmost bit is the most significant bit, whereas decimal 3 is 1100 in the opposite bit significance convention.
- the masking unit 26 receives the value x from the mask register 24 and the counter value from counter 22. It will be recalled that these values have opposite bit significance conventions and the masking unit 26 needs to align these values before performing the masking operation. The masking unit 26 aligns these values so that their log 2 (n) (always an integer value because n is always a power of 2) least significant bits overlap. The masking is then performed by doing a bitwise AND on the aligned values.
- the following example illustrates the operation of the masking unit where C 8 ,5 is being generated and the counter value is presently 7.
- the parity generator 28 receives a word from the masking unit 26. For each word that it receives, the parity generator 28 outputs a single bit which indicates the parity of the word received from the masking unit 26. It will be seen that, over each group of n successive cycles, the parity bits spell out C n , x . If the longest OVSF code required belongs to matrix C q , then the counter must be capable of counting through at least q values, i.e. the counter must have at least log 2 (q) bits. Typically, the counter runs continuously and generates the bits of the OVSF code at the rate required to provide a constant stream of data to the modulation or demodulation system of a CDMA transceiver.
- the parity generator 28 is generating a continuous stream which is C • 8,3 repeated over and over.
- FIG. 2 shows a block diagram of a modified OVSF code generator 30.
- the generator 30 is similar to generator 20 in that it also comprises a mask register 24, a masking unit 26 and a parity generator 28.
- the counter 22 of Figure 1 has been replaced by a reverse carry adder 32 and a further register 34.
- the mask register 24 contains the binary version of x written such that its rightmost bit is the least significant and the reverse carry adder 32 and register 34 are used to create what is essentially a counter having the opposite bit significance convention.
- Register 34 is loaded with a binary version of decimal 1 written in the opposite endianism to x. For example, where n is 64, register 34 is loaded with the value 100000.
- the reverse carry adder is a common hardware block often used in implementations of fast Fourier transforms (FFTs). It operates in the same way as a nonnal binary adder, except that the carry bit of the add moves in the opposite way to a conventional adder.
- FFTs fast Fourier transforms
- the outputs of the reverse carry adder 32 and the mask register 24 are used by the masking unit 26 and the parity generator 28 to produce the OVSF code C n>x in the same manner as in generator 20. It will be seen that, over each group of n successive cycles, the parity bits spell out C n>x . If the longest OVSF code required belongs to matrix C q , then the adder must be capable of counting through at least q values, i.e. the adder must be capable of outputting a result at least log 2 (q) bits long.
- the output of the parity generator 28 is C 8 ,3.
- FIG. 3 shows a block diagram of another OVSF code generator 40.
- the generator 40 is similar to generators 20 and 30 in that it also comprises a mask register 24, a masking unit 26 and a parity generator 28.
- the code generator 40 also comprises a counter 44, whose output has the same bit significance convention as the value in the mask register. However, a bit reverser operates on the output of the counter 44 to give the counter value the opposite bit significance convention to that of the mask register. The output of the bit reverser is used to provide an input to the masking unit 26.
- the following table illustrates the operation of the counter 44 and the bit reverser 42 for 4 bit words.
- bit reverser 32 is the same as the output of the reverse carry adder 32 in Figure 2.
- mask register 24, masking unit 26 and parity generator 28 in Figure 3 operate analogously to their counterparts in code generator 30, it will be readily understood by the skilled person how the generator 40 produces OVSF codes.
- An OVSF code generator as described in Figure 1, 2 or 3 can be provided with a second mode of operation in which Hadamard codes can be generated by performing the masking operation with the inputs to the masking unit being given the same bit significance convention.
- the concordance of the bit significance conventions could be achieved by re-loading the mask register 24 with a version of x that is not bit-reversed relative to the counter 22.
- the concordance could be achieved by providing a bit-reverser at point BR.
- the concordance could be achieved by providing that the bit-reverser 42 is disabled in the Hadamard code generation mode.
- FIG. 4 shows a block diagram of a code generator 10 for generation of a Hadamard code H Computer ,x .
- the code generator 10 comprises a binary counter 12 and a mask register 14, both of which provide inputs to a masking unit 16.
- the output of the masking unit 16 is supplied to a parity generator 18.
- the parity generator 18 outputs one Hadamard code bit.
- the counter 12 wraps back to the start of the code automatically.
- the mask register 14 is loaded with the value x and the masking unit 16 performs a bitwise AND operation on the output of the counter 12 and the value x from register 14.
- the parity generator 18 receives a word from the masking unit 16.
- the parity generator 18 outputs a single bit which indicates the parity of the word received from the masking unit 16.
- the parity bits spell out H n,x . If the longest Hadamard codes required belong to Hadamard matrix H p , then the counter 12 must be capable of counting through at least 2 P values before wrapping, i.e. the counter 14 must have at least p bits.
- the counter runs continuously and generates the bits of the Hadamard code at the rate required to provide a constant stream of data to the modulation or demodulation system of a CDMA transceiver.
- the parity generator 18 is generating a continuous stream which is H 3j3 repeated over and over.
- Hadamard codes can be used as spreading codes, in UMTS they are typically used as identifier tags in signals.
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Error Detection And Correction (AREA)
- Mobile Radio Communication Systems (AREA)
Abstract
Description
Claims
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP02745695A EP1415422A1 (en) | 2001-08-02 | 2002-08-02 | Code generation |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0118899A GB2378362A (en) | 2001-08-02 | 2001-08-02 | Code generation |
GB0118899.4 | 2001-08-02 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2003013037A1 true WO2003013037A1 (en) | 2003-02-13 |
Family
ID=9919699
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/GB2002/003580 WO2003013037A1 (en) | 2001-08-02 | 2002-08-02 | Code generation |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP1415422A1 (en) |
CN (1) | CN1555623A (en) |
GB (1) | GB2378362A (en) |
WO (1) | WO2003013037A1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2053486A1 (en) * | 2001-04-06 | 2009-04-29 | Interdigital Technology Corporation | System for generating pseudorandom sequences |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1783939A1 (en) * | 2005-11-07 | 2007-05-09 | Alcatel Lucent | Apparatus for generating spreading sequences for a transmitter of a CDMA communication network |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5778416A (en) * | 1993-12-20 | 1998-07-07 | Motorola, Inc. | Parallel process address generator and method |
WO2001050659A1 (en) * | 1999-12-30 | 2001-07-12 | Telit Mobile Terminals S.P.A. | Method and device for orthogonal variable spreading factor codes and hadamard matrices generation |
WO2001050658A1 (en) * | 1999-12-30 | 2001-07-12 | Telit Mobile Terminals S.P.A. | Programmable generator of orthogonal variable spreading factor (ovsf) |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
MY112371A (en) * | 1993-07-20 | 2001-05-31 | Qualcomm Inc | System and method for orthogonal spread spectrum sequence generation in variable data rate systems |
-
2001
- 2001-08-02 GB GB0118899A patent/GB2378362A/en not_active Withdrawn
-
2002
- 2002-08-02 EP EP02745695A patent/EP1415422A1/en not_active Withdrawn
- 2002-08-02 CN CNA028181530A patent/CN1555623A/en active Pending
- 2002-08-02 WO PCT/GB2002/003580 patent/WO2003013037A1/en not_active Application Discontinuation
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5778416A (en) * | 1993-12-20 | 1998-07-07 | Motorola, Inc. | Parallel process address generator and method |
WO2001050659A1 (en) * | 1999-12-30 | 2001-07-12 | Telit Mobile Terminals S.P.A. | Method and device for orthogonal variable spreading factor codes and hadamard matrices generation |
WO2001050658A1 (en) * | 1999-12-30 | 2001-07-12 | Telit Mobile Terminals S.P.A. | Programmable generator of orthogonal variable spreading factor (ovsf) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2053486A1 (en) * | 2001-04-06 | 2009-04-29 | Interdigital Technology Corporation | System for generating pseudorandom sequences |
US7643638B2 (en) | 2001-04-06 | 2010-01-05 | Interdigital Technology Corporation | System for generating pseudorandom sequences |
Also Published As
Publication number | Publication date |
---|---|
GB2378362A (en) | 2003-02-05 |
GB0118899D0 (en) | 2001-09-26 |
EP1415422A1 (en) | 2004-05-06 |
CN1555623A (en) | 2004-12-15 |
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