WO2003003445A1 - Sheet for underfill, method for underfilling semiconductor chip, and method for mounting semiconductor chip - Google Patents

Sheet for underfill, method for underfilling semiconductor chip, and method for mounting semiconductor chip Download PDF

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Publication number
WO2003003445A1
WO2003003445A1 PCT/JP2001/005687 JP0105687W WO03003445A1 WO 2003003445 A1 WO2003003445 A1 WO 2003003445A1 JP 0105687 W JP0105687 W JP 0105687W WO 03003445 A1 WO03003445 A1 WO 03003445A1
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WO
WIPO (PCT)
Prior art keywords
resin layer
wafer
underfill resin
semiconductor chip
underfill
Prior art date
Application number
PCT/JP2001/005687
Other languages
French (fr)
Japanese (ja)
Inventor
Hiroshi Kobayashi
Hidehiko Kira
Katsutoshi Hirasawa
Kenji Kobae
Norio Kainuma
Takatoyo Yamakami
Masumi Katayama
Shunji Baba
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to JP2002531444A priority Critical patent/JP4778667B2/en
Priority to PCT/JP2001/005687 priority patent/WO2003003445A1/en
Publication of WO2003003445A1 publication Critical patent/WO2003003445A1/en

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    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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Definitions

  • the present invention relates to an underfill sheet material used for filling between bumps provided on a semiconductor chip, a method for underfilling a semiconductor light chip, and a method for mounting a semiconductor chip.
  • an underfill resin material made of an insulating material should be filled between the chip and the substrate to protect the circuit surface of the semiconductor chip, prevent humming of the bumps, and improve the bonding strength between the chip and the substrate. ing.
  • This resin material is generally filled with a liquid resin material for each individual semiconductor chip using a dispenser.
  • this method requires a great deal of work time.
  • the dispenser has a problem that the resin supply is unstable, leaving unfilled parts and increasing the amount of resin overflow.
  • an underfill resin material (resin layer) formed in a sheet shape with bumps formed on a wafer.
  • a method of pressing a bump on a wafer surface on which bumps are formed, so that the bumps are buried in an underfill resin material is known. According to this, the underfill resin material can be supplied collectively at the wafer stage, and the working efficiency can be greatly improved.
  • the wafer After supplying the underfill resin material as described above, The wafer can be diced and separated into individual semiconductor chips with an underfill resin material.
  • the semiconductor chip separated in this manner is mounted on a mounting board, and the underfill resin material is cured by heat.
  • a resin sealing film is spin-coated on the upper surface of the wafer so that the upper portion of the bump protrudes at the stage when the bump is formed on the wafer. After forming the wafer, the wafer is cut and separated into individual semiconductor chips.
  • a sealing resin sheet is placed on the eight sides on which the bumps are formed, and the wafer and the sealing resin sheet are bonded together under heating. After that, the wafer is cut and separated into individual semiconductor chips.
  • a support film on which a resin layer is formed is thermocompression-bonded so that the resin layer is in contact with the wafer surface, and then the resin layer is light-cured, and the support film is cured. After peeling, the wafer is cut and separated into individual semiconductor chips.
  • the underfill resin layer 12 formed on the release sheet 10 is pressed against the surface of the wafer 14 on which the bumps 13 are formed, and the underfill resin layer 1 is pressed.
  • the bump 13 is buried in 2 and the release sheet 10 is peeled off to obtain a wafer 14 with an underfill resin material (FIG. 21).
  • the wafer 14 In order to dice the wafer 14, the wafer 14 is fixed to the ring frame 16 on a known die-sinder film 15 with an adhesive (FIG. 22), and the ring frame 16 is fixed to the ring frame 16. The wafer 14 is cut and separated into individual semiconductor chips together with the underfill resin layer 12 in a state where the dicing film 15 is not cut and the wafer 14 is not cut.
  • the adhesive lowers the adhesive force, so that the individual semiconductor chips with the underfill resin material can be easily taken out from the dicing film 15. Can be.
  • the step of pressing the underfill resin layer 12 against the wafer 14 to obtain the wafer 14 with the underfill resin material and the step of bonding the wafer 14 to the dicing film 15 There is a problem that two separate steps are required, and the number of steps increases, leading to an increase in cost.
  • the present invention has been made to solve the above problems, and has as its object to reduce the number of steps and cost, to provide an underfill sheet material, a semiconductor chip underfill method, and the like.
  • An object of the present invention is to provide a semiconductor chip mounting method.
  • the semiconductor chip underfill method in the semiconductor chip underfill method in which the space between bumps provided on the semiconductor chip is filled with an underfill resin material, covers a surface of a wafer on which a large number of semiconductor chips are built.
  • the underfill resin of the underfill sheet material in which a release sheet larger than the underfill resin layer and peelable from the underfill resin layer is laminated on one side of the underfill resin layer having a size that can be removed.
  • FIG. 1 is an explanatory view of the underfill sheet material after the dicing film has been peeled off
  • FIG. 2 is an explanatory view of a state in which the dicing sheet and the release sheet have been peeled off from the underfill sheet material.
  • FIG. 3 is an explanatory view of a step of pressing the wafer and the underfill resin layer by a pressing roller.
  • FIG. 4 is an explanatory view showing a state in which the wafer is supported by a ring frame.
  • FIG. 6 is an explanatory view of a semiconductor chip in a state of being separated into individual pieces
  • FIG. 6 is an explanatory view of a process of mounting the semiconductor chip on a substrate
  • FIG. 7 is an explanatory view showing a state in which the semiconductor chip is mounted on a substrate.
  • FIG. 8 is an explanatory diagram showing a dicing process using a wide first blade
  • FIG. 9 is an explanatory diagram showing a dicing process using a narrow second blade
  • FIG. Separated into FIG. 11 is an explanatory view of a semiconductor chip.
  • FIG. 11 is an explanatory view of a state in which the semiconductor chip of FIG. 10 is mounted on a substrate.
  • FIG. 12 is a diagram of dicing using a first blade having a V-shaped cross section.
  • FIG. 13 is an explanatory diagram showing a process
  • FIG. 13 is an explanatory diagram showing a dicing process using a narrow second blade
  • FIG. 14 is an explanatory diagram of a semiconductor chip separated into individual pieces.
  • 15 is an explanatory view showing a state in which the semiconductor chip of FIG. 14 is mounted on a board
  • FIG. 16 is an explanatory view showing a state in which the board is mounted with the semiconductor chip arranged on the upper side and the semiconductor chip on the lower side.
  • FIG. 17 is an explanatory view of a state in which a concave groove is formed in the substrate to form a resin pool
  • FIG. 18 is an explanatory view of a state in which a concave section is formed in the substrate to form a resin pool
  • FIGS. 20 to 22 are explanatory views of a state in which a through hole is provided in a substrate to form a resin pool.
  • FIG. 20 is an explanatory diagram of a step of laminating an underfill resin layer on a wafer
  • FIG. 21 is an explanatory diagram of a wafer in a state where an underfill resin layer is laminated.
  • FIG. 22 is an explanatory view of a state where the wafer and the ring frame are bonded to the dicing film.
  • FIG. 1 shows a sheet material 20 for underfill.
  • underfill resin layer 21 is an underfill resin layer formed in a sheet shape.
  • This underfill A peeling sheet 22 that can be peeled off by the adhesive force of the underfill resin layer 21 is laminated on both surfaces of the resin layer 12.
  • a known die cinda film 23 with an adhesive is attached to the outer surface of one of the release sheets 22 with the adhesive to form an underfill sheet material 20.
  • the underfill resin layer 21 is large enough to cover the surface of the wafer, and the release sheet 22 and the dicing film 23 are larger than the underfill resin layer 21.
  • the reason why the peeling sheet 22 is interposed between the underfill resin layer 21 and the Daishinda Film 23 is that the underfill resin layer 21 and the Daishinda Film 23 are firmly bonded to each other and peeled off. This is to prevent inability to do so. Further, since both surfaces of the underfill resin layer 21 are covered with the sheet material, adhesion of foreign substances such as dust is prevented, and handling becomes easy.
  • the underfill resin material 21 is made of a thermosetting resin.
  • a thermosetting resin for example, an epoxy resin mixed with about 60 wt% of a filler and a curing agent added thereto is an example. However, it is not limited to this.
  • the thickness is preferably about 60 im.
  • a sheet of polyethylene terephthalate (PET) having a thickness of about 30 m can be used.
  • a sheet material having a strength capable of supporting the attached wafer for example, a vinyl chloride sheet can be used.
  • An adhesive is applied to the surface of the dicing film 23, and the adhesive whose adhesive strength is weakened by ultraviolet irradiation is used.
  • the following method is used to laminate the underfill resin layer 21 on a semiconductor chip using the underfill sheet material 20 described above.
  • the Daishinda film 23 is peeled off.
  • the intermediate release sheet 22 is peeled off and removed. These operations may be performed manually, but can be performed by an automatic machine (not shown).
  • the separated dicing film 23 and the underfill resin layer 21 are held such that a required gap is maintained.
  • the wafer 25 is bumped (gold wire)
  • the bump 26 is inserted so as to face the underfill resin layer 21 in the direction of the underfill resin layer 21 and the ring frame 27 surrounds the wafer 25.
  • the insertion of the wafer 25 and the ring frame 27 can be performed by an automatic machine.
  • the pressing rollers 28, 28 provided in the automatic machine are run, and the pressing rollers 28, 28 are used to move the pressing rollers 28, 28 through the die cinda film 23 and the release sheet 22.
  • the bump 26 is buried in the underfill resin layer 21.
  • the tip of the bump 26 since the tip of the bump 26 is sharp, the tip may protrude from the underfill resin layer 21. You may.
  • the peeling sheet 22 is peeled off.
  • a step of laminating the underfill resin layer 21 on the wafer 25 with the bump 26 buried in the underfill resin layer 21 and a step of dicing the wafer 25 and the cylinder frame 27 into a dicing film 23 The process of bonding on top can be performed at the same time, greatly improving workability, shortening work time, and reducing costs.
  • the wafer 25 held by the ring frame 27 is mounted on a known dicing apparatus (not shown), and the wafer 25 is cut together with the underfill resin layer 21 to form individual semiconductors. Separate into chips 30 ( Figure 5).
  • the Daishinda film 23 is shallow and only cuts about 30 m, and the Daishinda film 23 is not separated.
  • the Daishinda Film 23 is irradiated with ultraviolet rays. This weakens the adhesive force of the adhesive.
  • the semiconductor chip 3 which is separated into individual pieces; 0 adsorbed by the adsorption Roh nozzle (not shown), placed in position on the substrate 3 1, pressurization, heating By doing so, the semiconductor chip 30 can be mounted on the substrate 31 (FIGS. 6 and 7).
  • the heating causes the underfill resin material to harden thermally, but slightly protrudes. However, since the supply of underfill resin material is constant, the amount of protrusion is also constant.
  • FIGS. 8 to 11 show a second embodiment.
  • a relatively wide, for example, a 40 m-width first blade (not shown) is used to form an intermediate portion of the thickness of the wafer 25 from the underfill resin layer 21 side. Cut into the groove formed by the first blade with a second blade (not shown), which is narrower than the first blade, for example, 25 m wide, They are separated into individual semiconductor chips 30 (Fig. 9). By doing so, 30 is formed on the individual semiconductor chip having the step 32 formed on the periphery (FIG. 10).
  • the semiconductor chip 30 is mounted on the substrate 31 in the same manner as described above.
  • the underfill resin material protrudes, but the step 32 forms a pool of resin, which minimizes the resin material protruding (Fig. 11).
  • FIGS. 12 to 15 show a third embodiment.
  • a first blade (not shown) having a V-shaped cross section is cut from the underfill resin layer 21 side to an intermediate part of the thickness of the wafer 25 to obtain a cross section V.
  • a V-shaped groove is formed (Fig. 12), and then a V-shaped groove formed by the first blade is cut by a second blade narrower than the first blade to form individual pieces.
  • Semiconductor chip 30 (Fig. 13). As a result, a semiconductor chip 30 having the chamfered portion 33 formed on the periphery is formed (FIG. 14).
  • the semiconductor chip 30 is mounted on the substrate 31 in the same manner as described above.
  • the underfill resin material protrudes, but the chamfered part 33 becomes a pool of resin, so that the resin material can be minimized (Fig. 15).
  • FIG. 16 shows an embodiment in which the semiconductor chip 30 is mounted on the substrate 31 with the substrate 31 on the upper side and the semiconductor chip 30 on the lower side.
  • the softened underfill resin material hangs down so as to cover the side surfaces of the semiconductor chip 30, so that the underfill resin material protrudes outward. That can be reduced.
  • FIG. 17 shows another embodiment for preventing the resin from overflowing.
  • a concave groove 34 is provided around the semiconductor chip mounting portion of the substrate 31 so as to surround the semiconductor chip 30 to be mounted. Since the concave groove 34 functions as a resin pool, the protrusion of the underfill resin material can be reduced.
  • the groove 34 is preferably provided shallowly in the surface solder resist layer so as not to reach the wiring pattern (not shown) of the substrate 31. '
  • FIG. 18 shows a configuration in which the mounting portion of the semiconductor chip 30 is a concave portion 35.
  • the concave portion 35 itself functions as a resin pool.
  • FIG. 19 shows an embodiment in which a through hole 36 is provided in the substrate 31 to form a resin pool. The invention's effect
  • the underfill sheet material of the present invention since the release sheet is interposed between the underfill resin layer and the Daishinda film, the underfill resin layer and the Daishinda film are formed. It can be firmly adhered to prevent peeling, and since both sides of the underfill resin layer are covered with sheet material, foreign substances such as dust are prevented from adhering and handling becomes easy.
  • a step of laminating an underfill resin layer on a wafer in a state in which bumps are buried in an underfill resin layer and a step of bonding the wafer and a ring frame on a die-synda film.
  • the process can be performed at the same time, greatly improving workability, shortening work time, and reducing costs.
  • the semiconductor chip is provided with a resin pool consisting of steps or chamfers, or the substrate side is provided with a resin pool consisting of concave grooves, recesses, and through holes, the underfill resin material can be obtained when the semiconductor chip is mounted on the substrate. This is preferable because the protrusion can be prevented as much as possible.

Abstract

A method for underfilling a semiconductor chip with reduced man-hour and cost. The method is characterized by comprising the steps of disposing a wafer which has bumps and in which numeral semiconductor chips are fabricated between the underfill resin layer of an underfill sheet composed of an underfill resin layer and a separable sheet provided on the underfill resin layer, larger than the underfill resin layer, and separable from the underfill resin layer and an adhesive layer of a dicing film coated with an adhesive, the bump being oriented toward the underfill resin layer and disposing a ring frame surrounding the wafer; pressing the dicing film and the separable sheet through the wafer and the ring frame to join the wafer and ring frame to a dicing frame and to bury the bumps of the wafer in the underfill resin layer; and separating the separable sheet.

Description

アンダーフィル用シ一卜材、 半導体チップのアンダーフィル方法および半導体 チップの実装方法 技術分野  Underfill sheet material, semiconductor chip underfill method, and semiconductor chip mounting method
本発明は、 半導体チップに設けられたバンプのバンプ間を埋めるために用いる アンダーフィル用シート材、 半導体明チップのアンダーフィル方法および半導体チ ップの実装方法に関する。 田 背景技術  The present invention relates to an underfill sheet material used for filling between bumps provided on a semiconductor chip, a method for underfilling a semiconductor light chip, and a method for mounting a semiconductor chip. Field background technology
半導体チップを基板 （配線基板、 パッケージを含む） に実装する場合、 半導体 チップにバンプを形成し、 このバンプを介して半導体チップを基板にフリツプチ ップ実装する方法がある。  When mounting a semiconductor chip on a substrate (including a wiring board and a package), there is a method in which a bump is formed on the semiconductor chip, and the semiconductor chip is flip-chip mounted on the substrate via the bump.
この場合、 半導体チップの回路面の保護、 バンプの腐植防止、 チップと基板と の接合強度の向上等のため、 チップと基板との間に、 絶縁材料からなるアンダー フィル樹脂材を充填するようにしている。  In this case, an underfill resin material made of an insulating material should be filled between the chip and the substrate to protect the circuit surface of the semiconductor chip, prevent humming of the bumps, and improve the bonding strength between the chip and the substrate. ing.
この樹脂材の充填は、 一般的には、 液状の樹脂材をディスペンサーを用いて、 個々の半導体チップ毎に充填するようにしている。 しかしながら、 この方法では、 非常に多くの作業時間を要する。 またディスペンサーでは樹脂の供給量が不安定 であり、 未充填個所が残ったり、 逆に樹脂のはみ出しが多くなつたりする課題が ある。  This resin material is generally filled with a liquid resin material for each individual semiconductor chip using a dispenser. However, this method requires a great deal of work time. In addition, the dispenser has a problem that the resin supply is unstable, leaving unfilled parts and increasing the amount of resin overflow.
この課題を解決するものとして、 例えば、 特開平 5— 5 5 2 7 8号公報に示さ れるように、 ウェハにバンプを形成した状態で、 シート状に形成したアンダーフ ィル樹脂材 （樹脂層） をバンプが形成されたウェハ面に押し付け、 バンプをアン ダーフィル樹脂材に埋没させるようにする方法が知られている。 これによれば、 ウェハの段階で一括してアンダーフィル樹脂材を供給でき、 作業効率の大幅な改 善ができる。  To solve this problem, for example, as shown in Japanese Patent Application Laid-Open No. 5-52578, an underfill resin material (resin layer) formed in a sheet shape with bumps formed on a wafer. There is known a method of pressing a bump on a wafer surface on which bumps are formed, so that the bumps are buried in an underfill resin material. According to this, the underfill resin material can be supplied collectively at the wafer stage, and the working efficiency can be greatly improved.
上記のようにアンダーフィル樹脂材を供給した後、 アンダーフィル樹脂材と共 にゥェ八をダイシングし、 アンダーフィル樹脂材付きの個片の半導体チップに分 離できる。 After supplying the underfill resin material as described above, The wafer can be diced and separated into individual semiconductor chips with an underfill resin material.
このように分離した半導体チップを実装基板に実装し、 アンダーフィル樹脂材 を熱硬化させればよいのである。  The semiconductor chip separated in this manner is mounted on a mounting board, and the underfill resin material is cured by heat.
また、 特開平 8— 2 8 8 2 9 3号公報に示される方法では、 ウェハにバンプを 形成した段階で、 バンプの上部が突出するように、 ウェハの上面に樹脂封止膜を スピンコートして形成した後、 ウェハを個片の半導体チップに切断、 分離するよ うにしている。  According to the method disclosed in Japanese Patent Application Laid-Open No. 8-28893, a resin sealing film is spin-coated on the upper surface of the wafer so that the upper portion of the bump protrudes at the stage when the bump is formed on the wafer. After forming the wafer, the wafer is cut and separated into individual semiconductor chips.
また、 特開 2000- 299333号公報に示される方法では、 バンプが形成されたゥェ 八面に封止用樹脂シートを載置し、 加熱下で、 ウェハと封止用樹脂シートとを貼 り合わせ、その後ウェハを個片の半導体チップに切断、分離するようにしている。 さらに、 特開 2000-195901号公報に示される方法では、 樹脂層が形成された支 持フィルムを樹脂層がウェハ表面と接触するように熱圧着し、 次いで樹脂層を光 硬化し、 支持フィルムを剥離した後、 ゥェ Λを個片の半導体チップに切断、 分離 するようにしている。  Further, in the method disclosed in Japanese Patent Application Laid-Open No. 2000-299333, a sealing resin sheet is placed on the eight sides on which the bumps are formed, and the wafer and the sealing resin sheet are bonded together under heating. After that, the wafer is cut and separated into individual semiconductor chips. Further, in the method disclosed in Japanese Patent Application Laid-Open No. 2000-195901, a support film on which a resin layer is formed is thermocompression-bonded so that the resin layer is in contact with the wafer surface, and then the resin layer is light-cured, and the support film is cured. After peeling, the wafer is cut and separated into individual semiconductor chips.
しかしながら、例えば、上記特開平 5— 5 5 2 7 8号公報に示される方法では、 図 2 0〜図 2 2に示す工程によらなければならない。  However, for example, in the method disclosed in Japanese Patent Application Laid-Open No. 5-52578, the process shown in FIGS. 20 to 22 must be performed.
すなわち、 まず、 図 2 0に示すように、 剥離シート 1 0上に形成されたアンダ 一フィル樹脂層 1 2を、 バンプ 1 3が形成されたウェハ 1 4の面に押し付けてァ ンダーフィル樹脂層 1 2にバンプ 1 3を埋没させ、 剥離シート 1 0を剥離して、 アンダーフィル樹脂材付きのウェハ 1 4 (図 2 1 ) を得る。  That is, first, as shown in FIG. 20, the underfill resin layer 12 formed on the release sheet 10 is pressed against the surface of the wafer 14 on which the bumps 13 are formed, and the underfill resin layer 1 is pressed. The bump 13 is buried in 2 and the release sheet 10 is peeled off to obtain a wafer 14 with an underfill resin material (FIG. 21).
このウェハ 1 4をダイシングするために、 公知の、.接着剤付きのダイシンダフ イルム 1 5上に、 ウェハ 1 4と'」ングフレーム 1 6とを固定し (図 2 2 )、 リング フレーム 1 6を介してダイシング装置 (図示せず) に装着し、 ダイシングフィル ム 1 5を切り込まない状態にウェハ 1 4をアンダーフィル樹脂層 1 2と共に個片 の半導体チップに切断、 分離するのである。  In order to dice the wafer 14, the wafer 14 is fixed to the ring frame 16 on a known die-sinder film 15 with an adhesive (FIG. 22), and the ring frame 16 is fixed to the ring frame 16. The wafer 14 is cut and separated into individual semiconductor chips together with the underfill resin layer 12 in a state where the dicing film 15 is not cut and the wafer 14 is not cut.
ダイシングフィルム 1 5は、 紫外線を照射することによって、 接着剤はその接 着力を低下させるので、 ダイシンダフイルム 1 5から、 個片にした、 アンダーフ ィル樹脂材付きの半導体チップを容易に取り出すことができる。 しかしながら、 この工程では、 ウェハ 1 4にアンダーフィル樹脂層 1 2を押し 付けて、 アンダーフィル樹脂材付きのウェハ 1 4を得る工程と、 このウェハ 1 4 をダイシングフィルム 1 5に接着する工程との 2段階の別工程が必要となり、 ェ 数が増大して、 それだけコストの上昇を招くという課題がある。 When the dicing film 15 is irradiated with ultraviolet light, the adhesive lowers the adhesive force, so that the individual semiconductor chips with the underfill resin material can be easily taken out from the dicing film 15. Can be. However, in this step, the step of pressing the underfill resin layer 12 against the wafer 14 to obtain the wafer 14 with the underfill resin material and the step of bonding the wafer 14 to the dicing film 15 There is a problem that two separate steps are required, and the number of steps increases, leading to an increase in cost.
上記他の 3つの従来方法の場合にも、 同様に、 アンダーフィル樹脂材付きのゥ ェハ 1 4を得る工程と、 このウェハ 1 4をダイシンダフイルム 1 5に接着するェ 程との 2段階の別工程が必要となるという課題がある。 発明の開示  Similarly, in the case of the other three conventional methods described above, similarly, two steps of a step of obtaining a wafer 14 with an underfill resin material and a step of bonding this wafer 14 to a die cinda film 15 There is a problem that another process is required. Disclosure of the invention
そこで、 本発明は上記課題を解決すべくなされたものであり、 その目的とする ところは、 工数を減じ、 コストの低減化が図れる、 アンダーフィル用シ一ト材、 半導体チップのアンダーフィル方法および半導体チップの実装方法を提供するに ある。  SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has as its object to reduce the number of steps and cost, to provide an underfill sheet material, a semiconductor chip underfill method, and the like. An object of the present invention is to provide a semiconductor chip mounting method.
本発明に係る半導体チップのアンダーフィル方法では、 半導体チップに設けら れたバンプ間をアンダーフィル樹脂材で埋める半導体チップのアンダーフィル方 法において、 半導体チップが多数造り込まれたウェハの表面を覆うことのできる 大きさの前記アンダーフィル樹脂層の片面側に、 該アンダーフィル樹脂層よりも 大きく、 アンダーフィル樹脂層から剥離可能な剥離シートが積層されたアンダー フィル用シー卜材の該アンダーフィル樹脂層側と、 接着剤が塗布されたダイシン グフィルムの該接着剤層側との間に、 バンプをアンダーフィル樹脂層側に向けて ウェハと、 該ウェハを囲むリングフレームとを配置する工程と、 前記ウェハとリ ングフレームとを介在させて、前記ダイシンダフイルムと剥離シートとを押圧し、 ウェハとリングフレームとを前記ダイシンダフレームに接着すると共に、 ウェハ のバンプを前記アンダーフィル樹脂層に埋没させる押圧工程と、 前記剥離シート を剥離する剥離工程とを含むことを特徴としている。  In the semiconductor chip underfill method according to the present invention, in the semiconductor chip underfill method in which the space between bumps provided on the semiconductor chip is filled with an underfill resin material, the semiconductor chip underfill method covers a surface of a wafer on which a large number of semiconductor chips are built. The underfill resin of the underfill sheet material, in which a release sheet larger than the underfill resin layer and peelable from the underfill resin layer is laminated on one side of the underfill resin layer having a size that can be removed. A step of disposing a wafer and a ring frame surrounding the wafer with the bumps facing the underfill resin layer side between the layer side and the adhesive layer side of the adhesive-coated dicing film; With the wafer and the ring frame interposed, the die cinda film and the release sheet are pressed, Thereby bonding the ring frame to the dicing da frame, is characterized in that it comprises a pressing step of burying the bump of the wafer to the underfill resin layer, and a peeling step of peeling the release sheet.
このように、 本発明では、 ウェハへのアンダーフィル樹脂層の積層と、 ウェハ およびリングフレームのダイシングフィルムへの接着とを同一の工程で行えるの で、 工数が減じられ、 コストの低減化を図ることができる。 また、 ウェハのハン ドリングも容易となる。 図面の簡単な説明 As described above, according to the present invention, since the lamination of the underfill resin layer on the wafer and the bonding of the wafer and the ring frame to the dicing film can be performed in the same process, the number of steps is reduced, and the cost is reduced. be able to. Also, wafer handling becomes easy. BRIEF DESCRIPTION OF THE FIGURES
図 1は、 ダイシングフィルムを剥離した状態のアンダーフィル用シート材の説 明図であり、 図 2は、 アンダーフィル用シート材から、 ダイシンダフイルムと剥 離シートを剥離した状態の説明図であり、 図 3は、 押圧ローラにより、 ウェハと アンダーフィル樹脂層とを加圧する工程の説明図であり、 図 4は、 リングフレー ムにウェハが支持された状態を示す説明図であり、 周 5は個片に分離された状態 の半導体チップの説明図であり、 図 6は半導体チップを基板に実装する工程の説 明図であり、 図 7は基板に半導体チップが実装された状態を示す説明図であり、 図 8は幅広の第 1のブレードによるダイシング工程を示す説明図であり、 図 9は 幅狭の第 2のブレードによるダイシング土程を示す説明図であり、 図 1 0は、 個 片に分離された半導体チップの説明図であり、 図 1 1は、 図 1 0の半導体チップ を基板に実装した状態の説明図であり、 図 1 2は断面 V字状の切刃を有する第 1 のブレードによるダイシング工程を示す説明図であり、 図 1 3は幅狭の第 2のブ レードによるダイシング工程を示す説明図であり、 図 1 4は個片に分離された半 導体チップの説明図であり、 図 1 5は、 図 1 4の半導体チップを基板に実装した 状態の説明図であり、 図 1 6は、 基板を上側に、 半導体チップを下側に配置して 実装した状態を示す説明図であり、 図 1 7は、 基板に凹溝を設けて樹脂溜まりと した状態の説明図であり、 図 1 8は、 基板に凹部を設けて樹脂溜まりとした状態 の説明図であり、 図 1 9は、 基板に貫通孔を設けて樹脂溜まりとした状態の説明 図であり、 図 2 0〜図 2 2は従来技術の説明図であり、 図 2 0は、 ウェハにアン ダーフィル樹脂層を積層する工程の説明図であり、 図 2 1は、 アンダーフィル樹 脂層が積層された状態のウェハの説明図であり、 図 2 2は、，ウェハとリングフレ ームをダイシングフィルムに接着した状態の説明図である。 発明を実施するための最良の形態  FIG. 1 is an explanatory view of the underfill sheet material after the dicing film has been peeled off, and FIG. 2 is an explanatory view of a state in which the dicing sheet and the release sheet have been peeled off from the underfill sheet material. FIG. 3 is an explanatory view of a step of pressing the wafer and the underfill resin layer by a pressing roller. FIG. 4 is an explanatory view showing a state in which the wafer is supported by a ring frame. FIG. 6 is an explanatory view of a semiconductor chip in a state of being separated into individual pieces, FIG. 6 is an explanatory view of a process of mounting the semiconductor chip on a substrate, and FIG. 7 is an explanatory view showing a state in which the semiconductor chip is mounted on a substrate. FIG. 8 is an explanatory diagram showing a dicing process using a wide first blade, FIG. 9 is an explanatory diagram showing a dicing process using a narrow second blade, and FIG. Separated into FIG. 11 is an explanatory view of a semiconductor chip. FIG. 11 is an explanatory view of a state in which the semiconductor chip of FIG. 10 is mounted on a substrate. FIG. 12 is a diagram of dicing using a first blade having a V-shaped cross section. FIG. 13 is an explanatory diagram showing a process, FIG. 13 is an explanatory diagram showing a dicing process using a narrow second blade, and FIG. 14 is an explanatory diagram of a semiconductor chip separated into individual pieces. 15 is an explanatory view showing a state in which the semiconductor chip of FIG. 14 is mounted on a board, and FIG. 16 is an explanatory view showing a state in which the board is mounted with the semiconductor chip arranged on the upper side and the semiconductor chip on the lower side. FIG. 17 is an explanatory view of a state in which a concave groove is formed in the substrate to form a resin pool, FIG. 18 is an explanatory view of a state in which a concave section is formed in the substrate to form a resin pool, and FIG. FIGS. 20 to 22 are explanatory views of a state in which a through hole is provided in a substrate to form a resin pool. FIGS. FIG. 20 is an explanatory diagram of a step of laminating an underfill resin layer on a wafer, and FIG. 21 is an explanatory diagram of a wafer in a state where an underfill resin layer is laminated. FIG. 22 is an explanatory view of a state where the wafer and the ring frame are bonded to the dicing film. BEST MODE FOR CARRYING OUT THE INVENTION
以下本発明の好適な実施例を添付図面に基づいて詳細に説明する。  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
(第 1実施例）  (First embodiment)
図 1は、 アンダーフィル用シ一ト材 2 0を示す。  FIG. 1 shows a sheet material 20 for underfill.
2 1はシート状に形成されたアンダーフィル樹脂層である。 このアンダーフィ ル樹脂層 1 2の両面に、 アンダーフィル樹脂層 2 1の接着力により、 剥離可能な 剥離シ一卜 2 2が積層される。 そして、 一方の剥離シート 2 2の外面に、 接着剤 付きの公知のダイシンダフイルム 2 3がその接着剤により貼付されてアンダーフ ィル用シート材 2 0が構成される。 21 is an underfill resin layer formed in a sheet shape. This underfill A peeling sheet 22 that can be peeled off by the adhesive force of the underfill resin layer 21 is laminated on both surfaces of the resin layer 12. Then, a known die cinda film 23 with an adhesive is attached to the outer surface of one of the release sheets 22 with the adhesive to form an underfill sheet material 20.
アンダーフィル樹脂層 2 1は、，ウェハの表面を覆うに足りる十分な大きさのも のであり、 剥離シート 2 2やダイシングフィルム 2 3はアンダーフィル樹脂層 2 1よりも大きなものが用いられる。  The underfill resin layer 21 is large enough to cover the surface of the wafer, and the release sheet 22 and the dicing film 23 are larger than the underfill resin layer 21.
アンダーフィル樹脂層 2 1とダイシンダフイルム 2 3との間に剥離シ一ト 2 2 を介在させるのは、 アンダーフィル樹脂層 2 1とダイシンダフイルム 2 3とが強 固に接着して、 剥離不能になるのを防止するためである。 また、 アンダーフィル 樹脂層 2 1の両面がシート材で覆われるので、 ゴミ等の異物の付着が防止され、 ハンドリングも容易となる。  The reason why the peeling sheet 22 is interposed between the underfill resin layer 21 and the Daishinda Film 23 is that the underfill resin layer 21 and the Daishinda Film 23 are firmly bonded to each other and peeled off. This is to prevent inability to do so. Further, since both surfaces of the underfill resin layer 21 are covered with the sheet material, adhesion of foreign substances such as dust is prevented, and handling becomes easy.
アンダーフィル樹脂材 2 1は、 熱硬化性樹脂からなる。 例えば、 エポキシ樹脂 にフイラ一を 6 0 wt %程度混入し、 硬化剤を添加したものがー例として挙げられ る。 しかし、 これに限定されるものではない。厚さは 6 0 i m程度が好適である。 剥離シート 2 2は、 例えば、 厚さ 3 0 m程度のポリエチレンテレフ夕レート ( P E T ) のシートを用いることができる。 ·  The underfill resin material 21 is made of a thermosetting resin. For example, an epoxy resin mixed with about 60 wt% of a filler and a curing agent added thereto is an example. However, it is not limited to this. The thickness is preferably about 60 im. As the release sheet 22, for example, a sheet of polyethylene terephthalate (PET) having a thickness of about 30 m can be used. ·
ダイシングフィルム 2 3は、 貼付されたウェハを支持できる強度を有するシー ト材、 例えば塩化ビニルシートが使用可能である。 このダイシングフィルム 2 3 の表面には、 接着剤が塗布されており、 この接着剤は紫外線照射によりその接着 力が弱いものとなるものが使用される。  As the dicing film 23, a sheet material having a strength capable of supporting the attached wafer, for example, a vinyl chloride sheet can be used. An adhesive is applied to the surface of the dicing film 23, and the adhesive whose adhesive strength is weakened by ultraviolet irradiation is used.
上記アンダーフィル用シ一ト材 2 0を用いて、 半導体チップにアンダーフィル 樹脂層 2 1を積層するには次のようにする。  The following method is used to laminate the underfill resin layer 21 on a semiconductor chip using the underfill sheet material 20 described above.
まず、 図 2に示すように、 ダイシンダフイルム 2 3を剥離する。 また中間の剥 離シート 2 2を剥離し、 かつ除去する。 これらの作業は、 手作業で行ってもよい が、 自動機 （図示せず） で行える。  First, as shown in FIG. 2, the Daishinda film 23 is peeled off. The intermediate release sheet 22 is peeled off and removed. These operations may be performed manually, but can be performed by an automatic machine (not shown).
自動機中では、 剥離されたダイシングフィルム 2 3と、 アンダーフィル樹脂層 2 1との間に所要の隙間が維持されるように保持される。  In the automatic machine, the separated dicing film 23 and the underfill resin layer 21 are held such that a required gap is maintained.
次に、 図 3に示すように、 上記の隙間内に、 ウェハ 2 5がバンプ （金のワイヤ バンプ） 2 6をアンダーフィル樹脂層 2 1方向に向けてアンダーフィル樹脂層 2 1上に乗るように、 また、 リングフレーム 2 7がウェハ 2 5を囲.むようにして揷 入される。 このウェハ 2 5とリングフレーム 2 7の挿入も自動機で行える。 Next, as shown in Fig. 3, the wafer 25 is bumped (gold wire) The bump 26 is inserted so as to face the underfill resin layer 21 in the direction of the underfill resin layer 21 and the ring frame 27 surrounds the wafer 25. The insertion of the wafer 25 and the ring frame 27 can be performed by an automatic machine.
次に、 自動機内に配設されている押圧ローラ 2 8、 2 8を走行させ、 該押圧口 —ラ 2 8、 2 8により、 ダイシンダフイルム 2 3と剥離シート 2 2を介して、 ゥ ェハ 2 5とアンダーフィル樹脂層 2 1とを押圧する。  Next, the pressing rollers 28, 28 provided in the automatic machine are run, and the pressing rollers 28, 28 are used to move the pressing rollers 28, 28 through the die cinda film 23 and the release sheet 22. C Press 25 and the underfill resin layer 21.
これにより'、 バンプ 2 6が、 アンダーフィル樹脂層 2 1内に埋没する状態とな る。  As a result, the bump 26 is buried in the underfill resin layer 21.
金のワイヤバンプの場合には、 バンプ 2 6の先端が尖っているので、 先端がァ ンダーフィル樹脂層 2 1から突出することもあるが、 先端は必ずしもアンダーフ ィル樹脂層 2 1から突出しないようにしてもよい。  In the case of a gold wire bump, since the tip of the bump 26 is sharp, the tip may protrude from the underfill resin layer 21. You may.
次いで剥離シ一卜 2 2を剥離する。  Next, the peeling sheet 22 is peeled off.
上記のようにして、 図 4に示すように、 アンダーフィル樹脂層 2 1にバンプ 2 6が埋没した状態のゥェ Λ 2 5と、 リングフレーム 2 7とをダイシンダフイルム 2 3に接着した状態のものを準備できる。  As described above, as shown in FIG. 4, a state where the bumps 26 are buried in the underfill resin layer 21 and the ring frame 27 are bonded to the die-sinder film 23 I can prepare things.
しかも、 ウェハ 2 5に、 アンダーフィル樹脂層 2 1にバンプ 2 6が埋没する状 態でアンダーフィル樹脂層 2 1を積層させる工程と、 このウェハ 2 5およびリン ダフレーム 2 7をダイシングフィルム 2 3上に接着する工程とを同時に行うこと ができ、 作業性が大幅に向上し、 作業時間も短縮できて、 コストの低減化が図れ るのである。  Moreover, a step of laminating the underfill resin layer 21 on the wafer 25 with the bump 26 buried in the underfill resin layer 21 and a step of dicing the wafer 25 and the cylinder frame 27 into a dicing film 23 The process of bonding on top can be performed at the same time, greatly improving workability, shortening work time, and reducing costs.
上記のように、 リングフレーム 2 7に保持されたウェハ 2 5を公知のダイシン グ装置 （図示せず） に装着し、 アンダーフィル樹脂層 2 1と共にウェハ 2 5を切 断して個片の半導体チップ 3 0 (図 5 ) に分離する。 なお、 ダイシンダフイルム 2 3には、 浅く、 約 3 0 m程度切り込むだけであり、 ダイシンダフイルム 2 3 は分離しない。  As described above, the wafer 25 held by the ring frame 27 is mounted on a known dicing apparatus (not shown), and the wafer 25 is cut together with the underfill resin layer 21 to form individual semiconductors. Separate into chips 30 (Figure 5). The Daishinda film 23 is shallow and only cuts about 30 m, and the Daishinda film 23 is not separated.
次に、 ダイシンダフイルム 2 3に紫外線を照射する。 これにより、 接着剤の接 着力は弱まる。  Next, the Daishinda Film 23 is irradiated with ultraviolet rays. This weakens the adhesive force of the adhesive.
ダイシンダフイルム 2 3上から、 個片に分離された半導体チップ 3 ; 0を吸着ノ ズル （図示せず） により吸着して、 基板 3 1上に位置決めして載せ、 加圧、 加熱 することにより、 半導体チップ 3 0を基板 3 1上に実装できる （図 6、 図 7 )。 加 熱によって、 アンダーフィル樹脂材は熱硬化するが、 若干はみ出しが生じる。 し かし、 アンダーフィル樹脂材の供給量は一定しているので、 はみ出し量も一定し ている。 Over Daishin da film 2 3, the semiconductor chip 3 which is separated into individual pieces; 0 adsorbed by the adsorption Roh nozzle (not shown), placed in position on the substrate 3 1, pressurization, heating By doing so, the semiconductor chip 30 can be mounted on the substrate 31 (FIGS. 6 and 7). The heating causes the underfill resin material to harden thermally, but slightly protrudes. However, since the supply of underfill resin material is constant, the amount of protrusion is also constant.
(第 2実施例） " 図 8〜図 1 1に第 2実施例を示す。  (Second Embodiment) FIGS. 8 to 11 show a second embodiment.
本実施例では、 ダイシング工程において、 まず. 比較的幅広の、 例えば 4 0 m幅の第 1のブレード （図示せず） によりアンダーフィル樹脂層 2 1側からゥェ ハ 2 5の厚みの中途部まで切り込み（図 8 )、 次いで、 第 1のブレードよりも幅の 狭い、 例えば 2 5 m幅の第 2のブレード （図示せず） により、 第 1のブレード により形成された溝内を切り込んで、 個片の半導体チップ 3 0に分離するのであ る （図 9 )。 このようにすることで、 周縁部に段差 3 2が形成された個片の半導体 チップに 3 0が形成される （図 1 0 )。  In the present embodiment, in the dicing step, first, a relatively wide, for example, a 40 m-width first blade (not shown) is used to form an intermediate portion of the thickness of the wafer 25 from the underfill resin layer 21 side. Cut into the groove formed by the first blade with a second blade (not shown), which is narrower than the first blade, for example, 25 m wide, They are separated into individual semiconductor chips 30 (Fig. 9). By doing so, 30 is formed on the individual semiconductor chip having the step 32 formed on the periphery (FIG. 10).
この半導体チップ 3 0を上記と同様の方法で、 基板 3 1に実装する。 アンダー フィル樹脂材のはみ出しが生じるが、 段差 3 2が樹脂溜まりとなることから、 樹 脂材のはみ出しを極力少なくできる （図 1 1 )。  The semiconductor chip 30 is mounted on the substrate 31 in the same manner as described above. The underfill resin material protrudes, but the step 32 forms a pool of resin, which minimizes the resin material protruding (Fig. 11).
(第 3実施例）  (Third embodiment)
図 1 2〜図 1 5に第 3実施例を示す。  FIGS. 12 to 15 show a third embodiment.
本実施例においては、 ダイシング工程において、 断面 V字状の切刃を有する第 1 のブレード （図示せず） によりアンダーフィル樹脂層 2 1側からウェハ 2 5の 厚みの中途部まで切り込んで断面 V字状の溝を形成し （図 1 2 )、 次いで、 第 1の ブレードよりも幅の狭い第 2のブレードにより、 第 1のブレードにより形成され た V字状の溝内を切り込んで、 個片の半導体チップ 3 0に分離するのである （図 1 3 )。 これにより、周縁部に面取り部 3 3が形成された半導体チップ 3 0が形成 される （図 1 4 )。  In the present embodiment, in the dicing step, a first blade (not shown) having a V-shaped cross section is cut from the underfill resin layer 21 side to an intermediate part of the thickness of the wafer 25 to obtain a cross section V. A V-shaped groove is formed (Fig. 12), and then a V-shaped groove formed by the first blade is cut by a second blade narrower than the first blade to form individual pieces. Semiconductor chip 30 (Fig. 13). As a result, a semiconductor chip 30 having the chamfered portion 33 formed on the periphery is formed (FIG. 14).
この半導体チップ 3 0を上記と同様の方法で、 基板 3 1に実装する。 アンダー フィル樹脂材のはみ出しが生じるが、面取り部 3 3が樹脂溜まりとなることから、 榭脂材のはみ出しを極力少なくできる （図 1 5 )。  The semiconductor chip 30 is mounted on the substrate 31 in the same manner as described above. The underfill resin material protrudes, but the chamfered part 33 becomes a pool of resin, so that the resin material can be minimized (Fig. 15).
(第 4実施例） 図 1 6は、 基板 3 1への半導体チップ 3 0の実装時、 基板 3 1を上側に、 半導 体チップ 3 0を下側にして実装する実施例を示す。 (Fourth embodiment) FIG. 16 shows an embodiment in which the semiconductor chip 30 is mounted on the substrate 31 with the substrate 31 on the upper side and the semiconductor chip 30 on the lower side.
このように半導体チップ 3 0を下側にすることで、 軟化したアンダーフィル樹 脂材は、 半導体チップ 3 0の側面を覆うように下方に垂れ下がるので、 外方への アンダーフィル樹脂材のはみ出しをそれだけ少なくできる。  By lowering the semiconductor chip 30 in this manner, the softened underfill resin material hangs down so as to cover the side surfaces of the semiconductor chip 30, so that the underfill resin material protrudes outward. That can be reduced.
(第 5実施例）  (Fifth embodiment)
図 1 7は、 樹脂のはみ出しを防止する他の実施例を示す。  FIG. 17 shows another embodiment for preventing the resin from overflowing.
本実施例では、 基板 3 1の半導体チップ搭載部の周りに、 搭載する半導体チッ プ 3 0を囲むようにして、 凹溝 3 4を設けている。 この凹溝 3 4が樹脂溜まりと して機能するので、 アンダーフィル樹脂材のはみ出しを少なくできる。 凹溝 3 4 は、 基板 3 1の配線パターン （図示せず） には至らないように、 表層のソルダー レジスト層に浅く設けるとよい。 '  In this embodiment, a concave groove 34 is provided around the semiconductor chip mounting portion of the substrate 31 so as to surround the semiconductor chip 30 to be mounted. Since the concave groove 34 functions as a resin pool, the protrusion of the underfill resin material can be reduced. The groove 34 is preferably provided shallowly in the surface solder resist layer so as not to reach the wiring pattern (not shown) of the substrate 31. '
(第 6実施例）  (Sixth embodiment)
図 1 8は、 半導体チップ 3 0の搭載部を凹部 3 5としたものである。 この凹部 3 5自体が樹脂溜まりとして機能する。  FIG. 18 shows a configuration in which the mounting portion of the semiconductor chip 30 is a concave portion 35. The concave portion 35 itself functions as a resin pool.
(第 7実施例）  (Seventh embodiment)
図 1 9は、 基板 3 1に貫通孔 3 6を設けて樹脂溜まりとした実施例を示す。 発明の効果  FIG. 19 shows an embodiment in which a through hole 36 is provided in the substrate 31 to form a resin pool. The invention's effect
以上のように、 本発明に係るアンダーフィル用シート材によれば、 アンダーフ ィル樹脂層とダイシンダフイルムとの間に剥離シートを介在させているので、 ァ ンダーフィル樹脂層とダイシンダフイルムとが強固に接着して、 剥離不能になる のを防止でき、 また、 アンダーフィル樹脂層の両面がシート材で覆われるので、 ゴミ等の異物の付着が防止され、 ハンドリングも容易となる。  As described above, according to the underfill sheet material of the present invention, since the release sheet is interposed between the underfill resin layer and the Daishinda film, the underfill resin layer and the Daishinda film are formed. It can be firmly adhered to prevent peeling, and since both sides of the underfill resin layer are covered with sheet material, foreign substances such as dust are prevented from adhering and handling becomes easy.
また本発明に係る半導体チップのアンダーフィル方法では、 ウェハに、 アンダ ーフィル樹脂層にバンプが埋没する状態でァンダーフィル樹脂層を積層させるェ 程と、 このウェハおよびリングフレームをダイシンダフイルム上に接着する工程 とを同時に行うことができ、 作業性が大幅に向上し、 作業時間も短縮できて、 コ ストの低減化が図れるのである。 また、 '半導体チップに段差部や面取り部からなる樹脂溜まりを、 あるいは基板 側に凹溝や凹部、 貫通孔からなる樹脂溜まりを設ければ、 基板に半導体チップを 実装した際、 アンダーフィル樹脂材のはみ出しを極力防止できて好適である。 Further, in the method of underfilling a semiconductor chip according to the present invention, a step of laminating an underfill resin layer on a wafer in a state in which bumps are buried in an underfill resin layer, and a step of bonding the wafer and a ring frame on a die-synda film. The process can be performed at the same time, greatly improving workability, shortening work time, and reducing costs. In addition, if the semiconductor chip is provided with a resin pool consisting of steps or chamfers, or the substrate side is provided with a resin pool consisting of concave grooves, recesses, and through holes, the underfill resin material can be obtained when the semiconductor chip is mounted on the substrate. This is preferable because the protrusion can be prevented as much as possible.

Claims

請 求 の 範 囲 The scope of the claims
1 . 半導体チップに設けられたバンプ間を埋めるためのアンダーフィル樹脂層が 剥離シート上に形成されたアンダーフィル用シート材において、 1. In an underfill sheet material in which an underfill resin layer for filling between bumps provided on a semiconductor chip is formed on a release sheet,
ウェハの表面を覆うことのできる大きさの前記アンダーフィル樹脂層の両面に、 該アンダーフィル樹脂層よりも大きく、 アンダーフィル樹脂層から剥離可能な剥 離シートが積層され、 一方の剥離シートの外面に、 前記アンダーフィル樹脂層よ りも大きく、 接着剤が塗布されたダイシングフィルムが該接着剤により貼付され ていることを特徴とするアンダーフィル用シート材。  A release sheet larger than the underfill resin layer and peelable from the underfill resin layer is laminated on both sides of the underfill resin layer having a size capable of covering the surface of the wafer, and an outer surface of one of the release sheets An underfill sheet material, characterized in that a dicing film larger than the underfill resin layer and coated with an adhesive is adhered with the adhesive.
2 . 半導体チップに設けられたバンプ間をアンダーフィル樹脂材で埋める半導体 チップのアンダ一フィル方法において、 2. In an underfill method of a semiconductor chip, in which an underfill resin material is filled between bumps provided on the semiconductor chip,
半導体チップが多数造り込まれたウェハの表面を覆うことのできる大きさの前 記アンダーフィル榭脂層の片面側に、 該アンダーフィル樹脂層よりも大きく、 ァ ンダーフィル榭脂層から剥離可能な剥離シ一トが積層されたアンダーフィル用シ ート材の該アンダーフィル樹脂層側と、 接着剤が塗布されたダイシンダフイルム の該接着剤層側との間に、 バンプをアンダーフィル樹脂層側に向けてウェハと、 該ウェハを囲むリングフレームとを配置する工程と、  On one side of the underfill resin layer, which is large enough to cover the surface of the wafer on which a large number of semiconductor chips are built, peeling that is larger than the underfill resin layer and can be separated from the underfill resin layer A bump is placed between the underfill resin layer side of the underfill sheet material on which the sheet is laminated and the adhesive layer side of the die-sinda film to which the adhesive is applied, with the bumps on the underfill resin layer side. Disposing a wafer and a ring frame surrounding the wafer;
前記ウェハとリングフレームとを介在させて、 前記ダイシングフィルムと剥離 シートとを押圧し、 ウェハとリングフレームとを前記ダイシングフレームに接着 すると共に、 ウェハのバンプを前記アンダーフィル樹脂層に埋没させる押圧工程 と、 ' 前記剥離シートを剥離する剥離工程とを含むことを特徴とする半導体チップの アンダーフィル方法。  A pressing step of pressing the dicing film and the release sheet with the wafer and the ring frame interposed, bonding the wafer and the ring frame to the dicing frame, and burying the bumps of the wafer in the underfill resin layer And a peeling step of peeling off the peeling sheet.
3 . 半導体チップを基板にフリップチップ接続し、 半導体チップと基板との間の 隙間に樹脂材をアンダーフィルする半導体チップの実装方法において、 3. A semiconductor chip mounting method in which a semiconductor chip is flip-chip connected to a substrate and a resin material is underfilled in a gap between the semiconductor chip and the substrate.
半導体チップが多数造り込まれたウェハの表面を覆うことのできる大きさの前 記アンダーフィル榭脂層の片面側に、 該アンダーフィル樹脂層よりも大きく、 ァ ンダーフィル樹脂層から剥離可能な剥離シートが積層されたアンダーフィル用シ ート材の該アンダーフィル樹脂層側と、 接着剤が塗布されたダイシングフィルム の該接着剤層側との間に、 バンプをアンダーフィル樹脂層側に向けてゥェハと、 該ウェハを囲むリングフレームとを配置する工程と、 The underfill resin layer having a size large enough to cover the surface of a wafer on which a large number of semiconductor chips are formed is provided on one side of the underfill resin layer, and is larger than the underfill resin layer. A bump is provided between the underfill resin layer side of the underfill sheet material on which the release sheet that can be peeled off from the underfill resin layer is laminated and the adhesive layer side of the dicing film coated with an adhesive. Disposing a wafer and a ring frame surrounding the wafer toward the underfill resin layer side;
前記ウェハとリングフレームとを介在させて、 前記ダイシンダフイルムと剥離 シートとを押圧し、 ウェハとリングフレームとを前記ダイシンダフレームに接着 すると共に、 ウェハのバンプを前記アンダーフィル樹脂層に埋没させる押圧工程 と、  The die cinda film and the release sheet are pressed with the wafer and the ring frame interposed therebetween, and the wafer and the ring frame are bonded to the die sinter frame, and the wafer bump is buried in the underfill resin layer. Pressing step and
前記剥離シートを剥離する剥離工程と、  A peeling step of peeling the release sheet,
前記ダイシンダフイルムに接着されたウェハを、 前記リングフレームを介して ダイシング装置に装着し、 前記アンダーフィル樹脂層と共にウェハをダイシング して、 個片の半導体チップに分離するダイシング工程と、  A dicing step of mounting the wafer bonded to the dicing film to a dicing device via the ring frame, dicing the wafer with the underfill resin layer, and separating the wafer into individual semiconductor chips;
個片に分離された半導体チップを、 基板の端子部に位置合わせして接合すると 共に、 加熱して前記アンダーフィル樹脂層を硬化させる実装工程とを含むことを 特徴とする半導体チップの実装方法。  A method for mounting a semiconductor chip, comprising: positioning a semiconductor chip separated into individual pieces on a terminal portion of a substrate; joining the semiconductor chip; and mounting the semiconductor chip by heating to cure the underfill resin layer.
4 . 前記ダイシング工程において、 第 1のブレードにより前記アンダーフィル樹 脂層側からウェハの厚みの中途部まで切り込み、 次いで、 前記第 1のブレードよ りも幅の狭い第 2のブレードにより、 前記第 1のブレードにより形成された溝内 を切り込んで、 周縁部に段差が形成された個片の半導体チップに分離することを 特徴とする請求項 3記載の半導体チップの実装方法。 4. In the dicing step, a first blade cuts from the underfill resin layer side to an intermediate portion of the thickness of the wafer, and then the second blade, which is narrower than the first blade, cuts the wafer. 4. The method of mounting a semiconductor chip according to claim 3, wherein the inside of the groove formed by the one blade is cut into individual semiconductor chips having a step formed on a peripheral edge.
5 . 前記ダイシング工程において、 断面 V字状の切刃を有する第 1のブレードに より前記アンダーフィル樹脂層側からウェハの厚みの中途部まで切り込んで断面 V字状の溝を形成し、 次いで、 前記第 1のブレードよりも幅の狭い第 2のブレー ドにより、 前記第 1のブレードにより形成された V字状の溝内を切り込んで、 周 縁部に面取り部が形成された個片の半導体チップに分離することを特徴とする請 求項 3記載の半導体チップの実装方法。 5. In the dicing step, a first blade having a V-shaped cross section is cut from the underfill resin layer side to an intermediate portion of the thickness of the wafer to form a V-shaped groove, A second blade having a width smaller than that of the first blade cuts a V-shaped groove formed by the first blade, thereby forming an individual semiconductor having a chamfered portion formed on a peripheral portion. 4. The method for mounting a semiconductor chip according to claim 3, wherein the semiconductor chip is separated into chips.
6 . 前記基板に、 流れ出した前記アンダーフィル樹脂部を受け入れる凹状もしく は貫通孔からなる樹脂溜まりを設けた基板を用いることを特徴とする請求項 3記 載の半導体チップの実装方法。 6. The method for mounting a semiconductor chip according to claim 3, wherein the substrate is provided with a resin reservoir formed of a concave or a through hole for receiving the underfill resin portion that has flowed out.
PCT/JP2001/005687 2001-06-29 2001-06-29 Sheet for underfill, method for underfilling semiconductor chip, and method for mounting semiconductor chip WO2003003445A1 (en)

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JP2006261529A (en) * 2005-03-18 2006-09-28 Lintec Corp Underfill tape for flip chip mount and manufacturing method of semiconductor device
US20140346642A1 (en) * 2011-09-06 2014-11-27 Vishay Semiconductor Gmbh Surface mountable electronic component
JP2017199911A (en) * 2007-09-12 2017-11-02 スモルテック アーベー Connection and bonding of adjacent layers by nano-structures
WO2021171898A1 (en) * 2020-02-27 2021-09-02 リンテック株式会社 Protective coating formation sheet, method for producing chip equipped with protective coating, and layered product

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Publication number Priority date Publication date Assignee Title
WO2006075197A1 (en) * 2005-01-12 2006-07-20 Infineon Technologies Ag Flip-chip semiconductor packages and methods for their production
JP2006261529A (en) * 2005-03-18 2006-09-28 Lintec Corp Underfill tape for flip chip mount and manufacturing method of semiconductor device
JP2017199911A (en) * 2007-09-12 2017-11-02 スモルテック アーベー Connection and bonding of adjacent layers by nano-structures
US20140346642A1 (en) * 2011-09-06 2014-11-27 Vishay Semiconductor Gmbh Surface mountable electronic component
US10629485B2 (en) * 2011-09-06 2020-04-21 Vishay Semiconductor Gmbh Surface mountable electronic component
WO2021171898A1 (en) * 2020-02-27 2021-09-02 リンテック株式会社 Protective coating formation sheet, method for producing chip equipped with protective coating, and layered product

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