WO2002099565A2 - System and method for achieving display uniformity in matrix addressed displays - Google Patents

System and method for achieving display uniformity in matrix addressed displays Download PDF

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Publication number
WO2002099565A2
WO2002099565A2 PCT/US2002/016977 US0216977W WO02099565A2 WO 2002099565 A2 WO2002099565 A2 WO 2002099565A2 US 0216977 W US0216977 W US 0216977W WO 02099565 A2 WO02099565 A2 WO 02099565A2
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Prior art keywords
video signal
subpixel
coefficient
register
display
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PCT/US2002/016977
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French (fr)
Inventor
Jessica Stevens
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Telegen Corporation
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Publication of WO2002099565A2 publication Critical patent/WO2002099565A2/en

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0233Improving the luminance or brightness uniformity across the screen
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0285Improving the quality of display appearance using tables for spatial correction of display data
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/06Adjustment of display parameters
    • G09G2320/0693Calibration of display systems

Definitions

  • This invention relates generally to flat panel display technology and, more specifically, to achieving display uniformity in matrix addressed displays.
  • CTR cathode ray tube
  • the Liquid Crystal Display (LCD); the Field Emission Display (FED); the Vacuum Cathodoluminescent Display (VCD); the light emitting diode display (LEDD); and the plasma display all exist as flat-screen alternatives to the CRT.
  • the flat shape paradigm forces a departure from a central source of the screen image.
  • the flat-screen in every instance, exists as an amalgam of autonomous or nearly autonomous cells.
  • an LCD is a thin envelope containing cells or pixels of liquid crystals.
  • each individual cell contains most of the electrical elements necessary to display only the single pixel.
  • Each flat-screen display technology comprises pixels that either illuminate or shift from clear to translucent, independently from their neighboring pixels, under the influence of an electric field. Every one of the flat-screen alternatives currently in use and in development relies upon matrix addressing to deliver a potential to create an electric field corresponding to the pixel.
  • the geometry of these displays dictates the use of matrix addressing. This geometry arranges the pixel elements of the display in discrete rows and columns. Matrix addressing defines the address of a pixel by its row and column.
  • a display driver delivers a voltage potential to a pixel by initiating a circuit through a pixel's particular row and column. The circuit is only complete at the site of the pixel.
  • the display generates an image by sending a discrete voltage potential to each pixel.
  • Each pixel, along with the electrodes that generate the electric field within the pixel cell must be nearly microscopic in order to generate a high-resolution display. While the engineering necessary to properly form these electrodes is on a somewhat molecular scale, it still results in perceptible variation in electrode geometry from one pixel to the next. As a result of variation in the electrode geometry, an equal potential addressed to each pixel, in turn, results in great variation in electric field intensity across the screen.
  • the present invention is a system, method, and computer program product for improving the output of a flat panel display.
  • the system includes a processor that receives a luminance value for a subpixel and retrieves an output coefficient according to the address associated with the subpixel.
  • the processor generates a new luminance value for the subpixel according to the received luminance value and the retrieved output coefficient and sends the generated new luminance value to a display driver.
  • the display driver drives the display components according to the new luminance value. Therefore, in this manner any section or single element of a display can be compensated to present a normal range of output values.
  • output coefficients are determined for each subpixel of the display according to a known applied luminance value and a display result of the applied luminance value.
  • the invention provides a system and method for compensating for display inconsistencies determined at production time, such as tiger striping, filament drop that occurs at the edge of a display, and any other inconsistencies in a display panel.
  • FIGURE 1 is a block diagram of the digital embodiment of the system
  • FIGURE 2 portrays the exemplar look-up tables for solving polynomial compensation equations
  • FIGURE 3 is a block diagram of the embodiment of the system capable of equalizing an analog video signal
  • FIGURE 4 is a schematic displaying the multiplying amplifier function within the compensation processor
  • FIGURE 5 is a flow diagram of the measurement process necessary to derive the compensation curve endemic to the particular family of display in question;
  • FIGURE 6 is a flow diagram of the process of deriving coefficients for a compensation curve described by an n-order polynomial.
  • FIGURE 7 is a flow diagram of the process of generating a compensated video signal according to the coefficients stored in association with each pixel.
  • the instant invention seeks to compensate the luminance response of individual pixels in a matrix-addressed display in order to achieve a uniform luminance across the display.
  • the invention is able to tailor the luminance to a uniform standard across the display.
  • Displays have characteristic luminance response curves that are determined by the physical configuration of electrodes within the individual pixels.
  • the instant invention compensates for luminance response by approximating a luminance response curve by a polynomial.
  • the invention stores a unique set of coefficients of a compensation polynomial in association with each pixel of the display.
  • the invention solves the compensation polynomial based upon the incoming video signal voltage and the retrieved coefficients, and, thus, compensates the voltage addressed to a particular pixel.
  • Look-up tables aid the invention in the rapid and economical solving of the compensation polynomial.
  • FIGURE 1 shows a digital signal system 20 embodiment of the instant invention.
  • the system 20 includes a logical word stripper 25, a compensation coefficient handler 30, a coefficient register 40, a user setting register 45, a multiplication look-up table register 65, and a compensation processor 75.
  • the logical word stripper 25 is coupled to the compensation coefficient handler 30 and the compensation processor 75.
  • the compensation coefficient handler 30 is also coupled to the coefficient register 40, the user setting register 45, and the compensation processor 75.
  • the multiplication look-up table register 65 is coupled to the compensation processor 75.
  • An incoming video signal includes a signal voltage value and an address for the pixel destination for that voltage value.
  • the address for the pixel may be incomplete but augmented by video signal timing.
  • the address (i.e., pixel address) of the destinations for each of the voltage values is readily ascertainable in the logical word stripper 25 that receives the video signal.
  • the logical word stripper 25 sends the ascertained pixel address to the compensation coefficient handler 30.
  • the compensation coefficient handler 30 simply retrieves an ordered set of coefficients from the coefficient register 40 according to the pixel address and user settings stored in the user setting register 45.
  • the user setting register 45 allows users by any appropriate device, e.g.
  • the compensation coefficient handler 30 presents the ordered set of compensation coefficients to the compensation processor 75.
  • the compensation processor 75 receives the ordered set of coefficients from the compensation coefficient handler 30 in coordination with receiving the addressed video signal from the logical word stripper 25.
  • the compensation processor 75 solves this polynomial with the aid of a multiplication look-up table register 65.
  • the compensation processor 75 retrieves a product of the video signal voltage value and the first coefficient from the multiplication look-up table register 65 (e.g., ROM).
  • the manufacturer stores in the look-up table the products of the compensation coefficients along with each possible input grayscale value. Also stored are the square and the cube of each possible grayscale value as appropriate according to the specific polynomial chosen to approximate the characteristic luminance curve for the display.
  • the compensation processor 75 solves for a compensated video signal voltage value.
  • the compensation processor 75 sends this compensated video signal voltage value along with the pixel address in appropriate combination as initially received.
  • the instant invention seamlessly compensates the input video signal, i.e. the video signal is functionally identical to the incoming signal with the exception of the compensated video signal voltage value.
  • Display drivers (not shown) within the display will send a compensated voltage to the pixel, assuring uniform luminance over the display.
  • FIGURES 2A, B display two exemplars of the form of the look-up tables held in the multiplying look-up table 65. It is noted that rather than to add another multiple to each of the terms of the polynomial, requiring additional floating-point multiplication processes, this simpler solution assures faster, simpler, and cheaper processing. No floating-point multiplication is required.
  • FIGURE 3 displays the embodiment of the system capable of equalizing an analog video signal. While an incoming video signal 120 is presented as a voltage rather than a voltage value, an address is still discemable due to synchronous timing signals within the video signal, such as NTSC, PAL or other formatted broadcast signals.
  • a signal synchronization matrix-address generator 125 analyzes the input video signal for timing information (address) and sends the timing information to a compensation coefficient handler 130.
  • the compensation coefficient handler 130, a compensation coefficient register 140, and a user setting register 145 function similar to the digital signal embodiment.
  • the compensation processor 175 converts the analog signal into a digital voltage value, solely for solving the compensation polynomial just as is described in the preferred digital embodiment of the processor.
  • the compensation processor 175 similarly uses a multiplication look-up table register 165 to avoid the necessity of floating-point multiplication as in the digital embodiment.
  • the compensation processor 175 supplies a voltage according to the solved polynomial.
  • This embodiment allows the compensation processor 175 to avoid any use of an analog-to-digital conversion and the multiplication look-up table register 165. Because an analog video signal includes the video signal information, multiplication must occur to produce an analog output. Rather than to convert from analog to digital and digital back to analog, the compensation processor 175 can solve the linear equation without such a conversion.
  • FIGURE 4 displays one way such a multiplier amplifier might work.
  • the compensation processor 175 sends a second coefficient from the ordered set of coefficients from the compensation coefficient handler 130 to a bank of precisely regulated amplifiers.
  • the least significant binary digit is sent to energize or not energize a ones amplifier 182 according to the digit 0 or 1.
  • the output voltage of the ones amplifier 182 will be exactly the same as the input voltage.
  • a twos amplifier 184 doubles the input voltage according to the next most significant digit of the multiplication word.
  • a fours amplifier 186, and an eights amplifier 188 each work similarly by multiplying the signal by four and by eight respectively.
  • Non-integral value coefficients are handled similarly with amplifies that halve and quarter the intensity of the inbound video signal voltage.
  • An adding amplifier 190 sums the signals in analog fashion to produce a resulting voltage.
  • FIGURE 5 represents a method of calibration of any given matrix-addressed flat panel display. As it is, the luminance response of every pixel that the instant invention seeks to equalize, that response must be measured for each pixel in the display. To do so, the pixel must be driven at known potential values in order to evaluate the luminance response to each of those known potential values, at block 212. Once driven and illuminated by a known potential, the luminance response to that potential is measured, at block 214.
  • a third method of measuring the luminance of a driven display involves a calibrated Charge Coupled Device (CCD).
  • CCD Charge Coupled Device
  • a CCD is a light sensitive silicon solid-state device composed of many small pixels. The CCD electronics converts light received from the measured pixel into a charge pulse then measures that charge pulse and represents the pulse by a value. The value usually ranges from 0 (no light) to 65,535 (very intense light). For measurement purposes, CCD optics would be focused at a range to have a one to one ratio between the sub-pixels of the display and those of the CCD.
  • the acquired luminance response value is stored in association with the pixel address and the potential level that generated that luminance response, at block 220.
  • the type of display and economic factors will determine the appropriate compensation curve for that display.
  • the compensation curve will dictate the appropriate number of potential values necessary to fix that curve according to statistical methods. According to the number of potential values deemed appropriate, the measurement continues in order to fix the suitable approximation of luminance response curve for the measured pixel at blocks 223 and 225.
  • a luminance response value is again stored in association with the pixel address and the potential value according to each iteration. When the pixel's luminance response to each applied potential has been measured and stored, measurement moves to the next pixel in order at blocks 227, 229.
  • the compensation process proceeds according to the stored luminance response values as portrayed in FIGURE 6.
  • the luminance response of a single pixel is plotted according to the anticipated curve characteristic to the particular display at block 251.
  • Statistical methods such as LaGrange Polynomial expansion determines the coefficients necessary to fit a higher order polynomial to the luminance curve at block 253. Again, as above, the type of display and economic factors will determine the order of the compensation polynomial.
  • the compensation coefficients are then stored on suitable non-volatile memory, such as a PROM or EPROM, in association with a corresponding pixel address at block 255.
  • the process continues at blocks 260 and 265 until the non-volatile memory contains an ordered coefficient set for each pixel of the subject display.
  • FIGURE 7 portrays the instant invention in operation. Unlike the preceding steps that might occur on the test bench of a manufacturer or other entity, the operation step occurs entirely within the system embodiments described above. In either the digital- or the analog-video signal embodiments, the system receives a video signal at block 270.
  • the address of a pixel to be illuminated is determined at block 275.
  • the coefficients are retrieved according to that address and the user settings at block 280. As indicated above, the user may select one of the distinct display settings that have generated distinct tables of coefficients.
  • the set of coefficients retrieved will determine the polynomial value when solved for the compensated voltage at block 285.
  • the invention supplies a voltage corresponding with the solved polynomial value to the pixel at block 290. For as long as the video signal continues, the invention illuminates pixel after pixel in a similar fashion at block 295.

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  • Physics & Mathematics (AREA)
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Abstract

A system, method and computer program product for improving the output of a flat panel display. The system includes a processor that receives a luminance value for a subpixel and retrieves an output coefficient according to the address associated with the subpixel. The processor generates a new luminance value for the subpixel according to the received luminance value and the retrieved output coefficient and sends the generated new luminance value to a display driver. The display driver drives the display components according to the new luminance value.

Description

SYSTEM AND METHOD FOR ACHIEVING DISPLAY UNIFORMITY IN MATRIX ADDRESSED DISPLAYS
INVENTOR Jessica L. Stevens
FIELD OF THE INVENTION
This invention relates generally to flat panel display technology and, more specifically, to achieving display uniformity in matrix addressed displays.
BACKGROUND OF THE INVENTION A principal impediment to the miniaturization of the computers in embedded applications and in lap- and palmtop computers has been the lack of a suitable display. In desktop applications, the cathode ray tube (CRT) has been the principal high-resolution display. The CRT is large, heavy, and fragile. They use a great deal of power to heat the cathode of the electron gun whose spray of a stream of electrons illuminates the screen. Because the deflection of the stream from pixel to pixel draws the screen image, the geometry of a CRT will always be deeply bell-shaped in comparison to the image size.
Technological advances have militated for high-resolution alternatives to the CRT. A prerequisite for a successor to the CRT is that it be flat, light, robust and efficient. Engineers have posited several flat-screen alternatives to the CRT. The Liquid Crystal Display (LCD); the Field Emission Display (FED); the Vacuum Cathodoluminescent Display (VCD); the light emitting diode display (LEDD); and the plasma display all exist as flat-screen alternatives to the CRT.
The flat shape paradigm forces a departure from a central source of the screen image. The flat-screen, in every instance, exists as an amalgam of autonomous or nearly autonomous cells. For example, an LCD is a thin envelope containing cells or pixels of liquid crystals. Thus, rather than a single or triple gun for tracing an entire display, each individual cell contains most of the electrical elements necessary to display only the single pixel.
Each flat-screen display technology comprises pixels that either illuminate or shift from clear to translucent, independently from their neighboring pixels, under the influence of an electric field. Every one of the flat-screen alternatives currently in use and in development relies upon matrix addressing to deliver a potential to create an electric field corresponding to the pixel.
The geometry of these displays dictates the use of matrix addressing. This geometry arranges the pixel elements of the display in discrete rows and columns. Matrix addressing defines the address of a pixel by its row and column. A display driver delivers a voltage potential to a pixel by initiating a circuit through a pixel's particular row and column. The circuit is only complete at the site of the pixel. The display generates an image by sending a discrete voltage potential to each pixel. Each pixel, along with the electrodes that generate the electric field within the pixel cell, must be nearly microscopic in order to generate a high-resolution display. While the engineering necessary to properly form these electrodes is on a somewhat molecular scale, it still results in perceptible variation in electrode geometry from one pixel to the next. As a result of variation in the electrode geometry, an equal potential addressed to each pixel, in turn, results in great variation in electric field intensity across the screen.
The Fowler-Nordheim theory indicates that the current density of field emissions vary greatly with minute differences in anode cathode distances (1% change may result in 10% current density). In each display, current density in the field dictates the luminance or transmission of the display pixels. The only independent variable to control current density in the field, when the anode/cathode geometry is fixed, is the potential between anode and cathode. Thus, there exists a need to independently control the potential applied to each pixel in order to standardize the luminance response of each pixel to a standard video signal. Once the individual pixels are driven to a uniform luminance across the display, there exists a further need to coordinate the luminance of the pixels. For instance, ambient light conditions might require uniformly brighter or darker displays. Variations for distinct color phosphor response would allow user adjustment in accord with personal tastes, to counter color distortion inherent in the signal, or to enhance visibility of image features inherent in the particular application.
Therefore, there exists a need to produce a display that does not experience any unwanted distortion.
SUMMARY OF THE INVENTION
The present invention is a system, method, and computer program product for improving the output of a flat panel display. The system includes a processor that receives a luminance value for a subpixel and retrieves an output coefficient according to the address associated with the subpixel. The processor generates a new luminance value for the subpixel according to the received luminance value and the retrieved output coefficient and sends the generated new luminance value to a display driver. The display driver drives the display components according to the new luminance value. Therefore, in this manner any section or single element of a display can be compensated to present a normal range of output values.
In accordance with other aspects of the invention, before display operation, output coefficients are determined for each subpixel of the display according to a known applied luminance value and a display result of the applied luminance value.
As will be readily appreciated from the foregoing summary, the invention provides a system and method for compensating for display inconsistencies determined at production time, such as tiger striping, filament drop that occurs at the edge of a display, and any other inconsistencies in a display panel. BRIEF DESCRIPTION OF THE DRAWINGS
The preferred and alternative embodiments of the present invention are described in detail below with reference to the following drawings.
FIGURE 1 is a block diagram of the digital embodiment of the system; FIGURE 2 portrays the exemplar look-up tables for solving polynomial compensation equations;
FIGURE 3 is a block diagram of the embodiment of the system capable of equalizing an analog video signal;
FIGURE 4 is a schematic displaying the multiplying amplifier function within the compensation processor; FIGURE 5 is a flow diagram of the measurement process necessary to derive the compensation curve endemic to the particular family of display in question;
FIGURE 6 is a flow diagram of the process of deriving coefficients for a compensation curve described by an n-order polynomial; and
FIGURE 7 is a flow diagram of the process of generating a compensated video signal according to the coefficients stored in association with each pixel.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
The instant invention seeks to compensate the luminance response of individual pixels in a matrix-addressed display in order to achieve a uniform luminance across the display. By knowing a luminance response to an applied voltage for each pixel, the invention is able to tailor the luminance to a uniform standard across the display. Displays have characteristic luminance response curves that are determined by the physical configuration of electrodes within the individual pixels.
The instant invention compensates for luminance response by approximating a luminance response curve by a polynomial. The invention stores a unique set of coefficients of a compensation polynomial in association with each pixel of the display. When receiving an incoming video signal, the invention solves the compensation polynomial based upon the incoming video signal voltage and the retrieved coefficients, and, thus, compensates the voltage addressed to a particular pixel. Look-up tables aid the invention in the rapid and economical solving of the compensation polynomial.
FIGURE 1 shows a digital signal system 20 embodiment of the instant invention. The system 20 includes a logical word stripper 25, a compensation coefficient handler 30, a coefficient register 40, a user setting register 45, a multiplication look-up table register 65, and a compensation processor 75. The logical word stripper 25 is coupled to the compensation coefficient handler 30 and the compensation processor 75. The compensation coefficient handler 30 is also coupled to the coefficient register 40, the user setting register 45, and the compensation processor 75. The multiplication look-up table register 65 is coupled to the compensation processor 75.
An incoming video signal includes a signal voltage value and an address for the pixel destination for that voltage value. In some embodiments, the address for the pixel may be incomplete but augmented by video signal timing. There are several conventions for digital signals but each requires the addressing of a voltage value to a particular pixel. The address (i.e., pixel address) of the destinations for each of the voltage values is readily ascertainable in the logical word stripper 25 that receives the video signal. The logical word stripper 25 sends the ascertained pixel address to the compensation coefficient handler 30. The compensation coefficient handler 30, simply retrieves an ordered set of coefficients from the coefficient register 40 according to the pixel address and user settings stored in the user setting register 45. The user setting register 45 allows users by any appropriate device, e.g. dipswitches, latches, relays, or PROMs, to indicate and store their preferences with regard to color temperature of the display, ambient light conditions, and other user preferences. Each setting evokes a distinct coefficient table from the coefficient register 40. Having retrieved the settings from the coefficient register 40, the compensation coefficient handler 30 presents the ordered set of compensation coefficients to the compensation processor 75. The compensation processor 75 receives the ordered set of coefficients from the compensation coefficient handler 30 in coordination with receiving the addressed video signal from the logical word stripper 25.
Once presented with the ordered set of compensation coefficients and the video signal, the compensation processor 75 solves the compensation polynomial as follows in equation (1): corrected = a0 "*" βl "input ~*~ a2 ^ input + — + ^„ "input (1) The compensation processor 75 solves this polynomial with the aid of a multiplication look-up table register 65. The compensation processor 75 retrieves a product of the video signal voltage value and the first coefficient from the multiplication look-up table register 65 (e.g., ROM). Before use, the manufacturer stores in the look-up table the products of the compensation coefficients along with each possible input grayscale value. Also stored are the square and the cube of each possible grayscale value as appropriate according to the specific polynomial chosen to approximate the characteristic luminance curve for the display.
By adding the products of the ordered set of coefficients and their corresponding powers of the inbound video signal voltage values, the compensation processor 75 solves for a compensated video signal voltage value. The compensation processor 75 sends this compensated video signal voltage value along with the pixel address in appropriate combination as initially received. In this configuration, the instant invention seamlessly compensates the input video signal, i.e. the video signal is functionally identical to the incoming signal with the exception of the compensated video signal voltage value. Display drivers (not shown) within the display will send a compensated voltage to the pixel, assuring uniform luminance over the display.
FIGURES 2A, B display two exemplars of the form of the look-up tables held in the multiplying look-up table 65. It is noted that rather than to add another multiple to each of the terms of the polynomial, requiring additional floating-point multiplication processes, this simpler solution assures faster, simpler, and cheaper processing. No floating-point multiplication is required.
FIGURE 3 displays the embodiment of the system capable of equalizing an analog video signal. While an incoming video signal 120 is presented as a voltage rather than a voltage value, an address is still discemable due to synchronous timing signals within the video signal, such as NTSC, PAL or other formatted broadcast signals. A signal synchronization matrix-address generator 125 analyzes the input video signal for timing information (address) and sends the timing information to a compensation coefficient handler 130. The compensation coefficient handler 130, a compensation coefficient register 140, and a user setting register 145, function similar to the digital signal embodiment.
Within a compensation processor 175, several processes occur. First, the compensation processor 175 converts the analog signal into a digital voltage value, solely for solving the compensation polynomial just as is described in the preferred digital embodiment of the processor. In this embodiment, the compensation processor 175 similarly uses a multiplication look-up table register 165 to avoid the necessity of floating-point multiplication as in the digital embodiment. Once solved, the compensation processor 175 supplies a voltage according to the solved polynomial.
A special case exists where the luminance response compensation curve is linear rather than a higher order polynomial, equation (2): "corrected ~~ ^0 ~"~ ®V input
(2)
This embodiment allows the compensation processor 175 to avoid any use of an analog-to-digital conversion and the multiplication look-up table register 165. Because an analog video signal includes the video signal information, multiplication must occur to produce an analog output. Rather than to convert from analog to digital and digital back to analog, the compensation processor 175 can solve the linear equation without such a conversion.
One way to accomplish this is by a multiplier amplifier. FIGURE 4 displays one way such a multiplier amplifier might work. The compensation processor 175 sends a second coefficient from the ordered set of coefficients from the compensation coefficient handler 130 to a bank of precisely regulated amplifiers. The least significant binary digit is sent to energize or not energize a ones amplifier 182 according to the digit 0 or 1. When energized, the output voltage of the ones amplifier 182 will be exactly the same as the input voltage. Similarly, a twos amplifier 184 doubles the input voltage according to the next most significant digit of the multiplication word. A fours amplifier 186, and an eights amplifier 188 each work similarly by multiplying the signal by four and by eight respectively. Non-integral value coefficients are handled similarly with amplifies that halve and quarter the intensity of the inbound video signal voltage. An adding amplifier 190 sums the signals in analog fashion to produce a resulting voltage. FIGURE 5 represents a method of calibration of any given matrix-addressed flat panel display. As it is, the luminance response of every pixel that the instant invention seeks to equalize, that response must be measured for each pixel in the display. To do so, the pixel must be driven at known potential values in order to evaluate the luminance response to each of those known potential values, at block 212. Once driven and illuminated by a known potential, the luminance response to that potential is measured, at block 214.
To measure that luminance response, any of several methods will suffice. One such method allows for measuring the individual luminance of each pixel with a calibrated luminance meter shuttling from pixel to pixel in a predictable manner. Another method may be used where luminance depends linearly upon a current through a particular pixel. For example, in field emission displays and vacuum cathodoluminescent displays, simple ammeters will suffice to measure luminance. A third method of measuring the luminance of a driven display involves a calibrated Charge Coupled Device (CCD). A CCD is a light sensitive silicon solid-state device composed of many small pixels. The CCD electronics converts light received from the measured pixel into a charge pulse then measures that charge pulse and represents the pulse by a value. The value usually ranges from 0 (no light) to 65,535 (very intense light). For measurement purposes, CCD optics would be focused at a range to have a one to one ratio between the sub-pixels of the display and those of the CCD.
The acquired luminance response value is stored in association with the pixel address and the potential level that generated that luminance response, at block 220. The type of display and economic factors will determine the appropriate compensation curve for that display. In turn, the compensation curve will dictate the appropriate number of potential values necessary to fix that curve according to statistical methods. According to the number of potential values deemed appropriate, the measurement continues in order to fix the suitable approximation of luminance response curve for the measured pixel at blocks 223 and 225. A luminance response value is again stored in association with the pixel address and the potential value according to each iteration. When the pixel's luminance response to each applied potential has been measured and stored, measurement moves to the next pixel in order at blocks 227, 229.
Once calibration is complete, the compensation process proceeds according to the stored luminance response values as portrayed in FIGURE 6. The luminance response of a single pixel is plotted according to the anticipated curve characteristic to the particular display at block 251. Statistical methods such as LaGrange Polynomial expansion determines the coefficients necessary to fit a higher order polynomial to the luminance curve at block 253. Again, as above, the type of display and economic factors will determine the order of the compensation polynomial. The compensation coefficients are then stored on suitable non-volatile memory, such as a PROM or EPROM, in association with a corresponding pixel address at block 255. The process continues at blocks 260 and 265 until the non-volatile memory contains an ordered coefficient set for each pixel of the subject display. Once a single compensation curve and the associated coefficient are properly stored for a base compensation setting, alternate compensation settings can be easily derived. For example, many manufactures of televisions have a luminance setting at less than one-hundred percent of the compensated value for darkened ambient light viewing. Also, where a color display comprises three distinct sets of sub-pixels, one or another color will be over- or under-compensated relative to the otlier colors. The compensation coefficients from the second stored set adjust each pixel by a greater value due to expected display deterioration. Distinct look-up tables can be derived from the base compensation coefficients by mathematic transformation on each pixel ordered set of coefficients to meet each of these distinct situations.
FIGURE 7 portrays the instant invention in operation. Unlike the preceding steps that might occur on the test bench of a manufacturer or other entity, the operation step occurs entirely within the system embodiments described above. In either the digital- or the analog-video signal embodiments, the system receives a video signal at block 270.
By conventional video processing means, the address of a pixel to be illuminated is determined at block 275.
Once the address is known, the coefficients are retrieved according to that address and the user settings at block 280. As indicated above, the user may select one of the distinct display settings that have generated distinct tables of coefficients. The set of coefficients retrieved will determine the polynomial value when solved for the compensated voltage at block 285. To illuminate the display, the invention supplies a voltage corresponding with the solved polynomial value to the pixel at block 290. For as long as the video signal continues, the invention illuminates pixel after pixel in a similar fashion at block 295.
While the preferred embodiment of the invention has been illustrated and described, as noted above, many changes can be made without departing from the spirit and scope of the invention. For example, various methods of storing and accessing coefficients or compensated display values can be used to make the invention more efficient without departing from the ideas of the present invention. Accordingly, the scope of the invention is not limited by the disclosure of the preferred embodiment.
Instead, the invention should be determined entirely by reference to the claims that follow.

Claims

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:
1. A display method comprising: receiving a luminance value for a subpixel; retrieving an output coefficient according to the address of the subpixel; generating a new lummance value for the subpixel according to the received luminance value and the retrieved output coefficient; and sending the generated new luminance value to a display driver.
2. The method of Claim 1 , wherein retrieving comprises : determining an output coefficient for each subpixel of the display according to a known applied luminance value and a display result of the applied luminance value.
3. A display method comprising: measuring an emission curve for each subpixel, said measuring comprises: appropriately applying an accelerating voltage between a thermionic filament cathode and a conductive phosphorus strip; selectively charging pairs of grid wires that define a row; and measuring the luminance at each subpixel of the pixel row defined by the charged pair of grid wires resulting from the charging of the grid wires; deriving a set of coefficients in a first order polynomial selected to best fit each emission curve; storing the set of coefficients in a calibration memory register in association with each subpixel; obtaining an addressed in-bound video signal word; determining a subpixel implicated by the addressed in-bound video word; retrieving the associated set of coefficients from the calibration memory register; generating an outbound video signal word according to the retrieved coefficients; and driving the subpixel according to the generated outbound video signal word.
4. The method of Claim 3, wherein the calibration memory register comprises non-volatile memory.
5. The method of Claim 3, wherein the calibration memory register comprises writable/readable memory.
6. The method of Claim 3, wherein generating an outbound video signal word comprises: storing each product of each possible video signal word multiplied with each derived coefficient in association with the combination of the video signal word and the derived coefficient; retrieving the product associated with the inbound video signal word; and generating the outbound video signal word by adding the product to an associated coefficient.
7. The method of Claim 6, wherein the products are stored in non- volatile memory.
8. The method of Claim 6, wherein the products are stored in writable/readable memory.
9. The method of Claim 6, wherein measuring the luminance resulting from the activation of the grid wires comprises reading an ammeter placed in electrical series with the accelerating voltage.
10. A display system comprising: an in-bound video signal word register configured to store and retrieve an addressed video signal word in association with that address; a calibration register comprising coefficient sets stored in association with each subpixel; and a video processor comprising: a multiplier component configured to generate a product by multiplying an in-bound video signal word retrieved from the in-bound video signal register in association with an address with a first coefficient from the coefficient set stored in association with the subpixel corresponding with the address; and an adder component configured to output a sum by adding the product to a second coefficient from the coefficient set stored in association with the subpixel, wherein the outputted sum is an out-bound video signal word.
11. The system of Claim 10, wherein the calibration register is non-volatile memory.
12. The system of Claim 10, wherein the calibration register is writable/readable memory.
13. The system of Claim 10, wherein the multiplier component comprises a mathematical register wherein each product of each possible video signal word multiplied with each coefficient are stored in association with the combination of the video signal word and the coefficient, and the multiplier component retrieves the product from the mathematical register in accordance with the combination of the inbound video signal word and a first coefficient from the set of coefficients.
14. The system of Claim 13, wherein the mathematical register is non- volatile memory.
15. The system of Claim 13, wherein the mathematical register is writable/readable memory.
16. A display driver comprising : a means for receiving a luminance value for a subpixel; a means for retrieving an output coefficient according to the address associated with the subpixel; a means for generating a new luminance value for the subpixel according to the received luminance value and retrieved output coefficient; and a means for driving a display according to the generated new luminance value.
PCT/US2002/016977 2001-06-01 2002-05-31 System and method for achieving display uniformity in matrix addressed displays WO2002099565A2 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9070316B2 (en) 2004-10-25 2015-06-30 Barco Nv Optical correction for high uniformity panel lights

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9070316B2 (en) 2004-10-25 2015-06-30 Barco Nv Optical correction for high uniformity panel lights

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