WO2002052409A2 - Method and apparatus for increasing performance of an interpreter - Google Patents
Method and apparatus for increasing performance of an interpreter Download PDFInfo
- Publication number
- WO2002052409A2 WO2002052409A2 PCT/US2001/046840 US0146840W WO02052409A2 WO 2002052409 A2 WO2002052409 A2 WO 2002052409A2 US 0146840 W US0146840 W US 0146840W WO 02052409 A2 WO02052409 A2 WO 02052409A2
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- platform
- sequence
- independent
- loop
- code
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45504—Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
Definitions
- the present invention relates to interpreters for computer languages. More specifically, the present invention relates to a method and apparatus for increasing the performance of a platform-independent code interpreter.
- a person desiring to write a device-independent program typically writes source code, which includes a series of instructions in a high-level language.
- a compiler then translates the source-code into platform-independent codes (pi-codes), which can be executed on various end devices. Examples of pi-codes are JAVA bytecodes, Pascal P-codes, and COBOL GNT instructions.
- Each of the various end devices includes a program, usually called an interpreter, which reads these pi-codes and executes a corresponding set of instructions in the native language of the end device.
- Interpreters can be very slow because they must first translate a pi-code instruction into corresponding native code before executing the native code. During this process, the interpreter must keep track of where it is operating within the series of pi-codes, and it must look up the corresponding native code instruction or instructions needed to implement the pi-code.
- JIT just-in-time
- Another drawback to using a JIT compiler is that many of the end computing devices have limited resources.
- the end computing devices may be cellphones, personal information managers, or other hand-held devices that have little excess memory to store the JIT compiler and the data structures that the JIT compiler uses to translate the pi-code to the native code of the end computing device.
- One embodiment of the present invention provides a system for increasing the performance of a platform-independent virtual machine in executing a sequence of platform-independent codes (pi-codes) generated by a high-level language compiler.
- the system operates by first obtaining a pi-code to be executed by the platform- independent virtual machine. Next, the system locates a sequence of native code instructions that, when executed, will perform the action required by the pi-code. The system then executes the sequence of native code instructions. After the code has been executed, the system stores a copy of the sequence of native code instructions associated with the pi-code in a cache. Finally, if the pi-code defines a loop, the system saves a pointer to a beginning of the loop within the cache which, when used as a reference during execution, will cause the loop to be executed from the cache rather than from the pi ⁇ code.
- the system repeats the steps of obtaining a pi-code, locating the associated native code, executing the native code, storing the native code, and saving the pointer until there are no more pi-codes to be executed.
- the system saves the pointer in a table indexed by the position of the pi-code in the sequence of pi-codes.
- the system stores a branch instruction in the cache at an end of the sequence of native code instructions associated with the pi-code so that the sequence of native code instructions can be repeated.
- the system executes the sequence of native code instructions stored in the cache that is associated with the loop.
- the system executes the branch instruction stored in the cache when executing the sequence of native code instructions associated with the loop.
- the system repeats the execution of the sequence of native code instructions for the loop after executing the branch instruction stored in the cache without any additional reference to the sequence of pi- codes. In one embodiment of the present invention, the system stops repeating the loop when specified conditions for terminating the loop are achieved.
- FIG. 1 illustrates a computing device including a platform-independent virtual machine in accordance with an embodiment of the present invention.
- FIG. 2 illustrates a sequence of pi-codes for execution by a pi-code interpreter in accordance with an embodiment of the present invention.
- FIG. 3A illustrates the state of some of the internal data structures used by pi- code interpreter 114 prior to executing any of the pi-codes in accordance with an embodiment of the present invention.
- FIG. 3B illustrates the state of some of the internal data structures used by pi- code interpreter 114 after executing some of the pi-codes in accordance with an embodiment of the present invention.
- FIG. 3C illustrates the state of some of the internal data structures used by pi- code interpreter 114 after executing the loop pi-code for the first time in accordance with an embodiment of the present invention.
- FIG. 3D illustrates the state of some of the internal data structures used by pi- code interpreter 114 just before executing the loop pi-code for the second and subsequent times in accordance with an embodiment of the present invention.
- FIG. 3E illustrates the state of some of the internal data structures used by pi- code interpreter 114 after executing the loop pi-code for the second and subsequent times in accordance with an embodiment of the present invention.
- FIG. 3F illustrates the state of some of the internal data structures used by pi- code interpreter 114 after executing the loop pi-code for the final time in accordance with an embodiment of the present invention.
- FIG. 4 is a flowchart illustrating the process of executing pi-codes in accordance with an embodiment of the present invention.
- Computer program listing 1 is a listing of code that implements an interpreter in accordance with an embodiment of the present invention.
- CDs compact discs
- DVDs digital versatile discs or digital video discs
- computer instruction signals embodied in a transmission medium (with or without a carrier wave upon which the signals are modulated).
- the transmission medium may include a communications network, such as the Internet.
- FIG. 1 illustrates computing device 100 including platform-independent virtual machine 104 in accordance with an embodiment of the present invention.
- Computing device 100 may include any type of computer system, including, but not limited to, a computer system based on a microprocessor, a mainframe computer, a digital signal processor, a personal organizer, a device controller, and a computational engine within an appliance.
- Platform- independent virtual machine 104 is located within computing device 100 and contains instruction pointer 106, cache pointer 108, and pi-code interpreter 110. Instruction pointer 106 indicates the current point of execution within pi-codes
- Instruction pointer 106 also indicates the associated point within loop pointers 118.
- Cache pointer 108 indicates the next place available within cache 116 to store native code instructions 112.
- Native code instructions 112 contain instructions 112a through 112h. Each of native code instructions 112a through 112h contain the native code instructions associated with a specific pi-code stored within pi-codes 114. For example, instructions 112a may be associated with a "load" instruction, instructions 112d may be associated with an "add” instruction, instructions 112h may be associated with a
- Instructions 112 may be the instructions associated with the cases of a switch statement within pi-code interpreter 110.
- Cache 116 is used to hold instructions 112 in the order of execution as determined by pi-codes 114.
- Loop pointers 118 contains pointers to the beginning of any loops of code within cache 116. Both of these data structures are described in more detail with reference to FIGs. 3A through 3F below.
- FIG. 2 illustrates a sequence of pi-codes 114 for execution by pi-code interpreter 110 in accordance with an embodiment of the present invention.
- Pi-codes 114 represent an example of a simple program used herein to illustrate the operation of the invention.
- the pi-codes in the example do not relate to any specific pi-code generator, rather, they are representative of pi-codes generated from any high-level language by an arbitrary compiler.
- Pi-code 202 is a load instruction that loads a value, say zero, into a register (not shown).
- Pi-code 204 is an add instruction that adds a value, say one, to the register. This addition results in the value in the register being incremented.
- Pi-code 206 is a print instruction that causes the value within the register to be printed.
- pi-code 208 is a loop instruction that causes some number of previous pi-codes to be repeated a predetermined number of times.
- the previous two pi-codes namely pi-codes 204 and 206, will be repeated nine times.
- this sequence of pi-codes causes the numbers from one to ten to be printed.
- Pi-code interpreter 110 copies sections from its own native code to build the native code stored in cache 116.
- Computer program listing 1 presents a C language version of pi-code interpreter 110. Referring to computer program listing 1, the
- JEND macro copies the section of code between the JSTART and the JEND macros associated with the current pi-code into cache 116.
- pi-code interpreter 110 uses the corresponding native code stored in cache 116 to execute the loop rather than pi-codes 114.
- the constructs used within computer program listing 1 can be found in the widely available GNU C compiler.
- FIGs, 3 A through 3F illustrate the state of some of the internal data structures used by pi-code interpreter 110 during execution of pi-codes 114.
- FIG. 3 A illustrates the state of some of the internal data structures used by pi-code interpreter 110 prior to executing any of the pi-codes in accordance with an embodiment of the present invention.
- instruction pointer 124 points to pi-code 202 within pi-codes 114.
- Instruction pointer 124 also points to the corresponding cell within loop pointers 118.
- Cache pointer 108 points to the first cell of cache 116.
- pi-code interpreter 110 accesses the pi-code pointed to by instruction pointer 124. In the first case, this is pi-code 202, the load instruction. After determining that pi-code 202 is not a loop instruction, pi-code interpreter 110 finds the corresponding instructions within native code instructions 112. As an example, the load instruction may be associated with instructions 112a. Pi-code interpreter 110 then executes instructions 112a. After executing instructions 112a, pi- code interpreter 110 stores a copy of instructions 112a in cache 116. Finally, pi-code interpreter increments cache pointer 108 and instruction pointer 124.
- pi-code interpreter 110 accesses pi-code 204, the add instruction, pi- code interpreter 110 then follows the same steps as for pi-code 202 with the exception that the instructions from native code instructions 112 that are associated with the add instruction, say instructions 112d, are selected. Similarly, pi-code interpreter 110 accesses pi-code 206 and selects instructions from native code instructions 112, say instructions 112h, associated with the print instruction. After executing pi-codes 202, 204, and 206, the internal data structures are as shown in FIG. 3B.
- FIG. 3B illustrates the state of some of the internal data structures used by pi- code interpreter 110 after executing some of the pi-codes in accordance with an embodiment of the present invention.
- Instruction pointer 124 now points to pi-code 208, the loop instruction.
- Pi-code interpreter 110 now accesses pi-code 208.
- pi-code interpreter 110 determines if this is the first time that pi-code 208 has been executed by inspecting an internal loop counter (not shown). Since this is the first time executing pi-code 208, instruction pointer 124 is decremented by the first value, two, within pi-code 208 and the internal loop counter is set to the second value, nine, within pi-code 208.
- cache pointer 108 After storing the instructions from native code instructions 112 associated with pi-code 208, say instructions 112f, cache pointer 108 is incremented. Next, a branch instruction is stored in cache 116 that, when executed, causes pi-code interpreter 110 to loop through the appropriate instructions stored in cache 116 and cache pointer 108 is again incremented. Continuing, pi-code interpreter 110 determines if a loop has been established by inspecting loop pointers 118 at the location pointed to by instruction pointer 124. Since this is the first time that loop pi-code 208 has been executed, this location is empty. Finally, pi-code interpreter 110 stores the value of cache pointer 108 in loop pointers 118 at the location pointed to by instruction pointer 124. This leaves the internal data structures are as shown in FIG. 3C.
- FIG. 3C illustrates the state of some of the internal data structures used by pi- code interpreter 110 after executing the loop pi-code for the first time in accordance with an embodiment of the present invention.
- Pi-code interpreter 110 continues executing pi-codes 114 as described above executing pi-codes 204 and 206 for the second time.
- the internal data structures are as shown in FIG. 3D.
- FIG. 3D illustrates the state of some of the internal data structures used by pi- code interpreter 110 just before executing the loop pi-code for the second and subsequent times in accordance with an embodiment of the present invention.
- Pi- code interpreter 110 now accesses pi-code 208 for the second time.
- pi-code interpreter 110 stores instructions 112f and the return instruction in cache 116 as before. This leaves the state of the internal data structures as shown in FIG. 3E.
- FIG. 3E illustrates the state of some of the internal data structures used by pi- code interpreter 110 after executing the loop pi-code for the second and subsequent times in accordance with an embodiment of the present invention.
- Pi-code interpreter 110 now determines that instruction pointer 124 is at the beginning of a loop because loop pointers 118 has a pointer in the cell pointed to by instruction pointer 124. At this point, pi-code interpreter 110 executes native code instructions from cache 116. Each time through the instructions associated with the loop, the internal loop counter is decremented. When the internal loop counter becomes zero, pi-code interpreter 110 sets instruction pointer 124 to the next cell in pi-codes 114. This leaves the state of the internal data structures as shown in FIG. 3F.
- FIG. 3F illustrates the state of some of the internal data structures used by pi- code interpreter 110 after executing the loop pi-code for the final time in accordance with an embodiment of the present invention.
- pi-code interpreter 110 determines if there are any more pi-codes within pi-codes 114. If there are more pi- codes, pi-code interpreter 110 continues executing pi-codes as before. If there are no more pi-codes, the program terminates.
- FIG. 4 is a flowchart illustrating the process of executing pi-codes in accordance with an embodiment of the present invention.
- the system starts when pi- code interpreter 110 gets the next pi-code from pi-codes 114 (step 402).
- pi- code interpreter 110 determines if the pi-code is a loop instruction (step 404).
- pi-code interpreter 110 locates the corresponding native code for the pi-code within native code instructions 112 (step 406). Pi-code interpreter 110 then executes the corresponding native code (step 408). Next, pi-code interpreter 110 stores a copy of the corresponding native code for the pi-code in cache 116 (step 410).
- pi-code interpreter 110 determines if the current pi-code is a loop instruction (step 412). If the pi-code is a loop instruction, pi-code interpreter 110 determines if a loop pointer has been set in loop pointers 118 (step 413). If the loop pointer has not been set in loop pointers 118 at step 413, pi-code interpreter 110 stores a return instruction in cache
- pi-code interpreter 110 stores the current cache pointer 108 in loop pointers 118 (step 416). If the pi-code is a loop instruction at step 404, pi-code interpreter 110 determines if a loop has already been established by examining an internal loop counter (step 420). If a loop has not already been established, pi-code interpreter 110 initializes the internal loop counter (step 422). After initializing the internal loop counter at step 422, pi-code interpreter 110 continues execution from step 406 as described above.
- pi-code interpreter 110 executes the cached code associated with the loop (step 424). Next, pi-code interpreter determines if the end of the loop has been reached (step 426). If the end of the loop has not been reached, pi-code interpreter 110 returns to step 424 to repeat the cached code.
- pi-code interpreter 11,0 determines if there are more pi-codes to be processed in pi-codes 114 (step 418). If there are more pi-codes in pi-codes 114 at step 418, pi-code interpreter 110 returns to step 402 to continue processing pi-codes. If there are no more pi-codes at step 418, processing terminates.
- This interpreter does not check the correctness of commands
- the only purpose for developing this interpreter was to prototype a JIT compilation technology .
- gcc Jit.c -g -DJIT 1 -o jit gcc Jit.c -g -o int command line for printing 1..10 jit xO al p 129 command line for fibbonacci (10) jit xO XI p P M Ax r P 148 command line for fibbonacci ( 46) jit xO XI p P M Ax r P 149 M Ax r P 149 M Ax r P 149 M Ax r P 149 M Ax r P 149 M Ax r P 149 M Ax r P 149 M Ax r P 149 M Ax r P 149 M Ax r P 144*********************************************************•*•/
- JEND (8) break; case sp, .
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Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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GB0308866A GB2384089B (en) | 2000-11-13 | 2001-11-08 | Method and apparatus for increasing performance of an interpreter |
AU2002245075A AU2002245075A1 (en) | 2000-11-13 | 2001-11-08 | Method and apparatus for increasing performance of an interpreter |
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US71276100A | 2000-11-13 | 2000-11-13 | |
US09/712,761 | 2000-11-13 |
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WO2002052409A2 true WO2002052409A2 (en) | 2002-07-04 |
WO2002052409A3 WO2002052409A3 (en) | 2004-02-26 |
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PCT/US2001/046840 WO2002052409A2 (en) | 2000-11-13 | 2001-11-08 | Method and apparatus for increasing performance of an interpreter |
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AU (1) | AU2002245075A1 (en) |
GB (1) | GB2384089B (en) |
WO (1) | WO2002052409A2 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
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WO2005008478A3 (en) * | 2003-07-15 | 2005-09-15 | Transitive Ltd | Method and apparatus for performing native binding |
EP2015177A1 (en) * | 2003-07-15 | 2009-01-14 | Transitive Limited | Method and apparatus for performing native binding |
CN107179935A (en) * | 2016-03-11 | 2017-09-19 | 华为技术有限公司 | A kind of instruction executing method and virtual machine |
US11966727B2 (en) | 2016-03-11 | 2024-04-23 | Lzlabs Gmbh | Load module compiler |
Citations (1)
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WO1998059292A1 (en) * | 1997-06-25 | 1998-12-30 | Transmeta Corporation | Improved microprocessor |
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US4991088A (en) * | 1988-11-30 | 1991-02-05 | Vlsi Technology, Inc. | Method for optimizing utilization of a cache memory |
US5768593A (en) * | 1996-03-22 | 1998-06-16 | Connectix Corporation | Dynamic cross-compilation system and method |
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2001
- 2001-11-08 WO PCT/US2001/046840 patent/WO2002052409A2/en not_active Application Discontinuation
- 2001-11-08 GB GB0308866A patent/GB2384089B/en not_active Expired - Fee Related
- 2001-11-08 AU AU2002245075A patent/AU2002245075A1/en not_active Abandoned
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WO1998059292A1 (en) * | 1997-06-25 | 1998-12-30 | Transmeta Corporation | Improved microprocessor |
Non-Patent Citations (3)
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ALTMAN E R ET AL: "WELCOME TO THE OPPORTUNITIES OF BINARY TRANSLATION" COMPUTER, IEEE COMPUTER SOCIETY, LONG BEACH., CA, US, US, vol. 33, no. 3, March 2000 (2000-03), pages 40-45, XP001075148 ISSN: 0018-9162 * |
HSIEH C-H A ET AL: "Java bytecode to native code translation: the Caffeine prototype and preliminary results" PROCEEDINGS OF THE 29TH. ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE. MICRO-29. PARIS, DEC. 2 - 4, 1996, PROCEEDINGS OF THE ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE. (MICRO), LOS ALAMITOS, IEEE COMP. SOC. PRESS, U, vol. SYMP. 29, 2 December 1996 (1996-12-02), pages 90-97, XP010206088 ISBN: 0-8186-7641-8 * |
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Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2005008478A3 (en) * | 2003-07-15 | 2005-09-15 | Transitive Ltd | Method and apparatus for performing native binding |
US7434209B2 (en) | 2003-07-15 | 2008-10-07 | Transitive Limited | Method and apparatus for performing native binding to execute native code |
EP2015177A1 (en) * | 2003-07-15 | 2009-01-14 | Transitive Limited | Method and apparatus for performing native binding |
US8091076B2 (en) | 2003-07-15 | 2012-01-03 | International Business Machines Corporation | Dynamic native binding |
US8108842B2 (en) | 2003-07-15 | 2012-01-31 | International Business Machines Corporation | Method and apparatus for performing native binding |
CN107179935A (en) * | 2016-03-11 | 2017-09-19 | 华为技术有限公司 | A kind of instruction executing method and virtual machine |
CN107179935B (en) * | 2016-03-11 | 2021-01-29 | 华为技术有限公司 | Instruction execution method and virtual machine |
US11966727B2 (en) | 2016-03-11 | 2024-04-23 | Lzlabs Gmbh | Load module compiler |
Also Published As
Publication number | Publication date |
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GB0308866D0 (en) | 2003-05-21 |
WO2002052409A3 (en) | 2004-02-26 |
AU2002245075A1 (en) | 2002-07-08 |
GB2384089B (en) | 2005-07-13 |
GB2384089A (en) | 2003-07-16 |
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