WO2002043142A3 - Verpacktes elektronisches bauelement und verfahren zur verpackung eines elektronischen bauelements - Google Patents

Verpacktes elektronisches bauelement und verfahren zur verpackung eines elektronischen bauelements Download PDF

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Publication number
WO2002043142A3
WO2002043142A3 PCT/DE2001/004394 DE0104394W WO0243142A3 WO 2002043142 A3 WO2002043142 A3 WO 2002043142A3 DE 0104394 W DE0104394 W DE 0104394W WO 0243142 A3 WO0243142 A3 WO 0243142A3
Authority
WO
WIPO (PCT)
Prior art keywords
electronic component
packaging
packaged
chip
die pad
Prior art date
Application number
PCT/DE2001/004394
Other languages
English (en)
French (fr)
Other versions
WO2002043142A2 (de
Inventor
Stefan Mueller
Frieder Haag
Original Assignee
Bosch Gmbh Robert
Stefan Mueller
Frieder Haag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bosch Gmbh Robert, Stefan Mueller, Frieder Haag filed Critical Bosch Gmbh Robert
Priority to US10/432,943 priority Critical patent/US20040084784A1/en
Priority to JP2002544779A priority patent/JP2004515060A/ja
Priority to EP01997846A priority patent/EP1340256A2/de
Priority to KR10-2003-7006988A priority patent/KR20040014420A/ko
Publication of WO2002043142A2 publication Critical patent/WO2002043142A2/de
Publication of WO2002043142A3 publication Critical patent/WO2002043142A3/de

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
    • H01L23/296—Organo-silicon compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135—Double encapsulation or coating and encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01068—Erbium [Er]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Packaging Frangible Articles (AREA)

Abstract

Es wird ein verpacktes elektronisches Bauelement bzw. ein Verfahren zur Verpackung eines elektronischen Bauelements vorgeschlagen, bei dem ein Chip (1) auf der Oberseite eines Diepad (2) befestigt wird. Der Diepad (2) und der Chip (1) sind von einer Plastikmasse (3) umschlossen. Auf der Oberseite des Chip (1) und auf der Unterseite des Diepad (2) ist ein Gel (11, 12) angeordnet.
PCT/DE2001/004394 2000-11-25 2001-11-21 Verpacktes elektronisches bauelement und verfahren zur verpackung eines elektronischen bauelements WO2002043142A2 (de)

Priority Applications (4)

Application Number Priority Date Filing Date Title
US10/432,943 US20040084784A1 (en) 2000-11-25 2001-11-21 Packaged electronic component and method for packaging an electronic component
JP2002544779A JP2004515060A (ja) 2000-11-25 2001-11-21 封止された電子素子および電子素子を封止する方法
EP01997846A EP1340256A2 (de) 2000-11-25 2001-11-21 Verpacktes elektronisches bauelement und verfahren zur verpackung eines elektronischen bauelements
KR10-2003-7006988A KR20040014420A (ko) 2000-11-25 2001-11-21 패키지된 전기 구성 요소 및 전기 구성 요소의 패키지를위한 방법

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10058593A DE10058593A1 (de) 2000-11-25 2000-11-25 Verpacktes elektronisches Bauelement und Verfahren zur Verpackung eines elektronischen Bauelements
DE10058593.0 2000-11-25

Publications (2)

Publication Number Publication Date
WO2002043142A2 WO2002043142A2 (de) 2002-05-30
WO2002043142A3 true WO2002043142A3 (de) 2002-11-28

Family

ID=7664663

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2001/004394 WO2002043142A2 (de) 2000-11-25 2001-11-21 Verpacktes elektronisches bauelement und verfahren zur verpackung eines elektronischen bauelements

Country Status (6)

Country Link
US (1) US20040084784A1 (de)
EP (1) EP1340256A2 (de)
JP (1) JP2004515060A (de)
KR (1) KR20040014420A (de)
DE (1) DE10058593A1 (de)
WO (1) WO2002043142A2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10243513A1 (de) * 2002-09-19 2004-04-01 Robert Bosch Gmbh Elektrisches und/oder mikromechanisches Bauelement und Verfahren
DE10300594B4 (de) * 2003-01-10 2013-01-17 Robert Bosch Gmbh Bauelement und Verfahren
US7633157B2 (en) * 2005-12-13 2009-12-15 Micron Technology, Inc. Microelectronic devices having a curved surface and methods for manufacturing the same
DE102006025868A1 (de) * 2006-06-02 2007-12-06 Robert Bosch Gmbh Bonddraht und Bondverbindung mit einem Bonddraht
US7868471B2 (en) * 2007-09-13 2011-01-11 Stats Chippac Ltd. Integrated circuit package-in-package system with leads
DE102008002268A1 (de) 2008-06-06 2009-12-10 Robert Bosch Gmbh Sensoranordnung und Verfahren zur Herstellung einer Sensoranordnung
DE102008043773A1 (de) 2008-11-17 2010-05-20 Robert Bosch Gmbh Elektrisches und/oder mikromechanisches Bauelement und Verfahren zur Herstellung eines elektrischen und/oder mikromechanischen Bauelements
DE102009002519A1 (de) * 2009-04-21 2010-10-28 Robert Bosch Gmbh Gekapselte Schaltungsvorrichtung für Substrate mit Absorptionsschicht sowie Verfahren zu Herstellung derselben
US8564954B2 (en) * 2010-06-15 2013-10-22 Chipmos Technologies Inc. Thermally enhanced electronic package
US10304788B1 (en) * 2018-04-11 2019-05-28 Semiconductor Components Industries, Llc Semiconductor power module to protect against short circuit event

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60119757A (ja) * 1983-12-01 1985-06-27 New Japan Radio Co Ltd 半導体装置の製造方法
JPS61182234A (ja) * 1985-02-08 1986-08-14 Oki Electric Ind Co Ltd 半導体装置の製造方法
JPS63114242A (ja) * 1986-10-31 1988-05-19 Toshiba Corp 半導体装置
US4823605A (en) * 1987-03-18 1989-04-25 Siemens Aktiengesellschaft Semiconductor pressure sensor with casing and method for its manufacture
JPH02146750A (ja) * 1988-08-05 1990-06-05 Fuji Electric Co Ltd 半導体集積回路およびその製造方法
JPH02205056A (ja) * 1989-02-03 1990-08-14 Hitachi Ltd 集積回路パッケージ
EP0686669A2 (de) * 1994-06-06 1995-12-13 Dow Corning Toray Silicone Company, Limited Zusammensetzungen zum Schutz von Halbleiterelementen und Halbleitervorrichtungen

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2594142B2 (ja) * 1988-11-30 1997-03-26 東芝シリコーン株式会社 電子部品の製造方法
KR970008355B1 (ko) * 1992-09-29 1997-05-23 가부시키가이샤 도시바 수지밀봉형 반도체장치

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60119757A (ja) * 1983-12-01 1985-06-27 New Japan Radio Co Ltd 半導体装置の製造方法
JPS61182234A (ja) * 1985-02-08 1986-08-14 Oki Electric Ind Co Ltd 半導体装置の製造方法
JPS63114242A (ja) * 1986-10-31 1988-05-19 Toshiba Corp 半導体装置
US4823605A (en) * 1987-03-18 1989-04-25 Siemens Aktiengesellschaft Semiconductor pressure sensor with casing and method for its manufacture
JPH02146750A (ja) * 1988-08-05 1990-06-05 Fuji Electric Co Ltd 半導体集積回路およびその製造方法
JPH02205056A (ja) * 1989-02-03 1990-08-14 Hitachi Ltd 集積回路パッケージ
EP0686669A2 (de) * 1994-06-06 1995-12-13 Dow Corning Toray Silicone Company, Limited Zusammensetzungen zum Schutz von Halbleiterelementen und Halbleitervorrichtungen

Non-Patent Citations (5)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 009, no. 277 (E - 355) 6 November 1985 (1985-11-06) *
PATENT ABSTRACTS OF JAPAN vol. 011, no. 007 (E - 469) 9 January 1987 (1987-01-09) *
PATENT ABSTRACTS OF JAPAN vol. 012, no. 357 (E - 662) 26 September 1988 (1988-09-26) *
PATENT ABSTRACTS OF JAPAN vol. 014, no. 394 (E - 0969) 24 August 1990 (1990-08-24) *
PATENT ABSTRACTS OF JAPAN vol. 014, no. 493 (E - 0995) 26 October 1990 (1990-10-26) *

Also Published As

Publication number Publication date
WO2002043142A2 (de) 2002-05-30
JP2004515060A (ja) 2004-05-20
EP1340256A2 (de) 2003-09-03
KR20040014420A (ko) 2004-02-14
DE10058593A1 (de) 2002-06-06
US20040084784A1 (en) 2004-05-06

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