WO2001080308A3 - Method for cutting out at least a thin layer in a substrate or ingot, in particular made of semiconductor material(s) - Google Patents

Method for cutting out at least a thin layer in a substrate or ingot, in particular made of semiconductor material(s) Download PDF

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Publication number
WO2001080308A3
WO2001080308A3 PCT/FR2001/001179 FR0101179W WO0180308A3 WO 2001080308 A3 WO2001080308 A3 WO 2001080308A3 FR 0101179 W FR0101179 W FR 0101179W WO 0180308 A3 WO0180308 A3 WO 0180308A3
Authority
WO
WIPO (PCT)
Prior art keywords
ingot
substrate
thin layer
cutting out
semiconductor material
Prior art date
Application number
PCT/FR2001/001179
Other languages
French (fr)
Other versions
WO2001080308A2 (en
Inventor
Michel Roche
Original Assignee
Soitec Silicon On Insulator
Michel Roche
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec Silicon On Insulator, Michel Roche filed Critical Soitec Silicon On Insulator
Priority to JP2001577603A priority Critical patent/JP2003531492A/en
Priority to KR1020027013794A priority patent/KR100742790B1/en
Priority to EP01927984A priority patent/EP1273035B1/en
Priority to AU2001254866A priority patent/AU2001254866A1/en
Publication of WO2001080308A2 publication Critical patent/WO2001080308A2/en
Publication of WO2001080308A3 publication Critical patent/WO2001080308A3/en
Priority to US10/268,776 priority patent/US6951799B2/en
Priority to US11/140,910 priority patent/US7169686B2/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/36—Removing material
    • B23K26/40—Removing material taking account of the properties of the material involved
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00—Articles made by soldering, welding or cutting
    • B23K2101/36—Electric or electronic devices
    • B23K2101/40—Semiconductor devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2103/00—Materials to be soldered, welded or cut
    • B23K2103/16—Composite materials, e.g. fibre reinforced
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2103/00—Materials to be soldered, welded or cut
    • B23K2103/50—Inorganic material, e.g. metals, not provided for in B23K2103/02 – B23K2103/26
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Optics & Photonics (AREA)
  • Plasma & Fusion (AREA)
  • Mechanical Engineering (AREA)
  • Laser Beam Processing (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Light Receiving Elements (AREA)

Abstract

The invention concerns a method for cutting out at least a thin layer in an element forming a substrate or an ingot for electronic or optoelectronic or optical component or sensor. The invention is characterised in that it comprises steps which consist in: forming in said element a embrittled zone having a thickness corresponding to that of the layer to be cut out; injecting into said element an energy pulse lasting not more than the duration required for a sound wave to pass through the thickness of the zone absorbing said pulse energy, said pulse having an energy selected to cause cleaving at said embrittled layer.
PCT/FR2001/001179 2000-04-14 2001-04-17 Method for cutting out at least a thin layer in a substrate or ingot, in particular made of semiconductor material(s) WO2001080308A2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2001577603A JP2003531492A (en) 2000-04-14 2001-04-17 Method of cutting at least one thin layer from a substrate or ingot, especially made of semiconductor material
KR1020027013794A KR100742790B1 (en) 2000-04-14 2001-04-17 Method for cutting out at least a thin layer in a substrate or ingot, in particular made of semiconductor materials
EP01927984A EP1273035B1 (en) 2000-04-14 2001-04-17 Method for cutting out at least a thin layer in a substrate or ingot, in particular made of semiconductor material(s)
AU2001254866A AU2001254866A1 (en) 2000-04-14 2001-04-17 Method for cutting out at least a thin layer in a substrate or ingot, in particular made of semiconductor material(s)
US10/268,776 US6951799B2 (en) 2000-04-14 2002-10-11 Cutting thin layer(s) from semiconductor material(s)
US11/140,910 US7169686B2 (en) 2000-04-14 2005-06-01 Cutting thin layer(s) from semiconductor material(s)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0005549 2000-04-14
FR00/05549 2000-04-14

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US10/268,776 Continuation US6951799B2 (en) 2000-04-14 2002-10-11 Cutting thin layer(s) from semiconductor material(s)

Publications (2)

Publication Number Publication Date
WO2001080308A2 WO2001080308A2 (en) 2001-10-25
WO2001080308A3 true WO2001080308A3 (en) 2002-02-07

Family

ID=8849773

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/FR2001/001179 WO2001080308A2 (en) 2000-04-14 2001-04-17 Method for cutting out at least a thin layer in a substrate or ingot, in particular made of semiconductor material(s)

Country Status (7)

Country Link
US (2) US6951799B2 (en)
EP (1) EP1273035B1 (en)
JP (1) JP2003531492A (en)
KR (1) KR100742790B1 (en)
CN (1) CN100337319C (en)
AU (1) AU2001254866A1 (en)
WO (1) WO2001080308A2 (en)

Families Citing this family (48)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2773261B1 (en) * 1997-12-30 2000-01-28 Commissariat Energie Atomique METHOD FOR THE TRANSFER OF A THIN FILM COMPRISING A STEP OF CREATING INCLUSIONS
FR2811807B1 (en) * 2000-07-12 2003-07-04 Commissariat Energie Atomique METHOD OF CUTTING A BLOCK OF MATERIAL AND FORMING A THIN FILM
JP4659300B2 (en) 2000-09-13 2011-03-30 浜松ホトニクス株式会社 Laser processing method and semiconductor chip manufacturing method
FR2830983B1 (en) * 2001-10-11 2004-05-14 Commissariat Energie Atomique METHOD FOR MANUFACTURING THIN FILMS CONTAINING MICROCOMPONENTS
EP1635390B1 (en) 2002-03-12 2011-07-27 Hamamatsu Photonics K. K. Substrate dividing method
EP2272618B1 (en) 2002-03-12 2015-10-07 Hamamatsu Photonics K.K. Method of cutting object to be processed
TWI326626B (en) 2002-03-12 2010-07-01 Hamamatsu Photonics Kk Laser processing method
US7176108B2 (en) * 2002-11-07 2007-02-13 Soitec Silicon On Insulator Method of detaching a thin film at moderate temperature after co-implantation
FR2847075B1 (en) * 2002-11-07 2005-02-18 Commissariat Energie Atomique PROCESS FOR FORMING A FRAGILE ZONE IN A SUBSTRATE BY CO-IMPLANTATION
TWI520269B (en) 2002-12-03 2016-02-01 Hamamatsu Photonics Kk Cutting method of semiconductor substrate
TWI233154B (en) 2002-12-06 2005-05-21 Soitec Silicon On Insulator Method for recycling a substrate
EP1427002B1 (en) * 2002-12-06 2017-04-12 Soitec A method for recycling a substrate using local cutting
FR2848336B1 (en) * 2002-12-09 2005-10-28 Commissariat Energie Atomique METHOD FOR PRODUCING A STRESS STRUCTURE FOR DISSOCIATING
FR2852250B1 (en) 2003-03-11 2009-07-24 Jean Luc Jouvin PROTECTIVE SHEATH FOR CANNULA, AN INJECTION KIT COMPRISING SUCH ANKLE AND NEEDLE EQUIPPED WITH SUCH ANKLE
US8685838B2 (en) * 2003-03-12 2014-04-01 Hamamatsu Photonics K.K. Laser beam machining method
EP1482548B1 (en) 2003-05-26 2016-04-13 Soitec A method of manufacturing a wafer
FR2858875B1 (en) * 2003-08-12 2006-02-10 Soitec Silicon On Insulator METHOD FOR MAKING THIN LAYERS OF SEMICONDUCTOR MATERIAL FROM A DONOR WAFER
US7052978B2 (en) * 2003-08-28 2006-05-30 Intel Corporation Arrangements incorporating laser-induced cleaving
FR2861497B1 (en) 2003-10-28 2006-02-10 Soitec Silicon On Insulator METHOD FOR CATASTROPHIC TRANSFER OF A FINE LAYER AFTER CO-IMPLANTATION
US7772087B2 (en) * 2003-12-19 2010-08-10 Commissariat A L'energie Atomique Method of catastrophic transfer of a thin film after co-implantation
JP4694795B2 (en) * 2004-05-18 2011-06-08 株式会社ディスコ Wafer division method
FR2880189B1 (en) * 2004-12-24 2007-03-30 Tracit Technologies Sa METHOD FOR DEFERRING A CIRCUIT ON A MASS PLAN
FR2886051B1 (en) 2005-05-20 2007-08-10 Commissariat Energie Atomique METHOD FOR DETACHING THIN FILM
US7427554B2 (en) * 2005-08-12 2008-09-23 Silicon Genesis Corporation Manufacturing strained silicon substrates using a backing material
FR2889887B1 (en) 2005-08-16 2007-11-09 Commissariat Energie Atomique METHOD FOR DEFERING A THIN LAYER ON A SUPPORT
FR2891281B1 (en) 2005-09-28 2007-12-28 Commissariat Energie Atomique METHOD FOR MANUFACTURING A THIN FILM ELEMENT
KR100858983B1 (en) * 2005-11-16 2008-09-17 가부시키가이샤 덴소 Semiconductor device and dicing method for semiconductor substrate
FR2899378B1 (en) 2006-03-29 2008-06-27 Commissariat Energie Atomique METHOD FOR DETACHING A THIN FILM BY FUSION OF PRECIPITS
US9362439B2 (en) * 2008-05-07 2016-06-07 Silicon Genesis Corporation Layer transfer of films utilizing controlled shear region
FR2910179B1 (en) 2006-12-19 2009-03-13 Commissariat Energie Atomique METHOD FOR MANUFACTURING THIN LAYERS OF GaN BY IMPLANTATION AND RECYCLING OF A STARTING SUBSTRATE
FR2925221B1 (en) 2007-12-17 2010-02-19 Commissariat Energie Atomique METHOD FOR TRANSFERRING A THIN LAYER
FR2947098A1 (en) 2009-06-18 2010-12-24 Commissariat Energie Atomique METHOD OF TRANSFERRING A THIN LAYER TO A TARGET SUBSTRATE HAVING A THERMAL EXPANSION COEFFICIENT DIFFERENT FROM THAT OF THE THIN LAYER
JP5839538B2 (en) * 2011-03-17 2016-01-06 リンテック株式会社 Manufacturing method of thin semiconductor device
RU2469433C1 (en) * 2011-07-13 2012-12-10 Юрий Георгиевич Шретер Method for laser separation of epitaxial film or layer of epitaxial film from growth substrate of epitaxial semiconductor structure (versions)
US8673733B2 (en) * 2011-09-27 2014-03-18 Soitec Methods of transferring layers of material in 3D integration processes and related structures and devices
US8841742B2 (en) 2011-09-27 2014-09-23 Soitec Low temperature layer transfer process using donor structure with material in recesses in transfer layer, semiconductor structures fabricated using such methods
JP5725430B2 (en) * 2011-10-18 2015-05-27 富士電機株式会社 Method for peeling support substrate of solid-phase bonded wafer and method for manufacturing semiconductor device
FR2993095B1 (en) * 2012-07-03 2014-08-08 Commissariat Energie Atomique DETACHMENT OF A SILICON-FREE LAYER <100>
US9499921B2 (en) 2012-07-30 2016-11-22 Rayton Solar Inc. Float zone silicon wafer manufacturing system and related process
FR3002687B1 (en) * 2013-02-26 2015-03-06 Soitec Silicon On Insulator PROCESS FOR TREATING A STRUCTURE
FR3007892B1 (en) * 2013-06-27 2015-07-31 Commissariat Energie Atomique METHOD FOR TRANSFERRING A THIN LAYER WITH THERMAL ENERGY SUPPLY TO A FRAGILIZED AREA VIA AN INDUCTIVE LAYER
US10068795B2 (en) * 2014-02-07 2018-09-04 Globalwafers Co., Ltd. Methods for preparing layered semiconductor structures
JP5885768B2 (en) * 2014-03-17 2016-03-15 キヤノン株式会社 Biopsy device
FR3020175B1 (en) * 2014-04-16 2016-05-13 Soitec Silicon On Insulator METHOD OF TRANSFERRING A USEFUL LAYER
CN106548972B (en) 2015-09-18 2019-02-26 胡兵 A method of bulk semiconductor substrate is separated with functional layer thereon
JP6444462B2 (en) * 2017-08-03 2018-12-26 キヤノン株式会社 Biopsy device
FR3076067B1 (en) 2017-12-21 2020-01-10 Universite De Franche-Comte METHOD FOR MANUFACTURING ULTRA-PLANE THIN FILM COMPOSITE
US11414782B2 (en) 2019-01-13 2022-08-16 Bing Hu Method of separating a film from a main body of a crystalline object

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2666759A1 (en) * 1990-09-19 1992-03-20 Bourgogne Technologies Device for ablating, through the transparency of a plastic film, using a laser, and applications to spraying and to marking
SU1324525A1 (en) * 1985-07-01 1992-05-30 Научно-исследовательский институт ядерной физики при Томском политехническом институте им.С.М.Кирова Method of treating semiconducting material
EP0792731A2 (en) * 1996-03-01 1997-09-03 PIRELLI COORDINAMENTO PNEUMATICI S.p.A. Method and apparatus for cleaning vulcanization moulds for elastomer material articles
JPH11312811A (en) * 1998-02-25 1999-11-09 Seiko Epson Corp Thin-film exfoliation method, thin-film device transfer method, thin-film device, active matrix substrate and liquid crystal displaying device
EP0961312A2 (en) * 1998-05-15 1999-12-01 Canon Kabushiki Kaisha SOI Substrate formed by bonding

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2681472B1 (en) 1991-09-18 1993-10-29 Commissariat Energie Atomique PROCESS FOR PRODUCING THIN FILMS OF SEMICONDUCTOR MATERIAL.
CN1132223C (en) * 1995-10-06 2003-12-24 佳能株式会社 Semiconductor substrate and producing method thereof
FR2748851B1 (en) 1996-05-15 1998-08-07 Commissariat Energie Atomique PROCESS FOR PRODUCING A THIN FILM OF SEMICONDUCTOR MATERIAL
US6159824A (en) 1997-05-12 2000-12-12 Silicon Genesis Corporation Silicon-on-silicon wafer bonding process using a thin film blister-separation method
US6033974A (en) * 1997-05-12 2000-03-07 Silicon Genesis Corporation Method for controlled cleaving process
SG87916A1 (en) 1997-12-26 2002-04-16 Canon Kk Sample separating apparatus and method, and substrate manufacturing method
US6503321B2 (en) 1998-02-17 2003-01-07 The Trustees Of Columbia University In The City Of New York Slicing of single-crystal films using ion implantation
FR2785217B1 (en) 1998-10-30 2001-01-19 Soitec Silicon On Insulator METHOD AND DEVICE FOR SEPARATING IN A TWO WAFERS A PLATE OF MATERIAL, PARTICULARLY A SEMICONDUCTOR

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SU1324525A1 (en) * 1985-07-01 1992-05-30 Научно-исследовательский институт ядерной физики при Томском политехническом институте им.С.М.Кирова Method of treating semiconducting material
FR2666759A1 (en) * 1990-09-19 1992-03-20 Bourgogne Technologies Device for ablating, through the transparency of a plastic film, using a laser, and applications to spraying and to marking
EP0792731A2 (en) * 1996-03-01 1997-09-03 PIRELLI COORDINAMENTO PNEUMATICI S.p.A. Method and apparatus for cleaning vulcanization moulds for elastomer material articles
JPH11312811A (en) * 1998-02-25 1999-11-09 Seiko Epson Corp Thin-film exfoliation method, thin-film device transfer method, thin-film device, active matrix substrate and liquid crystal displaying device
EP1014452A1 (en) * 1998-02-25 2000-06-28 Seiko Epson Corporation Method of detaching thin-film device, method of transferring thin-film device, thin-film device, active matrix substrate, and liquid crystal display
EP0961312A2 (en) * 1998-05-15 1999-12-01 Canon Kabushiki Kaisha SOI Substrate formed by bonding

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
DATABASE WPI Section Ch Week 199317, Derwent World Patents Index; Class L03, AN 1993-141287, XP002179817 *
PATENT ABSTRACTS OF JAPAN vol. 2000, no. 02 29 February 2000 (2000-02-29) *
YOUTSOS A G, KIRIAKOPOULOS M, TIMKE TH: "Experimental and theoretical/numerical investigations of thin films bonding strength", THEORETICAL AND APPLIED FRACTURE MECHANICS, vol. 31, no. 1, February 1999 (1999-02-01) - March 1999 (1999-03-01), pages 47 - 59, XP001031851 *

Also Published As

Publication number Publication date
KR100742790B1 (en) 2007-07-25
EP1273035B1 (en) 2012-09-12
KR20030022108A (en) 2003-03-15
JP2003531492A (en) 2003-10-21
US7169686B2 (en) 2007-01-30
CN100337319C (en) 2007-09-12
US20030162367A1 (en) 2003-08-28
EP1273035A2 (en) 2003-01-08
WO2001080308A2 (en) 2001-10-25
CN1428005A (en) 2003-07-02
US6951799B2 (en) 2005-10-04
AU2001254866A1 (en) 2001-10-30
US20050227456A1 (en) 2005-10-13

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