WO2001024356A1 - Améliorations apportées à des émetteurs eer - Google Patents

Améliorations apportées à des émetteurs eer Download PDF

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Publication number
WO2001024356A1
WO2001024356A1 PCT/NZ2000/000189 NZ0000189W WO0124356A1 WO 2001024356 A1 WO2001024356 A1 WO 2001024356A1 NZ 0000189 W NZ0000189 W NZ 0000189W WO 0124356 A1 WO0124356 A1 WO 0124356A1
Authority
WO
WIPO (PCT)
Prior art keywords
phase
signal
modulator
envelope
amplifier
Prior art date
Application number
PCT/NZ2000/000189
Other languages
English (en)
Inventor
Stephen Ian Mann
Original Assignee
Tait Electronics Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tait Electronics Limited filed Critical Tait Electronics Limited
Priority to EP00970330A priority Critical patent/EP1226651A4/fr
Priority to AU79729/00A priority patent/AU782014B2/en
Priority to CA002385948A priority patent/CA2385948A1/fr
Publication of WO2001024356A1 publication Critical patent/WO2001024356A1/fr

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0261—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the polarisation voltage or current, e.g. gliding Class A
    • H03F1/0266—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the polarisation voltage or current, e.g. gliding Class A by using a signal derived from the input signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3247—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using feedback acting on predistortion circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3282—Acting on the phase and the amplitude of the input signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H03L7/0895—Details of the current generators
    • H03L7/0898—Details of the current generators the source or sink current values being variable
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/102—A non-specified detector of a signal envelope being used in an amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/331—Sigma delta modulation being used in an amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division

Definitions

  • This invention relates to amplification systems for radio frequency signals and in particular but not solely to envelope elimination and restoration (EER) techniques for radio transmitters. More specifically the invention relates to feedback, and phase or envelope modulation aspects of these techniques.
  • a phase lock loop (PLL) arrangement enables phase modulation and adjustment.
  • Mobile communication systems require high frequency power amplifiers for both base station transmitters and portable units carried by users. These amplifiers operate most efficiently at saturation in the non-linear range of their input/output characteristics. Efficiency is important for battery life and weight in the portable units while linearity is important for base stations with multiple carrier transmission.
  • a number of techniques have been developed to compensate for non-linear amplifier operation. Techniques involving modulation feedback from the amplified signal can be divided in two groups depending on how the modulating signal is represented in the baseband. Cartesian amplification systems apply a feedback signal to quadrature components of the modulating signal.
  • Polar loop amplification systems are based on EER techniques with addition of envelope and phase feedback arrangements. The phase feedback forms a PLL although envelope feedback alone may be used.
  • the invention may use Cartesian feedback and/or predistortion feedback in these techniques for linearisation.
  • the invention implements a PLL with phase modulation by way of a fractional-N divider.
  • the invention may broadly be said to consist in an amplification system for a radio transmitter comprising: a processing subsystem which determines envelope information and phase information from a baseband input signal, a phase modulator which generates a substantially constant amplitude signal having phase determined by the phase information, an envelope modulator which generates an amplitude modulation signal determined by the envelope information, and an amplifier which generates an output signal from the constant amplitude signal and the amplitude modulation signal.
  • the phase modulator may include a PLL or other such as a quadrature modulator.
  • the PLL preferably includes a frequency divider which is modulated according to the phase information.
  • the envelope modulator includes a pulse width modulator or a sigma delta modulator.
  • the processing subsystem may modify the envelope or phase information according to various forms of Cartesian feedback from the output signal from the amplifier.
  • the processing subsystem may also or alternatively provide a predistort signal to the phase modulator or the envelope modulator in a variety of ways.
  • the invention may also broadly be said to consist in any alternative combination of features which are suggested in this specification. All equivalents of these features are included.
  • FIG. 1 schematically shows a radio transmitter with amplification of a signal by a polar loop feedback system
  • Figure 2 shows an amplification system in a general form according to the invention
  • Figure 3 shows one embodiment of the system with Cartesian feedback
  • Figure 4 shows another embodiment of the system with feedback for predistortion
  • Figure 5 shows an alternative embodiment of the system with feedback for predistortion
  • Figure 6 shows another embodiment with phase modulation by way of a phase lock loop
  • Figure 7 shows a PLL arrangement for use in the system of Figure 6
  • Figure 8 shows an alternative embodiment using a phase lock loop
  • Figure 9 shows a PLL arrangement for use in the system of Figure 8
  • Figure 10 shows a digital envelope feedback arrangement
  • Figure 11 shows an analog envelope feedback arrangement.
  • Figures 12, 13, 14 show amplitude modulators in more detail, and
  • Figure 15 shows a phase modulation arrangement
  • FIG. 1 shows EER implemented in a traditional polar loop system.
  • An incoming RF signal I is converted by analog block 10 into polar signals ⁇ , r respectively containing phase and envelope information.
  • a phase controlled loop including power amplifier 1 1 operating in saturation then generates an output signal S according to the information, for transmission by antenna 12.
  • the phase controlled loop forms a PLL which receives signal ⁇ and provides a constant amplitude signal to the non-linear amplifier.
  • a power supply to the amplifier receives signal r and thereby controls gain of the amplifier to restore envelope information and produce signal S.
  • the PLL includes a phase comparator or detector 13 which compares the phases of signal ⁇ and feedback from signal S to determine the frequency of a voltage controlled oscillator 14. The oscillator in turn provides the constant amplitude signal to the amplifier.
  • Signal r is also modified by addition in block 15 of feedback from signal S.
  • the feedback arrangement includes an optional frequency downconverter 16 followed alternatively for signals ⁇ , r by an amplitude limiter 16 and envelope detector 17.
  • Figure 2 gives a schematic overview of the invention in a very general form.
  • a digital sub-system or processor arrangement 20, such as a DSP determines phase and envelope signals P and E from an incoming signal B.
  • a power amplifier 21 generates an output signal S which contains B modulated on a radio frequency carrier.
  • a phase modulator 22 such as a PLL or quadrature modulator forms a phase modulation path which feeds the amplifier, although in some cases the amplifier may be part of the modulator.
  • An envelope modulation path varies the amplifier gain by way of a modulator 23, which may vary a power supply to one stage of the amplifier for example.
  • the phase and envelope signals P and E may include several components such as predistortion signals as indicated below.
  • a feedback path from the output of the amplifier to the digital sub-system may take many forms, preferably a Cartesian loop which combines with quadrature signals in the digital sub-system.
  • Feedback arrangement 24 may include a range of process components such as an analog detector at the output of the amplifier, an analog-to-digital converter (ADC) for single or quadrature signals from the detector, and other specialised components such as an optimiser for predistortion.
  • ADC analog-to-digital converter
  • FIG. 3 shows one embodiment with several components of the digital sub-system in Figure 2.
  • Baseband signal B is converted to quadrature signals I, Q which are input to a phase extraction process 30 which in turn provides a phase signal for the modulator 22, and input to an envelope detector 31 which provides an envelope signal for the modulator 23.
  • Feedback from the amplifier 21 is processed by a detector 34, ADC 35 and further digital processing stage 36 as may be required before addition to the quadrature signals I, Q at combiners 37, 38.
  • the feedback arrangement therefore forms a Cartesian loop which tends to suppress imperfections in modulation of the amplifier and generally to linearise the amplification process.
  • the loop may be partly or fully analog.
  • Baseband sampling, or low or high intermediate frequency sub-sampling may be used in a partly digital Cartesian loop.
  • Figures 4 and 5 are other embodiments of Figure 2 involving adaptive predistortion of the quadrature signals I, Q. They also incorporate a feedback arrangement which may or may not be a Cartesian loop such as shown in Figure 3.
  • a digital predistorter 40 determines a distortion of the quadrature signals before input to the phase extraction and envelope detection stages.
  • a predistorter 50 determines separate distortion signals for the phase and envelope modulators. An optimisation process depending on the open loop feedback is normally required in each case.
  • FIG 6 shows another embodiment of an amplification system based on EER according to the invention.
  • Phase and envelope signals P and E are again formed from an input B.
  • a PLL frequency synthesiser 60 containing a frequency divider such as shown in Figure 7 forms a phase modulation path which feeds the amplifier.
  • An envelope modulation path varies the amplifier gain by way of a modulator 61.
  • the digital sub-system also preferably determines a phase offset signal O provided to the PLL over an offset adjustment path as described further below. This provides a fine adjustment of the phase of signal S if required to compensate distortion, and also equalises discrepancies between the phase and envelope modulation paths.
  • a feedback arrangement including detection of envelope and/or phase distortion in signal S preferably provides a feedback signal F for the digital sub-system.
  • a detector and ADC system 24 may be implemented in various ways either separately or incorporated partly in the sub-system.
  • An alternative embodiment in which the amplifier forms part of the PLL is described in Figure 8.
  • Figure 7 shows a PLL arrangement having a frequency divider which could be used in the embodiment of Figure 6.
  • the arrangement produces an output signal having a frequency which is an integer or fractional multiple of a reference signal and which is modulated according to the phase signal P.
  • a voltage controlled oscillator 70 receives a control signal from phase comparator 71 by way of loop filter 72, and produces a constant amplitude output for the amplifier 21.
  • the loop filter generally integrates an output provided by the comparator according to phase differences between a reference signal from frequency reference 73 and a feedback signal from the controlled oscillator.
  • a phase offset may be introduced between the reference and feedback signals by signal O from the digital sub-system 20, according to feedback from amplifier 21. This may control the action of an additional current source or sink at the input to the loop filter, for example.
  • FIG 8 shows another embodiment of an amplification system based on EER according to the invention.
  • the arrangement is generally similar to that of Figure 6 except that some or all of the stages represented by amplifier 21 and fed by PLL 60 are now included within PLL 90, such as shown in Figure 9.
  • This has an advantage that AM-PM phase errors caused by the amplifier stages are inherently corrected, so that there may be less requirement for a phase adjustment by offset signal O to compensate distortion.
  • the signal may still be required to equalise discrepancies between the phase and envelope modulation paths.
  • Coarse adjustment by a full cycle of the digital sampling period might still be required.
  • delay around the loop may be increased with loss of stability and possibly smaller bandwidth. Inclusion of amplification stages introduces additional delay in the loop. The gain and therefore bandwidth must be reduced to maintain stability.
  • Figure 9 shows a PLL arrangement having a frequency divider which could be used in the embodiment of Figure 8.
  • the arrangement is generally similar to that of Figure 7 except that power amplifier stages 91 being some or all stages of the amplifier 21 in Figure 7, are included in the loop.
  • Envelope information from the digital sub-system 22 is used to modulate the gain of the amplifier stages by way of signal E as before.
  • a limiter 72 is also included to remove the envelope information from signal S before input to the divider 74.
  • the limiter may form part of the input circuitry of the dividers, such as a high gain differential input of the kind found in pre-scalers commonly used in frequency synthesisers.
  • Figures 10 and 1 1 show digital and analog systems for obtaining envelope feedback from the power amplifiers 21 or 71 to determine a signal F for the digital sub-system 20.
  • Digital feedback generally requires an envelope detector 100 which may be implemented in many ways.
  • ADC 101 and DAC 102 are also generally required.
  • the amplitude modulator is a switching type to which the digital signal is directly applied.
  • a combination function 105 of the feedback information with envelope information from the incoming signal B may then be used to form signal E for modulation of the amplifier.
  • Analog feedback also requires an envelope detector 110.
  • a combination function 115 of the feedback with the envelope information takes place outside the digital sub-system before formation of signal E. Further feedback of distortion information may of course be provided by one or more signals F as shown in Figure 2, in addition to or instead of phase or envelope feedback. This would enable pre-distortion of the envelope and phase information signals E and P as described in relation to Figures 4 and 5. Processing to determine channel power or bandwidth effects might be used in signal S, for example.
  • Figures 13 and 14 show two alternatives for the amplitude modulator 23 of Figure 2 in more detail.
  • An analog signal X is input to a pulse width modulator 130 in Figure 13 and a digital signal Y is interpolated to a sigma delta modulator in Figure 14.
  • the modulator drives a switching transistor 131, 141 through a low pass filter 132, 142 to the amplifier 21.
  • a single loop sigma delta modulator is generally most effective having a large dynamic range, and can be part of an all digital circuit.
  • Figure 15 show two alternative feedback paths which might be used to linearise the phase modulator 22 of Figure 2.
  • the degree of linearity is generally required to match the AM-PM of the power amplifier 21.
  • Either one or two drivers 151 of the amplifier may be encompassed in feedback.
  • a limiter 150 is typically required in the latter case to remove amplitude modulation.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Amplifiers (AREA)
  • Transmitters (AREA)

Abstract

Cette invention a trait à des systèmes amplificateurs reposant sur des techniques EER (élimination et restauration d'enveloppe), utilisant, d'une manière générale, des méthodes numériques afin de déterminer une information d'enveloppe et de phase. On utilise, de préférence, une rétroaction cartésienne ou de prédistorsion afin d'améliorer l'éventail des caractéristiques. La modulation d'enveloppe peut être mise en oeuvre de diverses façons, notamment par l'utilisation d'un modulateur sigma delta et la modulation de phase peut également être mise en oeuvre de diverses façons, notamment par l'utilisation d'une boucle à phase asservie N.
PCT/NZ2000/000189 1999-09-29 2000-09-29 Améliorations apportées à des émetteurs eer WO2001024356A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP00970330A EP1226651A4 (fr) 1999-09-29 2000-09-29 Ameliorations apportees des emetteurs eer
AU79729/00A AU782014B2 (en) 1999-09-29 2000-09-29 Improvements relating to EER transmitters
CA002385948A CA2385948A1 (fr) 1999-09-29 2000-09-29 Ameliorations apportees a des emetteurs eer

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NZ33809799A NZ338097A (en) 1999-09-29 1999-09-29 Digitally controlled envelope elimination and restoration phase lock loop radio frequency amplifier
NZ338097 1999-09-29

Publications (1)

Publication Number Publication Date
WO2001024356A1 true WO2001024356A1 (fr) 2001-04-05

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PCT/NZ2000/000189 WO2001024356A1 (fr) 1999-09-29 2000-09-29 Améliorations apportées à des émetteurs eer

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EP (1) EP1226651A4 (fr)
AU (1) AU782014B2 (fr)
CA (1) CA2385948A1 (fr)
NZ (1) NZ338097A (fr)
WO (1) WO2001024356A1 (fr)

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003005564A2 (fr) 2001-07-03 2003-01-16 Siemens Aktiengesellschaft Procede de regulation de l'amplification d'un signal haute frequence
DE10212569A1 (de) * 2002-03-12 2003-09-25 Deutsche Telekom Ag Verfahren für Sendeverstärker für den Mobilfunk
WO2004001957A1 (fr) * 2002-06-25 2003-12-31 Nortel Networks Limited Configuration d'amplificateur de puissance amelioree
DE10230919A1 (de) 2002-07-09 2004-02-05 Rohde & Schwarz Ftk Gmbh Hochfrequenzsender und Verfahren zum wirkungsgradoptimierten Betreiben des Hochfrequenzsenders
EP1499011A1 (fr) * 2003-07-18 2005-01-19 Stichting Voor De Technische Wetenschappen Circuit amplificateur comprenant un circuit modulateur avec cycles de limitation modulés à enveloppe
WO2006032616A1 (fr) * 2004-09-23 2006-03-30 Siemens Aktiengesellschaft Unite d'amplification de puissance de terminal de telecommunication mobile et procede d'exploitation correspondant
DE102004054586A1 (de) * 2004-11-11 2006-05-24 Siemens Ag Verfahren und Vorrichtung zur Verstärkung eines amplituden- und phasenmodulierten elektrischen Signals
WO2006068553A1 (fr) * 2004-12-21 2006-06-29 Telefonaktiebolaget Lm Ericsson (Publ) Generation de signaux radiofrequences modules
US7072626B2 (en) 2003-04-30 2006-07-04 Telefonaktiebolaget Lm Ericsson (Publ) Polar modulation transmitter
EP1717960A3 (fr) * 2005-04-25 2006-11-22 Nokia Corporation Réutilisation de convertisseurs numériques-analogiques dans un émetteur multi-mode
US7289777B2 (en) 2001-06-20 2007-10-30 Nokia Corporation Power control for non-constant envelope modulation
US7359680B2 (en) 2004-09-14 2008-04-15 Telefonaktiebolaget Lm Ericsson (Publ) Delay calibration in polar modulation transmitters
WO2007144806A3 (fr) * 2006-06-12 2008-10-16 Nxp Bv Générateur de signal polaire
US7830220B2 (en) 2006-09-26 2010-11-09 Infineon Technologies Ag Modulator arrangement and method for signal modulation
WO2011034538A1 (fr) * 2009-09-18 2011-03-24 Analogic Corporation Emetteur de puissance rf
US8090051B2 (en) 2008-04-29 2012-01-03 Motorola Solutions, Inc. Combined feedback and feed-forward linearization of radio frequency (RF) power amplifiers
EP3267578A1 (fr) * 2016-07-08 2018-01-10 IMEC vzw Émetteur polaire et procédé permettant de générer un signal d'émission au moyen d'un émetteur polaire
DE10132047B4 (de) 2001-07-03 2020-06-18 Qualcomm Incorporated Verfahren zur Regelung der Verstärkung eines hochfrequenten Signals

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WO1999054994A1 (fr) * 1998-04-21 1999-10-28 Conexant Systems, Inc. Amplificateur de puissance de classe c a puissance moyenne basse tension a commande de gain precise

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US5705959A (en) * 1996-10-08 1998-01-06 The United States Of America As Represented By The Secretary Of The Air Force High efficiency low distortion amplification
WO1999005783A1 (fr) * 1997-07-25 1999-02-04 Motorola, Inc. Amplificateur de puissance a faible distorsion
WO1999054994A1 (fr) * 1998-04-21 1999-10-28 Conexant Systems, Inc. Amplificateur de puissance de classe c a puissance moyenne basse tension a commande de gain precise

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Cited By (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7289777B2 (en) 2001-06-20 2007-10-30 Nokia Corporation Power control for non-constant envelope modulation
CN1327609C (zh) * 2001-07-03 2007-07-18 西门子公司 控制高频信号放大的方法和相应的发射/接收单元
WO2003005564A3 (fr) * 2001-07-03 2003-12-11 Siemens Ag Procede de regulation de l'amplification d'un signal haute frequence
DE10132047B4 (de) 2001-07-03 2020-06-18 Qualcomm Incorporated Verfahren zur Regelung der Verstärkung eines hochfrequenten Signals
WO2003005564A2 (fr) 2001-07-03 2003-01-16 Siemens Aktiengesellschaft Procede de regulation de l'amplification d'un signal haute frequence
US7386287B2 (en) 2001-07-03 2008-06-10 Siemens Aktiengesellschaft Method for controlling the gain of radio-frequency signal
DE10212569A1 (de) * 2002-03-12 2003-09-25 Deutsche Telekom Ag Verfahren für Sendeverstärker für den Mobilfunk
WO2004001957A1 (fr) * 2002-06-25 2003-12-31 Nortel Networks Limited Configuration d'amplificateur de puissance amelioree
US6774719B1 (en) 2002-06-25 2004-08-10 Nortel Networks Limited Power amplifier configuration
DE10230919A1 (de) 2002-07-09 2004-02-05 Rohde & Schwarz Ftk Gmbh Hochfrequenzsender und Verfahren zum wirkungsgradoptimierten Betreiben des Hochfrequenzsenders
DE10230919B4 (de) 2002-07-09 2018-08-02 Rohde & Schwarz Gmbh & Co. Kg Hochfrequenzsender und Verfahren zum wirkungsgradoptimierten Betreiben des Hochfrequenzsenders
US7072626B2 (en) 2003-04-30 2006-07-04 Telefonaktiebolaget Lm Ericsson (Publ) Polar modulation transmitter
WO2005008884A1 (fr) 2003-07-18 2005-01-27 Koninklijke Philips Electronics N.V. Circuit d'amplification comprenant un circuit modulateur de cycles limites a enveloppe modulee
CN1823469B (zh) * 2003-07-18 2011-06-08 Nxp股份有限公司 包括包络调制有限周期调制器电路的放大电路
EP1499011A1 (fr) * 2003-07-18 2005-01-19 Stichting Voor De Technische Wetenschappen Circuit amplificateur comprenant un circuit modulateur avec cycles de limitation modulés à enveloppe
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AU7972900A (en) 2001-04-30
EP1226651A4 (fr) 2003-04-23
EP1226651A1 (fr) 2002-07-31
CA2385948A1 (fr) 2001-04-05
AU782014B2 (en) 2005-06-30
NZ338097A (en) 2001-05-25

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