WO2001015501A1 - Printed circuit substrate with photoimageable covercoat layer - Google Patents

Printed circuit substrate with photoimageable covercoat layer Download PDF

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Publication number
WO2001015501A1
WO2001015501A1 PCT/US2000/020176 US0020176W WO0115501A1 WO 2001015501 A1 WO2001015501 A1 WO 2001015501A1 US 0020176 W US0020176 W US 0020176W WO 0115501 A1 WO0115501 A1 WO 0115501A1
Authority
WO
WIPO (PCT)
Prior art keywords
base substrate
covercoat layer
photoimageable
covercoat
layer
Prior art date
Application number
PCT/US2000/020176
Other languages
French (fr)
Inventor
Robert M. Anderton
David L. Buster
John B. Scheibner
Original Assignee
3M Innovative Properties Company
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 3M Innovative Properties Company filed Critical 3M Innovative Properties Company
Priority to AU63712/00A priority Critical patent/AU6371200A/en
Publication of WO2001015501A1 publication Critical patent/WO2001015501A1/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/118—Printed elements for providing electric connections to or between printed circuits specially for flexible printed circuits, e.g. using folded portions
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0147—Carriers and holders
    • H05K2203/0156—Temporary polymeric carrier or foil, e.g. for processing or transferring
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0756—Uses of liquids, e.g. rinsing, coating, dissolving
    • H05K2203/0759—Forming a polymer layer by liquid coating, e.g. a non-metallic protective coating or an organic bonding layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4092—Integral conductive tabs, i.e. conductive parts partly detached from the substrate

Definitions

  • Flexible circuits generally include a pattern of conductive traces that are supported on a base substrate such as a layer of dielectric material.
  • the conductive traces typically have a copper core plated with a corrosion resistant material such as gold.
  • Polyimide is a common base substrate.
  • U.S. Patent Nos. 4.987.100; 5.227.008; 5.334.487; 5,557.844 and 5,680.701 disclose processes for fabricating printed circuits having a flexible polymeric base substrate such as polyimide.
  • U.S. Patent Nos. 3.660.726: 4.029.845; 4.526.835; and 5.806.177 disclose processes for fabricating printed circuits having a generally rigid base substrate such as a glass reinforced epoxy composite.
  • a flexible circuit may have an opening formed in the base substrate.
  • One or more of the conductive traces may include a lead that extends in a cantilevered manner from an edge of the opening.
  • the leads may also be formed in a manner in which they the span across the opening.
  • flexible circuits may be exposed to an aggressive environment.
  • Unprotected conductive traces and the interface between the conductive traces and the base substrate are two areas susceptible to being affected by adverse environmental conditions such as exposure to corrosive fluids. Exposing unprotected conductive traces to adverse environmental conditions typically leads to the traces corroding or delaminating from the base substrate.
  • the flexible circuit is typically attached to a rigid structure such as a stiffening member or the body of a printer pen.
  • the leads may be interconnected to an electronic device carried by the rigid structure or to an electronic device that is attached directly to the base substrate of the flexible circuit.
  • the side of the base substrate carrying the conductive traces is attached to the rigid structure.
  • An encapsulant is typically applied over the leads to provide a degree of protection from adverse environmental conditions.
  • a covercoat layer is sometimes formed over the conductive traces to prevent the traces from being exposed to adverse environmental conditions.
  • the covercoat layer is often a photoimageable material that is patterned using UV light and a photomask. Due to limitations in conventional methods of forming the covercoat layer, the resulting covercoat layer does not have a uniform and controlled thickness or a well-defined pattern. In some areas, the thickness of the covercoat can be insufficient to provided adequate protection against adverse environmental conditions. This is often the case with circuits having portions of the traces beyond to an edge of the substrate (called leads).
  • An encapsulant is often applied to protect the leads. Depending on the type of device attached to the leads, the encapsulant may also be used to protect the device (e.g. a bare semiconductor chip). Because of the orientation of the flexible circuit, it is easy to encapsulate the outward facing side of the conductive traces. However, reliably encapsulating the inward facing side of the circuit is difficult. Air pockets formed adjacent to the leads during encapsulation can serve as pathways for contaminants to reach the traces. Over time, traces having an insufficient thickness of covercoat material can be attacked by contaminants, causing the flexible circuit, the attached device, or both, to fail.
  • a photoimageable covercoat can be formed which extends beyond the base substrate and onto the lead portion of the conductors.
  • Use of a such a covercoat assists in corrosion protection, and the like, and allows the deposition of the covercoat during an automated assembly process without the need for "batch" type stoppages.
  • a printed circuit includes a base substrate having conductors formed thereon. A portion of some or all of the conductors form traces and a portion form leads extending from an edge of the base substrate.
  • a photoimageable covercoat layer is formed on the base substrate including a lead portion formed on the leads extending beyond the substrate at one or more edges by means of a liner positioned adjacent to the edge.
  • the method includes forming a lead portion of the photoimageable covercoat which is a direct extension of a trace portion of the photoimageable covercoat. i.e.. a continuous coating, and a method for making a completely detached coating. As used herein, these terms have the following meanings:
  • trace refers to that portion of the conductor(s) which is supported on a base substrate.
  • the term “lead” refers to that portion of the conductor(s) which is unsupported by the base substrate, e.g.. a conductor extending beyond an edge of the polyimide substrate.
  • the term "lead portion" when referring to the photoimageable covercoat refers to the portion of the covercoat which extends beyond an edge of the polyimide substrate. Note: this term is used for the portion of the covercoat extending beyond an edge of the substrate whether or not a conductor lead also extends therefrom.
  • trace portion when referring to the photoimageable covercoat refers to the portion of the covercoat which coats a trace portion of the conductor on the base substrate.
  • UV means ultraviolet and refers to radiation from a source having wavelengths of from about 100 to about 4500 Angstroms.
  • Fig. 1 is a perspective view illustrating an embodiment of a base substrate with a photoimageable covercoat layer formed in an opening in the base substrate.
  • Figs. 2A-2C are cross sectional views illustrating an embodiment of a method of forming a photoimageable covercoat layer.
  • Fig. 3 is a flow chart illustrating an embodiment of a method of forming a photoimageable covercoat layer.
  • FIG. 4 is a perspective view illustrating an embodiment of a printed circuit having a photoimageable covercoat layer formed thereon.
  • a base substrate 10, Fig. 1 includes a photoimageable covercoat layer 12 (hereinafter referred to as the covercoat layer 12) formed in an opening 14.
  • the base substrate 10 may be a flexible dielectric substrate such as polyimide.
  • a rigid dielectric substrate such as a glass reinforced epoxy composite material, a conductive material such as aluminum or other suitable types of substrates for an intended application.
  • covercoat materials include photoimageable epoxy acrylates. polyimides, and the like.
  • Commercially available materials include the product sold under the trademark "Imageflex” by Coates Circuit Products under the part number XV601T; "PSR- 4000/AUS5" sold by Taiyo America; “NPR-80/ID431 “ sold by Nippon Polytech Corporation; the product sold by Olin-Arch under the trademark “Probimide “ . under the series number 7500 and the product sold under the trademark "Carapace-A” by Electra Polymers and Chemicals America under the part number EMP1 10.
  • FIG. 2A to 2C A method of forming the covercoat layer 12 on the base substrate 10 is illustrated in Figs. 2A to 2C. This method is also depicted in the flow chart of Fig. 3.
  • the opening 14 is formed in the base substrate 10.
  • the base substrate 10 has a first side 18 and a second side 20. A first side 21 of a liner 22.
  • Fig. 2B is positioned next to the second side 20 of the base substrate 10.
  • the covercoat layer 12, Fig. 2C is then formed over the first side 18 of the base substrate 10 and into the cavity 1 1 , Fig. 2B, defined by the opening 14 and the liner 22.
  • the covercoat layer may be formed by applying a layer of a liquid covercoat material using a coating method such as knife coating, extrusion die coating, curtain rod coating, screen printing, spray coating or other suitable known methods of forming a layer of covercoat material.
  • the covercoat layer is then exposed.
  • the covercoat layer 12 is then dried at ambient temperature or in a suitable drying apparatus such as an air convection oven.
  • Other methods of forming a covercoat layer such as laminating a dry film layer to the substrate are also contemplated within the scope of the present disclosure. As shown in Fig.
  • the covercoat layer 12 includes a trace portion 13 and a lead portion 15.
  • the trace portion 13 of the covercoat layer 12 is that portion formed on the base substrate 10.
  • the lead portion 15 of the covercoat layer 12 is that portion of the covercoat layer 12 formed on the liner 22.
  • the lead portion of the covercoat layer 12 may be formed adjacent to an exterior edge 17, an interior edge 19 or both edges.
  • the covercoat layer 12 is photoimaged.
  • the photoimaging step includes exposing and developing the covercoat layer 12.
  • the exposure step includes exposing the covercoat layer 12 to a light source 23 such as a UV lamp.
  • the depth to which the material is crosslinked relative to the overall thickness of the covercoat layer 12 is generally a function of the applied exposure energy. Generally speaking, the thickness of the crosslinked material increases with increasing exposure energy.
  • covercoat layer 12 Following the covercoat layer 12 being exposed, it is subjected to a developing solution.
  • a developing solution When a negative-acting photoimageable material is used, the portions not exposed to the UV light will be removed during the developing step.
  • a positive-acting photoimageable material When a positive-acting photoimageable material is used, the portions exposed to the UV light will be removed by the developing solution.
  • the covercoat layer 12 After the covercoat layer 12 is developed, it is cured by conventional methods, e.g., thermally cured at an elevated temperature in an air convection oven, cured using infrared radiation, or simply dried at ambient temperature although this is less preferred in manufacturing due to time constraints.
  • the liner prevents covercoat material applied adjacent to openings in the base substrate and adjacent to the edges of the base substrate from contaminating the process equipment.
  • the liner is not physically attached to the base substrate, and is somewhat susceptible to shifting relative to the base substrate during processing, and assists in placement of the covercoat. To prevent the liner from shifting, the liner is removed prior to the covercoat layer being dried.
  • This method of manufacturing presented herein is economical to implement, and does not disrupt a continuous manufacturing process.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)

Abstract

A method of forming a covercoat layer on a base substrate useful in a printed circuit including the steps of: (1) providing a base substrate (10) having a first surface and a second surface; (2) positioning a liner (22) adjacent at least one surface of the base substrate (10), (3) forming a photoimageable covercoat layer (12) including a lead portion (15) formed on the liner (22); and (4) photoimaging the photoimageable covercoat layer (12).

Description

PRINTED CIRCUIT SUBSTRATE WITH PHOTOIMAGEABLE
COVERCOAT LAYER
Background The disclosures herein relate generally to flexible circuits and more particularly to flexible circuits with photoimageable covercoat layers.
Flexible circuits generally include a pattern of conductive traces that are supported on a base substrate such as a layer of dielectric material. The conductive traces typically have a copper core plated with a corrosion resistant material such as gold. Polyimide is a common base substrate. U.S. Patent Nos. 4.987.100; 5.227.008; 5.334.487; 5,557.844 and 5,680.701 disclose processes for fabricating printed circuits having a flexible polymeric base substrate such as polyimide. U.S. Patent Nos. 3.660.726: 4.029.845; 4.526.835; and 5.806.177 disclose processes for fabricating printed circuits having a generally rigid base substrate such as a glass reinforced epoxy composite. Electronic packages, medical devices, hard disk drive suspensions and ink jet printer pens are common applications for flexible circuits. Flexible circuits offer attributes such as fine pitch traces, complex circuit designs and flexibility. Depending on the design and specific application, a flexible circuit may have an opening formed in the base substrate. One or more of the conductive traces may include a lead that extends in a cantilevered manner from an edge of the opening. The leads may also be formed in a manner in which they the span across the opening.
In some applications, flexible circuits may be exposed to an aggressive environment. Unprotected conductive traces and the interface between the conductive traces and the base substrate are two areas susceptible to being affected by adverse environmental conditions such as exposure to corrosive fluids. Exposing unprotected conductive traces to adverse environmental conditions typically leads to the traces corroding or delaminating from the base substrate.
The flexible circuit is typically attached to a rigid structure such as a stiffening member or the body of a printer pen. The leads may be interconnected to an electronic device carried by the rigid structure or to an electronic device that is attached directly to the base substrate of the flexible circuit. Typically, the side of the base substrate carrying the conductive traces is attached to the rigid structure. An encapsulant is typically applied over the leads to provide a degree of protection from adverse environmental conditions.
A covercoat layer is sometimes formed over the conductive traces to prevent the traces from being exposed to adverse environmental conditions. The covercoat layer is often a photoimageable material that is patterned using UV light and a photomask. Due to limitations in conventional methods of forming the covercoat layer, the resulting covercoat layer does not have a uniform and controlled thickness or a well-defined pattern. In some areas, the thickness of the covercoat can be insufficient to provided adequate protection against adverse environmental conditions. This is often the case with circuits having portions of the traces beyond to an edge of the substrate (called leads).
An encapsulant is often applied to protect the leads. Depending on the type of device attached to the leads, the encapsulant may also be used to protect the device (e.g. a bare semiconductor chip). Because of the orientation of the flexible circuit, it is easy to encapsulate the outward facing side of the conductive traces. However, reliably encapsulating the inward facing side of the circuit is difficult. Air pockets formed adjacent to the leads during encapsulation can serve as pathways for contaminants to reach the traces. Over time, traces having an insufficient thickness of covercoat material can be attacked by contaminants, causing the flexible circuit, the attached device, or both, to fail.
Accordingly, a need has arisen for a base substrate having a covercoat formed thereon in which the shortcomings of previous techniques and constructions are overcome.
It has now been discovered that a photoimageable covercoat can be formed which extends beyond the base substrate and onto the lead portion of the conductors. Use of a such a covercoat assists in corrosion protection, and the like, and allows the deposition of the covercoat during an automated assembly process without the need for "batch" type stoppages.
Summary The invention provides a method for coating a base substrate useful for printed circuits having improved resistance to adverse environmental conditions. A printed circuit includes a base substrate having conductors formed thereon. A portion of some or all of the conductors form traces and a portion form leads extending from an edge of the base substrate. A photoimageable covercoat layer is formed on the base substrate including a lead portion formed on the leads extending beyond the substrate at one or more edges by means of a liner positioned adjacent to the edge. The method includes forming a lead portion of the photoimageable covercoat which is a direct extension of a trace portion of the photoimageable covercoat. i.e.. a continuous coating, and a method for making a completely detached coating. As used herein, these terms have the following meanings:
1. The term "trace" refers to that portion of the conductor(s) which is supported on a base substrate.
2. The term "lead" refers to that portion of the conductor(s) which is unsupported by the base substrate, e.g.. a conductor extending beyond an edge of the polyimide substrate.
3. The term "lead portion" when referring to the photoimageable covercoat refers to the portion of the covercoat which extends beyond an edge of the polyimide substrate. Note: this term is used for the portion of the covercoat extending beyond an edge of the substrate whether or not a conductor lead also extends therefrom.
4. The term "trace portion", when referring to the photoimageable covercoat refers to the portion of the covercoat which coats a trace portion of the conductor on the base substrate.
5. The term "UV" means ultraviolet and refers to radiation from a source having wavelengths of from about 100 to about 4500 Angstroms.
Brief Description of the Drawing Figures Fig. 1 is a perspective view illustrating an embodiment of a base substrate with a photoimageable covercoat layer formed in an opening in the base substrate.
Figs. 2A-2C are cross sectional views illustrating an embodiment of a method of forming a photoimageable covercoat layer.
Fig. 3 is a flow chart illustrating an embodiment of a method of forming a photoimageable covercoat layer.
Fig. 4 is a perspective view illustrating an embodiment of a printed circuit having a photoimageable covercoat layer formed thereon. Detailed Description A base substrate 10, Fig. 1, includes a photoimageable covercoat layer 12 (hereinafter referred to as the covercoat layer 12) formed in an opening 14. The base substrate 10 may be a flexible dielectric substrate such as polyimide. a rigid dielectric substrate such as a glass reinforced epoxy composite material, a conductive material such as aluminum or other suitable types of substrates for an intended application.
Many materials that are used as photoimageable covercoat layers are formulated to be crosslinked in the presence of UV light to facilitate patterning and cured in the presence of heat to achieve enhanced resistance to adverse environmental conditions, such as corrosive fluids or gases, biological contaminants, etc. Suitable covercoat materials include photoimageable epoxy acrylates. polyimides, and the like. Commercially available materials include the product sold under the trademark "Imageflex" by Coates Circuit Products under the part number XV601T; "PSR- 4000/AUS5" sold by Taiyo America; "NPR-80/ID431 " sold by Nippon Polytech Corporation; the product sold by Olin-Arch under the trademark "Probimide". under the series number 7500 and the product sold under the trademark "Carapace-A" by Electra Polymers and Chemicals America under the part number EMP1 10.
A method of forming the covercoat layer 12 on the base substrate 10 is illustrated in Figs. 2A to 2C. This method is also depicted in the flow chart of Fig. 3. The opening 14 is formed in the base substrate 10. The base substrate 10 has a first side 18 and a second side 20. A first side 21 of a liner 22. Fig. 2B, is positioned next to the second side 20 of the base substrate 10.
The covercoat layer 12, Fig. 2C, is then formed over the first side 18 of the base substrate 10 and into the cavity 1 1 , Fig. 2B, defined by the opening 14 and the liner 22. The covercoat layer may be formed by applying a layer of a liquid covercoat material using a coating method such as knife coating, extrusion die coating, curtain rod coating, screen printing, spray coating or other suitable known methods of forming a layer of covercoat material. The covercoat layer is then exposed. The covercoat layer 12 is then dried at ambient temperature or in a suitable drying apparatus such as an air convection oven. Other methods of forming a covercoat layer such as laminating a dry film layer to the substrate are also contemplated within the scope of the present disclosure. As shown in Fig. 2C, the covercoat layer 12 includes a trace portion 13 and a lead portion 15. The trace portion 13 of the covercoat layer 12 is that portion formed on the base substrate 10. The lead portion 15 of the covercoat layer 12 is that portion of the covercoat layer 12 formed on the liner 22. The lead portion of the covercoat layer 12 may be formed adjacent to an exterior edge 17, an interior edge 19 or both edges. Next, the covercoat layer 12 is photoimaged. The photoimaging step includes exposing and developing the covercoat layer 12. The exposure step includes exposing the covercoat layer 12 to a light source 23 such as a UV lamp. The depth to which the material is crosslinked relative to the overall thickness of the covercoat layer 12 is generally a function of the applied exposure energy. Generally speaking, the thickness of the crosslinked material increases with increasing exposure energy.
Following the covercoat layer 12 being exposed, it is subjected to a developing solution. When a negative-acting photoimageable material is used, the portions not exposed to the UV light will be removed during the developing step. When a positive-acting photoimageable material is used, the portions exposed to the UV light will be removed by the developing solution. After the covercoat layer 12 is developed, it is cured by conventional methods, e.g., thermally cured at an elevated temperature in an air convection oven, cured using infrared radiation, or simply dried at ambient temperature although this is less preferred in manufacturing due to time constraints.
The liner prevents covercoat material applied adjacent to openings in the base substrate and adjacent to the edges of the base substrate from contaminating the process equipment. However, the liner is not physically attached to the base substrate, and is somewhat susceptible to shifting relative to the base substrate during processing, and assists in placement of the covercoat. To prevent the liner from shifting, the liner is removed prior to the covercoat layer being dried.
This method of manufacturing presented herein is economical to implement, and does not disrupt a continuous manufacturing process.

Claims

What is claimed is:
1. A method of forming a covercoat layer on a base substrate useful in a printed circuit, comprising the steps of: providing a base substrate having a first surface and a second surface; positioning a liner adjacent at least one surface of the base substrate, forming a photoimageable covercoat layer including a lead portion formed on the liner: and photoimaging the photoimageable covercoat layer.
2. The method of claim 1 wherein the step of photoimaging the photoimageable covercoat layer includes the steps of exposing the photoimageable covercoat layer to a UV light source and developing the photoimageable covercoat layer in a developing solution.
3. The method of claim 1 wherein the step of exposing the photoimageable covercoat layer to a UV light source includes the step of exposing UV light to impinge on a first surface of the base substrate.
4. The method of claim 1 further comprising a step of removing the liner after said covercoat layer is photoimaged.
5. The method of claim 1 further comprising the step of forming conductors including conductive traces and leads on the base substrate and wherein the step of forming the photoimageable covercoat layer includes the step of forming the photoimageable covercoat layer over at least a portion of at least one conductive trace.
PCT/US2000/020176 1999-08-20 2000-07-25 Printed circuit substrate with photoimageable covercoat layer WO2001015501A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU63712/00A AU6371200A (en) 1999-08-20 2000-07-25 Printed circuit substrate with photoimageable covercoat layer

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US37867799A 1999-08-20 1999-08-20
US09/378,677 1999-08-20

Publications (1)

Publication Number Publication Date
WO2001015501A1 true WO2001015501A1 (en) 2001-03-01

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Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0500235A1 (en) * 1991-02-14 1992-08-26 International Business Machines Corporation Protecting tape automated bonding devices
US5200362A (en) * 1989-09-06 1993-04-06 Motorola, Inc. Method of attaching conductive traces to an encapsulated semiconductor die using a removable transfer film
DE4239324A1 (en) * 1991-11-22 1993-05-27 Minnesota Mining & Mfg Protective coating for electronic device contg. fluorinated acrylate] - and/or fluorinated polyurethane and opt. acrylic] resin, applied as organic soln.
US5336564A (en) * 1993-12-06 1994-08-09 Grumman Aerospace Corporation Miniature keeper bar
US5360946A (en) * 1991-09-17 1994-11-01 International Business Machines Corporation Flex tape protective coating
JPH09298219A (en) * 1996-05-09 1997-11-18 Hitachi Cable Ltd Manufacture of tab tape carrier
US5759417A (en) * 1995-10-03 1998-06-02 Nippon Mektron, Ltd. Flexible circuit board and production method therefor
EP0891127A2 (en) * 1997-07-11 1999-01-13 Lexmark International, Inc. TAB circuit protective coating

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5200362A (en) * 1989-09-06 1993-04-06 Motorola, Inc. Method of attaching conductive traces to an encapsulated semiconductor die using a removable transfer film
EP0500235A1 (en) * 1991-02-14 1992-08-26 International Business Machines Corporation Protecting tape automated bonding devices
US5360946A (en) * 1991-09-17 1994-11-01 International Business Machines Corporation Flex tape protective coating
DE4239324A1 (en) * 1991-11-22 1993-05-27 Minnesota Mining & Mfg Protective coating for electronic device contg. fluorinated acrylate] - and/or fluorinated polyurethane and opt. acrylic] resin, applied as organic soln.
US5336564A (en) * 1993-12-06 1994-08-09 Grumman Aerospace Corporation Miniature keeper bar
US5759417A (en) * 1995-10-03 1998-06-02 Nippon Mektron, Ltd. Flexible circuit board and production method therefor
JPH09298219A (en) * 1996-05-09 1997-11-18 Hitachi Cable Ltd Manufacture of tab tape carrier
EP0891127A2 (en) * 1997-07-11 1999-01-13 Lexmark International, Inc. TAB circuit protective coating

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
"PROTECTIVE COATING PROCESS FOR THIN FILM PROCESSES", IBM TECHNICAL DISCLOSURE BULLETIN,US,IBM CORP. NEW YORK, vol. 33, no. 6B, 1 November 1990 (1990-11-01), pages 266 - 267, XP000108862, ISSN: 0018-8689 *
PATENT ABSTRACTS OF JAPAN vol. 1998, no. 03 27 February 1998 (1998-02-27) *

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