WO2000064115A1 - Radio receiver - Google Patents

Radio receiver Download PDF

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Publication number
WO2000064115A1
WO2000064115A1 PCT/EP2000/003211 EP0003211W WO0064115A1 WO 2000064115 A1 WO2000064115 A1 WO 2000064115A1 EP 0003211 W EP0003211 W EP 0003211W WO 0064115 A1 WO0064115 A1 WO 0064115A1
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WO
WIPO (PCT)
Prior art keywords
samples
amplitude
detected
values
calculating
Prior art date
Application number
PCT/EP2000/003211
Other languages
French (fr)
Inventor
Kenneth Carl Evert Sandberg
Gunnar Arne Rickard Andersson
Original Assignee
Telefonaktiebolaget Lm Ericsson
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget Lm Ericsson filed Critical Telefonaktiebolaget Lm Ericsson
Priority to AU39657/00A priority Critical patent/AU3965700A/en
Publication of WO2000064115A1 publication Critical patent/WO2000064115A1/en

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D3/00—Demodulation of angle-, frequency- or phase- modulated oscillations
    • H03D3/007—Demodulation of angle-, frequency- or phase- modulated oscillations by converting the oscillations into two quadrature related signals
    • H03D3/008—Compensating DC offsets
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
    • H04L25/062—Setting decision thresholds using feedforward techniques only
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
    • H04L25/063—Setting decision thresholds using feedback techniques only
    • H04L25/064—Subtraction of the threshold from the signal, which is then compared to a supplementary fixed threshold

Definitions

  • This invention relates to a radio receiver, and in particular to a radio receiver which demodulates a received signal into in-phase and quadrature baseband components .
  • Radio receivers which detect in-phase and quadrature (I and Q) components of a received signal at baseband, that is, at or close to zero frequency.
  • Such receivers provide good performance, and have the further advantage that they can be made relatively cheaply. This makes them suitable for use in hand-held devices such as cellular telephones .
  • the detected signals include a DC-offset component, which can cause problems in processing the detected signals.
  • US Patent No. 5,422,889 is the design of an appropriate algorithm to calculate the average value of the signal. If the average is calculated on the basis of a small number of samples then, statistically, it will be relatively unreliable. On the other hand, if the average is calculated on the basis of a large number of samples then the algorithm will be relatively slow, and the compensator will react only slowly to real changes in the size of the DC-offset.
  • the present invention proceeds from the realization that the number of samples required, in order to obtain an acceptably reliable estimate of the average value of the signal, is a function of the signal amplitude. Specifically, when calculating the average value of a signal, the actual signal component acts as a noise signal superimposed on the average level. Thus, since these actual signal levels are of course higher in the case of larger signals, larger signals require a larger number of samples to be taken in order to obtain an acceptable estimate of the average value of the signal.
  • a receiver In a TDMA system, a receiver typically receives signals from different sources during different time slots. These signals typically have different amplitudes .
  • the present invention therefore provides a receiver which detects when small signals are being received, and calculates the average value of the signal only during those time periods. In some cases, it is advantageous to use measurements made on noise signals in empty timeslots or between timeslots .
  • the receiver may convert received signals to a first intermediate frequency, and subsequently downconverts to baseband I- and Q- components, or it may be a direct conversion receiver.
  • the DC-offset value will usually change only slowly, but, in the latter case, the DC- offset value may change more quickly, from one burst to another.
  • Figure 1 is a block schematic diagram of a receiver in accordance with the invention.
  • Figure 2 is a block schematic diagram illustrating the operation of the receiver of Figure 1.
  • Figure 1 shows a radio receiver, which is of a type which is generally known.
  • a receiver of this type may be found in a hand-held portable communications device such as a mobile phone, or in a base station of a mobile communications system.
  • the receiver includes an antenna 2 for receiving RF signals, an amplifier 4 for amplifying the received signals, and a band-pass filter 6 for removing signals at frequencies remote from the expected signal frequency. Filtered signals are downconverted to a first intermediate frequency in a first mixer 8, which receives a first local oscillator signal from an oscillator 10. The signals at the first intermediate frequency are further amplified in an amplifier 12, and filtered in a band-pass filter 14.
  • a second local oscillator 16 supplies a second local oscillator signal, at a frequency equal to the first intermediate frequency, to a second mixer 18. It further supplies the second local oscillator signal to a 90° phase shifter 20, and then to a third mixer 22. As is well known, the second mixer 18 then acts to output an I-channel or in-phase component of the signal, at a carrier frequency of zero, that is, at baseband. Similarly, the third mixer acts to output a Q-channel or quadrature component of the signal, again at a carrier frequency of zero, that is, at baseband.
  • the in-phase component is amplified in an amplifier 23, filtered in a low-pass filter 24 to remove any spurious signals, and passed to an analog- digital converter 26 to form digital samples thereof.
  • the quadrature component is amplified in an amplifier 30, filtered in a low-pass filter 32 to remove any spurious signals, and passed to an analog- digital converter 34 to form digital samples thereof.
  • the digital samples from the analog-digital converters 26, 34 are supplied to a digital signal processor 36 for further processing.
  • the receiver of Figure 1 downconverts the received signal to baseband in two stages, with a first mixer 8 downconverting to a first intermediate frequency and a pair of second mixers 18, 22 downconverting to a second intermediate frequency at baseband.
  • the invention is equally applicable to a direct conversion receiver, in which a received signal is downconverted to an intermediate frequency at baseband in a single mixer stage.
  • Figure 1 is that the mixers 18, 22, the amplifiers 23, 30, and the analog-digital converters 26, 34 at baseband add a DC-offset component to the received signals .
  • a DC-value could also occur as a result of mixing in the mixer or amplifiers of interferers or harmonics, for example if the intercept point is too low or the interfering signals too large. Obviously, any such offset component must be removed to ensure accurate demodulation of the received signals .
  • Figure 2 shows in a schematic form the processing of the digital samples from one of the channels, which is preferably carried out in the DSP 36 to remove the DC-offset components.
  • the necessary processing can be carried out either in hardware or in software.
  • logical gates or (less conveniently) analog hardware can be used, or the algorithm can be implemented in software for a microprocessor or DSP.
  • a signal x(n) is made up of a large number of digital samples .
  • the signal is supplied to an adder 50, where a compensation value is added to remove the DC-offset described earlier.
  • the compensated signal y(n) is output for further processing.
  • the compensation can be carried out in real time, or can be used to process a block of sampled data signals.
  • the output signal y(n) is supplied to an integrator 54 which forms the sum of the received samples .
  • the average of the summed samples is formed in a block 56, using an algorithm controlled by a controller 58.
  • the controller 58 controls the number of samples used in calculating the average.
  • the block 56 sums the samples, and counts the number of samples, and forms an average value by dividing the number of samples into the sum of the samples when the count reaches a predetermined number.
  • the controller 58 then resets the integrator 54, and resets the counted number of samples, when the count has reached the predetermined number.
  • the average value generated by the block 56 thus represents the error in the existing compensation value.
  • the attenuator can be regarded as an amplifier, which has a gain constant k, which must have a value less than 1 to ensure that the feedback loop is stable.
  • the output from the attenuator 62 is supplied to one input of an adder 64.
  • the second input of the adder 64 receives the existing compensation value, so that the adder 64 supplies as its output a new compensation value, which is the difference between the existing compensation value and the attenuated error value, and which is stored in a block 66 under the control of the controller 58.
  • This new compensation value is also supplied to the second input of the adder 50, where it is used to compensate for the DC-offset value in the input signal x(n) , as described earlier.
  • the circuit of the present invention therefore includes an amplitude detector 68, which controls the gate 52 such that, in general terms, only samples which are below a threshold value are allowed to pass to the integrator 54.
  • the amplitude detector 68 compares the amplitude of each sample with a first threshold value, and controls the gate 52 to select samples for averaging only when a predefined number of successive samples have amplitudes below the first threshold value.
  • the first threshold value is preferably set at a lower level than that at which the noise, on average, is too large to allow reliable calculation of an average value within a reasonable number of samples.
  • the amplitude detector 68 compares the amplitude of each sample with a second threshold value, which is preferably 10-20dB above the first threshold, and controls the gate 52 to stop selecting samples for averaging as soon as one sample has an amplitude above the second threshold value.
  • the offset calculation described above is carried out on one series of samples, that is, samples of in- phase (I) or quadrature (Q) components, and determines the offset in that series of components.
  • the receiver will calculate the DC-offset components of the I- and Q- components separately.
  • the amplitude detector 68 which determines whether a sample is to be selected for averaging, may be common to these two offset calculations.
  • the amplitude detector may do more than look at the amplitude of each individual I- or Q- component sample. It may look at a measure of the signal amplitude, formed for example from the sum of the amplitudes of corresponding I- and Q- samples, or from the square root of the sum of the squares of the amplitudes of corresponding I- and Q- samples. Based on the comparison of this measure of the signal amplitude with the thresholds described above, a determination may be made as to whether to select both the I- and Q- components for averaging.
  • the compensation value which is applied is therefore obtained more reliably, by calculating the assumed DC-offset from an average value derived from relatively weak signals .
  • an existing compensation value will not be updated. However, this will have little effect on the receiver performance, because the presence of the DC- offset has little damaging effect on such strong signals.
  • the receiver of the present invention therefore allows accurate compensation for introduced DC-offset values .

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Circuits Of Receivers In General (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

A radio receiver provides means for compensating for a DC-offset. The average value of digital samples of the signal at baseband is taken as the offset. The average is calculated from samples which have amplitudes below a threshold value to allow a more reliable estimate of the average value from a smaller number of samples.

Description

RADIO RECEIVER
FIELD OF THE INVENTION
This invention relates to a radio receiver, and in particular to a radio receiver which demodulates a received signal into in-phase and quadrature baseband components . BACKGROUND OF THE INVENTION
Radio receivers are known which detect in-phase and quadrature (I and Q) components of a received signal at baseband, that is, at or close to zero frequency.
Such receivers provide good performance, and have the further advantage that they can be made relatively cheaply. This makes them suitable for use in hand-held devices such as cellular telephones .
However, a problem with such receivers is that the detected signals include a DC-offset component, which can cause problems in processing the detected signals.
One way of overcoming this problem is to assume that, without the DC-offset, the received signals would have zero mean. The mean value of the actual signals can then be calculated using an appropriate averaging algorithm, and any difference from zero can be assumed to be the result of the DC-offset. This can then be subtracted from the received signals to compensate for the DC-offset. US Patent No. 5,422,889 describes a receiver operating on this general principle.
In US Patent No. 5,241,702, it is proposed to differentiate the received signals to filter out any DC offset and then, after amplification, to integrate the signals. This integration essentially reverses the earlier differentiation, but sets the DC value to an arbitrary level. The DC-offset level is then estimated, and subtracted from the restored signal. The solution proposed in US Patent No. 5,422,889 has the disadvantages that it needs to be locked to the TDMA structure, and needs to store information relating to each user. A further difficulty with the solution proposed in
US Patent No. 5,422,889 is the design of an appropriate algorithm to calculate the average value of the signal. If the average is calculated on the basis of a small number of samples then, statistically, it will be relatively unreliable. On the other hand, if the average is calculated on the basis of a large number of samples then the algorithm will be relatively slow, and the compensator will react only slowly to real changes in the size of the DC-offset. SUMMARY OF THE INVENTION
The present invention proceeds from the realization that the number of samples required, in order to obtain an acceptably reliable estimate of the average value of the signal, is a function of the signal amplitude. Specifically, when calculating the average value of a signal, the actual signal component acts as a noise signal superimposed on the average level. Thus, since these actual signal levels are of course higher in the case of larger signals, larger signals require a larger number of samples to be taken in order to obtain an acceptable estimate of the average value of the signal.
In a TDMA system, a receiver typically receives signals from different sources during different time slots. These signals typically have different amplitudes .
The present invention therefore provides a receiver which detects when small signals are being received, and calculates the average value of the signal only during those time periods. In some cases, it is advantageous to use measurements made on noise signals in empty timeslots or between timeslots .
As examples, the receiver may convert received signals to a first intermediate frequency, and subsequently downconverts to baseband I- and Q- components, or it may be a direct conversion receiver. In the former case, the DC-offset value will usually change only slowly, but, in the latter case, the DC- offset value may change more quickly, from one burst to another. BRIEF DESCRIPTION OF THE DRAWINGS
Figure 1 is a block schematic diagram of a receiver in accordance with the invention. Figure 2 is a block schematic diagram illustrating the operation of the receiver of Figure 1. DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
Figure 1 shows a radio receiver, which is of a type which is generally known. For example, a receiver of this type may be found in a hand-held portable communications device such as a mobile phone, or in a base station of a mobile communications system.
The receiver includes an antenna 2 for receiving RF signals, an amplifier 4 for amplifying the received signals, and a band-pass filter 6 for removing signals at frequencies remote from the expected signal frequency. Filtered signals are downconverted to a first intermediate frequency in a first mixer 8, which receives a first local oscillator signal from an oscillator 10. The signals at the first intermediate frequency are further amplified in an amplifier 12, and filtered in a band-pass filter 14.
A second local oscillator 16 supplies a second local oscillator signal, at a frequency equal to the first intermediate frequency, to a second mixer 18. It further supplies the second local oscillator signal to a 90° phase shifter 20, and then to a third mixer 22. As is well known, the second mixer 18 then acts to output an I-channel or in-phase component of the signal, at a carrier frequency of zero, that is, at baseband. Similarly, the third mixer acts to output a Q-channel or quadrature component of the signal, again at a carrier frequency of zero, that is, at baseband. The in-phase component is amplified in an amplifier 23, filtered in a low-pass filter 24 to remove any spurious signals, and passed to an analog- digital converter 26 to form digital samples thereof. Similarly, the quadrature component is amplified in an amplifier 30, filtered in a low-pass filter 32 to remove any spurious signals, and passed to an analog- digital converter 34 to form digital samples thereof.
The digital samples from the analog-digital converters 26, 34 are supplied to a digital signal processor 36 for further processing.
Thus, the receiver of Figure 1 downconverts the received signal to baseband in two stages, with a first mixer 8 downconverting to a first intermediate frequency and a pair of second mixers 18, 22 downconverting to a second intermediate frequency at baseband. However, the invention is equally applicable to a direct conversion receiver, in which a received signal is downconverted to an intermediate frequency at baseband in a single mixer stage. A disadvantage of the type of circuit shown in
Figure 1 is that the mixers 18, 22, the amplifiers 23, 30, and the analog-digital converters 26, 34 at baseband add a DC-offset component to the received signals . A DC-value could also occur as a result of mixing in the mixer or amplifiers of interferers or harmonics, for example if the intercept point is too low or the interfering signals too large. Obviously, any such offset component must be removed to ensure accurate demodulation of the received signals .
Figure 2 shows in a schematic form the processing of the digital samples from one of the channels, which is preferably carried out in the DSP 36 to remove the DC-offset components. It will be apparent to the person skilled in the art that the necessary processing can be carried out either in hardware or in software. For example, logical gates or (less conveniently) analog hardware can be used, or the algorithm can be implemented in software for a microprocessor or DSP. In each channel, a signal x(n) is made up of a large number of digital samples . The signal is supplied to an adder 50, where a compensation value is added to remove the DC-offset described earlier. The compensated signal y(n) is output for further processing. The compensation can be carried out in real time, or can be used to process a block of sampled data signals.
The calculation of the compensation will now be described in more detail. When the gate 52 is closed the output signal y(n) is supplied to an integrator 54 which forms the sum of the received samples . The average of the summed samples is formed in a block 56, using an algorithm controlled by a controller 58. For example, the controller 58 controls the number of samples used in calculating the average. Thus, the block 56 sums the samples, and counts the number of samples, and forms an average value by dividing the number of samples into the sum of the samples when the count reaches a predetermined number. The controller 58 then resets the integrator 54, and resets the counted number of samples, when the count has reached the predetermined number. The average value generated by the block 56 thus represents the error in the existing compensation value. This is then used in a feedback loop 60, which includes an attenuator 62. The attenuator can be regarded as an amplifier, which has a gain constant k, which must have a value less than 1 to ensure that the feedback loop is stable. The output from the attenuator 62 is supplied to one input of an adder 64. The second input of the adder 64 receives the existing compensation value, so that the adder 64 supplies as its output a new compensation value, which is the difference between the existing compensation value and the attenuated error value, and which is stored in a block 66 under the control of the controller 58. This new compensation value is also supplied to the second input of the adder 50, where it is used to compensate for the DC-offset value in the input signal x(n) , as described earlier.
As discussed above, the calculation can settle more quickly to a stable value (for a given value of the gain constant k) , if the signal level is low. The circuit of the present invention therefore includes an amplitude detector 68, which controls the gate 52 such that, in general terms, only samples which are below a threshold value are allowed to pass to the integrator 54.
Preferably, the amplitude detector 68 compares the amplitude of each sample with a first threshold value, and controls the gate 52 to select samples for averaging only when a predefined number of successive samples have amplitudes below the first threshold value. The first threshold value is preferably set at a lower level than that at which the noise, on average, is too large to allow reliable calculation of an average value within a reasonable number of samples. Thereafter, the amplitude detector 68 compares the amplitude of each sample with a second threshold value, which is preferably 10-20dB above the first threshold, and controls the gate 52 to stop selecting samples for averaging as soon as one sample has an amplitude above the second threshold value.
The offset calculation described above is carried out on one series of samples, that is, samples of in- phase (I) or quadrature (Q) components, and determines the offset in that series of components. Preferably, the receiver will calculate the DC-offset components of the I- and Q- components separately.
However, the amplitude detector 68, which determines whether a sample is to be selected for averaging, may be common to these two offset calculations. Thus, the amplitude detector may do more than look at the amplitude of each individual I- or Q- component sample. It may look at a measure of the signal amplitude, formed for example from the sum of the amplitudes of corresponding I- and Q- samples, or from the square root of the sum of the squares of the amplitudes of corresponding I- and Q- samples. Based on the comparison of this measure of the signal amplitude with the thresholds described above, a determination may be made as to whether to select both the I- and Q- components for averaging.
The compensation value which is applied is therefore obtained more reliably, by calculating the assumed DC-offset from an average value derived from relatively weak signals . In the unlikely event that a receiver is receiving only strong signals in all TDMA timeslots, an existing compensation value will not be updated. However, this will have little effect on the receiver performance, because the presence of the DC- offset has little damaging effect on such strong signals.
The receiver of the present invention therefore allows accurate compensation for introduced DC-offset values .

Claims

1. A radio receiver, comprising: means for receiving a radio frequency signal; means for converting the received signal to baseband; means for detecting I- and Q-components of the downconverted received signal and forming digital samples thereof ; means for calculating average values of the detected I- and Q-components; means for subtracting the calculated average values of the detected I- and Q-components from the detected I- and Q-components; characterised by: means for detecting an amplitude of the samples; and means for selecting samples for calculation of the average value thereof only when the detected amplitude is below a predetermined threshold.
2. A radio receiver as claimed in claim 1, wherein the selecting means selects samples for averaging only when a predefined number of successive samples have amplitudes below a first threshold value.
3. A radio receiver as claimed in claim 2, wherein, while the selecting means is selecting samples for averaging, the selecting means stops selecting samples for averaging as soon as one sample has an amplitude above a second threshold value which is higher than the first threshold value.
4. A radio receiver as claimed in claim 1, wherein the means for calculating average values comprises means for calculating a sum of said values, and means for counting the number of such values, and means for dividing the sum of the values by the number of values .
5. A radio receiver as claimed in claim 1, comprising first means for calculating average values of the detected I-components, and second means for calculating average values of the detected Q-components, and common means for detecting an amplitude from a pair of corresponding I- and Q-samples, such that samples are selected for calculation of the average value thereof only when the commonly detected amplitude is below a predetermined threshold.
6. A radio receiver as claimed in claim 1, comprising: first means for calculating average values of the detected I-components, first means for detecting an amplitude of the I-component samples and first means for selecting I-component samples for calculation of the average value thereof only when the detected amplitude thereof is below a predetermined threshold; and second means for calculating average values of the. detected Q-components, second means for detecting an amplitude of the Q-component samples and second means for selecting Q-component samples for calculation of the average value thereof only when the detected amplitude thereof is below a predetermined threshold
7. A method of calculating a DC-offset value of a component of a received radio signal, the method comprising: converting the received signal to baseband; detecting the component of the downconverted received signal and forming digital samples thereof; detecting an amplitude of the samples; selecting samples only when the detected amplitude is below a predetermined threshold; and calculating the DC-offset value as an average value of the selected samples of the component.
8. A method of compensating a received radio signal, comprising calculating a DC-offset value of the received radio signal,. by: converting the received signal to baseband; detecting I- or Q-components of the downconverted received signal and forming digital samples thereof; detecting an amplitude of the samples,- selecting samples only when the detected amplitude is below a predetermined threshold; and calculating the DC-offset value as an average value of the selected samples of the I- and Q- components; and subtracting the calculated DC-offset values from the detected I- and Q-components.
9. A method as claimed in claim 7, comprising selecting samples for averaging only when a predefined number of successive samples have amplitudes below a first threshold value.
10. A method as claimed in claim 9, comprising stopping selecting samples for averaging as soon as one sample has an amplitude above a second threshold value which is higher than the first threshold value.
11. A method as claimed in claim 8, comprising calculating the average values by calculating a sum of said values, and counting the number of such values, and dividing the sum of the values by the number of values .
12. A radio receiver, comprising: a receiver circuit for converting a received signal to baseband; a sampler for forming digital samples of at least one component of the received signal at baseband; an averaging circuit for calculating average values of selected samples of the detected component; and an amplitude detector, for comparing the amplitude of the samples of the component with a threshold value; wherein samples are selected for calculation of the average value thereof only when the detected amplitude is below the threshold value.
PCT/EP2000/003211 1999-04-21 2000-04-11 Radio receiver WO2000064115A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU39657/00A AU3965700A (en) 1999-04-21 2000-04-11 Radio receiver

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GB9909179.5 1999-04-21
GB9909179A GB2349313A (en) 1999-04-21 1999-04-21 Radio receiver

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004091160A1 (en) * 2003-04-09 2004-10-21 Koninklijke Philips Electronics N.V. Receiver having dc offset voltage correction
CN104904172A (en) * 2013-01-03 2015-09-09 华为技术有限公司 Method for estimating and removing DC offset

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB9912586D0 (en) * 1999-05-28 1999-07-28 Simoco Int Ltd Radio receivers
GB2424326B (en) * 2005-03-18 2008-01-16 Motorola Inc Receiver for receipt and demodulation of a frequency modulated RF signal and method of operation therein

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0552494A2 (en) * 1992-01-18 1993-07-28 Alcatel SEL Aktiengesellschaft Method and circuit for offset correction in a TDMA radio receiver
WO1998010523A1 (en) * 1996-09-06 1998-03-12 Philips Electronics N.V. A zero-if receiver
EP0863606A1 (en) * 1997-03-05 1998-09-09 Nec Corporation Direct conversion receiver capable of cancelling DC offset voltages

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5319679A (en) * 1992-12-09 1994-06-07 Datum Systems Method and apparatus for recovering data from a radio signal
KR0170690B1 (en) * 1995-09-23 1999-03-20 김광호 Hdtv using by carrier and symbol timing recovery completion detection circuit and method thereof
JP3125717B2 (en) * 1997-05-30 2001-01-22 日本電気株式会社 Wireless communication device using quadrature modulation / demodulation circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0552494A2 (en) * 1992-01-18 1993-07-28 Alcatel SEL Aktiengesellschaft Method and circuit for offset correction in a TDMA radio receiver
WO1998010523A1 (en) * 1996-09-06 1998-03-12 Philips Electronics N.V. A zero-if receiver
EP0863606A1 (en) * 1997-03-05 1998-09-09 Nec Corporation Direct conversion receiver capable of cancelling DC offset voltages

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004091160A1 (en) * 2003-04-09 2004-10-21 Koninklijke Philips Electronics N.V. Receiver having dc offset voltage correction
CN104904172A (en) * 2013-01-03 2015-09-09 华为技术有限公司 Method for estimating and removing DC offset
EP2941852A1 (en) * 2013-01-03 2015-11-11 Huawei Technologies Co., Ltd. Method for estimating and removing dc offset

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AU3965700A (en) 2000-11-02
GB2349313A (en) 2000-10-25

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