WO2000028463A1

WO2000028463A1 - Successive approximation analog-to-digital converter with threshold detection mode, and system containing the same

Info

Publication number: WO2000028463A1
Application number: PCT/EP1999/008238
Authority: WO
Inventors: Yves Dufour
Original assignee: Koninklijke Philips Electronics N.V.
Priority date: 1998-11-09
Filing date: 1999-10-27
Publication date: 2000-05-18

Abstract

A successive approximation ADC having a D/A converter (15), a comparator (10) which compares an input voltage to the output of the D/A converter (15), and a successive approximation cell (30) which iteratively feeds binary values to the D/A converter (15) and together with the comparator (10) determines a binary value for the input voltage. The successive approximation ADC is operated to function as a threshold detector by pausing operation of the successive approximation cell (30) and by inputting (36) a binary threshold value to the D/A converter (15) so that the comparator (10) compares the input voltage to the threshold voltage. Thus, a threshold detector is implemented using the existing circuitry, namely the D/A converter (15) and the comparator (10). Embodiments of an improved successive approximation ADC are disclosed which includes a control device and bi-directional data lines (36) implemented in the successive approximation cell (30). An electronic system is also disclosed employing the improved successive approximation ADC to monitor a device voltage relative to a threshold value for the device voltage.

Description

SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERTER WITH THRESHOLD DETECTION MODE,AND SYSTEM CONTAINING THE SAME

1. Field ofthe Invention

The invention relates to an improvement in a successive approximation analog- to-digital conversion ("ADC") circuit as well as to a method of operating such an ADC. The invention also concerns an electronic system which momtors a signal with reduced hardware.

2. Description of the Prior Art

Figure 1 is functional block diagram of a known successive approximation ADC circuit 1. A voltage signal is applied to the input 2 which is coupled to a sample and hold circuit 5 that holds a sampled voltage at the input 2 until its corresponding value is output by the ADC. The ADC further includes a voltage comparator 10, an N-bit digital-to-analog ("D/A") converter 15 and a successive approximation logic cell 20 which includes at least an N-bit holding register and control logic. The circuit 1 determines an N-bit binary value for the voltage received at input 2 by use of an iterative procedure and the feedback loop consisting of successive approximation cell 20, D/A converter 15 and comparator 10. The iterative procedure advances from the most significant bit ("MSB") to the least significant bit ("LSB"). When complete, the binary value is output on N-output lines 22. Successive approximation ADC's are well known in the art, as described for example in the text: Alan B. Grebene, Bipolar and MOS Analog Integrated Circuit Design, Chapter 15.4, pp. 847-852, Wiley and Sons (1984)(herein incorporated by reference).

Successive approximation ADC's are widely used in electronic devices because they have high speed and high resolution.

SUMMARY OF THE INVENTION

Generally speaking, according to one aspect of the invention, a successive approximation ADC is provided which further serves as a threshold detector. In addition to a successive approximation logic cell, a D/A converter and a comparator, the successive approximation ADC further includes a threshold input coupled to the input of the D/A converter and a control device which selectively pauses operation of the successive approximation logic cell so that the comparator compares an input voltage to a threshold voltage from the D/A converter and the threshold input and outputs the comparison result.

The invention is based on the recognition that in many devices which employ a successive approximation ADC it is also desirable to determine whether one or more signals are above or below a threshold value. For example, in battery operated devices it is often desirable to determine when the battery voltage falls below a certain level. The invention is based on the further recognition that a threshold detector can be readily implemented with the D/A converter and comparator already present within a successive approximation ADC. Thus, threshold detection can be accomplished with the ADC according to the invention with minimal additional hardware, and without adding a separate threshold detector circuit with its own comparator and D/A converter.

According to another aspect of the invention, the control device includes a control input to control the switching of the ADC between the threshold detection mode and the successive approximation mode. In this way, a device external to the ADC, such as a microprocessor, can switch the ADC out of the successive approximation mode into the threshold mode.

According to another aspect of the invention, the successive approximation ADC includes a sample and hold circuit. In the successive approximation mode, the sample and hold circuit holds a sampled value until the binary value is determined. In the threshold mode, the control device controls the sample and hold circuit so that it is continuously in the sample mode, so that the comparator compares the instantaneous input voltage to the threshold value.

According to yet another aspect of the invention, the control device is implemented in the successive approximation cell. Additionally, the successive approximation cell includes a holding register which feeds the iterative binary values determined by successive approximation logic within the cell to the D/A converter. Bidirectional data lines are coupled to the holding register, on which data lines the contents of the holding register are output to output the result in the successive approximation mode and to receive the threshold value in the threshold mode.

According to another aspect of the invention, an electronic system includes a successive approximation ADC as described above to monitor a device voltage, such as that of a power supply, relative to a threshold. These and other object, features and advantages of the invention will become apparent with reference to the following detailed description and the drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 is a functional diagram of a prior art successive approximation ADC; Figure 2 is a functional diagram of the successive approximation ADC with threshold detection according to one embodiment of the invention;

Figure 3 is a functional diagram of a successive approximation cell of Fig. 2; and

Figure 4 is a functional diagram of an electronic device with a battery status detection circuit employing the ADC of Fig. 2.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Figure 2 illustrates the successive approximation ADC 50 according to the invention which additionally implements a threshold detector in a threshold mode. Elements corresponding to those of Figure 1 bear the same reference numerals. The successive approximation cell 30 now includes N bi-directional data lines 36 and a read/write input 38 as well as threshold control. A line 32 couples the successive approximation cell 30 to the sample and hold circuit 5. Additionally, a line 40 is connected to the output 13 of the comparator 10 and provides a threshold status signal when the ADC 50 is in the threshold mode.

When a READ signal is present on the input 38, the ADC is in the ADC mode and functions in a conventional manner to convert the voltage present on input 2 into a multi- bit binary value, which is output on bi-directional data lines 36. When a WRITE signal is provided at input 38, the threshold control device within cell 30 places the ADC 50 in the threshold mode and the circuit functions as a threshold detector. Upon receipt of a WRITE signal, the successive approximation cell 30 ceases the normal process flow for ADC conversion, and receives a binary threshold value input on lines 36 and stores this value as the binary threshold value. The binary threshold value is then input to the D/A converter 15, which converts the binary threshold value to an analog threshold value, which is fed to the input 12 of the comparator 10. The comparator 10 then compares the input voltage received on its input 11 , from the sample and hold circuit 5 and input 2, to the analog threshold value. The threshold status signal is then output on line 40 from the output 13 of comparator 10. If the input voltage is higher than the threshold value, the comparator outputs a logic high signal as the threshold status signal. If the input voltage is lower than the threshold value, the comparator outputs a logic low signal on line 40 as the threshold status signal. The threshold status signal may then be used to activate/deactivate a device and/or function of the system in which the ADC with threshold detector is included.

Additionally, in the threshold mode, the successive approximation cell 30 outputs a control signal on line 32 to the sample and hold circuit 5 to maintain the sample and hold circuit continuously in the sample mode. In this way, the instantaneous input signal is continuously fed to the input 11 of the comparator and continuously compared to the threshold value. The clock signal is not used by the successive approximation cell 20 in the threshold mode.

Thus, in the circuit 50, a threshold detector is implemented using the analog circuitry which already exists for the successive approximation ADC, namely the D/A converter 15 and the comparator 10.

Figure 3 illustrates one embodiment of the successive approximation cell 30. The cell 30 includes a control logic block 62 which implements a known successive approximation algorithm as well as threshold control, and an N-bit sequencer 64 which feeds an N-bit holding register 66. The holding register 66 has N outputs 34-1 through 34-N which feed the D/A converter 15. Additionally, the register 66 includes N bi-directional data lines each implemented with an input line 37 and an output line 39. The control logic block 62 is implemented with hardware logic gates. When a WRITE signal is received on input 38 to place the circuit in the threshold mode, the control logic 62 signals the N-bit holding register 66 to read the binary threshold value input on lines 37-1 through 37-N. The binary threshold value is then fed to the D/A converter as previously discussed with reference to Fig. 2.

When placed in the ADC mode, the control logic 62 via line 67 clears the N-bit holding register and once the ADC circuit has determined the binary value for the input voltage, the binary value is output onto lines 39-1 through 39-N. The successive approximation technique advances from the MSB to the LSB, with the value (logic high or logic low) for each bit being determined by a pseudo feedback. Typically, a "1" is inserted in the MSB of the holding register (with the other bits at logic low "0") under control of the logic 62 and the sequencer 64. The D/A converter then converts the contents of the holding register (for example, "10000000" in the case of an 8-bit register) into an analog value. If the output of the comparator 10 is "1" (logic high) then the sampled analog input voltage is greater than the output of the D/A converter 15, and the current bit should not change. In this case, the MSB remains at "1". Conversely, if the output of the comparator is "0" (logic low) then the sampled input voltage is less than the output of the D/A converter 15. This means the value in the holding register is too high and the current bit is changed from "1" to "0". This same process is then applied to the next bit and continues sequentially towards the LSB until a logic value is determined for every bit in the holding register 66. This iterative procedure is controlled by control logic 62 within the successive approximation cell 30 under control of a clock signal. When a logic value is determined for every bit, the control logic outputs a status signal which indicates that the digital value represented by the holding register is valid. When in the threshold mode, the D/A converter 15 is active continuously.

Favorably, the DAC is of the resistive network type, which tends to use less power than other types of comparators. Such a DAC is disclosed in the previously mentioned text: Alan B. Grebene, Bipolar and MOS Analog Integrated Circuit Design, at Chapter 14.2, pp. 760-761. Figure 4 illustrates one embodiment of an electronic system 100 having an ADC with threshold detector, as described above, used to detect the status of a signal within the system. In particular, Figure 4 functionally illustrates a battery detection system for a portable device, such as a laptop or hand held computer, a mobile telephone or an electronic organizer. The portable device includes a display screen 102, such as an LCD, driven by a screen driver 104. A processing device 112, such as a microprocessor or a digital signal processor ("DSP") performs core processes of the device, such as executing application programs in the form of word processing or spread sheets, in the case of a laptop or hand held computer. Alternatively, in the case of a mobile phone, the device 112 may include a transmitter/receiver and a DSP to receive and transmit RF signals and to process these signals according to various digital or analog mobile communication standards, such as CDMA or GSM. A storage device 110 such as RAM, ROM and/or a hard drive provides software and data storage for the device. Power is supplied to the various units of the device via power supply 106, which includes a battery.

In known portable electronic systems, a conventional ADC circuit such as shown in Fig. 1 is used to monitor the batteries. The processor 112 interfaces with the successive approximation cell 20 to wake up the ADC periodically (for example, every 30 ms) to check the voltage level of the battery. The successive approximation logic then runs through the entire routine to convert the battery voltage to a binary value. This polling by the processor 112 is controlled by software, which also must do the comparison operation on the binary value output by the ADC. This software routine has to be activated very often and continuously, which itself takes power. Furthermore, when a device which consumes a comparatively large amount of power is turned on, such as a power amplifier, the battery voltage will drop quickly. This is a situation where the software will need to poll frequently, but where the extra power drain of the software poll is the most problematic. In contrast, in the system according to the invention, the processor 112 inputs a

WRITE command to the successive approximation cell 30 (Figs. 2, 3) of ADC 108 and causes a binary threshold value to be loaded on lines 36 which is indicative of a low battery threshold value. This value is then compared to the battery voltage, and a battery status signal is output on line 40, without running the successive approximation logic and, more importantly, without iteratively running the software poll of the ADC as in the prior solutions. When the comparator function needs to be run frequently, it takes less power to implement using the analog devices of the ADC as compared to continuously polling and comparing in software. Also, performing the comparison function with the analog devices is typically faster than the by polling and comparing with software. The quicker relative speed has particular advantage in situations where the battery indication needs to be very fast, such as turning on a module of the device which has a high power consumption. In a conventional device, if a high power module is turned on when the battery is almost discharged, there is very little time to detect this situation and to save the data in memory before the battery is completely discharged. With the device according to Figure 4, the threshold mode of ADC 108 can be activated at each power ON of selected high power modules, allowing the battery status to be detected rapidly and appropriate action taken in a more timely fashion, mostly due to the savings in software polling time.

It is noted that the configuration and embodiments of Fig. 4 are for purposes of illustration and are not limiting. The interconnection of the various modules for various portable devices and their operation is well within the skill of those in the art. The description herein serves to illustrate the integration and function of the ADC of Figures 2 and 3 to switch from a conventional ADC mode to threshold detection mode to monitor a signal in a system. Battery status is only one of many such signals which may be monitored in this manner.

Although preferred embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes may be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the claims. For example, those of ordinary skill in the art will appreciate that the control logic 30 may be implemented with software instead of with standard or programmable logic gates. Additionally, instead of writing the threshold value into the shift register 66, an additional register or other input device may be used to receive the threshold value for feeding to the D/A converter 15. While the threshold control is shown implemented within the successive approximation cell, it may also be in a separate block or module. The many features and advantages of the invention are apparent from the detailed specification and it is intended by the appended claims to cover all such features and advantages which fall within the true spirit and scope of the invention. Since numerous modifications and changes will readily occur to those skilled in the art, it is not desired to limit the invention to the exact construction and operation illustrated and described, and accordingly all suitable modifications and equivalents may be resorted to, falling within the scope of the invention.

Claims

CLAIMS:

1. A successive approximation ADC including an input terminal (2) which receives an input voltage; a comparator (lθ)having a first input (1 l)coupled to the input terminal (2), a second input (12), and an output (13); a D/A converter (15) having an input, and an output coupled to the second input of the comparator, a successive approximation cell (30) having an input which receives the output (13) of the comparator, an output (34) feeding a binary value to the input of the D/A converter, and successive approximation logic which together with the D/A converter and the comparator determines a binary value of the input voltage, characterized by further comprising: a threshold input (36) which receives a binary threshold value, the threshold input being coupled to the input of the D/A converter; a threshold status signal output (40) coupled to the output of the comparator; and a control device (62) which selectively pauses execution of the successive approximation logic so that the comparator (i) compares the input voltage to the threshold value from the D/A converter and the threshold input and (ii) outputs the comparison result on the threshold status signal output.

2. A successive approximation ADC according to claim 1, wherein said control device (62) includes a control input (38) which receives a control signal, upon receipt of a selected control signal the control device receiving the threshold value from the threshold input and pausing execution of the successive approximation logic.

3. A successive approximation ADC according to claim 1, wherein said successive approximation logic cell includes a multi-bit holding register (66), and said threshold input includes a plurality of data lines (37, 39) which under control of the control device (i) receive a binary threshold value and (ii) output a binary result of the successive approximation ADC.

4. A successive approximation ADC according to claim 1, further comprising a sample and hold circuit (5) coupled between said input terminal (2) and said first input (11) of said comparator (10), said sample and hold circuit being controllable to selectively sample the input voltage and hold the sampled input voltage, wherein said control device (62) is coupled to said sample and hold circuit (5) and, when the successive approximation logic is paused, controls the sample and hold circuit to continuously sample the input voltage.

5. An electronic system, comprising: a device (106) which outputs a device voltage; a successive approximation ADC (50) as claimed in Claim 1, 2, 3 or 4, the input terminal (2) being coupled to receive the device voltage; the threshold input (36) being coupled to receive a binary threshold value for the device voltage; and the control device (62) being operative to selectively pause iteration of the successive approximation logic so that the comparator (10) compares the device voltage to the threshold device voltage from the D/A converter (15) and the threshold input (36).

6. An electronic system according to claim 5, wherein the device is a power supply (106) and the successive approximation ADC (50) detects whether the device voltage of the power supply exceeds a threshold value.

7. An electronic system according to claim 6, wherein said power supply comprises a battery.

8. An electronic system according to claim 5, wherein said electronic system is one of a laptop computer, a hand held computer, an electronic organizer and a mobile phone.

9. An electronic system according to claim 5, wherein said control device includes a control input (38) which receives a control signal and, upon receipt of a selected control signal, the control device pausing execution of the successive approximation logic and causing the threshold input to receive the threshold value; and wherein said control signal corresponds to a module of the device being activated.

10. A successive approximation ADC with threshold detection, comprising: an input (2) for receiving an input voltage; successive approximation means for determining an equivalent binary value of the input voltage, said successive approximation means including (i) conversion means (15) for converting a digital value to an analog value, and (ii) comparison means (10) for comparing the analog value from the conversion means to the input voltage and outputting the comparison result; and means (62) for ceasing the determining by said successive approximation means, for inputting a binary threshold value to the conversion means (36), and for outputting (40) from the comparison means the comparison result of the input voltage and the binary threshold voltage from the conversion means and the binary threshold value.