WO2000019521A1 - Chuck with integrated piezoelectric sensors for wafer detection - Google Patents

Chuck with integrated piezoelectric sensors for wafer detection Download PDF

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Publication number
WO2000019521A1
WO2000019521A1 PCT/US1999/022036 US9922036W WO0019521A1 WO 2000019521 A1 WO2000019521 A1 WO 2000019521A1 US 9922036 W US9922036 W US 9922036W WO 0019521 A1 WO0019521 A1 WO 0019521A1
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WO
WIPO (PCT)
Prior art keywords
semiconductor wafer
chuck
electricity
support surface
piezoelectric
Prior art date
Application number
PCT/US1999/022036
Other languages
French (fr)
Inventor
Karl Brown
Nitin Khurana
Vincent E. Burkhart
Original Assignee
Applied Materials, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials, Inc. filed Critical Applied Materials, Inc.
Priority to JP2000572929A priority Critical patent/JP2002526925A/en
Priority to KR1020017004027A priority patent/KR20010088820A/en
Priority to EP99948405A priority patent/EP1118114A1/en
Publication of WO2000019521A1 publication Critical patent/WO2000019521A1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67259Position monitoring, e.g. misposition detection or presence detection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H01L21/6833Details of electrostatic chucks

Definitions

  • a J-R electrostatic chuck comprises electrodes embedded in a body of ceramic material that is semiconductive, typically an alumina- titanium oxide compound or aluminum nitride, and when a voltage is applied between the electrodes, a semiconductor wafer, such as a silicon semiconductor wafer, is electrostatically attracted to the electrostatic chuck according to the Johnsen- Rahbek effect, i.e., charges migrate to the backside of the wafer and charges migrate from the electrode (s) to the surface of the chuck such that a very strong electrostatic force appears across the. interstitial spaces separating the wafer and chuck surface.
  • Such electrostatic chucks are used in a semiconductor wafer processing systems to support a semiconductor wafer as integrated circuits are produced in the wafer.
  • the present invention interposes one or more piezoelectric sensors, between a semiconductor wafer and a semiconductor wafer chuck.
  • the piezoelectric sensor When the semiconductor wafer is chucked to the chuck, the piezoelectric sensor is compressed and the sensor produces electricity piezoelectrically .
  • the piezoelectrically produced electricity is detected and a signal is produced to indicate the presence of the wafer on the chuck.
  • FIG. 2 is a partial cross-sectional view taken generally along the line 2-2 in FIG. 1 in the direction of the arrows;
  • FIG. 4 is a plan view of an electrostatic chuck whose support surface is provided with a wafer spacing mask
  • semiconductor wafer detection apparatus embodying the present invention is shown and indicated by general numerical designation 10.
  • Apparatus 10 is shown for use in conjunction with a substrate support chuck 12 including a support surface 14; the electrostatic chuck 12 may be of the type described above. It will be understood that while the present invention is shown in conjunction with the electrostatic chuck 12, the present invention may be used with any form of chuck including ceramic electrostatic chucks, non- ceramic electrostatic chucks, bi-polar electrostatic chucks, monopolar electrostatic chucks, mechanical chucks, vacuum chucks and the like. Generally speaking, the present invention can be used with any form of clamping device designed to retain a wafer upon the surface of a pedestal. An electrostatic chuck is merely one illustrative example of such a clamping device.
  • the piezoelectric sensors may comprise a lower layer 24 and an upper layer 25 of titanium (Ti) and an intermediate layer 26 of zinc dioxide (Zn0 2 ) .
  • the layers of titanium and zinc dioxide- comprising the piezoelectric sensor 18 may be deposited on the support surface 14 of the electrostatic chuck 12 by physical vapor deposition and may have a cumulative thickness of approximately 13-70 ⁇ .
  • the deposition occurs via a mask or similar plate placed over the support surface.
  • An exemplary mask and deposition technique is discussed in commonly assigned U.S. patent application serial no. 08/736,887 filed October 25, 1996. Although that application teaches titanium as a preferred material for the mask, other materials are taught such as ceramic (aluminum nitride) .
  • Ceramic is a preferred material for use in creating the piezoelectric sensors of the subject invention.
  • the lower layer 24 is first deposited to a thickness of about 1-9 ⁇ .
  • the intermediate layer 26 is deposited over the lower layer 24 to a thickness of about 11-50 ⁇ m.
  • the upper layer 25 is deposited over the intermediate layer 26 to a thickness of about 1-9 ⁇ .
  • titanium is discussed as a preferred material for the upper and lower layers, 24 and 25 respectively, any commonly available material that is easily deposited and adhered to the support surface 14 and is compatible for use in an ultra-high vacuum (UHV) environment is suitable. Such materials may be selected from but are not limited to the group consisting of copper, titanium nitride, tantalum and tungsten.
  • zinc dioxide is discussed as a preferred material for the intermediate layer 26, any commonly available material classified as having piezoelectric characteristics and capable of producing a current via the piezoelectric effect or its equivalents is suitable.
  • the sensors are integral with the support surface and project a distance above the plane of contact between the wafer and chuck. As such, and upon chucking of the wafer, the sensors are compressed by the distance or a portion thereof by which they extend above the plane of contact which is sufficient to generate a viable piezoelectric signal (explained in greater detail below) and the substrate 42 is still supported above the support surface
  • the semiconductor wafer 42 will engage and compress the piezoelectric sensors, e.g. representative piezoelectric sensor
  • the predetermined or threshold level T is predetermined as the level that is produced upon the strength of the chucking force being sufficient to maintain the wafer on the chuck during subsequent semiconductor wafer processing. Accordingly, upon all three piezoelectric sensors being compressed sufficiently by the above-described semiconductor wafer chucking action, all three sensors produce electricity at least equal to the predetermined or threshold level T and all three peak detectors 31, 32 and 33 provide output signals to the comparator 40. The output signals are received by a suitable internal circuit of the type known to the art for providing a comparator output signal indicated by arrow 44. This comparator output signal is indicative of an adequate amount of chucking force being applied to the semiconductor wafer by the electrostatic chuck to enable further semiconductor wafer processing.
  • the apparatus 10 of the present invention may be embodied to detect only the presence of a semiconductor wafer on the chuck 12.
  • the comparator 40 FIG. 1, may be provided with an internal circuit of the type known to the art for receiving an output signal from all or any one of the peak detectors 31, 32 and 33 and, upon a signal being produced by any one of such peak detectors, the comparator provides an output signal indicated by the arrow 42 indicative of a semiconductor wafer being present on the semiconductor chuck.
  • the present apparatus and method inventions may be embodied to detect the presence of a semiconductor wafer on the chuck, embodied to detect whether or not the wafer is centered on the chuck, may be embodied to detect the strength of chucking of the wafer to the chuck, and may be embodied to provide any combination of the foregoing semiconductor wafer detections .
  • FIGS. 4 and 5 another alternate embodiment of the semiconductor wafer detection apparatus of the present invention is shown and indicated by general numerical designation 10A.
  • the electrostatic chuck 12 described above and shown in FIGS . 1 and 2 is also shown in FIGS. 4 and 5.
  • the support surface 14 of the chuck 12 is provided with a wafer spacing mask of the type described generally hereinabove and as disclosed in U.S. Patent No. 5,656,093 incorporated hereinabove by reference.
  • the wafer support mask is indicated by general numerical designation 100 and includes a plurality of upwardly extending pads or support members 112 for engaging and maintaining a semiconductor wafer spaced apart from the support surface 14 of the electrostatic chuck 12 during chucking and subsequent semiconductor wafer processing.
  • the support members 112 are usually composed of a non-compressible material such as titanium.
  • the sensors should be thicker than the support members to provide a compressive distance (d) by which a piezoelectric signal can be generated. Preferably, this distance is approximately 2-5 ⁇ m (inventor confirm) . In circumstances where the support member material is a compressible material, the thicknesses of the support members and sensors can be approximately equal.
  • FIG. 6 depicts yet another embodiment wherein the sensors may be disposed over one or more of the support members (only representative sensor 18A disposed over representative support member 112A for clarity) .
  • the sensors are identical to those described above, specifically having lower 24A and upper 25A layers of titanium disposed between an intermediate layer 26A of zinc dioxide.
  • the layers comprising the piezoelectric sensor 18A may be deposited over the pads or support elements 112A, 112B and 112C by physical vapor deposition.
  • Each of the upper and lower layers 24A and 25A respectively may have a thickness of about 1-9 ⁇ m and the intermediate layer 26A may have a thickness of about 11-50 ⁇ m such that the cumulative thickness of the sensor is about 13-70 ⁇ m. It will be noted from FIG.
  • the semiconductor wafer detection apparatus 10A operates in the same manner as semiconductor wafer detection apparatus 10 described above. Specifically, the apparatus operates to detect the presence of a semiconductor wafer on the chuck 12, to detect whether a semiconductor wafer is centered on the . chuck 12 and to detect the strength of chucking of a semiconductor wafer to the chuck and any combination of such wafer detection. Such detections by semiconductor wafer detection apparatus 10A may be provided in the same combination of detections as described above with regard to semiconductor wafer detection apparatus 10.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

One or more piezoelectric sensors (18, 19, 20) are formed on the support surface (14) of a semiconductor wafer chuck (12). The sensors produce electricity piezoelectrically upon the semiconductor wafer (42) being chucked to the chuck. The electricity produced is detected and determinations are made in various combinations to determine the presence of the semiconductor wafer on the chuck, whether the semiconductor wafer is centered on the chuck, and the strength of chucking of the semiconductor wafer to the chuck.

Description

CHUCK WITH INTEGRATED PIEZOELECTRIC SENSORS FOR WAFER
DETECTION
BACKGROUND OF THE DISCLOSURE
1. Field of the Invention
This invention relates generally to semiconductor wafer processing, and more particularly relates to method and apparatus utilizing one or more piezoelectric sensors for detecting the presence of a semiconductor wafer on a semiconductor wafer chuck, for detecting whether the semiconductor wafer is centered on the chuck, and for detecting the strength of chucking of the semiconductor wafer to the chuck .
2. Description of the Background Art
In the processing of semiconductor wafers to produce integrated circuits, typically, the semiconductor wafer is positioned and supported on the support surface of a semiconductor wafer chuck such as, for example, a electrostatic chuck. A conventional electrostatic chuck contains one or more electrodes that are sandwiched between two layers of dielectric material . The wafer rests upon one surface of one dielectric layer such that the wafer .and electrode (s) are spaced apart by the thickness of the dielectric layer. For example, a bipolar, electrostatic chuck contains two oppositely biased electrodes in a side-by-side configuration. A voltage is applied to the electrodes such that a charge differential is produced across the dielectric layer between the wafer and the electrodes.
Consequently, the wafer is retained on the surface of the chuck through Coul'ombic forces .
Another type of electrostatic chuck is a so-called Johnsen-Rahbek (J-R) chuck of the type disclosed in U.S. Patent No. 5,117,121 entitled METHOD OF AND APPARATUS FOR APPLYING
VOLTAGE TO ELECTROSTATIC CHUCK, patented May 26, 1992, atanabe et al . inventors; this patent is incorporated herein by reference. As disclosed in this incorporated patent, a J-R electrostatic chuck comprises electrodes embedded in a body of ceramic material that is semiconductive, typically an alumina- titanium oxide compound or aluminum nitride, and when a voltage is applied between the electrodes, a semiconductor wafer, such as a silicon semiconductor wafer, is electrostatically attracted to the electrostatic chuck according to the Johnsen- Rahbek effect, i.e., charges migrate to the backside of the wafer and charges migrate from the electrode (s) to the surface of the chuck such that a very strong electrostatic force appears across the. interstitial spaces separating the wafer and chuck surface. Such electrostatic chucks are used in a semiconductor wafer processing systems to support a semiconductor wafer as integrated circuits are produced in the wafer.
To increase the yield and enhance the reliability of the semiconductor wafer processing system, it is important to detect that the semiconductor wafer is present on the chuck, is centered on the chuck, and that the chucking strength is sufficient to maintain the semiconductor wafer properly positioned on the chuck during subsequent semiconductor wafer processing.-
Further, ceramic electrostatic chucks are known to the art whose support surface is provided with a wafer spacing mask to reduce the amount of particulate contaminants that adhere to the wafer from the chuck surface. The mask is a plurality of outwardly extending pads or support members for engaging and maintaining a semiconductor wafer spaced apart from the top or support surface of the electrostatic chuck during chucking and subsequent semiconductor wafer processing. Such wafer spacing mask is disclosed in commonly assigned U.S. Patent No. 5,656,093, issued August 12, 1997, to Burkhart, et al . , and is incorporated herein by reference. In the processing of semiconductor wafers utilizing an electrostatic chuck provided with the wafer spacing mask, it is also important to detect that the semiconductor wafer is present on the mask, that the semiconductor wafer is centered on the mask and therefore centered on the chuck, and that the strength of chucking of the semiconductor wafer to the chuck through the mask is sufficient to maintain the semiconductor wafer properly positioned on the chuck during subsequent semiconductor wafer processing.
Methods and apparatus are known to the art for determining the presence and centering of a semiconductor wafer on a chuck such as an electrostatic chuck including a system that measures the change in capacitance between sensor electrodes that occurs when a wafer is positioned upon the chuck. This system is discussed in commonly assigned U.S. patent application Serial No. 08/873,268, filed June 11, 1997, entitled "METHOD AND APPARATUS FOR WAFER DETECTION", Burkhart, et al . , inventors; this patent application is incorporated herein by reference. Although such capacitance measuring systems can very accurately measure the presence and alignment of the wafer, the measurements are susceptible to electrical noise that is primarily generated by the plasma within the process chamber. Additionally, such capacitance measuring systems cannot measure the amount of chucking force applied to a clamped wafer.
Therefore, there is a need in the art for new and improved method and apparatus for detecting the presence of a semiconductor wafer on a chuck, for detecting whether the wafer is centered on the chuck and for detecting the strength of chucking force applied to the wafer for subsequent wafer processing that is substantially immune to process chamber electrical noise source.
SUMMARY OF THE INVENTION The disadvantages associated with the prior art are overcome by 'the present invention of a method and apparatus for detecting the presence of a semiconductor wafer on a chuck, for detecting whether the wafer is centered on the chuck and for detecting the strength of chucking of the wafer to the chuck for subsequent wafer processing. Specifically, the present invention interposes one or more piezoelectric sensors, between a semiconductor wafer and a semiconductor wafer chuck. When the semiconductor wafer is chucked to the chuck, the piezoelectric sensor is compressed and the sensor produces electricity piezoelectrically . The piezoelectrically produced electricity is detected and a signal is produced to indicate the presence of the wafer on the chuck.
In a further embodiment, a determination is made of the amount of electricity which will be produced by a piezoelectric sensor interposed between a semiconductor wafer and a chuck when the semiconductor wafer is chucked with sufficient strength to maintain the wafer on the chuck during subsequent semiconductor wafer processing and a threshold level (e.g., piezoelectric current) is established. The electricity produced by a piezoelectric sensor interposed between the semiconductor wafer and the chuck is detected and a determination is made as to whether or not the amount of electricity detected is at least equal to the threshold level and if so a signal is produced indicative that the strength of chucking is sufficient to maintain the wafer properly chucked during subsequent semiconductor wafer processing.
In a further embodiment, a plurality of piezoelectric sensors, spaced equidistantly from each other, are positioned around the outer peripheral surface of a chuck support surface, a semiconductor wafer is chucked to the chuck support surface to compress the piezoelectric sensors intermediate the semiconductor wafer and the chuck to cause such piezoelectric sensors to produce electricity. The electricity produced is detected and a determination is made as to whether or not the electricity is produced by all of the piezoelectric sensors in the plurality or less than all of the piezoelectric sensors in the plurality and, if it is determined that the electricity is being produced by all of the piezoelectric sensors in the plurality, a first signal is produced indicative that the semiconductor wafer is centered on the chuck and, if a determination is made that the electricity produced is being produced by less than all of the piezoelectric sensors in the plurality, a signal is produced to indicate that the semiconductor wafer is not centered on the chuck.
BRIEF DESCRIPTION OF THE DRAWINGS The teachings of the present invention can be readily understood by considering the following detailed description in conjunction with the accompanying drawings, in which:
FIG. 1 is a diagrammatic illustration including a plan view of a semiconductor wafer chuck and associated piezoelectricity and signal producing circuitry;
FIG. 2 is a partial cross-sectional view taken generally along the line 2-2 in FIG. 1 in the direction of the arrows;
FIG. 3 is a partial cross-sectional view taken generally along the line 2-2 in FIG. 1 in the direction of the arrows for an alternate embodiment of the invention;
FIG. 4 is a plan view of an electrostatic chuck whose support surface is provided with a wafer spacing mask;
FIG. 5 is a partial cross-sectional view taken along the line 5-5 in FIG. 4 in the direction of the arrows; and FIG. 6 is a partial cross-sectional view taken along the line 5-5 in FIG. 4 in the direction of the arrows for an alternate embodiment of the invention.
To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures.
DETAILED DESCRIPTION
Referring to FIG. 1, semiconductor wafer detection apparatus embodying the present invention is shown and indicated by general numerical designation 10. Apparatus 10 is shown for use in conjunction with a substrate support chuck 12 including a support surface 14; the electrostatic chuck 12 may be of the type described above. It will be understood that while the present invention is shown in conjunction with the electrostatic chuck 12, the present invention may be used with any form of chuck including ceramic electrostatic chucks, non- ceramic electrostatic chucks, bi-polar electrostatic chucks, monopolar electrostatic chucks, mechanical chucks, vacuum chucks and the like. Generally speaking, the present invention can be used with any form of clamping device designed to retain a wafer upon the surface of a pedestal. An electrostatic chuck is merely one illustrative example of such a clamping device.
In accordance with the present invention, a layer of conductive material 15 is provided around the outer circumferential portion of the support surface 14; the conductive layer 15 may be provided on the support surface by physical vapor deposition or chemical vapor deposition of a conductive material such as titanium. The material may have a thickness of about 1-9 μm and may be deposited on the support surface 14, as shown in FIG. 1, so as to be connected to a circuit common or ground 16. In the preferred embodiment, the apparatus 10 includes three piezoelectric sensors 18, 19 and 20 provided on and extending upwardly from the chuck support surface 14 and signal measuring circuitry indicated by general numerical designation 22. As illustrated in FIG. 2 with regard to representative piezoelectric sensor 18, the piezoelectric sensors may comprise a lower layer 24 and an upper layer 25 of titanium (Ti) and an intermediate layer 26 of zinc dioxide (Zn02) . The layers of titanium and zinc dioxide- comprising the piezoelectric sensor 18 may be deposited on the support surface 14 of the electrostatic chuck 12 by physical vapor deposition and may have a cumulative thickness of approximately 13-70 μ . The deposition occurs via a mask or similar plate placed over the support surface. An exemplary mask and deposition technique is discussed in commonly assigned U.S. patent application serial no. 08/736,887 filed October 25, 1996. Although that application teaches titanium as a preferred material for the mask, other materials are taught such as ceramic (aluminum nitride) . Ceramic is a preferred material for use in creating the piezoelectric sensors of the subject invention. For example, the lower layer 24 is first deposited to a thickness of about 1-9 μ . Next, the intermediate layer 26 is deposited over the lower layer 24 to a thickness of about 11-50 μm.
Finally, the upper layer 25 is deposited over the intermediate layer 26 to a thickness of about 1-9 μ . Although titanium is discussed as a preferred material for the upper and lower layers, 24 and 25 respectively, any commonly available material that is easily deposited and adhered to the support surface 14 and is compatible for use in an ultra-high vacuum (UHV) environment is suitable. Such materials may be selected from but are not limited to the group consisting of copper, titanium nitride, tantalum and tungsten. Although zinc dioxide is discussed as a preferred material for the intermediate layer 26, any commonly available material classified as having piezoelectric characteristics and capable of producing a current via the piezoelectric effect or its equivalents is suitable.
As is also shown in FIG. 2 with regard to representative piezoelectric sensor 18, the lower titanium layer 24 is connected to a suitable conductor 28 extending through the electrostatic chuck 12. Similarly, as shown in FIG. 1, the piezoelectric sensors 19 and 20 are connected to respective conductors 29 and 30 extending through electrostatic chuck 12 in the same manner as the conductor 28 shown in FIG. 2. An example of a method for fabricating conductive traces and feedthrough connectors within a ceramic chuck is disclosed in commonly assigned U.S. patent application serial number 08/834,702, filed April 1, 1997 entitled "CONDUCTIVE FEEDTHROUGH FOR A CERAMIC BODY AND METHOD OF FABRICATING SAME" and herein incorporated by reference.
In some instances, the cumulative thickness of the sensors must be carefully considered. If the cumulative thickness of the sensors substantially reduces the electrostatic chucking force, the substrate 14 will not be adequately retained upon the chuck 12. If such a condition exists, an alternate embodiment of the subject invention is provided in FIG. 3. Specifically, an electrostatic chuck 30 having a plurality of recesses 32 in the support surface is provided (note one representative recess 32 is depicted for clarity and conformity to FIGS. 2 and 5) . The piezoelectric sensors 18, 19 and 20 are incorporated into the recesses 32 in the support surface 14 with all other aspects of sensor construction (e.g., lower, intermediate, upper and conductive layers) remaining identical to those of the first embodiment. The recesses 32 are in the range of approximately l-100μm deep dependent upon the cumulative thickness of the sensors. The recesses 32 are formed by any means known to those skilled in the art of electrostatic chuck manufacturing and include but are not limited to bead blasting, etching or the like. Preferably, the recesses are at a depth that allow the sensors to protrude no more than approximately 5-6μm above the support surface 14 of the chuck 30. For example, in a sensor having a cumulative thickness of approximately lOμ (comprising a lower layer thickness of approximately 3μm, an intermediate layer thickness of approximately 4μm and an upper layer thickness of approximately 3μm) , the recess depth is approximately 5μm so that the sensors protrude approximately 5μm above the support surface 14. In this way, the sensors are integral with the support surface and project a distance above the plane of contact between the wafer and chuck. As such, and upon chucking of the wafer, the sensors are compressed by the distance or a portion thereof by which they extend above the plane of contact which is sufficient to generate a viable piezoelectric signal (explained in greater detail below) and the substrate 42 is still supported above the support surface
14 but not so much as so unacceptably reduce the chucking force. The signal measuring circuitry 22, FIG. 1, may include, in the preferred embodiment, three suitable peak detector circuits 31, 32 and 33 of the type known to the art for detecting a peak of piezoelectric current or piezoelectricity as indicated diagrammatically in FIG. 1 by the piezoelectricity peaks P. It will be further noted from FIG. 1 that the piezoelectric sensors 18, 19 and 20 are connected respectively to the peak detector circuits 31, 32 and 33 by the conductors 28, 29 and 30. The peak detector circuits 31, 32 and 33 are also connected to the circuit common or ground 16 and are thereby connected across t e respective piezoelectric sensors 18, 19 and 20. The outputs of the peak detector circuits 31, 32 and 33 are connected, respectively, by conductors 35, 36 and 37 to a suitable comparator circuit 40. The comparator circuit 40 is the type known to the art for receiving input signals and for producing various output signals in response to the internal' circuit configuration of the comparator.
Upon a semiconductor wafer, such as representative semiconductor wafer 42 shown in FIG. 2, being placed over and into engagement with the piezoelectric sensors 18, 19 and 20 shown in FIG. 1, and as illustrated in FIG. 2 with regard to representative piezoelectric sensor 18, upon a suitable voltage being applied to the electrodes 46, 47 and 48 embedded in the electrostatic chuck 12, the semiconductor wafer 42 is attracted to the electrostatic chuck according to the above-noted
Johnsen-Rahbek or Coulombic effect depending upon the material from which the chuck is fabricated. As the semiconductor wafer 42 is attracted to the electrostatic chuck 12, the semiconductor wafer 42 will engage and compress the piezoelectric sensors, e.g. representative piezoelectric sensor
18 shown in -FIG. 2, causing opposite charges to be produced on the top and bottom titanium layers 23 and 24. These opposite charges produce spikes of electricity piezoelectrically which rise rapidly as the sensor 18 is being compressed between the wafer 42 and the support surface 14, the electricity will decay rapidly to zero when the chucking action is completed and the piezoelectric sensors are not being further compressed. Upon at least one of the piezoelectric sensors being compressed, the piezoelectric sensor produces electricity piezoelectrically that is detected by one of the peak detectors. In response to the electricity, the peak detector provides an output signal to the comparator 40. The comparator 40 is provided with suitable internal circuits of the type known to the art for receiving an output signal from one of the peak detectors and for producing a comparator output signal indicated by arrow 42 indicative of the presence of a semiconductor wafer on the chuck 12.
Upon all three of the piezoelectric sensors 18, 19 and 20 being compressed in response to the above-described semiconductor wafer chucking action, all three piezoelectric sensors produce electricity piezoelectrically that is detected by all three peak detectors 31, 32 and 33. All three peak detector circuits provide output signals to the comparator 40. The comparator includes suitable electrical circuitry of the type known to the art for receiving output signals from all three peak detectors and for providing an output signal indicated by the arrow 43 indicative of a semiconductor wafer being present and centered on the chuck support surface 14. Further, the peak detector circuits may be of the type known to the art for providing an output signal upon the electricity detected equaling a predetermined or threshold level indicated by the letters T in FIG. 1. It will be understood that the predetermined or threshold level T is predetermined as the level that is produced upon the strength of the chucking force being sufficient to maintain the wafer on the chuck during subsequent semiconductor wafer processing. Accordingly, upon all three piezoelectric sensors being compressed sufficiently by the above-described semiconductor wafer chucking action, all three sensors produce electricity at least equal to the predetermined or threshold level T and all three peak detectors 31, 32 and 33 provide output signals to the comparator 40. The output signals are received by a suitable internal circuit of the type known to the art for providing a comparator output signal indicated by arrow 44. This comparator output signal is indicative of an adequate amount of chucking force being applied to the semiconductor wafer by the electrostatic chuck to enable further semiconductor wafer processing. It will be further understood that upon at least one of the piezoelectric sensors not being compressed sufficiently to produce electricity at least equal to the predetermined level or threshold T, the associated peak detector does not produce a signal to the comparator 40. Consequently, the comparator internal circuitry produces a signal indicated by the arrow 45 to indicate that the strength of the chucking force is not sufficient for further semiconductor wafer processing. It will be understood that the output signals from the comparator may be audible or visual signals or may be signals transmitted to a central processing unit controlling the overall semiconductor wafer processing system. Thus, upon the comparator 40 producing the output signal 45, such a central processing unit will suspend semiconductor wafer processing and not produce what would possibly be defective integrated circuits or allow the wafer to slide off of the chuck due to poor chucking force.
It will be understood that the apparatus 10 of the present invention may be embodied to detect only the presence of a semiconductor wafer on the chuck 12. In such an embodiment the comparator 40, FIG. 1, may be provided with an internal circuit of the type known to the art for receiving an output signal from all or any one of the peak detectors 31, 32 and 33 and, upon a signal being produced by any one of such peak detectors, the comparator provides an output signal indicated by the arrow 42 indicative of a semiconductor wafer being present on the semiconductor chuck. Accordingly, it will be further understood that the present apparatus and method inventions may be embodied to detect the presence of a semiconductor wafer on the chuck, embodied to detect whether or not the wafer is centered on the chuck, may be embodied to detect the strength of chucking of the wafer to the chuck, and may be embodied to provide any combination of the foregoing semiconductor wafer detections .
Referring now to FIGS. 4 and 5, another alternate embodiment of the semiconductor wafer detection apparatus of the present invention is shown and indicated by general numerical designation 10A. The electrostatic chuck 12 described above and shown in FIGS . 1 and 2 is also shown in FIGS. 4 and 5. The support surface 14 of the chuck 12 is provided with a wafer spacing mask of the type described generally hereinabove and as disclosed in U.S. Patent No. 5,656,093 incorporated hereinabove by reference. The wafer support mask is indicated by general numerical designation 100 and includes a plurality of upwardly extending pads or support members 112 for engaging and maintaining a semiconductor wafer spaced apart from the support surface 14 of the electrostatic chuck 12 during chucking and subsequent semiconductor wafer processing.
In this alternate embodiment of the present invention, piezoelectric sensors 18A, 19A and 20A are provided in place of at least one of the pads or support elements 112 and in the preferred embodiment are provided in place of pads or support elements 112A, 112B and 112C. In the preferred embodiment, the pads or support elements 112A, 112B and 112C are spaced equidistantly from each other around an outer circumferential portion of the chuck support surface 14 and predetermined ones of the support elements (112A, 112B and 112C) are replaced by sensors 18A, 19A and 20A respectively. This may be better understood by reference to FIG. 5 which depicts a representative piezoelectric sensor 18A as a laminate comprised of lower and upper layers 24 and 25 of titanium and intermediate layer 26 of zinc dioxide. Except for replacing at least one of the support elements 112A, 112B and 112C, the sensors 18A, 19A and 20A are constructed and function identically to those discussed and seen in FIGS 2 and 3. However, since the support members 112 also exist on the support surface 14, it is desirable to have the cumulative thickness of the sensors to be slightly greater than the thickness of the support members 112. Specifically, the support members 112 are usually composed of a non-compressible material such as titanium. As such, the sensors should be thicker than the support members to provide a compressive distance (d) by which a piezoelectric signal can be generated. Preferably, this distance is approximately 2-5μm (inventor confirm) . In circumstances where the support member material is a compressible material, the thicknesses of the support members and sensors can be approximately equal.
FIG. 6 depicts yet another embodiment wherein the sensors may be disposed over one or more of the support members (only representative sensor 18A disposed over representative support member 112A for clarity) . Again, the sensors are identical to those described above, specifically having lower 24A and upper 25A layers of titanium disposed between an intermediate layer 26A of zinc dioxide. The layers comprising the piezoelectric sensor 18A may be deposited over the pads or support elements 112A, 112B and 112C by physical vapor deposition. Each of the upper and lower layers 24A and 25A respectively may have a thickness of about 1-9 μm and the intermediate layer 26A may have a thickness of about 11-50 μm such that the cumulative thickness of the sensor is about 13-70 μm. It will be noted from FIG. 6 that the outer layer of titanium 25A is deposited so as to engage in electrical contact with the layer of conductive material 15A provided around the outer circumferential portion of the electrostatic chuck support surface 14; layer of conductive material 15A is provided in the same manner -as layer of conductive material 15 shown in FIGS. 1 and 2 and described above. The inner layer of titanium 24A of the piezoelectric sensor 18A, FIG. 6, is connected by conductor 28A to the signal measuring circuitry 22 which may be the same as signal measuring circuitry 22 shown in FIG. 1 and described above. Similarly, and as shown generally in FIG. 4, piezoelectric sensors 19A and 20A are also connected to the signal measuring circuitry 22 by conductors 29A and 30A.
It will be understood that except for the piezoelectric sensors 18A, 19A and 20A being provided over the pads or support elements 112A, 112B and 112C of the semiconductor wafer spacing mask 100, the semiconductor wafer detection apparatus 10A operates in the same manner as semiconductor wafer detection apparatus 10 described above. Specifically, the apparatus operates to detect the presence of a semiconductor wafer on the chuck 12, to detect whether a semiconductor wafer is centered on the . chuck 12 and to detect the strength of chucking of a semiconductor wafer to the chuck and any combination of such wafer detection. Such detections by semiconductor wafer detection apparatus 10A may be provided in the same combination of detections as described above with regard to semiconductor wafer detection apparatus 10.
Although various embodiments which incorporate the teachings of the present invention have been shown and described in detail herein, those skilled in the art can readily devise many other varied embodiments that still incorporate these teachings .

Claims

What is claimed is:
1. Apparatus for detecting at least the presence of a semiconductor wafer on a semiconductor wafer chuck, the chuck including a support surface, comprising: a piezoelectric sensor mounted on the chuck with at least a portion of said piezoelectric sensor extending outwardly from the support surface; and a signal measuring circuit, connected to said piezoelectric sensor and, upon the semiconductor wafer being chucked to the support surface of the chuck, the semiconductor wafer engaging and compressing said piezoelectric sensor between the support surface the wafer to cause said piezoelectric sensor to produce electricity piezoelectrically which is received by said signal measuring circuit.
2. The apparatus according to Claim 1 wherein said piezoelectric sensor is a plurality of piezoelectric sensors and wherein said signal measuring circuit comprises at least one peak detector circuit connected across said piezoelectric sensor and a comparator circuit connected to said peak detector circuit.
3. The apparatus according to Claim 1 wherein said apparatus is also for detecting the strength of chucking of the semiconductor wafer to the semiconductor chuck and wherein said signal measuring circuit detects the amount of said electricity and upon said electricity at least equaling a predetermined amount, said signal measuring circuit providing a signal indicative o'f the strength of chucking of the semiconductor wafer to the chuck.
4. The apparatus according to Claim 3 wherein said piezoelectric sensor comprises at least one piezoelectric sensor and wherein said signal measuring circuit comprises at least one peak detector circuit and a comparator circuit, said peak detector circuit connected across said piezoelectric sensor and to said comparator circuit, said peak detector circuit for receiving said electricity and upon said electricity at least equaling a predetermined amount said peak detector circuit producing a signal to said comparator circuit and said comparator circuit producing a signal indicative of the strength of chucking of the semiconductor wafer to the chuck.
5. The apparatus according to Claim 1 wherein said apparatus is also for detecting whether the semiconductor wafer is centered on the support surface, wherein the support surface includes an outer circumferential portion, wherein said piezoelectric sensor comprises a plurality of piezoelectric sensors positioned equi-distantly around the outer circumferential portion, and wherein said signal measuring circuit produces a first signal indicative that all of said piezoelectric sensors are producing electricity and that the semiconductor wafer is centered on the chuck and for producing a second signal to indicate that not all of said piezoelectric elements are' producing electricity and that the semiconductor wafer is not centered on the chuck.
6. The apparatus according to Claim 5 wherein said signal measuring circuit comprises a plurality of peak detector circuits equal in number to said piezoelectric sensors and a comparator circuit connected to said peak detector circuits, each of said peak detector circuits connected across one of said piezoelectric sensors.
7. The apparatus according to Claim 6 wherein said apparatus is also for detecting the strength of chucking of the semiconductor wafer to the semiconductor chuck and wherein each of said peak detector circuits is for providing a signal to said signal measuring circuit upon the electricity received by said plurality of peak detector circuits at least equaling a predetermined amount whereupon said comparator circuit provides a signal indicative of the chucking strength of the semiconductor wafer to the chuck.
8. The apparatus according to Claim 2 wherein the support surface of the semiconductor wafer chuck is provided with a wafer supporting mask including a plurality of pads extending outwardly from the support surface and wherein said at least one piezoelectric sensor replaces at least one of the pads.
9. The apparatus according to Claim 5 wherein the support surface of the semiconductor wafer chuck is provided with a wafer spacing mask including a plurality of pads extending outwardly from the support surface and wherein predetermined ones of the pads are positioned equidistantly around the outer circumferential portion of the support surface and wherein said plurality of piezoelectric sensors replace predetermined ones of the pads .
10. The apparatus according to Claim 1 wherein said piezoelectric sensor comprises a multi-layer element producing electricity piezoelectrically upon being pressed against the chuck.
11. The apparatus according to Claim 10 wherein said multilayer element comprises at least two layers of titanium and a layer of zinc dioxide intermediate said layers of titanium and wherein one of said layers of titanium is affixed to the support surface.
12. Apparatus for detecting the strength of chucking of a semiconductor wafer to a semiconductor, comprising: piezoelectric sensor mounted on the chuck with at least a portion of said piezoelectric sensor extending outwardly from the support surface, and signal measuring circuit connected to said piezoelectric sensor and upon the semiconductor wafer being chucked to the chuck with sufficient strength to maintain the semiconductor wafer chucked to the chuck during subsequent semiconductor wafer processing, said piezoelectric sensor producing a predetermined amount of electricity piezoelectrically which is received by signal measuring circuit to cause said signal measuring circuit to produce a signal indicative of the strength of chucking of the semiconductor wafer to the chuck.
13. The apparatus according to Claim 12 wherein said piezoelectric sensor comprises two layers of titanium and a layer of zinc dioxide disposed between the layers of titanium; wherein signal measuring circuit include at least one peak detector circuit and a comparator circuit connected to said peak detector circuit.
14. Apparatus for detecting whether a semiconductor wafer is centered on a semiconductor wafer chuck, the chuck including a support surface having an outer circumferential portion, comprising: a plurality of piezoelectric sensors mounted to the chuck and positioned equidistantly from each other around the outer circumferential portion of the support surface; a signal measuring circuit connected to said plurality of piezoelectric sensors and, upon a semiconductor wafer being placed on the chuck and chucked to the chuck, the piezoelectric sensors of said plurality of piezoelectric sensors intermediate the semiconductor wafer and the chuck being compressed and caused to produce electricity piezoelectrically which is received by -said signal measuring circuit and upon said signal measuring circuit receiving electricity from all of the piezoelectric sensors and said plurality of piezoelectric sensors a first signal being produced indicative that the semiconductor wafer is centered on the chuck and upon said signal measuring circuit detecting that electricity is not being produced by all of the piezoelectric sensors in said plurality of piezoelectric sensors a second signal being produced to indicate that the semiconductor wafer is not centered on the chuck.
15. The apparatus according to Claim 14 wherein each of said piezoelectric sensors comprise layers of titanium and a layer of zinc dioxide intermediate said layers of titanium, and wherein said signal measuring circuit comprise a plurality of peak detector circuits equal in number to said plurality of piezoelectric sensors and a comparator circuit connected to said peak detector circuits, said peak detector circuits connected respectively across said piezoelectric sensors .
16. A method of determining whether a semiconductor wafer is present on a semiconductor wafer chuck, comprising: interposing at least one piezoelectric sensor between the semiconductor wafer and the chuck and chucking the semiconductor wafer to the chuck to cause the piezoelectric sensor to produce electricity piezoelectrically; and detecting said electricity and producing a signal to indicate that the semiconductor wafer is present on the chuck.
17. A method of detecting at least the presence of a semiconductor wafer on the support surface of a semiconductor wafer chuck, the chuck including a support surface, comprising the steps of: mounting piezoelectric sensor on the chuck with at least a portion of said piezoelectric sensor extending outwardly from the support surface; chucking the semiconductor wafer to the chuck to cause the semiconductor wafer to engage and compress said piezoelectric sensor between the semiconductor wafer and the chuck and to cause the piezoelectric sensor to produce electricity piezoelectrically; and detecting said electricity and producing a signal therefrom indicative of at least the presence of the semiconductor wafer on the chuck.
18. A method of detecting whether a semiconductor wafer is centered on a semiconductor wafer chuck including a support surface, comprising the steps of: mounting a plurality of piezoelectric sensors to the chuck with the piezoelectric sensors spaced equally distantly from each other around an outer circumferential portion of the support surface, and mounting the piezoelectric sensors to the chuck such that at least a portion of the piezoelectric sensors extends outwardly from the support surface; placing a semiconductor wafer on the piezoelectric sensors and chucking the semiconductor wafer to the chuck to cause the semiconductor wafer to compress the piezoelectric sensors between the semiconductor wafer and the chuck and to cause the piezoelectric sensors between the semiconductor wafer and the chuck to produce electricity piezoelectrically; and detecting said electricity and determining whether said electricity is being produced by all or less than all of the piezoelectric sensors in said plurality of piezoelectric sensors and producing a first signal indicative that the semiconductor wafer is centered on the chuck upon it being determined that said electricity is being produced by all of the piezoelectric sensors in said plurality of piezoelectric sensors and producing a second signal upon it being determined that said electricity is not being produced by all of the piezoelectric sensors in said plurality of piezoelectric sensors.
19. A method of detecting the strength of chucking of a semiconductor wafer to a semiconductor wafer chuck including a support surface, comprising the steps of: mounting at least one piezoelectric sensor to the chuck with at least a portion of the piezoelectric sensor extending outwardly from the support surface; chucking a semiconductor wafer to the chuck to cause the semiconductor wafer to compress said piezoelectric sensor and to cause said piezoelectric sensor to produce electricity piezoelectrically; and detecting whether said electricity has reached a predetermined level and upon said electricity at least reaching the predetermined level producing a signal indicative of the strength of chucking of the semiconductor wafer to the chuck.
20. A method of determining the strength of chucking of a semiconductor wafer to a semiconductor wafer chuck, comprising: determining the amount of electricity that will be produced by a piezoelectric sensor interposed and compresse between a semiconductor wafer and a chuck upon the semiconductor wafer being chucked to the chuck with sufficient strength to maintain the semiconductor wafer on the chuck during subsequent semiconductor wafer processing to establish a electricity threshold level; interposing a piezoelectric sensor between a semiconductor wafer and a semiconductor wafer chuck and chucking the semiconductor wafer to the chuck to compress and cause the piezoelectric sensor to produce operation electricity; and detecting the operational electricity produced and determining whether the operational electricity produced is at least equal to the electricity threshold level and if so providing a signal to indicate that the semiconductor wafer is chucked to the chuck with sufficient strength to maintain the semiconductor wafer on the chuck during subsequent semiconductor wafer processing.
21. A chucking apparatus comprising a support surface and a composite structure on said support surface, said composite structure extending outwardly from said support surface; said composite structure having a compressive feature which, when compressed, produces a readable signal indicative of compression thereof and thus receipt thereover of any object to be chucked.
22. The apparatus of claim 1 wherein the sensor is integral with the support surface.
PCT/US1999/022036 1998-09-29 1999-09-22 Chuck with integrated piezoelectric sensors for wafer detection WO2000019521A1 (en)

Priority Applications (3)

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JP2000572929A JP2002526925A (en) 1998-09-29 1999-09-22 Chuck with integrated piezoelectric sensor for wafer detection
KR1020017004027A KR20010088820A (en) 1998-09-29 1999-09-22 Chuck with integrated piezoelectric sensors for wafer detection
EP99948405A EP1118114A1 (en) 1998-09-29 1999-09-22 Chuck with integrated piezoelectric sensors for wafer detection

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US16323298A 1998-09-29 1998-09-29
US09/163,232 1998-09-29

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JP (1) JP2002526925A (en)
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CN112640081A (en) * 2018-08-24 2021-04-09 应用材料公司 Electrostatic chuck assembly and electrostatic chuck manufacturing method
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CN115938997A (en) * 2023-03-15 2023-04-07 湖北江城芯片中试服务有限公司 Wafer chuck and method for monitoring state of clamping piece

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KR102233467B1 (en) * 2018-09-12 2021-03-31 세메스 주식회사 Substrate treating apparatus and substrate treating method

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CN102163571A (en) * 2010-02-04 2011-08-24 东京毅力科创株式会社 Substrate carrying device and substrate carrying method
CN112640081A (en) * 2018-08-24 2021-04-09 应用材料公司 Electrostatic chuck assembly and electrostatic chuck manufacturing method
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CN115938997A (en) * 2023-03-15 2023-04-07 湖北江城芯片中试服务有限公司 Wafer chuck and method for monitoring state of clamping piece
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KR20010088820A (en) 2001-09-28
TW432580B (en) 2001-05-01
EP1118114A1 (en) 2001-07-25

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