WO1996005650A1 - Motor driving system - Google Patents

Motor driving system Download PDF

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Publication number
WO1996005650A1
WO1996005650A1 PCT/JP1995/001435 JP9501435W WO9605650A1 WO 1996005650 A1 WO1996005650 A1 WO 1996005650A1 JP 9501435 W JP9501435 W JP 9501435W WO 9605650 A1 WO9605650 A1 WO 9605650A1
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WO
WIPO (PCT)
Prior art keywords
motor
output
current
voltage
input
Prior art date
Application number
PCT/JP1995/001435
Other languages
French (fr)
Japanese (ja)
Inventor
Masatoshi Morikawa
Kunio Seki
Yasuhiko Kokami
Kozo Sakamoto
Isao Yoshida
Original Assignee
Hitachi, Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi, Ltd. filed Critical Hitachi, Ltd.
Publication of WO1996005650A1 publication Critical patent/WO1996005650A1/en

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P6/00—Arrangements for controlling synchronous motors or other dynamo-electric motors using electronic commutation dependent on the rotor position; Electronic commutators therefor
    • H02P6/06—Arrangements for speed regulation of a single motor wherein the motor speed is measured and compared with a given physical value so as to adjust the motor speed

Definitions

  • the present invention relates to a method for driving a small motor, and more particularly to a method for driving a small and high-precision brushless motor used in 0 A equipment with high efficiency and high reliability, and capable of reducing manufacturing costs.
  • a wide variety of motors are used in many of our daily uses, such as home appliances and office automation equipment.
  • the driving method also varies depending on the type of motor and the purpose of use.
  • rotating disks such as hard disk drives (hereinafter referred to as HDDs)
  • DC brushless motors with simple driving circuits and high reliability during long-time operation especially called spindle motors
  • the demand for smaller and thinner HDDs has led to an increase in the use of sensorless types, in which the position detection sensor for the motor rotor has been removed.
  • the method of driving this motor efficiently is described in NRC Research and Development, Volume 32, Nanno Kuichi 3, July 1991, July, pp. 368 to 378 (NEC Res. & Develop., Vol.
  • This prior art relates to a dry integrated circuit that drives a spindle motor for an HDD using a pulse width modulation (PWM) signal of a three-phase rectangular wave.
  • PWM pulse width modulation
  • This circuit consists of a PWM circuit that sets the duty of the PWM voltage by comparing the error voltage for phase control with the output sense voltage.
  • the difference between the output voltage of each phase and the midpoint potential of the three-phase coil is detected to detect the induced voltage generated by the motor, and the timing for driving the bridge circuit is determined by the selector from the detected voltage. create.
  • the difference between the sense voltage from the current detection resistor connected to the bridge circuit and the error voltage corresponding to the target speed is calculated.
  • the duty of the PWM signal is determined by comparison with the triangular wave voltage of 100 kHz.
  • a drive voltage is generated in the fuse generator based on information from the selector, and the upper arm transistor of the three-phase bridge circuit is driven by a rectangular wave, and the lower arm transistor is driven by a PWM signal.
  • the output current will be Flows through the U-phase upper arm and the coil to the V-phase lower arm, and when the lower arm is off, flows to the diode between the source and drain of the V-phase upper arm due to the inductance characteristics of the coil, and to the power supply Return (reflux state). Therefore, no current flows from the power supply to the ground in the reflux state, and no power is consumed. Due to this repetition, the output current flows in a rectangular waveform energized by 120 degrees.
  • the sensorless motor is realized by detecting the switching timing of each phase from the induced voltage, and ordinary rectangular wave linear drive is performed because PWM control is performed.
  • the power consumption of the power supply can be reduced as compared with.
  • all analog circuits are configured by insulated gate transistors, and do not use bipolar transistors.
  • a symmetrical layout is used to reduce offsets and improve accuracy. ing. This simplifies the manufacturing process, which helps reduce manufacturing costs.
  • synchronous motors are used in applications that require speed control and absolute positioning of rotors, such as machine tools and robots, instead of small motors such as hard disks.
  • the driving method of this motor is described in Japanese Patent Application Laid-Open Publication No. Hei 4-111 (published on Apr. 3, 1992).
  • a table stored in a ROM (read-only storage device) based on pulse information corresponding to the absolute position of the mouth obtained from the encoder such as a pulse generator attached to the motor Generates a three-phase reference sine wave whose phase is shifted by 120 degrees.
  • the current control signal obtained by comparing the output current with the target current value and the reference sine wave are multiplied by a multiplier to amplify the sine wave, and compared with a high-frequency triangular wave (sawtooth wave).
  • a high-frequency triangular wave sawtooth wave.
  • This PWM signal allows six traffic By turning on and off each transistor of a three-phase inverter circuit composed of a transistor, a three-phase sine-wave output current is obtained, and a synchronous motor is driven. It is not suitable for miniaturization of the system because it requires a position detector and R0M.However, since the motor is driven by a pseudo sine wave current, the phase switching becomes smooth, and the This means that the electromagnetic noise that occurs is minimized. It is also characterized by low power consumption due to PWM.
  • the current waveform is still a rectangular wave, and thus the current waveform is caused by L ⁇ diZdt (L: inductance of the motor coil, diZdt: time change rate of the output current). Electromagnetic noise during phase switching was not reduced, and this affected the control system, so the range of use in HDDs was limited. Therefore, there was no product other than the conventional example of the HDD motor driver integrated circuit product using the PWM technology. Also, depending on the power circuit that realizes the analog circuit of the insulated gate type transistor by performing the symmetrical layout, it may not be possible to obtain sufficient accuracy by this method alone.
  • the prior art described later requires a place for installing a rotor rotational position detector such as an encoder, and is not suitable for a field requiring a smaller motor. Furthermore, a ROM and its control circuit were required to extract the information stored in R0M based on the rotational position detection signal and generate a three-phase sine wave. Therefore, the circuit scale is large and the cost is high, and it is not suitable for driving a small motor requiring low cost.
  • An object of the present invention is to solve these two problems of the prior art at once, and to achieve both improvement of motor efficiency and low noise with a simple circuit configuration without using a position detector and its control circuit. Is to provide a motor driving method for realizing the above.
  • Another object of the present invention is to provide a method of driving a motor which is optimal for forming an analog circuit by using insulated gate transistors, thereby realizing a reduction in manufacturing cost and a reduction in system size.
  • the purpose is to detect the induced voltage generated in the motor through a filter, shape and amplify the waveform to form a three-phase sine wave, and then convert the three-phase sine wave to PWM to drive the bridge circuit. Rotating the motor with a sinusoidal output current And is achieved with. Also, current detection means may be provided at each output of the bridge circuit, the detection result may be fed back to the input, the output current may be squeezed, and the induced voltage generated in the motor may be detected.
  • the above and other objects are achieved by configuring a filter, a comparator, and the like by using the switched capacitor technology. It is also achieved by configuring the output circuit with an insulated gate type and driving it by PWM.
  • FIG. 1 is a block diagram of a three-phase motor drive system according to a first embodiment of the present invention.
  • FIG. 2 is a block diagram of a drive system of a spindle motor for a 2.5-inch hard disk drive according to a second embodiment of the present invention.
  • FIGS. 3a and 3b are circuit diagrams of a filter according to the second embodiment of the present invention.
  • FIG. 4 is a configuration diagram of a sine wave amplitude control unit.
  • FIGS. 5a and 5b are a circuit diagram of a sample-and-hold type comparator and an operation timing diagram thereof.
  • FIG. 6 is an input / output characteristic diagram of a comparator according to the second embodiment of the present invention.
  • FIGS. 7a and 7b are a diagram of a through current prevention circuit according to a second embodiment of the present invention and an explanatory diagram of its operation.
  • FIGS. 8a to 8c are output current waveform diagrams in the second embodiment of the present invention.
  • FIGS. 9a and 9b are diagrams showing the effect obtained in the second embodiment of the present invention.
  • D FIG. 10 is a block diagram of a three-phase motor drive system according to a third embodiment of the present invention.
  • FIG. 11 is a specific circuit diagram for creating a sine wave PWM signal in the third embodiment of the present invention.
  • FIG. 12 is a diagram showing the effect of the offset in the third embodiment of the present invention.
  • FIG. 13 is a block diagram of a three-phase motor drive system according to a fourth embodiment of the present invention.
  • FIG. 14 is a block diagram of a three-phase motor drive system according to a fifth embodiment of the present invention.
  • FIG. 15 is a diagram showing details of a part of a three-phase motor drive system according to a fifth embodiment of the present invention.
  • FIG. 16 is a block diagram of a three-phase motor drive system according to a sixth embodiment of the present invention.
  • FIG. 17 is a detailed circuit diagram of a three-phase motor drive system according to a sixth embodiment of the present invention.
  • FIG. 18 is a diagram showing switching characteristics of a current mirror according to the sixth embodiment of the present invention.
  • FIG. 19 is a timing chart of the PWM drive in the sixth embodiment of the present invention.
  • FIG. 20 is an output current waveform diagram in the sixth embodiment of the present invention.
  • FIG. 1 shows a block diagram of a three-phase motor drive system which is a typical embodiment of the present invention.
  • Reference number 1 is a three-phase motor consisting of U, V, and W phases, 2 to 7 are upper and lower arms of each phase composed of output transistors, 8 is a power supply for driving the motor, and 9 is a power supply for each phase.
  • Output voltage, 10 is a low-pass filter for extracting the induced voltage generated in the motor from the output voltage, 11 is the induced voltage of each phase, and 12 is the converted voltage to make the induced voltage a sine wave for driving the motor.
  • the amplitude control unit 13 performs pulse width modulation of a sine wave (Pulse Width Modulation);
  • a triangular (or sawtooth) carrier for PWM) 14 is a rotational speed detector that detects the motor rotation state from the induced voltage, and 15 is the motor speed from the rotational speed detector 14 detection signal.
  • Microprocessor or speed error detection circuit to judge and issue acceleration or deceleration command, 16 to 18 convert sine wave of amplitude control unit 12 to pulse with triangular wave PWM carrier 13 and It is a pulse generator that drives each arm 2-7.
  • a special feature of this system is that it has a system that drives a motor by turning on and off a bridge circuit with a sine wave PWM signal, making it possible to make the motor sensorless. The point is that, in the configuration of the members 9 to 12, a waveform detecting and shaping means for utilizing the induced voltage for the PWM sine wave is provided.
  • FIG. 2 is a block diagram of a system for driving a spindle motor for a 2.5-inch hard disk drive.
  • This motor is a sensorless brushless DC motor with a rated power supply voltage of 5 V, an internal resistance per phase of 1.9 ⁇ , and a coil inductance of 0.2 mH.
  • the present system is composed of an integrated circuit 300 having a one-chip motor drive circuit and an external microprocessor 15.
  • reference numerals 19 to 24 are insulated gate field effect transistors (hereinafter referred to as “insulated gate field effect transistors”).
  • MO SFET MO SFET
  • the upper arm is a P-channel transistor with a drain withstand voltage of 15 V and an on-resistance of 15 ⁇ ⁇ ⁇ . This is a ⁇ channel transistor.
  • 25 to 27 are comparators for modulating sine and triangular waves into PWM signals
  • 28 to 30 are for the upper and lower arms to be turned on at the same time, causing a through current from the power supply to ground. This is a through current prevention circuit for preventing such a situation.
  • MOSFETs are used as output elements because of their low resistance and high switching speed compared to bipolar transistors, and because they have a built-in diode between source and drain, they are suitable for PWM drive. It is.
  • a bipolar transistor may be used.
  • the reason why the upper arm is set to the ⁇ channel is that it is necessary to boost the maximum value of the driving pulse applied to the gate electrode to the power supply voltage or more. Because there is no. If a booster circuit such as a booster can be used, both upper and lower channels can be used.
  • the induced voltage can be extracted from the output voltage by the filter 10 composed of a capacitor and a resistor, and is input to the amplitude control circuit 12 and the phase detection circuit 14.
  • This finalizer is a so-called low-pass filter that removes the PWM carrier frequency 100 kHz from each output voltage and extracts only the 240 Hz induced voltage, and has a cutoff frequency f cut force of 2 kHz.
  • the induced voltage has a frequency of 1 Z 10 compared to f cut, so there is almost no phase shift due to the filter, and the bridge circuit can be driven simply by controlling the amplitude with this phase.
  • this form of filter requires very large capacitor and resistance values, which is not practical for a single semiconductor chip. Therefore, the desired characteristics are realized with a small element area by replacing the resistor with a capacitor using the switch-capacitor technology as shown in Fig. 3b and turning on and off SW1 and 2 alternately. .
  • a rectangular pulse proportional to the frequency of the induced voltage is formed in the rotation speed detecting circuit 14, and the pulse width of the rectangular pulse is counted by the external microprocessor 15 by the reference pulse.
  • reference numeral 12 denotes a sine wave amplitude control unit obtained from the induced voltage, and its configuration is shown in FIG.
  • Charge pump or DZA converter 201 that receives speed error signal 200 from external microprocessor 15 and converts it into amplitude control signal 202, and 203 according to its amplitude control signal 202
  • a gain control unit that controls the amplitude of the sine wave by adjusting the gain of the operational amplifier.
  • the operational amplifier used here is composed of a differential amplifier circuit of MOSFET, and the difference in offset voltage of each phase is minimized by using a method of symmetrically laying out differential pairs (common centroid). And
  • FIG. 5a is a simplified circuit diagram of the sample and hold type comparator
  • FIG. 5b is the timing of the switch operation.
  • reference numeral 2 12 is a CMOS inverter
  • 2 13 is a latch circuit. This switch requires a high-speed pulse of about several MHz, but in this case, the clock of the microphone processor is used.
  • FIG. 6 shows the input / output characteristics of the comparators 25 to 27.
  • the PWM signal is a rectangular wave with the same frequency as the triangular wave and a duty proportional to the size of the sine wave.
  • the arms 19 to 24 are driven by this PWM signal.
  • the upper and lower arms 19 and 20 for the U phase are controlled by the U-phase PWM signal 34
  • the upper and lower arms 21 and 22 for the V phase are controlled by the PWM signal 35 for the V phase.
  • the upper and lower arms 23, 24 for the W phase are driven by the signal 36.
  • FIG. 7a shows a through current prevention circuit in the U phase
  • the input inverter has the ability to charge and discharge the gate capacitances 41 and 42 sufficiently.
  • the sine wave PWM signal is 43
  • the switch 37 is turned on and the switch 38 is turned off.
  • the signal is "H”
  • the switch is turned off and on.
  • the sine wave PWM signal 4 3 In the case of “L”, the upper arm charges the gate capacitor 41 at high speed without the resistor and the lower arm Charging is performed according to the time constant of 0 and the gate capacitance 42.
  • the sine wave PWM signal 43 is "H"
  • the upper arm discharges according to the time constant of the resistor 39 and the gate capacitance 41.
  • the lower arm discharges at a high speed from the gate capacitance 42 without the intervention of a resistor, which causes the gate voltage 44 to fall and the gate voltage 45 to rise and have a delay time. This delays the turn-on of the transistors 2 and 3, which makes it possible to prevent shoot-through current. It is sufficient if the CR time constant is 0.5. Since the gate capacitances 41 and 42 are 211? And 1 nF, respectively, the resistors 39 and 40 are 25 0 ⁇ and 500 ⁇ .
  • FIG. 8 shows an output current waveform according to the second embodiment of the present invention. 4 6, 4 7,
  • 4 8 are sine wave signals of U, V and W phases, respectively, 49, 50 and 51 are output currents,
  • the output current of each phase is composed of the following current components.
  • the combination of the above 1) to 4) is determined by the on / off timing of each arm, and the output current has a zigzag waveform. What actually needs to be considered as the current consumption of the power supply is the combination of 1) and 3) above, and this power consumption does not perform PWM. Very small compared to normal linear drive. Also, by increasing the PWM carrier frequency, the output current zigzag can be ignored. Therefore, the output current can be regarded as almost a sine wave, and the electromagnetic noise of L ⁇ diZdt generated in the motor coil can be reduced.
  • FIGS. 9a and 9b The effects of this embodiment are shown in FIGS. 9a and 9b.
  • This is a comparison of the square wave drive and the square wave PWM drive, which are generally used as the spindle motor drive system of a hard disk drive, with the power consumption and the electromagnetic noise and spectrum of this embodiment.
  • Fig. 9a shows the dependence of the power consumption on the carrier frequency
  • Fig. 9b shows the frequency spectrum comparison of the output current.
  • the rectangular wave linear drive is independent of the carrier frequency, so the characteristics of this method were used as a reference for comparison.
  • the power consumption ratio does not change with the carrier frequency in both the present embodiment and the rectangular wave PWM drive, and is smaller than 0.4 as compared with the linear drive.
  • the integrated circuit is constituted by the MOS FET circuit without using the bipolar transistor circuit.
  • the advantage of MOS FET can be utilized by the PWM drive, and the use of the MOSC analog circuit has been made possible by using the common-centroid layout switch capacitor technology. Therefore, it can be said that the present invention has an optimal circuit configuration on all M0S of the motor driving integrated circuit.
  • the production process power was simplified by the use of all MOS, and the production cost was reduced by about 30% as compared with the conventional bipolar use.
  • FIG. 10 shows a block diagram of a three-phase motor drive system which is a typical embodiment of the present invention.
  • the difference between this embodiment and the above-described second embodiment is that, in the second embodiment, the operation of preventing a through current was performed after the generation of the sine-wave PWM signal, whereas in this embodiment, the generation of the sine-wave PWM signal was performed.
  • the PWM signals for the upper and lower arms are created separately, and the center potential of the triangular wave carrier at the time of creation is offset up and down from the center potential of the sine wave. It is to let.
  • FIG. 10 shows a specific circuit for creating a sine wave PWM signal in this case, and FIG. 12 shows the effect of the offset.
  • FIGS. 11 and 12 illustrate only one phase.
  • offset circuits 106 and 107 are composed of a combination of an operational amplifier and a resistor R. In the case of the upper arm, the midpoint potential V M + V is applied to one end of the operational amplifier.
  • FIG. 13 is a block diagram of a three-phase motor drive system according to a first embodiment of the present invention in which current detection and control functions are added to perform closed-loop control.
  • Reference numeral 55 denotes a current detection unit for detecting the sum of currents of the plunger circuit in proportion to the output current
  • 56 denotes a detection signal.
  • 55 uses an external high-precision resistor. Using this technology, the output current level can be fed back to the input, and the sine wave amplification level can be controlled by comparing it with the control command from the microprocessor, making it possible to accurately set the output current to a constant value. It became possible to suppress the fluctuation of the rotation speed.
  • the maximum voltage of the sine wave PWM signal is equal to the power supply voltage, and the minimum voltage is equal to the source voltage of the lower arm, with exceptions. That is when the power supply voltage is higher than the allowable input voltage of the output transistor.
  • the microprocessor is a separate chip, but if there is a demand for further integration, it can also be a single chip.
  • FIG. 14 is a block diagram of a method of detecting an output current of each phase and feeding it back to an input, thereby enabling control of an output current and detection of an induced voltage.
  • reference numerals 310 to 303 denote output current detection means
  • 304 to 310 denote output current detection results
  • 307 to 309 denote output current control operational amplifiers.
  • the signal output from the sine wave amplitude control means 1 2 is input to the operational amplifiers 3 0 7 to 3 0 9, and the output current detection results 3 0 4, 3 0 5, 3 0 6 Such a signal is applied to each output arm via the PWM signal generating means 16, 17, 18. This makes it possible to provide the motor with the optimum output current for the target rotation speed.
  • FIG. 15 is a block diagram in the case of using a resistor as the current detecting means of FIG. In Fig. 15, only the U-phase circuit is shown to avoid complicating the figure, but the other phases have the same format as the U-phase.
  • Reference number 1 is a spindle motor for a 3.5-inch hard disk drive (interphase inductance 3 mH, interphase resistance 6.6 ⁇ , number of poles 8, rated rotation speed 450 Orp m, rated voltage 12 V) , 19, 21, 23 are P channel insulated gate transistors (on-resistance 1.0 ⁇ ) that are the upper arm of each phase output circuit, and 20, 22 and 24 are the N channels that are the lower arm It is an insulated gate transistor (on resistance is 0 ⁇ ).
  • 3 1 1 to 3 13 are resistors for detecting the current of each phase (resistance 0.1 ⁇ )
  • 3 14 is an operational amplifier for detecting the voltage drop in the detection resistor 3 11
  • 3 15 is an output circuit.
  • a drive circuit 13 for driving is a sawtooth wave generation circuit (PWM frequency; 156 kHz) for PWM control.
  • PWM frequency 156 kHz
  • a resistor external to the IC is used here, and in order to reduce the number of components, a resistor built in the IC chip and a bonding wire resistance during packaging can be used.
  • Vout Vbemf + I- (r + wL) + IR Formula (1)
  • the output current I is sufficiently reduced by controlling the input signal
  • Vout can be approximated by the following equation.
  • the output voltage can be detected by passing the output voltage through a low-pass filter to remove harmonic components.
  • FIG. 16 is a block diagram of a motor drive system when a current mirror is used as an output circuit. Like FIG. 15, FIG. 16 shows only the U-phase circuit to avoid complicating the figure.
  • Reference numerals 401 and 402 are current mirrors for the upper and lower arms, respectively.
  • 403.404 is current detection means
  • 405 and 406 are PWM signal generation means
  • 407 and 408 are current mirrors 401 and 402 on and off.
  • 409 is a three-differential amplifier for generating an input signal of each phase current mirror
  • 410 is a matrix circuit for shaping the induced voltage into an input signal to the three-differential amplifier 409.
  • the output of FIG. 16 is shown in more detail in FIG.
  • the comparator 501 is used as the current detection means 404, and it is determined whether or not the output current is at the target level by comparison with an arbitrary reference voltage 502. The result is transmitted to the PWM signal generating means 406, and a PWM signal 504 is generated by a combination with the clock 503 of the PWM reference frequency. With this signal 504, the gate of the transistor 505, which is the switch 408 for turning on and off the current mirror 402, is driven. Tran When the register 505 is on, the control current I 2 from the three-differential amplifier 409 is not input to the current mirror 402, so that the current mirror 402 is turned off. On the other hand, when the transistor 505 is off, the current mirror 402 is on.
  • the transistors 508 and 509 forming the current mirror 402 have a ratio of gate width / gate length of about 1: 100. For example, if the current flowing through 508 is 1 mA, 1 A flows through the output 509. This is a setting for realizing the current required when starting the motor with a small input current.
  • Fig. 18 shows the behavior of the input / output voltage and current to the current mirror.
  • Fig. 18 shows the PWM signal 504 of the current mirror 4002 when the motor is loaded, the output voltage 601 of the power mirror 4002, and the output current 600 flowing through one phase of the motor. 2 is shown.
  • the PWM signal 504 is between the power supply voltage Vcc and the current mirror is off, the output voltage is near Vcc and no output current flows.
  • the gate voltage 600 changes to zero, the current mirror changes from off to on, and the output voltage temporarily drops to near zero. This is because the output current cannot flow rapidly because the load is inductance, and the output transistor operates in the unsaturated region.
  • the output voltage 6001 starts to rise slightly, and then rises sharply when the operation changes from the non-saturation to the saturation region.
  • the output current 602 increases substantially according to the load time constant RZL.
  • the output current reaches a level determined by the current mirror ratio, the output voltage becomes constant.
  • the input is turned off again, the output current flows into the body diode of the upper arm and becomes a return current to discharge the energy stored in the inductance.
  • the output voltage instantaneously increases above the power supply voltage, and then decreases according to the load time constant.
  • the input is turned off by detecting that the target voltage has become 502.
  • detecting the output voltage 601 has the same meaning as detecting the output current.
  • the point of operation of this circuit is when the output voltage 6001 enters the saturation region from the non-saturation region.
  • One step is to detect the output result of the comparator 501, and to switch the PWM signal 504 from off to on by the clock signal 503.
  • FIG. 19 shows the respective terminal voltages of the PWM signal generating means 406 in FIG.
  • reference numeral 601 is the output voltage of the current mirror
  • 502 is the target voltage
  • 701 is the output of the comparator 501
  • 702 to 704 are the NAND gates 51.
  • Reference numeral 2 denotes an input / output signal
  • reference numeral 503 denotes a PWM frequency clock signal
  • reference numeral 601 denotes an output signal of the flip-flop 513
  • reference numeral 602 denotes an output current of the current mirror.
  • a signal of 701 is obtained.
  • the signal obtained by inverting the result is 70 2
  • the signal obtained by delaying the signal for a certain time by the RC circuits 51 0 and 51 1 is 70 3.
  • the resistance value of 510 is 100 kQ
  • the capacitance value of 511 is 10 pF
  • the delay time is about 1 ms.
  • FIG. 20 shows output characteristics when the spindle motor is rotated according to the present embodiment.
  • 52 forces, 54 and 54 are the induced voltages of each phase
  • 801 to 803 are the output voltages of the three-acting amplifier for driving the upper arm
  • 804 to 806 are the lower arm drive.
  • the output current 602 rises and falls more slowly than before.
  • the rise and fall of the output current in the related art is about 2 AZm, but in the present embodiment, about 0.5 A / m second is realized.
  • the electrical and acoustic noise at the time of phase switching was significantly improved. Therefore, similarly to the effect described in the first embodiment, a driving method that is equivalent to the conventional one with respect to the switching noise and consumes low power is enabled.
  • the present invention it becomes possible to drive a sensorless brushless motor with lower power consumption and lower noise than before.
  • the power consumption of the power source was reduced by about 60% or more, and the harmonic components of electromagnetic noise were significantly reduced.
  • the manufacturing cost was reduced by about 30%.

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Abstract

The drive circuit of a three-phase motor (1) generates a sine-wave PWM signal by using an induced voltage (11) and outputs a sine-wave current by driving upper and lower arms (2, 3, 4, 5, 6 and 7) according to the PWM signals. A filter (10) picks up the induced voltage (11) from an output voltage (9) and sends the voltage (11) to a sine-wave amplitude controlling section (12) and a speed measuring section (14). A microprocessor (15) measures the rotative speed of the motor (1) based on a speed signal from the speed measuring section (14) and controls the amplitude of the induced voltage (11) based on an amplitude controlling signal for acceleration and deceleration. Thereafter, PWM generating sections generate sine-wave PWM signals by using a triangular-wave carrier (13). In order to prevent through current from being generated at the output, preventive circuits (28, 29 and 30) comprising switches (35 and 36) and resistors (37 and 38) are provided. Through current is prevented also by offsetting the carrier (13). All the analog circuits of the integrated circuit are constituted of MOS circuits so as to simplify the process. By the system the power consumption of a brushless motor provided with no sensor is reduced to a half or less and, in addition, the electromagnetic noise of the motor is remarkably reduced. Moreover, since the analog circuits are constituted of MOS circuits, the manufacturing cost of the integrated circuit is reduced.

Description

明 細 書 . モータ駆動方式 技術分野  Description. Motor drive system Technical field
本発明は小型モータの駆動方法に係り、 特に 0 A機器などに使用される小型で 高精度なブラシレスモータの高効率で高信頼性な駆動、 製造コスト低減を可能と する駆動方法に関する。  The present invention relates to a method for driving a small motor, and more particularly to a method for driving a small and high-precision brushless motor used in 0 A equipment with high efficiency and high reliability, and capable of reducing manufacturing costs.
背景技術 Background art
家電品や O A機器など、 我々の日常の多く用途に多種多様のモータが使用され ている。 その駆動方法も、 モータの種類と使用目的により様々である。 なかでも ハードディスク ドライブ （以下、 H D Dと称す） などのディスク回転用には、 駆 動回路が簡単で、 長時間駆動時の信頼性が高い直流ブラシレスモータ （特にスピ ンドルモータと呼んでいる） が広く用いられている。 また最近では、 H D Dの小 型、 薄型化の要求から、 モータの回転子 （ロータ） の位置検出用センサを削除し たセンサレス型の使用が多くなつている。 このモータを効率よく駆動させる方法 は、 ェヌィーシー · リサーチ · アンド · デベロープメント、 ボリューム 3 2、 ナ ンノく一 3 、 1 9 9 1年 7月号、 3 6 8頁から 3 7 8頁 （NEC Res. &Develop. ， Vol. 32, No. 3, pp. 368-378, Jul y 1991) に記載されている。 この従来技術は、 3相矩形 波のパルス幅変調 （PWM) 信号により H D D用スピンドルモータを駆動するド ラィノく集積回路に関するものである。 6個の nチャネルパワー M 0 S F E Tによ る 3相ブリッジ回路、 その駆動切り替えを制御するフヱイズ' ジヱネレータ、 3 相切り替えのタイミングを設定するセレクタ、 モータコイルで発生した誘起電圧 を検出する検出回路、 位相制御用エラ一電圧と出力センス電圧との比較により PWM電圧の d u t yを設定する P WM回路などにより本回路は構成されている。 誘起電圧検出回路において、 各相の出力電圧と 3相コイルの中点電位との差を取 りモータで発生する誘起電圧を検出し、 その検出電圧からプリッジ回路駆動のた めのタイミングをセレクタにおいて作成する。 一方、 プリッジ回路に接続した電 流検出抵抗からのセンス電圧と、 目標回転数に対応したエラ一電圧との差を取り 1 0 0 k H zの三角波電圧との比較により PWM信 の d u t yを決定する。 さ らにセレクタからの情報によりフヱーズジヱネレ一夕において駆動電圧を作成し、 3相プリッジ回路の上アーム用トランジスタを矩形波で、 下アーム用トランジス タを PWM信号で駆動する。 例えば、 3相 （U、 V、 W相） のうち U相上アーム 用トランジスタがオン状態で V相下アーム用トランジスタが PWM動作している とすると、 下アームがオンの場合、 出力電流は電源から U相上アームとコイルを 通って V相下アームへと流れ、 下アームがオフの場合は、 コイルのインダクタン スの特性により、 V相上アームのソース、 ドレイン間ダイオードへと流れ電源に 戻る （還流状態） 。 従って、 還流状態では電源からアースへ電流は流れないため 電源電力の消費はない。 この繰返しにより、 出力電流は 1 2 0度通電の矩形波状 に流れる。 前述のように本従来例では、 誘起電圧から各相の切り替わりタイミン グを検出することによりモータのセンサレス化を実現しており、 また、 PWM制 御を行なつているため通常の矩形波リニァ駆動に比べて電源の消費電力の低減が 可能となった。 これに加えて、 本従来例では、 全てのアナログ回路を絶縁ゲート 型トランジスタにより構成し、 バイポーラトランジスタを用いていない。 特にォ ぺアンプやコンパレータのようなトランジスタ間のオフセッ ト電圧による誤差が 問題となる回路では、 対称形のレイァゥト （コモンセントロイ ド） を行って、 ォ フセッ 卜の低減を図り、 精度を向上させている。 これにより、 製造工程が簡略化 できるため、 製造コストの低減に役立った。 A wide variety of motors are used in many of our daily uses, such as home appliances and office automation equipment. The driving method also varies depending on the type of motor and the purpose of use. Above all, for rotating disks such as hard disk drives (hereinafter referred to as HDDs), DC brushless motors with simple driving circuits and high reliability during long-time operation (especially called spindle motors) are widely used. Have been. In recent years, the demand for smaller and thinner HDDs has led to an increase in the use of sensorless types, in which the position detection sensor for the motor rotor has been removed. The method of driving this motor efficiently is described in NRC Research and Development, Volume 32, Nanno Kuichi 3, July 1991, July, pp. 368 to 378 (NEC Res. & Develop., Vol. 32, No. 3, pp. 368-378, July 1991). This prior art relates to a dry integrated circuit that drives a spindle motor for an HDD using a pulse width modulation (PWM) signal of a three-phase rectangular wave. A three-phase bridge circuit with six n-channel power M 0 SFETs, a phase generator that controls the drive switching, a selector that sets the timing of the three-phase switching, a detection circuit that detects the induced voltage generated in the motor coil, This circuit consists of a PWM circuit that sets the duty of the PWM voltage by comparing the error voltage for phase control with the output sense voltage. In the induced voltage detection circuit, the difference between the output voltage of each phase and the midpoint potential of the three-phase coil is detected to detect the induced voltage generated by the motor, and the timing for driving the bridge circuit is determined by the selector from the detected voltage. create. On the other hand, the difference between the sense voltage from the current detection resistor connected to the bridge circuit and the error voltage corresponding to the target speed is calculated. The duty of the PWM signal is determined by comparison with the triangular wave voltage of 100 kHz. In addition, a drive voltage is generated in the fuse generator based on information from the selector, and the upper arm transistor of the three-phase bridge circuit is driven by a rectangular wave, and the lower arm transistor is driven by a PWM signal. For example, if the U-phase upper-arm transistor of the three phases (U, V, and W phases) is on and the V-phase lower-arm transistor is performing PWM operation, the output current will be Flows through the U-phase upper arm and the coil to the V-phase lower arm, and when the lower arm is off, flows to the diode between the source and drain of the V-phase upper arm due to the inductance characteristics of the coil, and to the power supply Return (reflux state). Therefore, no current flows from the power supply to the ground in the reflux state, and no power is consumed. Due to this repetition, the output current flows in a rectangular waveform energized by 120 degrees. As described above, in this conventional example, the sensorless motor is realized by detecting the switching timing of each phase from the induced voltage, and ordinary rectangular wave linear drive is performed because PWM control is performed. The power consumption of the power supply can be reduced as compared with. In addition, in this conventional example, all analog circuits are configured by insulated gate transistors, and do not use bipolar transistors. Especially in circuits where errors due to the offset voltage between transistors such as amplifiers and comparators pose a problem, a symmetrical layout (common centroid) is used to reduce offsets and improve accuracy. ing. This simplifies the manufacturing process, which helps reduce manufacturing costs.
—方、 ハードディスクのような小型モータではなく、 工作機械やロボッ トなど の速度制御とロータの絶対位置決めを必要とする用途においては、 同期モータが 使用される。 このモータの駆動法については、 公開特許公報平 4 一 1 0 1 6 9 4 ( 1 9 9 2年 4月 3日公開） に記載されている。 3相の同期モータにおいて、 モ 一夕に取り付けたパルスジヱネレー夕などのェンコ一ダから得られる口一タ絶対 位置に対応したパルス情報をもとに、 R O M (読出し専用記憶装置） に記憶させ たテーブルに従って 1 2 0度ずつ位相のずれた 3相基準正弦波を発生させる。 次 に、 出力電流と目標電流値との比較により得た電流制御信号と、 前記基準正弦波 とを乗算器において掛けあわせて正弦波を増幅させ、 高周波の三角波 （鋸波） と の比較により 3相 P WM信号を発生させる。 この P WM信号によって 6個のトラ ンジス夕により構成される 3相ィンバータ回路の各トランジスタをオン、 オフさ せることで正弦波状の 3相出力電流が得られ、 同期モータの駆動を行なっている c この従来技術の特徴は、 ロータの位置検出器や R 0 Mを必要とするためシステム の小型化には適さないが、 擬似的な正弦波電流でモータを駆動しているため相切 り替えが滑らかなものとなり、 モータコイルにぉ 、て発生する電磁ノィズが最小 となることである。 また、 PWM化による低消費電力化も特徴である。 On the other hand, synchronous motors are used in applications that require speed control and absolute positioning of rotors, such as machine tools and robots, instead of small motors such as hard disks. The driving method of this motor is described in Japanese Patent Application Laid-Open Publication No. Hei 4-111 (published on Apr. 3, 1992). In a three-phase synchronous motor, a table stored in a ROM (read-only storage device) based on pulse information corresponding to the absolute position of the mouth obtained from the encoder such as a pulse generator attached to the motor Generates a three-phase reference sine wave whose phase is shifted by 120 degrees. Next, the current control signal obtained by comparing the output current with the target current value and the reference sine wave are multiplied by a multiplier to amplify the sine wave, and compared with a high-frequency triangular wave (sawtooth wave). Generate the phase PWM signal. This PWM signal allows six traffic By turning on and off each transistor of a three-phase inverter circuit composed of a transistor, a three-phase sine-wave output current is obtained, and a synchronous motor is driven. It is not suitable for miniaturization of the system because it requires a position detector and R0M.However, since the motor is driven by a pseudo sine wave current, the phase switching becomes smooth, and the This means that the electromagnetic noise that occurs is minimized. It is also characterized by low power consumption due to PWM.
発明の開示 Disclosure of the invention
上記前述の本従来技術では、 電流波形が矩形波であることに変わりはないため、 L · d i Zd t (L ； モータコイルのィンダクタンス、 d i Zd t ；出力電流の 時間変化率） に起因する相切り替え時の電磁ノイズは低減されず、 これが制御系 に影響を及ぼすため H D Dにおける使用範囲は限定されていた。 従って、 PWM 技術を使った H D D用モータドライバ集積回路の製品は、 本従来例以外に存在し なかった。 また、 対称形レイアウトを行うことによって絶縁ゲート型トランジス 夕のアナ口グ回路を実現している力 回路によってはその方法だけでは十分に精 度が得られない可能性がある。  In the above-described conventional technology, the current waveform is still a rectangular wave, and thus the current waveform is caused by L · diZdt (L: inductance of the motor coil, diZdt: time change rate of the output current). Electromagnetic noise during phase switching was not reduced, and this affected the control system, so the range of use in HDDs was limited. Therefore, there was no product other than the conventional example of the HDD motor driver integrated circuit product using the PWM technology. Also, depending on the power circuit that realizes the analog circuit of the insulated gate type transistor by performing the symmetrical layout, it may not be possible to obtain sufficient accuracy by this method alone.
一方、 後述の従来技術では、 エンコーダなどのロータ回転位置検出器の設置場 所が必要となり、 モータの小型化が要求される分野には不向きであった。 さらに、 回転位置検出信号をもとに R 0 Mに記憶された情報を取りだして 3相正弦波を発 生させるため、 R OMとその制御回路が必要であった。 従って、 回路規模が大き く高コストとなり、 安価が要求される小型モータの駆動には不向きであった。 本発明の目的は、 この 2つの従来技術の課題を一挙に解決することであり、 位 置検出器やその制御回路を用いることなく、 簡単な回路構成でモータの効率向上 と低ノィズ化の両立を実現するモータ駆動方法を提供することである。  On the other hand, the prior art described later requires a place for installing a rotor rotational position detector such as an encoder, and is not suitable for a field requiring a smaller motor. Furthermore, a ROM and its control circuit were required to extract the information stored in R0M based on the rotational position detection signal and generate a three-phase sine wave. Therefore, the circuit scale is large and the cost is high, and it is not suitable for driving a small motor requiring low cost. An object of the present invention is to solve these two problems of the prior art at once, and to achieve both improvement of motor efficiency and low noise with a simple circuit configuration without using a position detector and its control circuit. Is to provide a motor driving method for realizing the above.
本発明の他の目的は、 絶縁ゲ一ト型トランジスタによりアナログ回路を構成す る上で最適なモータ駆動方法を提供し、 製造コストの低減とシステムの小型化を 実現することである。  Another object of the present invention is to provide a method of driving a motor which is optimal for forming an analog circuit by using insulated gate transistors, thereby realizing a reduction in manufacturing cost and a reduction in system size.
上記目的は、 モータに発生した誘起電圧をフィルタを通して検出し、 その波形 を整形、 増幅することにより 3相正弦波を形成し、 さらにその 3相正弦波を PW M化させてプリッジ回路を駆動し、 正弦波状の出力電流でモータを回転させるこ とで達成される。 また、 ブリッジ回路の各出力に電流検出手段を設け、 検出結果 を入力に帰還させ、 出力電流をしぼりこみ、 モータにおいて発生する誘起電圧を 検出するようにしてもよい。 The purpose is to detect the induced voltage generated in the motor through a filter, shape and amplify the waveform to form a three-phase sine wave, and then convert the three-phase sine wave to PWM to drive the bridge circuit. Rotating the motor with a sinusoidal output current And is achieved with. Also, current detection means may be provided at each output of the bridge circuit, the detection result may be fed back to the input, the output current may be squeezed, and the induced voltage generated in the motor may be detected.
上記他の目的は、 フィルタ、 コンパレータ等をスィッチトキャパシタ技術によ り構成することで達成される。 また、 出力回路を絶縁ゲート型で構成し、 PWM 駆動させることによって達成される。  The above and other objects are achieved by configuring a filter, a comparator, and the like by using the switched capacitor technology. It is also achieved by configuring the output circuit with an insulated gate type and driving it by PWM.
モータからの誘起電圧をフィルタを通して検出し、 その波形を振幅制御するこ とで 3相正弦波を形成する手段により、 特別な検出器や記憶素子、 制御回路が不 要となり、 また、 PWMを使った正弦波電流でモータを駆動することにより電源 の消費電力と 3相切り替わりノイズの低減が可能となる。  By means of detecting the induced voltage from the motor through a filter and controlling the amplitude of the waveform to form a three-phase sine wave, no special detector, storage element, or control circuit is required. By driving the motor with the sinusoidal current, the power consumption of the power supply and the three-phase switching noise can be reduced.
さらに、 スィッチトキャパシタ技術の導入により、 フィルタのワンチップ化と アナログ回路のオフセット電圧の低減が可能となり、 出力回路を絶縁ゲート型と することにより、 バイポーラトランジスタよりも高速 PWM駆動が可能となる。 図面の簡単な説明  Furthermore, the introduction of switched-capacitor technology makes it possible to use a one-chip filter and reduce the offset voltage of analog circuits. By using an insulated gate output circuit, higher-speed PWM driving than bipolar transistors is possible. BRIEF DESCRIPTION OF THE FIGURES
第 1図は本発明の第一の実施例による 3相モータ駆動システムのプロック図で あな o  FIG. 1 is a block diagram of a three-phase motor drive system according to a first embodiment of the present invention.
第 2図は本発明の第二の実施例による 2 . 5インチハードディスク ドライブ用 のスピンドルモータの駆動システムのブロック図である。  FIG. 2 is a block diagram of a drive system of a spindle motor for a 2.5-inch hard disk drive according to a second embodiment of the present invention.
第 3 a図および第 3 b図は本発明の第二の実施例におけるフィルタの回路図で ある。  FIGS. 3a and 3b are circuit diagrams of a filter according to the second embodiment of the present invention.
第 4図は正弦波振幅制御部の構成図である。  FIG. 4 is a configuration diagram of a sine wave amplitude control unit.
第 5 a図および第 5 b図はサンプルホールド型コンパレータの回路図およびそ の動作タイミング図である。  FIGS. 5a and 5b are a circuit diagram of a sample-and-hold type comparator and an operation timing diagram thereof.
第 6図は本発明の第二の実施例におけるコンパレータの入出力特性図である。 第 7 a図および第 7 b図は本発明の第二の実施例における貫通電流防止回路の 図およびその動作説明図である。  FIG. 6 is an input / output characteristic diagram of a comparator according to the second embodiment of the present invention. FIGS. 7a and 7b are a diagram of a through current prevention circuit according to a second embodiment of the present invention and an explanatory diagram of its operation.
第 8 a図〜第 8 c図は本発明の第二の実施例における出力電流波形図である。 第 9 a図および第 9 b図は本発明の第二の実施例において得られる効果を示す 図である。 D 、 第 1 0図は本発明の第三の実施例による 3相モータ駆動システムのブロック図 である。 8a to 8c are output current waveform diagrams in the second embodiment of the present invention. FIGS. 9a and 9b are diagrams showing the effect obtained in the second embodiment of the present invention. D, FIG. 10 is a block diagram of a three-phase motor drive system according to a third embodiment of the present invention.
第 1 1図は本発明の第三の実施例における正弦波 P WM信号作成のための具体 的な回路図である。  FIG. 11 is a specific circuit diagram for creating a sine wave PWM signal in the third embodiment of the present invention.
第 1 2図は本発明の第三の実施例におけるオフセットによる効果を示す図であ る。  FIG. 12 is a diagram showing the effect of the offset in the third embodiment of the present invention.
第 1 3図は本発明の第四の実施例による 3相モータ駆動システムのブロック図 ? る。  FIG. 13 is a block diagram of a three-phase motor drive system according to a fourth embodiment of the present invention.
第 1 4図は本発明の第五の実施例による 3相モータ駆動システムのプロック図 である。  FIG. 14 is a block diagram of a three-phase motor drive system according to a fifth embodiment of the present invention.
第 1 5図は本発明の第五の実施例の 3相モータ駆動システムの一部分の詳細を 示す図である。  FIG. 15 is a diagram showing details of a part of a three-phase motor drive system according to a fifth embodiment of the present invention.
第 1 6図は本発明の第六の実施例による 3相モータ駆動システムのプロック図 乙"あ 。  FIG. 16 is a block diagram of a three-phase motor drive system according to a sixth embodiment of the present invention.
第 1 7図は本発明の第六の実施例による 3相モータ駆動システムの詳細回路図 乙"あ 。  FIG. 17 is a detailed circuit diagram of a three-phase motor drive system according to a sixth embodiment of the present invention.
第 1 8図は本発明の第六の実施例におけるカレントミラーのスィツチング特性 図である。  FIG. 18 is a diagram showing switching characteristics of a current mirror according to the sixth embodiment of the present invention.
第 1 9図は本発明の第六の実施例における PWM駆動のタイミ ングチャートで ある。  FIG. 19 is a timing chart of the PWM drive in the sixth embodiment of the present invention.
第 2 0図は本発明の第六の実施例における出力電流波形図である。  FIG. 20 is an output current waveform diagram in the sixth embodiment of the present invention.
発明を実施するための最良の形態 BEST MODE FOR CARRYING OUT THE INVENTION
以下、 本発明の第一の実施例を第 1図により説明する。 本発明の代表的実施例 である 3相モータ駆動システムのブロック図を、 第 1図に示す。 参照番号 1は U、 V、 W相からなる 3相モータ、 2から 7は出力用トランジスタから構成される各 相の上アームと下アーム、 8はモータ駆動のための電源、 9は各相の出力電圧、 1 0はモータにおいて発生する誘起電圧を出力電圧から取り出すための低域通過 フィルタ、 1 1は各相の誘起電圧、 1 2は誘起電圧をモータ駆動用の正弦波にす るための振幅制御部、 1 3は正弦波をパルス幅変調 （Pu l se Wi d th Modu lat i on； PWM) するための三角波 （または鋸波） キャリア、 1 4は誘起電圧からモータ の回転状態を検出する回転速度検出部、 1 5は回転速度検出部 1 4の検出信号か らモータの回転数を判断し、 加速、 または減速の指令を出すためのマイクロプロ セッサまたは速度エラー検出回路、 1 6から 1 8が振幅制御部 1 2の正弦波を三 角波 PWMキャリア 1 3でパルスに変換し、 各アーム 2 〜 7を駆動するパルス発 生部である。 本システムの特徵は、 正弦波 PWM信号でプリッジ回路をオン、 ォ フさせることによりモータを駆動するシステムを有し、 そのモータのセンサレス 化を可能としたことにある。 そのポイントは、 部材 9から 1 2の構成において、 誘起電圧を被 PWM正弦波に活用するための波形検出、 整形手段を設けたことで ある。 Hereinafter, a first embodiment of the present invention will be described with reference to FIG. FIG. 1 shows a block diagram of a three-phase motor drive system which is a typical embodiment of the present invention. Reference number 1 is a three-phase motor consisting of U, V, and W phases, 2 to 7 are upper and lower arms of each phase composed of output transistors, 8 is a power supply for driving the motor, and 9 is a power supply for each phase. Output voltage, 10 is a low-pass filter for extracting the induced voltage generated in the motor from the output voltage, 11 is the induced voltage of each phase, and 12 is the converted voltage to make the induced voltage a sine wave for driving the motor. The amplitude control unit 13 performs pulse width modulation of a sine wave (Pulse Width Modulation); A triangular (or sawtooth) carrier for PWM), 14 is a rotational speed detector that detects the motor rotation state from the induced voltage, and 15 is the motor speed from the rotational speed detector 14 detection signal. Microprocessor or speed error detection circuit to judge and issue acceleration or deceleration command, 16 to 18 convert sine wave of amplitude control unit 12 to pulse with triangular wave PWM carrier 13 and It is a pulse generator that drives each arm 2-7. A special feature of this system is that it has a system that drives a motor by turning on and off a bridge circuit with a sine wave PWM signal, making it possible to make the motor sensorless. The point is that, in the configuration of the members 9 to 12, a waveform detecting and shaping means for utilizing the induced voltage for the PWM sine wave is provided.
本発明のさらに具体的な第二の実施例を、 第 2図により説明する。 第 2図は 2 . 5ィンチハードディスクドライブ用のスピンドルモータを駆動するシステムのブ ロック図である。 このモータはセンサレスのブラシレス直流モータであり、 定格 電源電圧 5 V、 1相毎の内部抵抗が 1 . 9 Ω、 コイルのイングクタンスが 0 . 2 mHである。 また本システムは、 モータドライブ回路をワンチップにした集積回 路 3 0 0と外部のマイクロプロセッサ 1 5により構成されている。 第 2図におい て、 参照番号 1 9から 2 4は絶縁ゲート型電界効果トランジスタ （以下  A more specific second embodiment of the present invention will be described with reference to FIG. FIG. 2 is a block diagram of a system for driving a spindle motor for a 2.5-inch hard disk drive. This motor is a sensorless brushless DC motor with a rated power supply voltage of 5 V, an internal resistance per phase of 1.9 Ω, and a coil inductance of 0.2 mH. Further, the present system is composed of an integrated circuit 300 having a one-chip motor drive circuit and an external microprocessor 15. In FIG. 2, reference numerals 19 to 24 are insulated gate field effect transistors (hereinafter referred to as “insulated gate field effect transistors”).
MO S F E T) による上アームと下アームであり、 上アームがドレイン耐圧一 1 5 V、 オン抵抗 1 5 Ο πι Ωの Pチャネルトランジスタ、 下アームがドレイン耐圧 1 5 V、 オン抵抗 1 5 Ο ιπ Ωの Νチャネルトランジスタとなっている。 また、 2 5から 2 7は正弦波と三角波を PWM信号に変調させるためのコンパレータ、 2 8から 3 0は上アームと下アームが同時にオン状態になり電源からアースへ貫通 電流が発生するのを防止するための貫通電流防止回路である。 出力素子として M O S F E Tを用いたのは、 低抵抗にしゃすいためと、 スイッチングスピードが バイポーラトランジスタに比べて速く、 しかもソース、 ドレイン間に内蔵ダイォ ードを有しており PWM駆動に適しているからである。 従って、 抵抗やスピード を要求しない場合や外付けのダイオードが使用可能な場合には、 バイポーラトラ ンジス夕を用いても良い。 また、 上アームを Ρチャネルにしたのは、 ゲート電極 に印加する駆動用パルスの最大値を電源電圧以上に昇圧する必要が Ρチャネルで はないからである。 ブースタなど昇圧回路の使用が可能な場合には、 上下とも N チャネルとすることができる。 MO SFET), an upper arm and a lower arm.The upper arm is a P-channel transistor with a drain withstand voltage of 15 V and an on-resistance of 15 Ο πι Ω. This is a Ν channel transistor. Also, 25 to 27 are comparators for modulating sine and triangular waves into PWM signals, and 28 to 30 are for the upper and lower arms to be turned on at the same time, causing a through current from the power supply to ground. This is a through current prevention circuit for preventing such a situation. MOSFETs are used as output elements because of their low resistance and high switching speed compared to bipolar transistors, and because they have a built-in diode between source and drain, they are suitable for PWM drive. It is. Therefore, when no resistance or speed is required, or when an external diode can be used, a bipolar transistor may be used. In addition, the reason why the upper arm is set to the Ρ channel is that it is necessary to boost the maximum value of the driving pulse applied to the gate electrode to the power supply voltage or more. Because there is no. If a booster circuit such as a booster can be used, both upper and lower channels can be used.
誘起電圧はコンデンサと抵抗で構成されたフィルタ 1 0で出力電圧から取り出 すことができ、 振幅制御回路 1 2と位相検出回路 1 4に入力される。 このフィノレ タは、 各出力電圧から PWMのキャリア周波数 1 0 0 k H zを取り除き 2 4 0 H zの誘起電圧のみ取り出す、 いわゆる低域通過フィルタであり、 カッ トオフ周 波数 f cut 力 2 k H z程度となるように第 3 a図のコンデンサと抵抗の値を選択 している （f cut = 1 / ( 2 TT R C ) ：) 。 これにより取り出された誘起電圧は f cut に比べて 1 Z 1 0の周波数であるのでフィルタによる位相ずれはほとんど 生じず、 この位相のまま振幅を制御するだけでブリッジ回路を駆動することがで きる。 しかし、 このフィルタの形態では非常に大きなコンデンサと抵抗の値が必 要となり、 半導体チップにワンチップ化するには現実的ではない。 従って、 第 3 b図に示すようなスィツチト ·キャパシタ技術を用いて抵抗をコンデンサに置き 換え、 S W 1、 2を交互にオン、 オフすることにより、 小さな素子面積で所望の 特性を実現している。 続いて、 回転速度検出回路 1 4において、 誘起電圧の周波 数に比例した矩形波パルスが形成され、 外部のマイクロプロセッサ 1 5において、 この矩形波パルスのパルス幅が基準パルスによりカウン卜される。 このカウント 数が目標とするモータ回転数に対応したカウント数よりも少ない場合、 マイクロ プロセッサ 1 5から振幅制御回路 1 2に加速命令が出され、 正弦波の振幅を大き くさせる。 反対に、 カウント数が多い場合には減速命令が出され、 振幅を小さく させる。 ここで参照番号 1 2は、 誘起電圧から得られた正弦波の振幅制御部であ り、 その構成を第 4図に示す。 外部のマイクロプロセッサ 1 5からの速度エラー 信号 2 0 0を受けて、 振幅制御信号 2 0 2に変換するチャージポンプ、 または D Z A変換器 2 0 1と、 その振幅制御信号 2 0 2に従って 2 0 3から 2 0 5のオペ ァンプのゲインを調節して正弦波の振幅を制御するゲイン制御部により構成され る。 ここで用いているオペアンプは、 M O S F E Tの差動増幅回路により構成さ れており、 差動対を対称形にレイァゥ卜する方法 （コモンセントロイド） を用い て各相のオフセッ ト電圧の差を最小としている。  The induced voltage can be extracted from the output voltage by the filter 10 composed of a capacitor and a resistor, and is input to the amplitude control circuit 12 and the phase detection circuit 14. This finalizer is a so-called low-pass filter that removes the PWM carrier frequency 100 kHz from each output voltage and extracts only the 240 Hz induced voltage, and has a cutoff frequency f cut force of 2 kHz. The values of the capacitor and resistor in Fig. 3a are selected so that they are about z (f cut = 1 / (2TTRC) :). As a result, the induced voltage has a frequency of 1 Z 10 compared to f cut, so there is almost no phase shift due to the filter, and the bridge circuit can be driven simply by controlling the amplitude with this phase. . However, this form of filter requires very large capacitor and resistance values, which is not practical for a single semiconductor chip. Therefore, the desired characteristics are realized with a small element area by replacing the resistor with a capacitor using the switch-capacitor technology as shown in Fig. 3b and turning on and off SW1 and 2 alternately. . Subsequently, a rectangular pulse proportional to the frequency of the induced voltage is formed in the rotation speed detecting circuit 14, and the pulse width of the rectangular pulse is counted by the external microprocessor 15 by the reference pulse. If this count is smaller than the count corresponding to the target motor speed, an acceleration command is issued from the microprocessor 15 to the amplitude control circuit 12 to increase the amplitude of the sine wave. Conversely, if the number of counts is large, a deceleration command is issued to reduce the amplitude. Here, reference numeral 12 denotes a sine wave amplitude control unit obtained from the induced voltage, and its configuration is shown in FIG. Charge pump or DZA converter 201 that receives speed error signal 200 from external microprocessor 15 and converts it into amplitude control signal 202, and 203 according to its amplitude control signal 202 And a gain control unit that controls the amplitude of the sine wave by adjusting the gain of the operational amplifier. The operational amplifier used here is composed of a differential amplifier circuit of MOSFET, and the difference in offset voltage of each phase is minimized by using a method of symmetrically laying out differential pairs (common centroid). And
振幅制御回路 1 2において増幅された正弦波は、 第 2図のコンパレータ 2 5 ~ 27において PWMキャリアと比較される。 このコンパレータについてもオフセ ッ ト電圧の影響があるため、 コモンセントロイ ドを用いることが考えられる力、'、 ここではさらにオフセッ ト電圧を低減することが可能なサンプルホールド型のコ ンパレータを用いた。 第 5 a図は、 そのサンプルホールド型コンパレータの簡略 化した回路図であり、 第 5 b図はそのスィッチ動作のタイミングである。 また、 参照番号 2 1 2は CMOSのインバー夕であり、 2 1 3はラッチ回路である。 こ のスィッチには数 MH z程度の高速パルスが必要とされるが、 ここではマイク口 プロセッサのクロックを利用している。 本回路では、 サンプリングの間、 インバ ータの出力信号が論理しき L、値電圧であるため、 ホールドによる比較結果を維持 するためのラッチ回路 2 1 3が必要となる。 以上に述べた技術を使うことで、 MOSFETによるアナ口グ回路の使用が可能となつた。 The sine wave amplified in the amplitude control circuit 12 is compared with the comparators 25 to At 27, it is compared with the PWM carrier. Since this comparator is also affected by the offset voltage, the use of a common centroid is considered to be possible.In this example, a sample-and-hold type comparator that can further reduce the offset voltage was used. . FIG. 5a is a simplified circuit diagram of the sample and hold type comparator, and FIG. 5b is the timing of the switch operation. Also, reference numeral 2 12 is a CMOS inverter, and 2 13 is a latch circuit. This switch requires a high-speed pulse of about several MHz, but in this case, the clock of the microphone processor is used. In this circuit, during sampling, since the output signal of the inverter is a logic low and a value voltage, a latch circuit 213 is required to maintain the comparison result by the hold. By using the technology described above, it has become possible to use an analog circuit with a MOSFET.
コンパレータ 2 5〜27における入出力特性を第 6図に示す。 第 6図において、 3 1から 3 3は誘起電圧を振幅制御して作られた各相の正弦波を示し、 周波数 2 4 0Hz、 中心電位 VM = 2. 5 V、 最大値 VH = 3. 5 、 最小値¥し = 1. 5 Vとなっている。 また、 1 3は周波数 1 0 0 kHz、 最大値 VH c = 4. 5 V、 最小値 VL c = 0. 5 Vの三角波キャリア、 3 5から 3 7はコンパレートされた PWM信号を示す。 コンパレータでは、 三角波よりも正弦波の大きさが大きい場 合のみ出力電圧が" H=電源電圧 (5 V) " となりそれ以下の場合は" L=下ァ ームのソース電位 （0) " となるように設定してあり、 PWM信号は、 三角波と 同じ周波数で正弦波の大きさに比例した d u t yの矩形波となっている。 この PWM信号により、 各アーム 1 9〜2 4を駆動する。 すなわち、 U相用 PWM信 号 34により U相用上、 下アーム 1 9、 2 0を、 V相用 PWM信号 3 5により V 相用上、 下アーム 2 1、 2 2を、 W相用 PWM信号 3 6により W相用上、 下ァ一 ム 2 3、 2 4をそれぞれ駆動する。 しかし、 このままでは上、 下アームのオン、 オフ切り替わり時に出力に貫通電流が発生するため、 その防止のために貫通電流 防止回路 2 8〜3 0が設けられている。 貫通電流防止回路の一例を、 第 7 a図に 示す。 第 7 a図には、 U相における貫通電流防止回路が示されており、 参照番号FIG. 6 shows the input / output characteristics of the comparators 25 to 27. In FIG. 6, 3 1 to 3 3 indicate sine waves of each phase generated by controlling the amplitude of the induced voltage, with a frequency of 240 Hz, a central potential V M = 2.5 V, and a maximum value V H = 3. 5. The minimum value is 1.5 V. Further, 1 3 shows frequency 1 0 0 kHz, the maximum value V H c = 4. 5 V, the minimum value V L c = 0. 5 V triangular wave carrier, the PWM signal from the 3 5 3 7 which is comparator . In the comparator, the output voltage becomes "H = power supply voltage (5 V)" only when the magnitude of the sine wave is larger than the triangular wave, and "L = source potential of the lower arm (0)" when it is lower than that. The PWM signal is a rectangular wave with the same frequency as the triangular wave and a duty proportional to the size of the sine wave. The arms 19 to 24 are driven by this PWM signal. In other words, the upper and lower arms 19 and 20 for the U phase are controlled by the U-phase PWM signal 34, and the upper and lower arms 21 and 22 for the V phase are controlled by the PWM signal 35 for the V phase. The upper and lower arms 23, 24 for the W phase are driven by the signal 36. However, in this state, a through current is generated in the output when the upper and lower arms are switched on and off. Therefore, through current prevention circuits 28 to 30 are provided to prevent the through current. An example of a through current prevention circuit is shown in FIG. 7a. FIG. 7a shows a through current prevention circuit in the U phase,
3 7はスィッチ SWし 3 8はスィッチSW2、 3 9は Pチャネルトランジスタ 2のゲート容量 4 1から電荷を放電させるための抵抗、 4 0は Nチャネルトラン O 6/05650 g 37 is a switch SW, 38 is a switch SW2, 39 is a resistor for discharging charge from the gate capacitance 41 of the P-channel transistor 2, and 40 is an N-channel transistor. O 6/05650 g
ジスタ 3のゲート容量 4 2に電荷を充電させるための抵抗である。 入力のインバ 一夕は各ゲート容量 4 1、 4 2を充分に充放電させる能力を持っている。 正弦波 PWM信号4 3カく" じ の時、 スィッチ 3 7はオン、 スィッチ 3 8はオフとなり、 反対に 4 3力、'" H" の時、 それぞれオフ、 オンとなる。 この回路の動作を、 第 7 b図により説明する。 正弦波 PWM信号 4 3力、'" L" の場合、 上アームでは抵抗 を介さずにゲート容量 4 1に高速に充電が行われ、 下アームでは抵抗 4 0とゲー ト容量 4 2の時定数に従って充電が行われる。 逆に、 正弦波 PWM信号 4 3力、'" H" の場合、 上アームでは抵抗 3 9とゲート容量 4 1の時定数に従って放電がお こり、 下アームでは抵抗を介さずにゲート容量 4 2から高速に放電が行われる。 この動作により、 ゲート電圧 4 4は立下りで、 4 5は立上りで遅延時間を持つこ とになり、 これにより トランジスタ 2、 3のオンが遅れ、 貫通電流を防止するこ とが可能となる。 本実施例では、 C R時定数が 0 . 5 あれば充分であり、 ゲ ート容量 4 1、 4 2がそれぞれ2 11 ?、 1 n Fであるから、 抵抗 3 9、 4 0はそ れぞれ 2 5 0 Ω、 5 0 0 Ωとなった。 This is a resistor for charging the gate capacitance 42 of the transistor 3 with electric charge. The input inverter has the ability to charge and discharge the gate capacitances 41 and 42 sufficiently. When the sine wave PWM signal is 43, the switch 37 is turned on and the switch 38 is turned off. Conversely, when the signal is "H", the switch is turned off and on. In Figure 7b, the sine wave PWM signal 4 3 In the case of “L”, the upper arm charges the gate capacitor 41 at high speed without the resistor and the lower arm Charging is performed according to the time constant of 0 and the gate capacitance 42. Conversely, when the sine wave PWM signal 43 is "H", the upper arm discharges according to the time constant of the resistor 39 and the gate capacitance 41. As a result, the lower arm discharges at a high speed from the gate capacitance 42 without the intervention of a resistor, which causes the gate voltage 44 to fall and the gate voltage 45 to rise and have a delay time. This delays the turn-on of the transistors 2 and 3, which makes it possible to prevent shoot-through current. It is sufficient if the CR time constant is 0.5. Since the gate capacitances 41 and 42 are 211? And 1 nF, respectively, the resistors 39 and 40 are 25 0 Ω and 500 Ω.
本発明の第二の実施例における出力電流波形を、 第 8図に示す。 4 6、 4 7、 FIG. 8 shows an output current waveform according to the second embodiment of the present invention. 4 6, 4 7,
4 8はそれぞれ U、 V、 W相の正弦波信号であり、 4 9、 5 0、 5 1は出力電流、4 8 are sine wave signals of U, V and W phases, respectively, 49, 50 and 51 are output currents,
5 2、 5 3、 5 4は誘起電圧である。 各相の出力電流は以下の電流成分により構 成される。 52, 53, and 54 are induced voltages. The output current of each phase is composed of the following current components.
1 ) 上アームのトランジスタを通って電源からモータのコイルへと供給される 電流、  1) The current supplied from the power supply to the motor coil through the upper arm transistor,
2 ) 下アームのトランジシタ、 またはソース、 ドレイン間の寄生ダイオードを 通ってアースからモータへ供給される電流、  2) The current supplied from the ground to the motor through the lower arm's transistor or the parasitic diode between the source and drain,
3 ) 下アームのトランジスタを通ってモータのコイルからアースへと流れ込む 電流、  3) The current flowing from the motor coil to the ground through the transistor in the lower arm,
4 ) 上アームのトランジシ夕、 またはドレイン、 ソース間の寄生ダイオードを 通ってモータから電源へ流れ込む電流。  4) The current flowing from the motor to the power supply through the upper arm transition or through the parasitic diode between the drain and source.
各アームのオン、 オフのタイミングにより上記 1 ) から 4 ) の組合せが決まり、 出力電流はジグザグ状の波形となる。 実際に電源の消費電流として考える必要が あるのは上記 1 ) と 3 ) の組み合わせであり、 この消費電力は P WMを行わない 通常のリニア駆動の場合に比べて、 非常に小さい。 また、 PWMのキャリア周波 数を高くすることで、 出力電流のジグザグは無視できる。 従って、 出力電流はほ ぼ正弦波とみなすことができ、 モータコイルにおいて発生する L · d i Z d tの 電磁ノィズを小さくすることができる。 The combination of the above 1) to 4) is determined by the on / off timing of each arm, and the output current has a zigzag waveform. What actually needs to be considered as the current consumption of the power supply is the combination of 1) and 3) above, and this power consumption does not perform PWM. Very small compared to normal linear drive. Also, by increasing the PWM carrier frequency, the output current zigzag can be ignored. Therefore, the output current can be regarded as almost a sine wave, and the electromagnetic noise of L · diZdt generated in the motor coil can be reduced.
本実施例の効果を、 第 9 a図、 第 9 b図に示した。 これは、 ハードディスクド ライブのスピンドルモータ駆動方式として一般的に行われている矩形波駆動、 矩 形波 PWM駆動と本実施例の電源消費電力と電磁ノイズ ·スぺク トルの比較を行 つたものである。 第 9 a図が電源消費電力のキャリア周波数依存性、 第 9 b図が 出力電流の周波数スぺク トル比較を示す。 第 9 a図において、 矩形波リニア駆動 はキャリア周波数とは無関係であるので、 この方式の特性を比較の基準とした。 消費電力比は、 本実施例、 矩形波 PWM駆動とも、 キャリア周波数によって変化 はなく、 リニア駆動に比べると、 0 . 4以下と小さくなつている。 一方、 第 9 b 図のスぺクトルについては、 相切り替わり周波数 2 0 0 H zの高調波成分が現わ れるが、 本実施例の高調波成分の電圧レベルが最も小さく、 他に比べて電磁ノィ ズが低いことを示している。 以上の技術により、 消費電力をリニア駆動に比べて 小さく し、 かつ電磁ノイズの小さい駆動を行うことが可能となった。  The effects of this embodiment are shown in FIGS. 9a and 9b. This is a comparison of the square wave drive and the square wave PWM drive, which are generally used as the spindle motor drive system of a hard disk drive, with the power consumption and the electromagnetic noise and spectrum of this embodiment. It is. Fig. 9a shows the dependence of the power consumption on the carrier frequency, and Fig. 9b shows the frequency spectrum comparison of the output current. In Fig. 9a, the rectangular wave linear drive is independent of the carrier frequency, so the characteristics of this method were used as a reference for comparison. The power consumption ratio does not change with the carrier frequency in both the present embodiment and the rectangular wave PWM drive, and is smaller than 0.4 as compared with the linear drive. On the other hand, in the spectrum of FIG. 9b, a harmonic component of the phase switching frequency of 200 Hz appears, but the voltage level of the harmonic component of the present embodiment is the smallest, and the electromagnetic level is lower than the others. This indicates that the noise is low. With the technology described above, it has become possible to reduce power consumption compared to linear driving and to perform driving with low electromagnetic noise.
本実施例では、 バイポーラトランジスタ回路を使用せず、 MO S F E T回路によ り集積回路を構成した。 これは、 PWM駆動によって M O S F E Tの長所を活か すことができ、 またコモンセントロイ ドのレイァゥ卜ゃスィツチトキャパシタ技 術の使用により MO Sアナログ回路の使用が可能となったことによる。 従って、 本発明はモータ駆動用集積回路のオール M 0 Sの上で最適な回路構成をとってい ると言える。 本実施例ではオール MO S化により製造プロセス力〈簡略化され、 従 来のバイポーラ併用に比べて約 3 0 %の製造コス卜の削減が可能となった。 In the present embodiment, the integrated circuit is constituted by the MOS FET circuit without using the bipolar transistor circuit. This is because the advantage of MOS FET can be utilized by the PWM drive, and the use of the MOSC analog circuit has been made possible by using the common-centroid layout switch capacitor technology. Therefore, it can be said that the present invention has an optimal circuit configuration on all M0S of the motor driving integrated circuit. In this embodiment, the production process power was simplified by the use of all MOS, and the production cost was reduced by about 30% as compared with the conventional bipolar use.
本発明の第三の実施例を、 第 1 0図により説明する。 本発明の代表的実施例で ある 3相モータ駆動システムのブロック図を、 第 1 0図に示す。 本実施例と前記 の第二の実施例との違いは、 第二の実施例では正弦波 PWM信号の作成後に貫通 電流防止の操作を行つたのに対し、 本実施例では正弦波 P WM信号作成と同時に 行うことである。 そのポイントは、 上、 下アーム用の PWM信号を別々に作成し、 作成時の三角波キヤリアの中心電位を正弦波の中心電位から上下にオフセッ 卜さ せることである。 これにより、 オフセッ トの大きさによって上下の正弦波 PWM 信号の d u t yを微妙に変えられ、 結果的に上下トランジスタのオンタイミング の遅延を作ることができる。 第 1 0図において、 参照番号 1 0 0から 1 0 5はコ ンパレータ、 1 0 6、 1 0 7は三角波キャリアのオフセッ ト回路、 1 0 8、 1 0 9はインバー夕である。 この場合の正弦波 PWM信号作成の具体的な回路を第 1 1図に、 オフセッ トによる効果を第 1 2図に示した。 第 1 1図、 第 1 2図とも、 1相のみについて説明している。 第 1 1図において、 オフセッ ト回路 1 0 6、 1 0 7はオペアンプと抵抗 Rの組合せで構成されており、 上アームの場合にはオペ アンプの一端に中点電位 VM + Vなを、 下アームの場合にはオペアンプの一端に 中点電位 VM — V aを入力する。 これにより三角波は上下にシフトし、 第 1 2図 に示すように、 正弦波 PWM信号は上下で異なるものとなり、 t dの遅延時間を 作ることができる。 本実施例では前記の第二の実施例に比べてコンパレ一夕の数 が増えるが、 PWM信号がなまらないので出力トランジスタのスィツチング損失 を小さくできる。 A third embodiment of the present invention will be described with reference to FIG. FIG. 10 shows a block diagram of a three-phase motor drive system which is a typical embodiment of the present invention. The difference between this embodiment and the above-described second embodiment is that, in the second embodiment, the operation of preventing a through current was performed after the generation of the sine-wave PWM signal, whereas in this embodiment, the generation of the sine-wave PWM signal was performed. At the same time. The point is that the PWM signals for the upper and lower arms are created separately, and the center potential of the triangular wave carrier at the time of creation is offset up and down from the center potential of the sine wave. It is to let. Thus, the duty of the upper and lower sine wave PWM signals can be changed slightly depending on the magnitude of the offset, and as a result, the delay of the on timing of the upper and lower transistors can be made. In FIG. 10, reference numerals 100 to 105 denote comparators, 106 and 107 denote triangular wave carrier offset circuits, and 108 and 109 denote inverters. FIG. 11 shows a specific circuit for creating a sine wave PWM signal in this case, and FIG. 12 shows the effect of the offset. FIGS. 11 and 12 illustrate only one phase. In FIG. 11, offset circuits 106 and 107 are composed of a combination of an operational amplifier and a resistor R. In the case of the upper arm, the midpoint potential V M + V is applied to one end of the operational amplifier. In the case of the lower arm, input the midpoint potential V M — Va to one end of the operational amplifier. As a result, the triangular wave shifts up and down, and as shown in FIG. 12, the sine wave PWM signal becomes different between the upper and lower sides, thereby creating a delay time of td. In this embodiment, the number of comparisons is increased as compared with the second embodiment, but the switching loss of the output transistor can be reduced because the PWM signal is not blunt.
本発明の第四の実施例を、 第 1 3図により説明する。 第 1 3図は、 本発明の第 一の実施例である 3相モータ駆動システムに電流検出、 制御機能を加え閉ループ 制御とした場合のブロック図である。 参照番号 5 5は出力電流に比例したプリッ ジ回路の電流和を検出するための電流検出部、 5 6は検出信号である。 ここで 5 5は外付けの高精度な抵抗を用いている。 この技術を使って、 出力電流レベルを 入力にフィードバックし、 マイクロプロッセッサからの制御命令との比較から正 弦波の増幅レベルを制御することにより、 出力電流を精度良く一定値にすること が可能となり、 回転速度の変動を抑えることが可能となった。  A fourth embodiment of the present invention will be described with reference to FIG. FIG. 13 is a block diagram of a three-phase motor drive system according to a first embodiment of the present invention in which current detection and control functions are added to perform closed-loop control. Reference numeral 55 denotes a current detection unit for detecting the sum of currents of the plunger circuit in proportion to the output current, and 56 denotes a detection signal. Here, 55 uses an external high-precision resistor. Using this technology, the output current level can be fed back to the input, and the sine wave amplification level can be controlled by comparing it with the control command from the microprocessor, making it possible to accurately set the output current to a constant value. It became possible to suppress the fluctuation of the rotation speed.
本発明の全ての実施例において、 原則として、 正弦波 P WM信号の最大電圧は 電源電圧に、 最小電圧は下アームのソース電圧に等しく しているが例外がある。 それは、 電源電圧が出力トランジスタの許容入力電圧よりも高い場合である。 こ の場合には、 トランジスタの許容値を上げるよう構造で工夫する力、 （例えば、 絶 縁ゲート型であればゲート酸化膜を厚くする） 、 P WM信号の電圧値を下げるこ とが必要となる。 また、 本実施例ではマイクロプロセッサは別チップとなってい るが、 さらに集積化の要求があればこれも含めてワンチップとすることもできる。 ここでは、 ハードディスク ドライブ用スピンドルモータの駆動を示したが、 同様 のモータを用いた応用分野 （例えば、 フロッピーディスクドライブや光磁気ディ スクドライブ装置） への適用も当然可能である。 In all embodiments of the present invention, in principle, the maximum voltage of the sine wave PWM signal is equal to the power supply voltage, and the minimum voltage is equal to the source voltage of the lower arm, with exceptions. That is when the power supply voltage is higher than the allowable input voltage of the output transistor. In this case, it is necessary to devise the structure to increase the allowable value of the transistor (for example, to increase the thickness of the gate oxide film in the case of the isolated gate type), and to reduce the voltage value of the PWM signal. Become. Further, in this embodiment, the microprocessor is a separate chip, but if there is a demand for further integration, it can also be a single chip. Although the drive of a spindle motor for a hard disk drive has been described here, it is naturally possible to apply the present invention to an application field using a similar motor (eg, a floppy disk drive or a magneto-optical disk drive).
本発明の第五の実施例を、 第 1 4図を用いて説明する。 第 1 4図は、 各相の出 力電流を検出して入力にフィードバックすることにより、 出力電流の制御と誘起 電圧の検出を可能とする方式のブロック図である。 第 1 4図において、 参照番号 3 0 1から 3 0 3は出力電流検出手段、 3 0 4から 3 0 6は出力電流検出結果、 3 0 7から 3 0 9は出力電流制御用オペアンプである。 誘起電圧検出手段 3 1 0 により検出された誘起電圧の周波数をもとに、 マイクロプロセッサ 1 5において モータの回転数の加減速が判定され、 この結果にしたがって正弦波振幅制御手段 1 2のゲインを調節する。 正弦波振幅制御手段 1 2から出力された信号が 3 0 7 から 3 0 9のオペアンプに入力され、 出力電流検出結果 3 0 4、 3 0 5、 3 0 6 との比較により、 両者が等しくなるような信号が PWM信号作成手段 1 6、 1 7、 1 8を経て出力の各アームに与えられる。 これにより、 目標とする回転数に最適 な出力電流をモータに与えることが可能となる。  A fifth embodiment of the present invention will be described with reference to FIG. FIG. 14 is a block diagram of a method of detecting an output current of each phase and feeding it back to an input, thereby enabling control of an output current and detection of an induced voltage. In FIG. 14, reference numerals 310 to 303 denote output current detection means, 304 to 310 denote output current detection results, and 307 to 309 denote output current control operational amplifiers. Based on the frequency of the induced voltage detected by the induced voltage detecting means 310, acceleration / deceleration of the motor rotation speed is determined in the microprocessor 15 and the gain of the sine wave amplitude control means 12 is determined according to the result. Adjust. The signal output from the sine wave amplitude control means 1 2 is input to the operational amplifiers 3 0 7 to 3 0 9, and the output current detection results 3 0 4, 3 0 5, 3 0 6 Such a signal is applied to each output arm via the PWM signal generating means 16, 17, 18. This makes it possible to provide the motor with the optimum output current for the target rotation speed.
本発明のさらに具体的な実施例を、 第 1 5図を用いて説明する。 第 1 5図は、 第 1 4図の電流検出手段として抵抗を用いた場合のブロック図である。 第 1 5図 では、 図が複雑になるのを避けるために U相の回路のみ示しているが、 他相も U 相と同様な形式となる。 参照番号 1は 3 . 5インチハードディスク ドライブ装置 用スピンドルモータ （相間イングクタンス 3 m H、 相間抵抗 6 . 6 Ω、 極数 8極、 定格回転数 4 5 0 O r. p. m、 定格電圧 1 2 V) 、 1 9、 2 1、 2 3は各相出力回 路の上アームとなる Pチヤネノレ絶縁ゲート型トランジスタ （オン抵抗 1 . 0 Ω ) 、 2 0、 2 2、 2 4は下アームとなる Nチャネル絶縁ゲート型トランジスタ （オン 抵抗し 0 Ω) である。 3 1 1から 3 1 3は各相電流検出用の抵抗 （抵抗値 0 . 1 Ω) 、 3 1 4は検出抵抗 3 1 1における電圧降下を検出するためのオペアンプ、 3 1 5は出力回路を駆動するための駆動回路、 1 3は P WM制御用の鋸波発生回 路 （PWM周波数； 1 5 6 k H z ) である。 電流検出用抵抗として、 ここでは I C外付けの抵抗を使用している力く、 部品点数の削減として、 I Cチップ内蔵抵 抗、 パッケージング時のボンディングワイヤ抵抗などを用いることもできる。 3 A more specific embodiment of the present invention will be described with reference to FIG. FIG. 15 is a block diagram in the case of using a resistor as the current detecting means of FIG. In Fig. 15, only the U-phase circuit is shown to avoid complicating the figure, but the other phases have the same format as the U-phase. Reference number 1 is a spindle motor for a 3.5-inch hard disk drive (interphase inductance 3 mH, interphase resistance 6.6 Ω, number of poles 8, rated rotation speed 450 Orp m, rated voltage 12 V) , 19, 21, 23 are P channel insulated gate transistors (on-resistance 1.0 Ω) that are the upper arm of each phase output circuit, and 20, 22 and 24 are the N channels that are the lower arm It is an insulated gate transistor (on resistance is 0 Ω). 3 1 1 to 3 13 are resistors for detecting the current of each phase (resistance 0.1 Ω), 3 14 is an operational amplifier for detecting the voltage drop in the detection resistor 3 11, and 3 15 is an output circuit. A drive circuit 13 for driving is a sawtooth wave generation circuit (PWM frequency; 156 kHz) for PWM control. As the current detection resistor, a resistor external to the IC is used here, and in order to reduce the number of components, a resistor built in the IC chip and a bonding wire resistance during packaging can be used. Three
ここで、 誘起電圧の検出原理について説明する。 電流検出抵抗 3 1 1により出 力電流を検出し入力に帰還をかけることで、 入力信号に比例した出力電流をコィ ルに流すことができる。 出力電圧の低周波数成分 （PWMのキャリア周波数成分 とその高調波成分を除いたもの） を Vou t、 誘起電圧を Vb emf、 出力電流 を I、 モータにおけるインピーダンスを （r+o L) 、 検出抵抗を Rとすると、 これらは以下の関係で表される。 Here, the principle of detecting the induced voltage will be described. By detecting the output current with the current detection resistor 311 and applying feedback to the input, an output current proportional to the input signal can flow through the coil. The low frequency component of the output voltage (excluding the PWM carrier frequency component and its harmonic components) is Vout, the induced voltage is Vb emf, the output current is I, the impedance at the motor is (r + oL), and the detection resistor is Let R be these, which are expressed by the following relationship.
Vo u t =Vb em f + I - (r +wL) + I · R 式 （1) 式 （1) において、 入力信号を制御することにより出力電流 Iを十分にしぼり 込むと、  Vout = Vbemf + I- (r + wL) + IR Formula (1) In Formula (1), if the output current I is sufficiently reduced by controlling the input signal,
Vb emf > I - (r+wL) + I ' R 式 （2) の関係が得られる。  Vb emf> I-(r + wL) + I'R The relationship of equation (2) is obtained.
従って、 V o u tは次式で近似できる。  Therefore, Vout can be approximated by the following equation.
Vo u ΐ ^Vb emf 式 （3) すなわち、 出力電圧を低域フィルタに通し高調波成分を除去することにより、 誘起電圧 Vb em f の検出が可能となる。  Vo u ΐ ^ Vb emf Equation (3) In other words, the output voltage can be detected by passing the output voltage through a low-pass filter to remove harmonic components.
本発明の第六の実施例を、 第 1 6図により説明する。 第 1 6図は出力回路とし てカレントミラーを用いた場合のモータドライブ方式のプロック図である。 第 1 6図も第 1 5図と同様に、 図が複雑になるのを避けるために U相の回路のみ示し ている。 参照番号 40 1、 402はそれぞれ上、 下アーム用カレントミラ一、 4 03. 404は電流検出手段、 4 05、 406は PWM信号作成手段、 407、 408はカレントミラー 40 1、 402のオン、 オフ用のスィツチ手段、 409 は各相カレントミラーの入力信号を作成する三差動アンプ、 4 1 0は誘起電圧を 三差動アンプ 409への入力信号に整形するマトリクス回路である。 第 1 6図の 出力部を、 第 1 7図において更に詳細に示す。 電流検出手段 404としてコンパ レータ 50 1を使用し、 任意の基準電圧 502との比較により、 出力電流が目標 レベルとなっているかを判定する。 その結果が PWM信号作成手段 406へ伝え られ、 PWM基準周波数のクロック 503との組み合わせにより PWM信号 504が作成される。 この信号 504により、 カレントミラー 402のオン、 ォ フ用のスィツチ 408であるトランジスタ 505のゲ一卜が駆動される。 トラン ジスタ 5 0 5がオンの場合、 三差動アンプ 4 0 9からの制御電流 I 2がカレント ミラ一 4 0 2に入力されないため、 カレントミラー 4 0 2はオフ状態となる。 反 対に、 トランジスタ 5 0 5がオフの場合は、 カレントミラー 4 0 2がオン状態と なる。 ここで、 カレントミラー 4 0 2を構成するトランジスタ 5 0 8と 5 0 9は、 ゲート幅 Ζゲート長の比を 1 : 1 0 0 0程度としている。 たとえば、 5 0 8に流 れる電流が 1 m Aの場合、 出力である 5 0 9には 1 Aが流れる。 これは、 モータ の起動時に必要な電流を小さい入力電流で実現させるための設定である。 A sixth embodiment of the present invention will be described with reference to FIG. FIG. 16 is a block diagram of a motor drive system when a current mirror is used as an output circuit. Like FIG. 15, FIG. 16 shows only the U-phase circuit to avoid complicating the figure. Reference numerals 401 and 402 are current mirrors for the upper and lower arms, respectively. 403.404 is current detection means, 405 and 406 are PWM signal generation means, and 407 and 408 are current mirrors 401 and 402 on and off. 409 is a three-differential amplifier for generating an input signal of each phase current mirror, and 410 is a matrix circuit for shaping the induced voltage into an input signal to the three-differential amplifier 409. The output of FIG. 16 is shown in more detail in FIG. The comparator 501 is used as the current detection means 404, and it is determined whether or not the output current is at the target level by comparison with an arbitrary reference voltage 502. The result is transmitted to the PWM signal generating means 406, and a PWM signal 504 is generated by a combination with the clock 503 of the PWM reference frequency. With this signal 504, the gate of the transistor 505, which is the switch 408 for turning on and off the current mirror 402, is driven. Tran When the register 505 is on, the control current I 2 from the three-differential amplifier 409 is not input to the current mirror 402, so that the current mirror 402 is turned off. On the other hand, when the transistor 505 is off, the current mirror 402 is on. Here, the transistors 508 and 509 forming the current mirror 402 have a ratio of gate width / gate length of about 1: 100. For example, if the current flowing through 508 is 1 mA, 1 A flows through the output 509. This is a setting for realizing the current required when starting the motor with a small input current.
カレントミラーへの入出力電圧、 電流の振る舞いを、 第 1 8図に示す。 第 1 8 図は、 モータを負荷とした場合のカレントミラー 4 0 2の P WM信号 5 0 4、 力 レントミラ一 4 0 2の出力電圧 6 0 1、 そしてモータの 1相に流れる出力電流 6 0 2を示している。 はじめに PWM信号 5 0 4が電源電圧 V c cの間ではカレン トミラーはオフ状態であるため、 出力電圧は V c c付近となり、 出力電流は流れ ない。 次にゲート電圧 6 0 1が零に変わった時、 カレントミラーはオフからオン 状態となり、 出力電圧は一旦、 零付近まで下がる。 この原因は、 負荷がインダク タンスであるので、 出力電流が急に流れ出すことができず、 出力トランジスタが 非飽和領域動作となっているためである。 その後、 出力電圧 6 0 1はわずかに上 昇を始め、 非飽和から飽和領域の動作となる時点で急上昇する。 この間、 出力電 流 6 0 2は、 ほぼ負荷の時定数 RZ Lにしたがって増加する。 そして、 出力電流 がカレントミラ一比で決定されるレベルに到達した時、 出力電圧は一定となる。 再び入力がオフとなると、 イングクタンスに蓄積されたエネルギーを吐き出すた めに、 出力電流は上アームのボディダイオードに流れ込み還流電流となる。 この 時、 出力電圧は瞬間的に電源電圧以上に増加した後、 負荷の時定数にしたがって 減少する。 ここで出力電圧 6 0 1力《非飽和領域から飽和に切り替わる期間で、 目 標電圧 5 0 2となったのを検出して入力をオフ状態とする。 続いて、 一定期間を 置いた後、 再びオン状態とすることにより、 カレントミラー比の出力電流に近づ く鋸波状の出力電流が得られる。 したがって、 本実施例においては、 出力電圧 6 0 1を検出することが、 出力電流を検出することと同等の意味を持っている。 続いて、 本実施例における P WM信号作成手段 4 0 6の動作を説明する。 この 回路の動作のポイントは、 出力電圧 6 0 1が非飽和領域から飽和領域に入る時の 1 Ό み、 コンパレータ 5 0 1の出力結果が検出されるようにすること、 またクロック 信号 5 0 3によって PWM信号 5 0 4がオフからオン状態に切り替わるようにす ることである。 第 1 7図の PWM信号作成手段 4 0 6の各端子電圧を、 第 1 9図 に示す。 Fig. 18 shows the behavior of the input / output voltage and current to the current mirror. Fig. 18 shows the PWM signal 504 of the current mirror 4002 when the motor is loaded, the output voltage 601 of the power mirror 4002, and the output current 600 flowing through one phase of the motor. 2 is shown. First, when the PWM signal 504 is between the power supply voltage Vcc and the current mirror is off, the output voltage is near Vcc and no output current flows. Next, when the gate voltage 600 changes to zero, the current mirror changes from off to on, and the output voltage temporarily drops to near zero. This is because the output current cannot flow rapidly because the load is inductance, and the output transistor operates in the unsaturated region. After that, the output voltage 6001 starts to rise slightly, and then rises sharply when the operation changes from the non-saturation to the saturation region. During this time, the output current 602 increases substantially according to the load time constant RZL. When the output current reaches a level determined by the current mirror ratio, the output voltage becomes constant. When the input is turned off again, the output current flows into the body diode of the upper arm and becomes a return current to discharge the energy stored in the inductance. At this time, the output voltage instantaneously increases above the power supply voltage, and then decreases according to the load time constant. Here, during the period when the output voltage is changed from the non-saturated region to the saturated state, the input is turned off by detecting that the target voltage has become 502. Then, after a certain period of time, by turning on again, a sawtooth-shaped output current that approaches the output current of the current mirror ratio is obtained. Therefore, in this embodiment, detecting the output voltage 601 has the same meaning as detecting the output current. Next, the operation of the PWM signal generation means 406 in the present embodiment will be described. The point of operation of this circuit is when the output voltage 6001 enters the saturation region from the non-saturation region. One step is to detect the output result of the comparator 501, and to switch the PWM signal 504 from off to on by the clock signal 503. FIG. 19 shows the respective terminal voltages of the PWM signal generating means 406 in FIG.
第 1 9図において、 参照番号 6 0 1はカレントミラーの出力電圧、 5 0 2は目 檩電圧、 7 0 1はコンパレータ 5 0 1の出力、 7 0 2から 7 0 4は N A N Dゲー ト 5 1 2の入出力信号、 5 0 3は PWM周波数のクロック信号、 6 0 1はフリッ プフロップ 5 1 3の出力信号、 6 0 2がカレントミラーの出力電流である。 第 1 8図において述べたように、 出力電圧 6 0 1と任意の電圧 5 0 2を比較すること で、 7 0 1の信号を得る。 この結果を反転させた信号が 7 0 2、 さらに 5 1 0、 5 1 1の R C回路により一定時間遅延させて、 もう 1度反転させた信号が 7 0 3 である。 ここで 5 1 0の抵抗値は 1 0 0 k Q、 5 1 1の容量値は 1 0 p Fであり、 遅延時間は 1 m秒程度である。 この 7 0 2と 7 0 3を用いて、 7 0 4の信号を作 成する。 7 0 4は、 出力電圧が非飽和から飽和状態に入る時の目標電圧 5 0 2を 超えるタイミングを示している。 この 7 0 4と PWMクロック信号 5 0 3を使用 してフリップフロップ 5 1 3を動作させることで、 P WM信号 5 0 4を作成して いる。  In FIG. 19, reference numeral 601 is the output voltage of the current mirror, 502 is the target voltage, 701 is the output of the comparator 501, and 702 to 704 are the NAND gates 51. Reference numeral 2 denotes an input / output signal, reference numeral 503 denotes a PWM frequency clock signal, reference numeral 601 denotes an output signal of the flip-flop 513, and reference numeral 602 denotes an output current of the current mirror. As described in FIG. 18, by comparing the output voltage 601 with an arbitrary voltage 502, a signal of 701 is obtained. The signal obtained by inverting the result is 70 2, and the signal obtained by delaying the signal for a certain time by the RC circuits 51 0 and 51 1 is 70 3. Here, the resistance value of 510 is 100 kQ, the capacitance value of 511 is 10 pF, and the delay time is about 1 ms. Using the signals 702 and 703, a signal 704 is generated. Reference numeral 704 indicates the timing at which the output voltage exceeds the target voltage 502 when the output voltage enters the saturated state from the non-saturated state. By using the 704 and the PWM clock signal 503 to operate the flip-flop 513, the PWM signal 504 is created.
本実施例によりスピンドルモータを回転させた時の出力特性を、 第 2 0図に示 す。 第 2 0図において 5 2力、ら 5 4は各相誘起電圧、 8 0 1から 8 0 3は上ァ一 ム駆動用の三作動アンプ出力電圧、 8 0 4から 8 0 6は下アーム駆動用の三作動 アンプ出力電圧である。 出力電流 6 0 2は、 従来に比べて、 立ち上がり、 立下が りが緩やかとなっている。 例えば、 従来の出力電流の立ち上がり、 立下がりは、 2 AZm程度であつたが、 本実施例では 0 . 5 A/m秒程度を実現している。 こ れにより、 相切り替わり時の電気的、 音響ノイズを大幅に改善できた。 したがつ て、 第一の実施例で述べた効果と同様に、 切り替えノイズに関して従来と同等で、 低消費電力の駆動方式が可能となつた。  FIG. 20 shows output characteristics when the spindle motor is rotated according to the present embodiment. In Fig. 20, 52 forces, 54 and 54 are the induced voltages of each phase, 801 to 803 are the output voltages of the three-acting amplifier for driving the upper arm, and 804 to 806 are the lower arm drive. For the three-acting amplifier output voltage. The output current 602 rises and falls more slowly than before. For example, the rise and fall of the output current in the related art is about 2 AZm, but in the present embodiment, about 0.5 A / m second is realized. As a result, the electrical and acoustic noise at the time of phase switching was significantly improved. Therefore, similarly to the effect described in the first embodiment, a driving method that is equivalent to the conventional one with respect to the switching noise and consumes low power is enabled.
産業上の利用可能性 Industrial applicability
本発明によれば、 センサレスのブラシレスモータを従来に比べて低消費電力、 低ノイズで駆動することが可能となった。 従来の矩形波リニア駆動に比べて、 電 源消費電力を約 6 0 %以上低減でき、 電磁ノイズについても高調波成分を大幅 低減できた。 また、 製造コストの 3 0 %程度の低減を図れた。 According to the present invention, it becomes possible to drive a sensorless brushless motor with lower power consumption and lower noise than before. Compared to the conventional rectangular wave linear drive, The power consumption of the power source was reduced by about 60% or more, and the harmonic components of electromagnetic noise were significantly reduced. In addition, the manufacturing cost was reduced by about 30%.

Claims

請 求 の 範 囲 . The scope of the claims .
1. 第 1、 第 2の出力素子が直列に接続されたハーフブリッジ回路力複数個並 列に接続され、 その各出力端子とモータの各相端子とが接続されており、 該出力 素子を駆動することによりモータに出力電流が供給されるモータ駆動方式にお 、 て、 該モータが回転することで発生した誘起電圧を検出して整形する手段を有し、 該モータの目標回転速度に対応させて該誘起電圧から得られた正弦波の振幅を制 御し、 その結果得られた正弦波のパルス幅変調信号により第 1、 第 2の出力素子 を駆動することでモータに電流を供給する、 モータ駆動方式。 1. A half-bridge circuit in which a first and a second output element are connected in series, a plurality of which are connected in parallel, each output terminal of which is connected to each phase terminal of a motor, and driving the output element In the motor driving method in which the output current is supplied to the motor by performing the operation, the motor includes a means for detecting and shaping an induced voltage generated by the rotation of the motor, and corresponding to a target rotation speed of the motor. Controlling the amplitude of the sine wave obtained from the induced voltage, and driving the first and second output elements by the resulting sine wave pulse width modulation signal to supply current to the motor. Motor drive system.
2. モータ駆動のための出力回路、 誘起電圧の検出、 整形手段、 誘起電圧によ る正弦波の振幅制御手段、 パルス幅変調手段を備えている、 請求項 1記載のモー タ駆動方式。  2. The motor drive system according to claim 1, further comprising an output circuit for driving the motor, an induced voltage detection and shaping unit, a sine wave amplitude control unit based on the induced voltage, and a pulse width modulation unit.
3. 出力素子への入力電圧が矩形波パルスであり、 モータに供給される出力電 流が近似的に正弦波である、 請求項 1記載のモータ駆動方式。  3. The motor driving method according to claim 1, wherein the input voltage to the output element is a rectangular wave pulse, and the output current supplied to the motor is approximately a sine wave.
4. 該誘起電圧を検出する手段として低域通過フィルタを使用し、 該フィルタ がスィッチト ·キャパシタにより構成される、 請求項 1記載のモータ駆動方式。  4. The motor drive system according to claim 1, wherein a low-pass filter is used as a means for detecting the induced voltage, and the filter is constituted by a switched capacitor.
5. 第 1、 第 2の出力素子が絶縁ゲート型トランジスタであり、 相補形を構成 する、 請求項 1記載のモータ駆動方式。  5. The motor drive system according to claim 1, wherein the first and second output elements are insulated gate transistors and form a complementary type.
6. 第 1、 第 2の出力素子の入力端子に、 抵抗とスィッチ素子を並列接続し、 該第 1、 第 2の出力素子の駆動を遅延させる手段を有する、 請求項 1記載のモー タ駆動方式。  6. The motor drive according to claim 1, further comprising means for connecting a resistor and a switch element in parallel to the input terminals of the first and second output elements, and delaying the drive of the first and second output elements. method.
7. 第 1、 第 2の出力素子の入力信号が、 平均電圧レベルの異なるパルス幅変 調キヤリアによって変調された変調信号である、 請求項 1記載のモータ駆動方式 7. The motor drive method according to claim 1, wherein the input signals of the first and second output elements are modulated signals modulated by pulse width modulation carriers having different average voltage levels.
8. ハーフブリッジ回路の各相毎に出力電流の検出手段を有し、 その検出結果 と任意の電圧レベルとが比較され、 その比較結果に従って出力素子の駆動能力が 制御される、 請求項第 1項記載のモータ駆動方式。 8. An output current detection means is provided for each phase of the half-bridge circuit, and the detection result is compared with an arbitrary voltage level, and the driving capability of the output element is controlled according to the comparison result. Motor drive method described in the item.
9. 出力電流の検出が、 ハーフブリッジ回路の出力側に設けられた抵抗素子の 電圧降下により行われる、 請求項 1あるいは請求項 8記載のモータ駆動方式。  9. The motor drive method according to claim 1, wherein the output current is detected by a voltage drop of a resistance element provided on an output side of the half-bridge circuit.
1 0. 出力ハーフブリッジ回路がカレン卜ミラー形式により構成され、 該カレン トミラーの入力に、 モータにおいて発生した誘起電圧を検出することにより得ら れたモータ回転信号の振幅に比例した入力電流が入力され、 該カレントミラーの 出力電圧が任意の電圧値となったのを判定して、 該カレントミラーの入力が遮断 され、 一定時間経過後に再びカレントミラーに入力が加えられることにより、 力 レントミラーの入力電流に比例した出力電流を出力させる、 請求項 1あるいは請 求項 8記載のモータ駆動方式。 1 0. The output half-bridge circuit is composed of a current mirror type. The input current proportional to the amplitude of the motor rotation signal obtained by detecting the induced voltage generated in the motor is input to the input of the mirror, and the output voltage of the current mirror becomes an arbitrary voltage value. The method according to claim 1 or 2, wherein the input of the current mirror is interrupted, and the input is applied again to the current mirror after a lapse of a predetermined time, thereby outputting an output current proportional to the input current of the current mirror. Motor drive method described in 8.
1 1. 請求項 1記載のモータ駆動方式を機能として有する半導体集積回路。  1 1. A semiconductor integrated circuit having the motor driving method according to claim 1 as a function.
1 2. 請求項 2記載の手段により構成される半導体集積回路。  1 2. A semiconductor integrated circuit comprising the means according to claim 2.
1 3. 請求項 2記載の手段と、 マイクロプロセッサにより構成される半導体集積 回路。  1 3. A semiconductor integrated circuit comprising the means according to claim 2 and a microprocessor.
1 4. 請求項 1記載のモータ駆動方式を機能として有し、 全ての回路が、 絶縁ゲ ート型トランジスタ、 抵抗、 キャパシタ、 ダイオードのみにより作られている、 半導体集積回路。  1 4. A semiconductor integrated circuit having the function of the motor drive system according to claim 1 as a function, and wherein all circuits are made up of only insulated gate transistors, resistors, capacitors, and diodes.
1 5. 請求項 1記載のモータ駆動方式をスピンドルモータの駆動用に使用したハ ードディスク ドライブ、 フロッピーディスク ドライブ、 光磁気ディスク ドライブ、 1 5. A hard disk drive, a floppy disk drive, a magneto-optical disk drive, wherein the motor drive method according to claim 1 is used for driving a spindle motor,
C D— R O Mドライブ、 普通紙複写機、 レーザビームプリンタ、 ファクシミ リ、 及びビデオカメラ等の装置。 Equipment such as CD-ROM drive, plain paper copier, laser beam printer, facsimile, and video camera.
PCT/JP1995/001435 1994-08-11 1995-07-19 Motor driving system WO1996005650A1 (en)

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US8400083B2 (en) 2007-10-23 2013-03-19 Daikin Industries, Ltd. Current detecting device, air conditioning apparatus, correction constant calculating system and correction constant calculating method
CN101849349B (en) * 2007-10-23 2013-05-15 大金工业株式会社 Current detecting device, air conditioning apparatus, correction constant calculating system and correction constant calculating method

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