WO1992011704A1

WO1992011704A1 - Apparatus and method for generating quadrature signals

Info

Publication number: WO1992011704A1
Application number: PCT/US1991/009587
Authority: WO
Inventors: Mark F. Hilbert; Steven F. Gillig; Joseph P. Heck
Original assignee: Motorola, Inc.
Priority date: 1990-12-21
Filing date: 1991-12-18
Publication date: 1992-07-09
Also published as: MX174064B; FR2670975B1; IT1250974B; BR9106406A; FR2670975A1; AU9179691A; CA2073347C; ITRM910965A1; ITRM910965A0; MX9102719A; JPH05505297A

Abstract

A quadrature signal generator provides differential in-phase signals, (I, I'), and differential quadrature-phase signals, (Q/Q'), in precisely a 90° quadrature relationship. A phase-locked loop configuration (100) comprises a voltage controlled phase-shift network (103) and a novel exclusive-OR phase detector (109). The voltage controlled phase-shift network (103) generates a phase shift for the differential quadrature signals, (I, I') and (Q/Q'). The novel exclusive-OR phase detector (109) determines the phase error between differential quadrature signals, (I, I') and (Q/Q'). The phase error is related to a voltage control signal, VCNTL, coupled back to the voltage controlled phase-shift network (103) to maintain a precise 90° phase relationship between differential quadrature signals, (I, I') and (Q/Q').

Description

Apparatus and Method for Generating Quadrature Signals

Field of the Invention

The present invention relates generally to signal generators, and, more particularly, to a signal generator providing differential quadrature signals and maintaining these signals precisely in a 90° phase relationship.

Background of the Invention

A precise 90° phase relationship having a high degree of accuracy is a necessity for implementing quadrature modulated transmit signals and quadrature demodulated receive signals. Two such quadrature systems may include a single sideband mixer and a coherent detector. The output of an ideal single mixer comprises a desired carrier frequency and an image frequency. By using two ideal single mixers in a quadrature modulator configuration the image frequency can be surpressed. Deviation from 90° causes imperfect surpression of an image frequency and degradation of the modulator or demodulator function.

In general, conventional quadrature signal generators have an accuracy tolerance which depends on the tolerance of the components forming the circuit. Since a high accuracy of component values is difficult to achieve, the quadrature phase is different from ideal quadrature.

Conventional quadrature signal generators typically have the problem of accurately detecting a quadrature condition with an input signal having a wide range of amplitudes and different harmonic content. They also have the problem of accurately maintaining a quadrature condition over a wide range of frequencies and temperatures.

Another problem is in generating a pair of quadrature outputs such that the amplitudes and shapes of the phase- shifted signals are equal to the amplitudes and shapes of the non-phase-shifted signals. A further problem is the difficulty of implementing a quadrature signal generator well suited for driving balanced mixers. Balanced mixers offer better supply rejection and better accuracy when accompanying circuitry is also balanced. Thus, a formidable challenge is to conceive of a precision quadrature signal generator overcoming the problematic conditions described above.

Brief Description of the Drawings

FIG. 1 is a block diagram of a phase-locking precision quadrature signal generator constructed in accordance with the present invention.

FIG. 2 is a circuit representing a voltage controlled phase-shift network included in the phase-locking precision quadrature signal generator of FIG. 1.

FIG. 3 is a circuit representing an exclusive-OR phase detector included in the phase-locking precision quadrature signal generator of FIG. 1 .

Summary of the Invention

An apparatus produces in-phase and quadrature-phase signals from a differential input signal. Differential quadrature signals are generated in response to a differential input signal. A variation from 90° between the phases of the differential quadrature signals is detected. A control signal is generated in response to the detected variation. The phases of the differential quadrature signals are adjusted in response to the control signal.

Detailed Description of a Preferred Embodiment

This invention may be advantageously utilized in a transmitter or a receiver requiring quadrature signals. The preferred embodiment of the present invention is particularly suited for driving balanced mixers. A balanced mixer configuration offers the advantages of better supply rejection and better accuracy when accompanying circuitry is also balanced. Utilizing the advantages of a balanced mixer configuration, differential processing of in-phase and quadrature-phase signal components are implemented throughout the quadrature signal generator as described in the preferred embodiment. The use of a phase-locked loop employing a low pass filter, a voltage controlled phase-shift network, limiters, a novel precision exclusive-OR phase detector, a second low pass filter, a precision voltage to current converter, and a loop filter produces an improvement over conventional quadrature signal generators. Utilizing an advanced BiCMOS fabrication process makes it possible to implement the entire function of the phase-locked loop on the same integrated circuit. The BiCMOS process combines the advantages of bipolar and CMOS technology.

The invention may be understood more clearly by referring to the accompanying drawings. A block diagram of the phase-locked loop 100 generating differential in- phase and differential quadrature-phase signals constructed in accordance with the present invention is shown in FIG. 1. The differential quadrature signals, (I,.^') and (Q/Q^'), can be used as the local oscillator inputs in a quadrature modulator which uses balanced mixers, or to down-convert a quadrature modulated radio signal to base band in a direct conversion receiver. The differential input signals, (V,V), are applied to low pass filter 101 to generate filtered differential signals, (v/v^'). The differential input signals, (V,V), each have an AC signal component which are180° out of phase from each other and DC signal component which are the same. The low pass filter 101 contributes to the wave-shape matching of the phase-shifted and non-phase-shifted signals by filtering out any second harmonic present in the differential input signals, (V.V).

The filtered differential signals, (v,v'), are coupled to a voltage controlled, phase-shift network 103 which generates two pairs of differential phase-shifted signals, (X_.X^') and (Y,Y^'). The differential phase-shifted signals, (X,X^')_ are 180° out of phase from each other and likewise, differential phase-shifted signals, (Y,Y^'), are also 180° out of phase from each other. The phase difference between each pair of signals is a function of a control voltage VCNTL- Differential phase-shifted signals, (X,X^') and (Y,Y^'), are then processed with identical limiters 105 and 107 producing differential quadrature signals (l,l^') and (Q/Q^'). The limiters 105 and 107 ensure that the differential quadrature signals, (I.T) and (Q/Q^'), have essentially the same wave shapes and amplitudes. These differential quadrature signals having a precise 90° quadrature relationship are used to drive the transmitting and receiving circuitry. The differential quadrature signals are also coupled to the novel precision exclusive-OR phase detector 109, having detected differential output, (XOR.XOR^'), with an average DC value proportional to the phase error from ideal quadrature. A second low pass filter 1 11 extracts the average DC value from the detected differential outputs, (XOR.XOR^'), generated by the exclusive-OR phase detector 109. The second low pass filter 111 is coupled to a precision voltage to current (V to I) converter 113 which determines the difference between the two DC levels and translates the result into a current signal at line 114. A loop filter 115 converts the current signal at line 1 14 into the voltage control signal, VCNTL, and also maintains loop stability. The control voltage, VCNTL, is fed back into the voltage controled phase-shift network 103 to maintain precision quadrature between differential quadrature signals, (I.T) and (Q/Q^'),at the outputs of limiters 105 and 107. This phase-locked loop is unique in that it employs a voltage controlled phase-shifter (VPS) rather than a conventional voltage controlled oscillator (VCO).

The problem of generating a pair of differential quadrature output signals such that the amplitudes and shapes of the phase-shifted signals are equal to the amplitudes and shapes of the non-phase-shifted signals is overcome utilizing a combination of elements in the phase-locked loop 100. The voltage controlled phase-shift network 103 preserves its input amplitude such that the fundamental component of each pair of differential phase- shifted signals, (X,X^') and (Y,Y^'), have the same amplitude, however, if the filtered differential input to the voltage controlled phase-shift network 103 has high harmonic content, the harmonics in the (X,X^') signals will be phase- shifted by more than 90° and cause the shape and zero- crossing slopes of the (Y,Y^') signals to be different from that of the (X,X^') signals. The limiters correct for the amplitude distortion such that the limiters differential phase-shifted signals, (I.T) and (Q/Q^'), are nearly identical in wave shape. The low pass filter 101 preceding the voltage control phase-shift network 103 also contributes to the wave shape matching by filtering out any second harmonic present in the differential input signals, (V.V). A second harmonic distortion would not only disrupt the 50% duty cycle of the differential quadrature signals, (U^') and (Q/Q'), but would also cause their duty cycles not to match. Matching wave shapes are essential when using those signals as local oscillators in balanced mixer applications requiring precise image cancellation. A quadrature phase-shift in the filtered differential signal, (v,v^')₍ is generated using the voltage controled phase-shift network 103 as shown in FIG. 2. The phase- shift is accomplished with a bridge RC arrangement driven in a double-ended configuration by a differential transistor amplifier. The Laplace transform for differential phase-shifted signal, Y, is:

Y(s)-X(s) [-sRC/(1 +sRC)+1/(1+sRC)]-X(s) (1 -sRC)/(1 +sRC),

where (1-sRC)/(1+sRC) can be represented in the steady- state by the phasor 1/-2arctan(~wRC) and when wRC=1 , X(s) can be represented by the phasor X/-90. The Laplace transform for Y^' is

-Y(s)-X(s) [sRC/(1 +sRC)-1/(1 +sRC)]— X(s) (1 -sRC)/(1 +sRC),

which can likewise be represented in the steady-state by the phasor X/90. For a sinusoidal differential input signal, differential phase-shifted signals, (Y,Y^'), are 90° from differential phase-shifted signals, (X,X^'),when w=1 /RC . To solve the problem of splitting a signal into its quadrature components whose phase could be varied about ideal quadrature, PMOS transistors 201 and 203 are biased in the linear (resistive) region to create a voltage controlled phase-shifter. The PMOS gate voltages are varied to provide the phase-shift. The PMOS transistors 201 and 203 were also instrumental in solving the problem of accurately maintaining a quadrature condition over a wide range of frequencies and temperatures. Even if the application required operation at just one frequency, the sensitivity required would need to be large enough to cover the tolerance of the R and C elements in the bridge. In addition, if the differential phase-shifted signals, (X,X^'), were not a pure spectral line, the phase-shift of the harmonics would be different from 90° [-2^*tan-¹ (n^*w₀RC) , 'n' being the harmonic number] which will cause several tens of degrees of zero crossing phase error from quadrature when w₀=1/RC. The feedback nature of the loop will correct for this but the phase-shifter sensitivity must be large enough so the loop can compensate for this error due to input spectral impurity. It was originally thought to implement the complete system on an integrated circuit and employ an NPN emitter base capacitance as the voltage variable element of the phase- shifter, however, a typical capacitance versus voltage relation for this junction is C=Co/(1 +V_e-b)-⁵⁵- Nominal sensitivity in this case is about 12° per volt, which is not quite sensitive enough to cover all worst case variations in resistance and capacitance tolerance and temperature. The use of the PMOS transistors 201 and 203 operating in their resistive region as their voltage variable element has much improved sensitivity and takes advantage of the advanced BiCMOS process to perform the entire function on one integrated circuit. The gate-source voltage of the PMOS transistors 201 and 203, adjusted by the voltage control signal, VCNTL, is represented by

Nominal sensitivity using the PMOS transistors 201 and 203 now becomes about 100° per volt. This will not only cover variations in resistance and capacitance tolerance and temperature but also allows phase-locked quadrature operation over a large range of input frequencies. The precision exclusive-OR phase detector 109 is shown in more detail in FIG. 3. The improvement over existing designs is due to equal delays being provided to differential quadrature input signals, (l,T) and (Q/Q'), a characteristic that is essential to detecting the quadrature phase condition. For example, at 100Mhz, one degree of phase error corresponds to 10ns/360=0.0278ns. Two standard current mode logic (CML) exclusive-OR gates are represented by XOR 1 and XOR 2. The first exclusive-OR gate, XOR 1 , comprises 6 NPN transistors 301 through 306. The second exclusive-OR gate, XOR 2, is represented by 6 NPN transistors 307 through 312. Diodes 313 - 316 and current sources 317 - 320 are provided to keep the transistors (305, 306, 31 1 , 312) operating in their active region. The two exclusive-OR gates, XOR 1 and XOR 2, are connected in such a way that the differential in-phase signals, (I,.^'), are coupled to the upper transistor pairs (NPN transistors 301-304) of the first gate, XOR 1 , and also coupled in parallel with the lower transistor pair (NPN transistors 311 and 312) of the second gate, XOR 2. At the same time, the differential quadrature-phase input signals, (Q/Q^'), are coupled to the upper transistor pairs (NPN transistors 307 through 310) of the second gate, XOR 2, and also coupled in parallel with the lower transistor pair (NPN transistors 305 and 306) of the first gate, XOR 1 . The typical delay imbalance of a standard exclusive-OR gate caused by the difference in the time for one signal to propagate from the upper transistor pair inputs to the detected output signals, (XOR.XOR^'), versus the time for the other signal to propagate from the lower pair inputs to the detected output signals, (XOR.XOR^'), has been eliminated. Each signal now travels through both an upper and lower pair and the average delay to each signal is the same. While the preferred embodiment discloses the advantages of the novel phase detector having differential input signals, (I.T) and (Q,Q^'), an alternate embodiment may include the novel phase detector having single-ended input signals, (l",Q^"). In the alternate embodiment, single-ended input signals, (l^",Q^"), have an AC and a DC signal component which are coupled to the same exclusive- OR inputs as input signals, (l,Q), in the preferred embodiment. Input signals, (.^'".Q^"'), have only a DC signal component corresponding to the DC signal component of single-ended input signals, (l^",Q^"). The DC input signals, (_|-",Q"'), _{are coup}|_ecj _{t0 the same} exclusive-Or inputs as input signals, (.^',Q^'). in the preferred embodiment. Differential quadrature signal, l/Q, and single-ended quadrature signal, (l^",Q^"), both have an AC and DC signal component wherein the phase of the AC signal component of I and Q may be the same as the AC signal component of I" and Q", respectively. Differential quadrature signal, (l^',Q^'), comprises an AC and DC signal component but input signals, (l'^",Q^'"), have only a DC signal component.

The typical time delay imbalance of a standard exclusive-OR gate caused by the difference in the time for one signal to propagate through the upper transistor pairs versus the time for the other signal to propagate through the lower pair has been eliminated. Each single input signal, (l",Q"), now travels through both an upper and lower pair and the average delay to each signal is the same. Using the exclusive-OR phase detector, the phase error from ideal quadrature may be determined by either of two methods. The first method detects the phase error by determining the difference between the two outputs. The second method detects the phase error by determining the difference between one output and a independent DC reference signal. Thus, a novel precision quadrature signal generator has been disclosed. The novel quadrature signal generator can accurately generate a precise quadrature condition with an input signal having a wide range of amplitudes and different harmonic content. It can also accurately maintain a quadrature condition over a wide range of frequencies and temperatures. The amplitudes and shapes of the phase-shifted signals are equal to the amplitudes and shapes of the non-phase-shifted signals. The differential quadrature signals generated may be used advantageously with balanced mixers thereby improving transmitter and receiver performance.

What is claimed is:

Claims

1. An apparatus for producing in-phase and quadrature- phase signals from a differential input signal, the apparatus comprising in combination:

means for generating differential quadrature signals responsive to the differential input signal;

means for detecting a variation from 90° in the phases between said differential quadrature signals;

means for generating a control signal responsive to said detected variation; and

means for adjusting the phases of said differential quadrature signals responsive to said control signal.

2. An apparatus in accordance with claim 1 wherein said means for generating differential quadrature signals further comprises: means for filtering said differential input signal to generate a filtered differential signal; means for phase-shifting said filtered differential signal to generate differential quadrature phase-shifted signals; and means for limiting said differential quadrature phase-shifted signals to generate said differential quadrature signals.

3. An apparatus in accordance with claim 2 wherein said means for phase-shifting further comprises a voltage controlled phase-shift network essentially including a bridge resistor-capacitor arrangement driven in a double- ended configuration by a differential amplifier.

4. An apparatus in accordance with claim 1 wherein said means for detecting further comprises:

(a) a first and second exclusive-OR phase detector, each exclusive-OR phase detector including a first and second pair of input ports and a first and second output signals; (b) means for combining within said first exclusive-OR phase detector said in-phase differential signal with said quadrature-phase differential signal to generate said first and second output signals of said first exclusive-OR phase detector; (d) means for combining within said second exclusive-OR phase detector said in-phase differential signal with said quadrature-phase differential signal to generate said first and second output signals of said second exclusive-OR phase detector; (e) means for generating a first detected output signal by summing said first output signal of said first and second exclusive-OR phase detectors; and

(f) means for generating a second detected output signal by summing said second output signal of said first and second exclusive-OR phase detectors.

5. An apparatus in accordance with claim 1 wherein said means for generating said voltage control signal further comprises: means for filtering detected differential signals to generate DC signals; means for comparing said DC signals to generate an error current signal; and means for filtering said error current signal to generate said control signal.

6, An apparatus in accordance with claim 1 wherein said means for adjusting further comprises a variable resistance device responsive to said control signal.

7. A method for producing in-phase and quadrature- phase signals from a differential input signal, the . apparatus comprising the steps of:

generating differential quadrature signals responsive to the differential input signal;

detecting a variation from 90° in the phases between said differential quadrature signals;

generating a control signal responsive to said detected variation; and

adjusting the phases of said differential quadrature signals responsive to said control signal.

8. A method in accordance with claim 7 wherein said step of detecting further comprises the steps of:

(a) detecting a phase variation using a first and second exclusive-OR phase detector, each exclusive-OR phase detector includes a first and second pair of input ports and a first and second output signal;

(c) combining within said first exclusive-OR phase detector said in-phase differential signal with said quadrature-phase differential signal to generate said first and second output signals of said first exclusive-OR phase detector;

(d) combining within said second exclusive-OR phase detector said in-phase differential signal with said quadrature-phase differential signal to generate said first and second output signals of said second exclusive-OR phase detector;

(e) generating a first detected output signal by summing said first output signal of said first and second exclusive-OR phase detectors; and (f) generating a second detected output signal by summing said second output signal of said first and second exclusive-OR phase detectors.

9. Apparatus for detecting a variation from 90° in the phase between quadrature signals, the apparatus comprises in combination:

(a) a first and second exclusive-OR phase detector, each exclusive-OR phase detector including a first, second, third and fourth input port and generating a first and second output signal;

(b) means for combining within said first exclusive-OR phase detector first, second, third and fourth signals coupled to said first, second, third and fourth input ports, respectively, to generate said first and second output signals of said first exclusive-OR phase detector;

(d) means for combining within said second exclusive-OR phase detector said third, fourth, first and second signals coupled to said first, second, third and fourth input ports, respectively, to generate said first and second output signals of said second exclusive-OR phase detector;

(e) means for generating a first detected output signal by summing said first output signal of said first and second exclusive-OR phase detectors; and

(f ) means for generating a second detected output signal by summing said second output signal of said first and second exclusive-OR phase detectors.

10. A method for detecting a variation from 90° in the phase between quadrature signals, the method comprises in combination the steps of:

(a) detecting a phase variation using a first and second exclusive-OR phase detector, each exclusive-OR phase detector including a first, second, third and fourth input port and generating a first and second output signal;

(b) combining within said first exclusive-OR phase detector first, second, third and fourth signals coupled to said first, second, third and fourth input ports, respectively, to generate said first and second output signals of said first exclusive-OR phase detector;

(d) combining within said second exclusive-OR phase detector said third, fourth, first and second signals coupled to said first, second, third and fourth input ports, respectively, to generate said first and second output signals of said second exclusive-OR phase detector; (e) generating said first detected output signal by summing said first output signal of said first and second exclusive-OR phase detectors; and

(f) generating said second detected output signal by summing said second output signal of said first and second exclusive-OR phase detectors.