USD933016S1 - Contact field for a printed circuit board - Google Patents

Contact field for a printed circuit board Download PDF

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Publication number
USD933016S1
USD933016S1 US29/683,858 US201929683858F USD933016S US D933016 S1 USD933016 S1 US D933016S1 US 201929683858 F US201929683858 F US 201929683858F US D933016 S USD933016 S US D933016S
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US
United States
Prior art keywords
circuit board
printed circuit
contact field
view
contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
US29/683,858
Inventor
Lynwood Adams
Jack Lewis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Modus Test LLC
Original Assignee
Modus Test LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Modus Test LLC filed Critical Modus Test LLC
Priority to US29/683,858 priority Critical patent/USD933016S1/en
Assigned to MODUS TEST, LLC reassignment MODUS TEST, LLC ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: ADAMS, LYNWOOD, LEWIS, JACK
Application granted granted Critical
Publication of USD933016S1 publication Critical patent/USD933016S1/en
Active legal-status Critical Current
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Description

FIG. 1 is a top perspective view of a contact field for a printed circuit board, showing our new design;
FIG. 2 is a bottom perspective view thereof;
FIG. 3 is a front elevation view thereof;
FIG. 4 is a rear elevation view thereof;
FIG. 5 is a right elevation view thereof;
FIG. 6 is a left elevation view thereof;
FIG. 7 is a top plan view thereof;
FIG. 8 is a bottom plan view thereof;
FIG. 9 is an enlarged bottom perspective view of the detail identified in FIG. 2; and,
FIG. 10 is an enlarged bottom elevation view of the detail identified in FIG. 8.
The equal spaced dashed lines depict the environment, which forms no part of the claimed design. The dash-dot-dot dashed lines define boundaries of the claimed design.

Claims (1)

    CLAIM
  1. The ornamental design for a contact field for a printed circuit board, as is shown and described.
US29/683,858 2019-03-15 2019-03-15 Contact field for a printed circuit board Active USD933016S1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US29/683,858 USD933016S1 (en) 2019-03-15 2019-03-15 Contact field for a printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US29/683,858 USD933016S1 (en) 2019-03-15 2019-03-15 Contact field for a printed circuit board

Publications (1)

Publication Number Publication Date
USD933016S1 true USD933016S1 (en) 2021-10-12

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ID=77998453

Family Applications (1)

Application Number Title Priority Date Filing Date
US29/683,858 Active USD933016S1 (en) 2019-03-15 2019-03-15 Contact field for a printed circuit board

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US (1) USD933016S1 (en)

Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4330684A (en) * 1977-12-27 1982-05-18 Hayward C Michael Matrix board
US4498122A (en) * 1982-12-29 1985-02-05 At&T Bell Laboratories High-speed, high pin-out LSI chip package
USD319629S (en) * 1988-04-13 1991-09-03 Ibiden Co., Ltd. Semiconductor substrate with conducting pattern
US5049084A (en) * 1989-12-05 1991-09-17 Rogers Corporation Electrical circuit board interconnect
USD334175S (en) * 1991-04-12 1993-03-23 Oz Technologies, Inc. Probe interface test board
US5199907A (en) * 1992-06-18 1993-04-06 Amp Incorporated Electrical connector having contacts with board retention feature
USD457146S1 (en) * 2000-11-29 2002-05-14 Kabushiki Kaisha Toshiba Substrate for a semiconductor element
US20040205402A1 (en) * 2002-03-29 2004-10-14 Kabushiki Kaisha Toshiba Semiconductor test unit having low contact resistance with examined electronic products, semiconductor contact board, method for testing semiconductor device, semiconductor device, and method for manufacturing thereof
US7378600B2 (en) * 2005-03-14 2008-05-27 Chan Eric K D Electronic circuit prototyping composite support
USD821338S1 (en) * 2015-01-20 2018-06-26 Modus Test Automation, Llc. Contact fields for a printed circuit board
US10368435B2 (en) * 2015-06-05 2019-07-30 Samuel P. Kho Systems and methods for breadboard style printed circuit board
USD872032S1 (en) * 2018-09-14 2020-01-07 Telit Communications S.P.A. Connection module
USD875057S1 (en) * 2017-05-26 2020-02-11 Tiny PCB, Inc. Modular circuit board

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4330684A (en) * 1977-12-27 1982-05-18 Hayward C Michael Matrix board
US4498122A (en) * 1982-12-29 1985-02-05 At&T Bell Laboratories High-speed, high pin-out LSI chip package
USD319629S (en) * 1988-04-13 1991-09-03 Ibiden Co., Ltd. Semiconductor substrate with conducting pattern
US5049084A (en) * 1989-12-05 1991-09-17 Rogers Corporation Electrical circuit board interconnect
USD334175S (en) * 1991-04-12 1993-03-23 Oz Technologies, Inc. Probe interface test board
US5199907A (en) * 1992-06-18 1993-04-06 Amp Incorporated Electrical connector having contacts with board retention feature
USD457146S1 (en) * 2000-11-29 2002-05-14 Kabushiki Kaisha Toshiba Substrate for a semiconductor element
US20040205402A1 (en) * 2002-03-29 2004-10-14 Kabushiki Kaisha Toshiba Semiconductor test unit having low contact resistance with examined electronic products, semiconductor contact board, method for testing semiconductor device, semiconductor device, and method for manufacturing thereof
US7378600B2 (en) * 2005-03-14 2008-05-27 Chan Eric K D Electronic circuit prototyping composite support
USD821338S1 (en) * 2015-01-20 2018-06-26 Modus Test Automation, Llc. Contact fields for a printed circuit board
US10368435B2 (en) * 2015-06-05 2019-07-30 Samuel P. Kho Systems and methods for breadboard style printed circuit board
USD875057S1 (en) * 2017-05-26 2020-02-11 Tiny PCB, Inc. Modular circuit board
USD872032S1 (en) * 2018-09-14 2020-01-07 Telit Communications S.P.A. Connection module

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
"PCB Board". Found online Aug. 6, 2020 at amazon.com. Reference dated Jul. 23, 2017. Retrieved from https://www.amazon.com/32-placas-circuito-prototipo-soldarlas-compatibles/dp/B072Z7Y19F/ref=sr_1_1. (Year: 2017). *
"PCB motherboard". Found online Aug. 7, 2020 at colourbox.com. Reference dated Aug. 8, 2011. Retrieved from https://www.colourbox.com/image/pcb-motherboard-of-personal-computer-image-2178703. (Year: 2011). *
"Prototyping Circuit Boards". Found online Aug. 7, 2020 at medium.com. Reference dated Sep. 27, 2016. Retrieved from https://medium.com/@rxseger/notes-on-prototyping-circuit-boards-c5906e637123 (Year: 2016). *

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