US6456679B1 - Phase-coupled clock signal generator and character generator comprising such a phase-coupled clock signal generator - Google Patents
Phase-coupled clock signal generator and character generator comprising such a phase-coupled clock signal generator Download PDFInfo
- Publication number
- US6456679B1 US6456679B1 US08/397,021 US39702195A US6456679B1 US 6456679 B1 US6456679 B1 US 6456679B1 US 39702195 A US39702195 A US 39702195A US 6456679 B1 US6456679 B1 US 6456679B1
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- value
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- capacitor
- response
- clock signal
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000003990 capacitor Substances 0.000 claims description 44
- 230000004044 response Effects 0.000 claims description 41
- 230000010355 oscillation Effects 0.000 claims description 21
- 238000007599 discharging Methods 0.000 claims description 8
- 230000007704 transition Effects 0.000 claims description 6
- 230000000737 periodic effect Effects 0.000 claims 1
- 230000001419 dependent effect Effects 0.000 abstract description 4
- 238000012544 monitoring process Methods 0.000 abstract description 2
- 230000008878 coupling Effects 0.000 description 5
- 238000010168 coupling process Methods 0.000 description 5
- 238000005859 coupling reaction Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 230000010354 integration Effects 0.000 description 3
- 230000002277 temperature effect Effects 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 230000002349 favourable effect Effects 0.000 description 2
- 238000009877 rendering Methods 0.000 description 2
- 230000002457 bidirectional effect Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000005670 electromagnetic radiation Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/18—Timing circuits for raster scan displays
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K4/00—Generating pulses having essentially a finite slope or stepped portions
- H03K4/06—Generating pulses having essentially a finite slope or stepped portions having triangular shape
- H03K4/08—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape
- H03K4/48—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices
- H03K4/50—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices in which a sawtooth voltage is produced across a capacitor
- H03K4/501—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices in which a sawtooth voltage is produced across a capacitor the starting point of the flyback period being determined by the amplitude of the voltage across the capacitor, e.g. by a comparator
- H03K4/502—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices in which a sawtooth voltage is produced across a capacitor the starting point of the flyback period being determined by the amplitude of the voltage across the capacitor, e.g. by a comparator the capacitor being charged from a constant-current source
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/023—Generators characterised by the type of circuit or by the means used for producing pulses by the use of differential amplifiers or comparators, with internal or external positive feedback
- H03K3/0231—Astable circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/181—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a numerical count result being used for locking the loop, the counter counting during fixed time intervals
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/222—Studio circuitry; Studio devices; Studio equipment
- H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
- H04N5/278—Subtitling
Definitions
- phase coupling with the control signal is important. An accurate frequency coupling is then superfluous and the discontinuity in the clock signal is acceptable. In these cases the use of the start-stop oscillator is preferred to the PLL for economical reasons.
- An example of such an application is a character generator for displaying characters on a display screen. A line flyback signal is used as a control signal. A stable picture is obtained by the phase coupling of the clock signal to this line flyback signal.
- the frequency of the clock signal determines the width of the characters and need not be accurate. It is sufficient for the frequency to have a value between two predetermined limits and to be further stable.
- a clock signal generator according to the invention is eminentlysuitable for integration with, for example a character generator.
- a character generator comprises, inter alia, a horizontal position counter to which the clock signal is applied for positioning the characters in a picture line.
- An embodiment of the character generator according to the invention is characterized in that the horizontal position counter is constituted by the counting circuit of the clock signal generator. This limits the number of digital components and thus leads to a further saving of costs.
- FIG. 1 shows diagrammatically the general structure of a phase-coupled clock signal generator according to the invention.
- FIG. 2 shows signal waveforms of some signals shown in FIG. 1 .
- FIG. 4 shows signal waveforms of some signals shown in FIG. 3 .
- FIGS. 6A and 6B shows a timing diagrams to explain the operation of the control program shown in FIG. 5 .
- FIG. 8 shows a time diagram to explain the operation of the control program shown in FIG. 7 .
- FIG. 9 shows diagrammatically a further implementation of the clock signal generator shown in FIG. 1 .
- the control circuit 3 further receives the control signal REF at an input IRQ and applies a reset signal CLR to the counter 2 .
- the control circuit 3 may comprise a microprocessor, for example the type 84C640 of Philips.
- the input IRQ is then preferably a so-called “interrupt request” input.
- the control circuit 3 comprises a series of clock pulses at a frequency determined by the adjusting of series F during the display period of the control signal REF and has a constant value during the flyback period of the control signal REF.
- the control circuit 3 generates the reset signal CLR shown in FIG. 2 curve C during the flyback period.
- the counter 2 assumes a count 0.
- the count is raised by 1 at each clock pulse of the clock signal CLK.
- FIG. 2 curve 0 shows a number of counts.
- the further supply of clock pulses to the counter 2 is discontinued.
- the count then reached is a counting value C which corresponds to the number of generated clock pulses during the display period of control signal REF.
- the counting value C is applied to the control circuit 3 .
- This circuit is adapted, in a manner to be further described, to compare the counting value C with the reference of signal R and to adapt the adjusting value F, if necessary.
- the control program waits in a step 23 for another interrupt request at the input IRQ.
- the counter 2 receives clock pulses at a clock frequency which is determined by the initial adjusting of signal F.
- the start-stop oscillator generates a clock frequency which may considerably deviate from the desired 8 MHz due to tolerances.
- the counter 2 counts the number of clock pulses during the display period of the line flyback signal (60 ⁇ sec) and reaches the counting value C.
- this counting value C is read by the control program.
- FIG. 6A shows by way of example how the clock frequency is adjusted as a function of time by means of the control program shown in FIG. 5 .
- the line flyback signal REF assumes the logic value “0”. This value is applied without any delay to the start-stop oscillator 1 by AND gate 42 so that clock signals are generated again.
- the delay element 41 can be realized by means a conventional counter, for example an N-bit shift register.
- the counting value C may be obtained in another manner.
- a first counter which receives the clock signal from the start-stop oscillator, count a predetermined number of clock pulses.
- this first counter generates a time interval whose duration is determined by the clock frequency.
- the duration of the said time interval is subsequently measured by a second counter by means of a further clock signal having a known frequency.
- a further clock signal is, for example, a crystal-controlled clock signal, which is already available for driving the microprocessor.
- the clock signal generator according to the invention is eminently suitable for integration with a character generator for On Screen Display (OSD) of operating information on the display screen of a television receiver.
- FIG. 11 shows an embodiment of such a character generator according to the invention.
- the character generator 10 comprises the start-stop oscillator 1 which generates the clock signal CLK for the counter 2 .
- the counter 2 is now not only adapted to generate the counting value C but also to generate a column number COL indicating the horizontal position of the characters to be displayed.
- the counter 2 supplies a line pulse H to a line and row counter 6 .
- FIG. 11 also shows a microprocessor 3 .
- This processor forms part of a television receiver and is adapted in a manner not further shown to control picture and sound functions as well as to tune to stations.
- the microprocessor is also connected by means of an address and data bus ADB to display memory 7 of the character generator 10 in order to store the character codes of characters to be displayed in this memory.
- the microprocessor 3 performs the control program required for adjusting the clock frequency.
- the microprocessor 3 is adapted to receive the counting value C of counter 2 and to apply the adjusting value F to start-stop oscillator 1 .
- An “interrupt request” input IRQ of the microprocessor also receives the line flyback signal REF from a deflection circuit (not shown) in the television receiver.
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Synchronizing For Television (AREA)
- Controls And Circuits For Display Device (AREA)
- Studio Circuits (AREA)
- Details Of Television Scanning (AREA)
Abstract
Description
Claims (10)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/397,021 US6456679B1 (en) | 1989-12-18 | 1995-03-01 | Phase-coupled clock signal generator and character generator comprising such a phase-coupled clock signal generator |
US10/211,895 US8451968B2 (en) | 1989-12-18 | 2002-08-02 | Phase-coupled clock signal generator and character generator comprising such a phase-coupled clock signal generator |
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL8903087 | 1989-12-18 | ||
NL8903087A NL8903087A (en) | 1989-12-18 | 1989-12-18 | PHASE COUPLED CLOCK SIGNAL GENERATOR AND CHARACTER GENERATOR FITTED WITH A PHASE COUPLED CLOCK SIGNAL GENERATOR. |
US62523590A | 1990-12-10 | 1990-12-10 | |
US1108093A | 1993-01-29 | 1993-01-29 | |
US10383093A | 1993-08-09 | 1993-08-09 | |
US08/397,021 US6456679B1 (en) | 1989-12-18 | 1995-03-01 | Phase-coupled clock signal generator and character generator comprising such a phase-coupled clock signal generator |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10383093A Continuation | 1989-12-18 | 1993-08-09 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/211,895 Continuation US8451968B2 (en) | 1989-12-18 | 2002-08-02 | Phase-coupled clock signal generator and character generator comprising such a phase-coupled clock signal generator |
Publications (1)
Publication Number | Publication Date |
---|---|
US6456679B1 true US6456679B1 (en) | 2002-09-24 |
Family
ID=19855794
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US08/397,021 Expired - Lifetime US6456679B1 (en) | 1989-12-18 | 1995-03-01 | Phase-coupled clock signal generator and character generator comprising such a phase-coupled clock signal generator |
US10/211,895 Expired - Lifetime US8451968B2 (en) | 1989-12-18 | 2002-08-02 | Phase-coupled clock signal generator and character generator comprising such a phase-coupled clock signal generator |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/211,895 Expired - Lifetime US8451968B2 (en) | 1989-12-18 | 2002-08-02 | Phase-coupled clock signal generator and character generator comprising such a phase-coupled clock signal generator |
Country Status (7)
Country | Link |
---|---|
US (2) | US6456679B1 (en) |
EP (1) | EP0436246B1 (en) |
JP (1) | JP3081255B2 (en) |
KR (1) | KR100201524B1 (en) |
DE (1) | DE69026362T2 (en) |
FI (1) | FI906171A (en) |
NL (1) | NL8903087A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004070937A2 (en) * | 2003-02-07 | 2004-08-19 | Philips Intellectual Property & Standards Gmbh | System and method for calibrating the clock frequency of a clock generator unit over a data line |
US20200044630A1 (en) * | 2018-07-31 | 2020-02-06 | Silicon Motion Inc. | Oscillator apparatus capable of protecting circuit element(s) within oscillator of oscillator apparatus from damage of signal glitch |
US20230299753A1 (en) * | 2022-03-16 | 2023-09-21 | Kabushiki Kaisha Toshiba | Electronic circuitry |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL8903087A (en) * | 1989-12-18 | 1991-07-16 | Philips Nv | PHASE COUPLED CLOCK SIGNAL GENERATOR AND CHARACTER GENERATOR FITTED WITH A PHASE COUPLED CLOCK SIGNAL GENERATOR. |
DE69609488T2 (en) * | 1996-05-15 | 2000-12-14 | Stmicroelectronics S.R.L., Agrate Brianza | Clock generator with three periods, which can be selected using a binary signal |
TW477149B (en) * | 2000-08-01 | 2002-02-21 | Acer Peripherals Inc | Method to resolve the EMI problem of the circuit system in the on-screen display menu |
DE10115385A1 (en) * | 2001-03-28 | 2002-10-10 | Siemens Ag | Method and device for increasing the pulse of a pulse output DDS |
KR100638875B1 (en) * | 2005-07-15 | 2006-10-27 | 삼성전기주식회사 | Ultra-low power radio frequency digital receiver |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1276025A (en) | 1968-12-09 | 1972-06-01 | Mohawk Data Sciences Corp | Noise insensitive time delay apparatus |
US4103251A (en) | 1977-05-05 | 1978-07-25 | The United States Of America As Represented By The Secretary Of The Navy | Stabilized delay line oscillator |
US4161750A (en) * | 1977-03-12 | 1979-07-17 | Robert Bosch Gmbh | Video alarm systems |
US4622586A (en) * | 1985-04-04 | 1986-11-11 | Rca Corporation | Digital slicer having a pulse-width locked loop |
US4646030A (en) | 1986-03-03 | 1987-02-24 | Tektronix, Inc. | Triggered frequency locked oscillator having programmable delay circuit |
US4672449A (en) * | 1984-09-03 | 1987-06-09 | U.S. Philips Corporation | Line deflection circuit for picture pick-up or display devices |
US4754163A (en) * | 1983-07-08 | 1988-06-28 | Hewlett-Packard Company | Pulse generator with adjustable pulse frequency, pulse width and pulse delay |
US4899139A (en) | 1982-08-24 | 1990-02-06 | Sharp Kabushiki Kaisha | Display control device for superimposing data with a broad case signal on a television screen |
EP0436246A1 (en) * | 1989-12-18 | 1991-07-10 | Koninklijke Philips Electronics N.V. | Character generator comprising a startstop oscillator |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
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JPS51111318A (en) | 1975-03-26 | 1976-10-01 | Nippon Hoso Kyokai <Nhk> | Recording and playing of voice signal in vtr |
DE3026473A1 (en) * | 1980-07-12 | 1982-02-04 | Robert Bosch Gmbh, 7000 Stuttgart | METHOD FOR COMPENSATING TIME ERRORS |
NL8104415A (en) * | 1981-09-25 | 1983-04-18 | Philips Nv | TUNING SHIFT WITH A FREQUENCY SYNTHESIS SHIFT. |
DE3446227A1 (en) | 1984-12-19 | 1986-06-19 | Robert Bosch Gmbh, 7000 Stuttgart | Circuit arrangement to generate a pulse string |
US4723114A (en) * | 1986-07-07 | 1988-02-02 | Texas Instruments Incorporated | Method and circuit for trimming the frequency of an oscillator |
CH675183A5 (en) * | 1987-11-23 | 1990-08-31 | Koechler Erika Fa | |
DE68915228T2 (en) * | 1988-09-02 | 1994-12-15 | Sanyo Electric Co | Phase synchronization circuit in a video signal receiver and method for producing the phase synchronization. |
DE4125219A1 (en) * | 1991-07-30 | 1993-02-04 | Pep Modular Computers Ag | HIGH-SPEED BUS SYSTEM AND METHOD FOR OPERATING THE SAME |
-
1989
- 1989-12-18 NL NL8903087A patent/NL8903087A/en not_active Application Discontinuation
-
1990
- 1990-12-13 EP EP90203285A patent/EP0436246B1/en not_active Expired - Lifetime
- 1990-12-13 DE DE69026362T patent/DE69026362T2/en not_active Expired - Lifetime
- 1990-12-14 FI FI906171A patent/FI906171A/en not_active Application Discontinuation
- 1990-12-14 KR KR1019900020574A patent/KR100201524B1/en not_active IP Right Cessation
- 1990-12-17 JP JP02411108A patent/JP3081255B2/en not_active Expired - Lifetime
-
1995
- 1995-03-01 US US08/397,021 patent/US6456679B1/en not_active Expired - Lifetime
-
2002
- 2002-08-02 US US10/211,895 patent/US8451968B2/en not_active Expired - Lifetime
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1276025A (en) | 1968-12-09 | 1972-06-01 | Mohawk Data Sciences Corp | Noise insensitive time delay apparatus |
US4161750A (en) * | 1977-03-12 | 1979-07-17 | Robert Bosch Gmbh | Video alarm systems |
US4103251A (en) | 1977-05-05 | 1978-07-25 | The United States Of America As Represented By The Secretary Of The Navy | Stabilized delay line oscillator |
US4899139A (en) | 1982-08-24 | 1990-02-06 | Sharp Kabushiki Kaisha | Display control device for superimposing data with a broad case signal on a television screen |
US4754163A (en) * | 1983-07-08 | 1988-06-28 | Hewlett-Packard Company | Pulse generator with adjustable pulse frequency, pulse width and pulse delay |
US4672449A (en) * | 1984-09-03 | 1987-06-09 | U.S. Philips Corporation | Line deflection circuit for picture pick-up or display devices |
US4622586A (en) * | 1985-04-04 | 1986-11-11 | Rca Corporation | Digital slicer having a pulse-width locked loop |
US4646030A (en) | 1986-03-03 | 1987-02-24 | Tektronix, Inc. | Triggered frequency locked oscillator having programmable delay circuit |
EP0436246A1 (en) * | 1989-12-18 | 1991-07-10 | Koninklijke Philips Electronics N.V. | Character generator comprising a startstop oscillator |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004070937A2 (en) * | 2003-02-07 | 2004-08-19 | Philips Intellectual Property & Standards Gmbh | System and method for calibrating the clock frequency of a clock generator unit over a data line |
WO2004070937A3 (en) * | 2003-02-07 | 2004-12-16 | Philips Intellectual Property | System and method for calibrating the clock frequency of a clock generator unit over a data line |
CN100374978C (en) * | 2003-02-07 | 2008-03-12 | Nxp子股份有限公司 | System and method for calibrating the clock frequency of a clock generator unit over a data line |
US20200044630A1 (en) * | 2018-07-31 | 2020-02-06 | Silicon Motion Inc. | Oscillator apparatus capable of protecting circuit element(s) within oscillator of oscillator apparatus from damage of signal glitch |
US10917075B2 (en) * | 2018-07-31 | 2021-02-09 | Silicon Motion, Inc. | Oscillator apparatus capable of protecting circuit element(s) within oscillator of oscillator apparatus from damage of signal glitch |
US20230299753A1 (en) * | 2022-03-16 | 2023-09-21 | Kabushiki Kaisha Toshiba | Electronic circuitry |
Also Published As
Publication number | Publication date |
---|---|
KR910013877A (en) | 1991-08-08 |
DE69026362D1 (en) | 1996-05-09 |
EP0436246A1 (en) | 1991-07-10 |
JP3081255B2 (en) | 2000-08-28 |
FI906171A0 (en) | 1990-12-14 |
EP0436246B1 (en) | 1996-04-03 |
DE69026362T2 (en) | 1996-10-02 |
FI906171A (en) | 1991-06-19 |
JPH03261996A (en) | 1991-11-21 |
KR100201524B1 (en) | 1999-06-15 |
US20020196888A1 (en) | 2002-12-26 |
NL8903087A (en) | 1991-07-16 |
US8451968B2 (en) | 2013-05-28 |
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