US5801594A - Quartz oscillator device and its adjusting method - Google Patents
Quartz oscillator device and its adjusting method Download PDFInfo
- Publication number
- US5801594A US5801594A US08/750,827 US75082797A US5801594A US 5801594 A US5801594 A US 5801594A US 75082797 A US75082797 A US 75082797A US 5801594 A US5801594 A US 5801594A
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- United States
- Prior art keywords
- temperature
- memory device
- data
- adjusting element
- control voltage
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- Expired - Fee Related
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- 238000000034 method Methods 0.000 title claims abstract description 6
- 239000010453 quartz Substances 0.000 title 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 title 1
- 239000013078 crystal Substances 0.000 claims abstract description 97
- 230000010355 oscillation Effects 0.000 claims abstract description 57
- 238000001514 detection method Methods 0.000 claims abstract description 23
- 239000004065 semiconductor Substances 0.000 claims description 10
- 230000015654 memory Effects 0.000 description 42
- 238000010586 diagram Methods 0.000 description 7
- 230000003321 amplification Effects 0.000 description 6
- 239000003990 capacitor Substances 0.000 description 6
- 238000003199 nucleic acid amplification method Methods 0.000 description 6
- 230000007423 decrease Effects 0.000 description 5
- 230000032683 aging Effects 0.000 description 2
- 238000005265 energy consumption Methods 0.000 description 2
- 238000004513 sizing Methods 0.000 description 2
- 239000000725 suspension Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/30—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator
- H03B5/32—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L1/00—Stabilisation of generator output against variations of physical values, e.g. power supply
- H03L1/02—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only
- H03L1/022—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature
- H03L1/023—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature by using voltage variable capacitance diodes
- H03L1/025—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature by using voltage variable capacitance diodes and a memory for digitally storing correction values
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/03—Astable circuits
- H03K3/0307—Stabilisation of output, e.g. using crystal
Definitions
- the present invention relates to a crystal oscillation apparatus with built-in temperature compensation function, and a method of adjusting this crystal oscillation apparatus.
- the crystal oscillation apparatus comprises crystal oscillating circuit; the oscillation frequency of the crystal oscillating circuit significantly shifts along with the change in temperature.
- a prior art crystal oscillating circuit as disclosed in Japan patent publication No.Heil-265708 controls the voltage to be applied to varactor diode, which is used as a frequency adjusting element of crystal oscillating circuit, by means of a control circuit.
- Said prior art control circuit has following constitution; suppose the temperature compensation has to be performed for a range of 130° C. between -35° C. and 95° C., the 300° C. range is divided into zones of 4° C. and temperature compensation data for each of the 4° C. zones are put into respective memory devices.
- temperature is detected by a temperature sensor, one out of the data of control voltage setting groups corresponding to the temperature detected is selected and picked up out of the memory device, thereby the oscillation frequency of crystal oscillating circuit is stabilized against variation of the ambient temperature.
- a problem with said prior art is that it needs memory device of large memory capacity; consequently, a large size semiconductor integrated circuits is needed to house the memory device and control circuits to control the large memory, such control circuits inevitably become complicated and consumes a large power.
- the temperature compensation data are prepared for each of the 4° C. zones, which data are stored in the memory of control voltage setting groups for performing the temperature-compensation by 4° C. interval from -35° C. to 95° C.; which means the memory device should have a capacity large enough for momorizing as many as 32 control voltage setting groups, large and sophisticated control circuits are needed to control the large memory, as a result a semiconductor integrated circuits containing the memory and the control circuits inevitably becomes large sized.
- control circuits to control the memory comprising 32 control voltage setting groups consume much power.
- the present invention is to provide an apparatus with which a semiconductor integrated circuits comprising memories and control circuits can be made smaller, hence consuming smaller power.
- the invented apparatus comprises a crystal oscillating circuit, a frequency adjusting element electrically coupled with the crystal oscillating circuit, and a control circuit for controlling the voltage to be applied to the frequency adjusting element;
- said control circuit comprises a temperature sensor, a temperature detecting section electrically coupled with the temperature sensor, a memory device electrically coupled with the temperature detecting section, an amplifier to which the memory device and said temperature sensor are electrically coupled, a first D/A converter electrically intervening between said memory device and temperature detecting section, a second D/A converter electrically intervening between said memory device and amplifier;
- said memory device comprises actually-operative control voltage setting groups counting not more than 8 groups, each of the control voltage setting groups has in the memory a temperature detection data, amplitude setting data, and an offset voltage data.
- the memory contains not more than 8 units of actually-operative control voltage setting groups, each of which groups is comprised of temperature detection data, amplitude setting data and offset voltage data. Therefore, a memory device having smaller memory capacity is suffice, and a simpler control circuit can control the memory of not more than 8 actually-operative control voltage setting groups, as a result the size of semiconductor integrated circuits containing the memory and control circuit is reduced.
- the smaller memory and the simpler control circuit can work on smaller power consumption.
- FIG. 1 is a block diagram of a crystal oscillation apparatus according to an embodiment of the present invention.
- FIG. 2 is a block diagram of a mobile telephone using the crystal oscillation apparatus of FIG.1.
- FIG. 3 is a perspective view of a TCXO exploded used in the crystal oscillation apparatus of FIG. 1.
- FIG. 4 is a block diagram of a voltage control crystal oscillating circuit used in the crystal oscillation apparatus of FIG. 1.
- FIG. 5 is a circuit diagram of an amplifier used in the crystal oscillation apparatus of FIG. 1.
- FIG. 6 is a circuit diagram of an adder and a sample hold circuit used in the crystal oscillation apparatus of FIG. 1.
- FIG. 7 is a time chart showing the operating condition of key part of the crystal oscillation apparatus of FIG. 1.
- FIG. 8 is a memory map of a memory device used in the crystal oscillation apparatus of FIG. 1.
- FIG. 9 is a chart showing the control voltage applied to varactor diode of a voltage control crystal oscillating circuit used in the crystal oscillation apparatus of FIG. 1.
- FIG. 10 is a chart showing the voltage applied to varactor diode of a voltage control crystal oscillating circuit, and the oscillation frequency in the crystal oscillation apparatus of FIG. 1.
- FIG. 2 is a block diagram of a mobile telephone; where numeral 1 denotes an antenna, provided between the antenna 1 and a receiver 2 are, from antenna 1, an antenna commoner 3, an amplifier 4, a band pass filter 5, a mixer 6, a band pass filter 7, a mixer 8, band pass filter 9, a demodulator 10, and a receiving signal processing circuit 11.
- a transmitter 12 and the antenna commoner 3 Provided between a transmitter 12 and the antenna commoner 3 are, from transmitter 12, a transmitting signal processing circuit 13, a modulator 14, a band pass filter 15, a power amplifier 16, and an isolator 17.
- the mixer 6 is coupled with a VCO/synthesizer 19 via band pass filter 18, the VCO/synthesizer 19 is coupled also with the modulator 14.
- TCXO temperature compensation type crystal oscillating circuit
- a signal generated at TCXO 21 is gradually doubled at VCO/synthesizer 19, which is supplied via band pass filter 18 to mixer 6 of receiving system, at the same time direct to modulator 14.
- VCO/synthesizer 19 is supplied via band pass filter 18 to mixer 6 of receiving system, at the same time direct to modulator 14.
- FIG. 1 and FIG. 3 The constitution of TCXO 21 in the present embodiment is shown in FIG. 1 and FIG. 3.
- numeral 23 denotes a base board.
- base board 23 On top of which base board 23, a crystal oscillator 24 and a semiconductor integrated circuits(hereinafter referred to as IC) 25 are mounted, and are covered and hermetically sealed with a metal case 26 covering the base board 23.
- IC 25 is as shown in FIG. 1 coupled at its Vcc terminal 27 with a battery 28 of mobile telephone shown in FIG. 2.
- the Vcc terminal 27 is coupled also with a power source regulator 29 for stabilizing the power supply.
- the power source regulator 29 is for supplying stable electricity to each of the parts shown in FIG. 1.
- a temperature sensor 30 built within the IC 25 is coupled with an amplifier 31 and a temperature detecting section 32, and supplies the detected temperature signal to the both.
- the temperature sensor 30 is comprised of a semiconductor diode, whose resistance value linearly decreases along with the temperature going from the low to high, thereby the output voltage shows a linear decrease.
- the amplifier 31 is comprised of a polarity reversing circuit 33, a variable attenuator 34, and an amplifying circuit 35.
- the polarity reversing circuit 33 is coupled with temperature sensor 30.
- the variable attenuator 34 is coupled with polarity reversing circuit 33, memory 36, and second D/A converter 37.
- the amplifying circuit 35 is coupled with memory 36 and variable attenuator 34. Between memory 36 and temperature detecting circuit 32, the first D/A converter 38 is intervening.
- An adder 39 is coupled with the amplifying circuit 35 of amplifier 31.
- the adder 39 is coupled via Vc terminal 40 with the control circuit 20 of mobile telephone shown in FIG. 2.
- the output of adder 39 is supplied via sample hold circuit 41 to voltage control crystal oscillating circuit 42, the output of voltage control crystal oscillating circuit 42 is supplied via Vout terminal 43 to VCO/synthesizer 19 shown in FIG. 2.
- numeral 44 denotes a power supply control section for intermittently operating the TCXO 21, which will be described later in detail, and 45 is a grounding terminal.
- a temperature detection data among the 8 control voltage setting groups stored in memory 36 is supplied via first D/A converter 38 to temperature detecting section 32 one after another as a second signal; and the first and the second signals are compared there.
- a stabilized DC voltage is supplied from the power source regulator 29 of FIG. 1 to amplifying circuits 46, 47.
- An oscillating circuit is constituted with amplifying circuit 46 and resistor 48 connected in parallel, and a crystal oscillator 24 is oscillated by the oscillating circuit.
- the oscillation output is supplied via amplifying circuit 47 and Vout terminal 43 to VCO/synthesizer 19 of FIG. 2.
- a plurality of varactor diodes 49 provided as frequency adjusting element to both input and output sides of the crystal oscillator 24 adjust the oscillation frequency.
- the capacitance of these varactor diodes 49 is adjusted in accordance with the level of DC voltage applied to the cathode of varactor diodes 49 via sample hold circuit 41 of FIG. 1. Thereby the oscillation frequency is adjusted.
- the overall capacitance of plural varactor diodes 49 disposed at the input side of crystal oscillator 24 is made to be equal to or larger than the overall capacitance of plural varactor diodes 49 disposed at the output side. The reason is for reducing the power consumption; if the capacitance at output side is larger, a larger current readily flows resulting in a large power consumption.
- the amplifier 31 is comprised of polarity reversing circuit 33, variable attenuator 34, and amplifying circuit 35, connected in series, details of which are shown in FIG. 5.
- the polarity reversing circuit 33 is comprised of an amplifying circuit 50 and two switching devices 51, 52. Each of the switching devices 51, 52 makes opposite switching action to each other, the amplification ratio of amplifying circuit 50 is 1, and the output of temperature sensor 30 is delivered to the reversal input terminal of the amplifying circuit 50.
- the ON and OFF operation of said switching devices 51, 52 is determined by digital data supplied from memory 36.
- an output from temperature sensor 30 bypasses the amplifying circuit 50 to be delivered as it is to variable attenuator 34 via switching device 51.
- variable attenuator 34 thus receiving the output from polarity reversing circuit 33 is for controlling the graduation by producing a preliminary graduation taking into account the eventual graduation to be obtained after amplification by the amplifying circuit 35.
- the variable attenuator 34 comprises 16 resistors 54 connected in series, and a plurality of switching devices 57, 58, two respective pieces of which form one switch set, for guiding the voltage between the ends of a selected resistor 54 to amplifying circuits 55, 56; wherein the selected switching devices 57, 58 are held ON at a same time.
- a couple of switching devices 57, 58 is determined depending on which NAND element 59, among several such elements, was selected by a digital data supplied from memory 36.
- resistors 60 are connected in series. As to which top end of resistors 60 is selected depends on which NAND element 61, among several such elements, was selected by a digital data supplied from memory 36. The top end voltage of selected resistor 60 is supplied to an amplifying circuit 62.
- a primary selection of voltage e.g. 8/16 V and 7/16 V
- a secondary voltage selection viz which voltage value between 8/16 V and 7/16 V is to be selected, is performed by the selection of a resistor 60 among the 16 resistors.
- amplifying circuit 53 As the amplification ratio of amplifying circuit 53 is fixed at e.g. 20 times, said output from amplifying circuit 62 inputted at the reversal input terminal is delivered as the output of -20 times. Thus, the graduation, polarity of which is fixed at said polarity reversing circuit 33, is set in this amplifying circuit 53.
- an analogue voltage is supplied from second D/A converter 37; the analogue voltage makes itself the offset voltage.
- the voltage whose polarity, graduation and offset are thus controlled at amplifier 31 is delivered to an adder 39.
- the constitution of adder 39 is as shown in FIG. 6.
- the output from amplifier 31 of FIG. 5 is supplied to the reversal input terminal of amplifying circuits 63, 64, having a-1 amplification; in a case when the oscillation frequency is shifted due to aging or other factors, a DC voltage is supplied to Vc terminal 40 from control circuit 20 of a mobile telephone of FIG. 2.
- a comparator 65 watches whether or not a DC voltage lower or higher than a specified value is delivered from the control circuit 20; when such voltage is supplied to the reversal input terminal, an OFF state is produced. Then a switching device 66 is turned ON, and 67 OFF. As a result, said DC voltage that is lower or higher than a specified value is supplied to the non-reversal input terminal of amplifying circuit 64; in a case when said lower voltage is supplied to the terminal, the voltage to be supplied to cathode of varactor diode 49 of FIG. 4 drops and the capacitance increases, and the oscillation frequency is lowered.
- the adder 39 prevents the shift of oscillation frequency due to aging or other causes.
- the sample hold circuit 41 is comprised of an amplifying circuit 68, a capacitor 69 connected to the non-reversal input terminal of the amplifying circuit, a switching device 70 provided at the input side, etc.
- the switching device 70 is repeated to open and close intermittently by the power supply control section 44 shown in FIG. 1; close for 10 ⁇ sec, open for 310 ⁇ sec, as shown in FIG. 7.
- the capacitor 69 While closing, the capacitor 69 is charged up to a DC voltage level set by each of the conditions hitherto established, and the DC voltage value to be supplied to the cathode of varactor diode 49 is determined by the the level of charging.
- the switching device 70 is opened the voltage charged in capacitor 69 decreases due to the self discharge. Therefore, the switching device 70 is closed again in 310 ⁇ sec for charging.
- the power supply control section 44 instructs to suspend power supply to all the amplifiers 31, adder 39, and first and second D/A converters 38, 37. This is intended to save the energy.
- the memory 36 repeats predetermined routine execution. Energy consumption is saved by the power supply control section 44 through the intermittent power supply to memory 36.
- the 2.56 msec is made as the time for power supply to memory 36, while the suspension time is set to be 10 sec.
- the memory 36 is comprised of EEPROM, whose data are rewritable.
- control voltage setting groups each group consisting of 4 bytes, in memory 36, as shown in FIG. 8.
- a temperature detection data is memorized in the 1st byte, a graduation setting data in the 2nd byte, a graduation setting data in the 3rd byte, and an offset voltage data in the 4th byte.
- the first control voltage setting group represents a first, from low temperature side towards high temperature side, linear control voltage(containing the polarity, graduation and offset voltage), the second control voltage setting group a second towards the high temperature side, the third control voltage setting group a third towards the high temperature side, the fourth control voltage setting group a fourth towards the high temperature side, the fifth control voltage setting group a fifth towards the high temperature side, the sixth control voltage setting group a sixth towards the high temperature side, the seventh control voltage setting group a seventh towards the high temperature side, and the eighth control voltage setting group an eighth towards the high temperature side; in this constitution, however, depending on the characteristics of crystal oscillator 24, the temperature compensation from the low temperature towards high temperature side may be completed without using the entire control voltage setting groups up to the eighth group.
- the greatest feature with the present embodiment is that the temperature compensation covering from the low to high temperature range can be linear-approximated using a number of the linear control voltages, eight at the most.
- a case 26 is attached on a board 23 as shown in FIG. 3 to hermetically seal-in an IC 25 and a crystal oscillator 24, then these members as they are put into a thermostatic chamber to write data in the memory there.
- the switching device 70 of FIG. 6 is kept open.
- thermostatic chamber The temperature of thermostatic chamber is raised from -30° C. gradually to 80° C.; meanwhile, at each 10° C., DC voltage is applied on varactor diode 49 via capacitor 69 and amplifying circuit 68 of FIG. 6.
- the first (from the low temperature) straight line of linear control voltage line T covers a region from -30° C. to -12° C., making a straight voltage control line connecting from 3.45 V to 2.54 V.
- the second line covers from -12° C. to +9° C., making a straight voltage control line connecting from 2.54 V to 2.33 V.;
- the third line covers from 9° C. to 43° C., making a straight voltage control line connecting from 2.33 V to 2.55 V.
- the fourth line covers from 43° C. to 63° C., making a straight voltage control line connecting from 2.55 V to 2.35 V.
- the fifth line covers from 63° C. to 80° C., making a straight voltage control line connecting from 2.35 V to 1.65 V.
- the above described data corresponding to each of the 5 straight voltage control lines are written respectively in the first to fifth control voltage setting groups of memory 36, as the temperature detection data, graduation setting data, and offset voltage data.
- a line L in FIG. 10 represents shifting frequency of the oscillation when the above described control voltage was not applied to.
- the line H of present embodiment is compared with the line L, it may be understood that the accuracy of invented apparatus is extremely high despite the fact that it is obtained through a linear approximation with 5 straight control voltage lines.
- the temperature detection data of each control voltage setting group in memory 36 is converted into DC voltage at the first D/A converter 38 of FIG. 1, and then supplied to temperature detecting section 32 to be compared with the present temperature detected by temperature sensor 30.
- the temperature sensor is comprised of semiconductor diode, the output voltage linearly decreases along with the increasing temperature.
- the graduation setting data and offset voltage data of corresponding control voltage setting group in memory 36 are read out.
- the graduation setting data is supplied to polarity reversing circuit 33 and variable attenuator 34 in amplifier 31 of FIG. 5.
- the offset voltage data is supplied to variable attenuator 34 and amplifying circuit 35 of FIG. 5 via second D/A converter 37, as described already.
- the present embodiment conducts a straight line approximation with linear control voltages numbering not more than 8. This is based on new findings that among the voltage control crystal oscillating circuits each one circuit has its own shape of control voltage zone (shown in FIG. 9), different to each other, and that despite the above fact the high precision control as accurate as +1 PPM is implementable with linear control voltages counting as many as 8.
- the invented apparatus comprises a crystal oscillating circuit, a frequency adjusting element electrically coupled with the crystal oscillating circuit, and a control circuit for controlling the voltage to be applied to the frequency adjusting element;
- said control circuit comprises a temperature sensor, a temperature detecting section electrically coupled with the temperature sensor, a memory device electrically coupled with the temperature detecting section, an amplifier to which the memory device and said temperature sensor are electrically coupled, a first D/A converter electrically intervening between said memory device and temperature detecting section, a second D/A converter electrically intervening between said memory device and amplifier;
- said memory device comprises actually-operative control voltage setting groups counting not more than 8 units, each of the control voltage setting groups has in the memory a temperature detection data, amplitude setting data, and an offset voltage data.
- the memory contains not more than actually-operative 8 control voltage setting groups, each of which groups is comprised of temperature detection data, amplitude setting data and offset voltage data. Therefore, a memory device of smaller memory capacity is suffice, and a simpler control circuit can control memories of not more than 8 actually-operative control voltage setting groups, as a result the size of semiconductor integrated circuits containing the memory and control circuit can be made smaller.
- the smaller memory and the simpler control circuit can work on a smaller power consumption.
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- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Oscillators With Electromechanical Resonators (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
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JP7-089331 | 1995-04-14 | ||
JP7089331A JPH08288741A (ja) | 1995-04-14 | 1995-04-14 | 水晶発振装置とその調整方法 |
PCT/JP1995/001285 WO1996032775A1 (fr) | 1995-04-14 | 1995-06-28 | Dispositif oscillateur a quartz et sa methode de reglage |
Publications (1)
Publication Number | Publication Date |
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US5801594A true US5801594A (en) | 1998-09-01 |
Family
ID=13967710
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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US08/750,827 Expired - Fee Related US5801594A (en) | 1995-04-14 | 1995-06-28 | Quartz oscillator device and its adjusting method |
Country Status (8)
Country | Link |
---|---|
US (1) | US5801594A (zh) |
EP (1) | EP0766376B1 (zh) |
JP (1) | JPH08288741A (zh) |
KR (1) | KR100235399B1 (zh) |
CN (1) | CN1063889C (zh) |
CA (1) | CA2192987C (zh) |
DE (1) | DE69528265T2 (zh) |
WO (1) | WO1996032775A1 (zh) |
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US5994970A (en) * | 1998-03-23 | 1999-11-30 | Dallas Semiconductor Corporation | Temperature compensated crystal oscillator |
US6049708A (en) * | 1997-01-24 | 2000-04-11 | Nec Corporation | Mobile communication apparatus for intermittently receiving a broadcasting signal at a corrected reception timing |
US6052036A (en) * | 1997-10-31 | 2000-04-18 | Telefonaktiebolaget L M Ericsson | Crystal oscillator with AGC and on-chip tuning |
US6131073A (en) * | 1996-06-07 | 2000-10-10 | Denso Corporation | Electronic circuit with an operating characteristic correcting function |
US6160458A (en) * | 1998-03-23 | 2000-12-12 | Dallas Semiconductor Corporation | Temperature compensated crystal oscillator |
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JP4895690B2 (ja) | 2006-06-01 | 2012-03-14 | パナソニック株式会社 | 関数生成回路 |
JP4524326B2 (ja) * | 2008-05-13 | 2010-08-18 | 日本電波工業株式会社 | 水晶発振器 |
JP6665408B2 (ja) * | 2015-02-18 | 2020-03-13 | セイコーエプソン株式会社 | 発振回路、電子機器、移動体及び発振回路の調整方法 |
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- 1995-06-28 DE DE69528265T patent/DE69528265T2/de not_active Expired - Fee Related
- 1995-06-28 CN CN95193377A patent/CN1063889C/zh not_active Expired - Fee Related
- 1995-06-28 WO PCT/JP1995/001285 patent/WO1996032775A1/ja active IP Right Grant
- 1995-06-28 CA CA002192987A patent/CA2192987C/en not_active Expired - Fee Related
- 1995-06-28 EP EP95923533A patent/EP0766376B1/en not_active Expired - Lifetime
- 1995-06-28 KR KR1019960707137A patent/KR100235399B1/ko not_active IP Right Cessation
- 1995-06-28 US US08/750,827 patent/US5801594A/en not_active Expired - Fee Related
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US6131073A (en) * | 1996-06-07 | 2000-10-10 | Denso Corporation | Electronic circuit with an operating characteristic correcting function |
US6049708A (en) * | 1997-01-24 | 2000-04-11 | Nec Corporation | Mobile communication apparatus for intermittently receiving a broadcasting signal at a corrected reception timing |
US6052036A (en) * | 1997-10-31 | 2000-04-18 | Telefonaktiebolaget L M Ericsson | Crystal oscillator with AGC and on-chip tuning |
US5994970A (en) * | 1998-03-23 | 1999-11-30 | Dallas Semiconductor Corporation | Temperature compensated crystal oscillator |
US6160458A (en) * | 1998-03-23 | 2000-12-12 | Dallas Semiconductor Corporation | Temperature compensated crystal oscillator |
US6414559B1 (en) | 1998-03-23 | 2002-07-02 | Dallas Semiconductor Corporation | Single package temperature compensated electronic device |
US6476682B1 (en) | 1998-03-23 | 2002-11-05 | Dallas Semiconductor Corporation | Method for calibrating a temperature sensitive oscillator |
US6703906B2 (en) * | 2000-02-15 | 2004-03-09 | Cardinal Components, Inc. | System and method for programming oscillators |
US6545550B1 (en) | 2000-07-17 | 2003-04-08 | Marvin E. Frerking | Residual frequency effects compensation |
US7209401B2 (en) | 2001-08-15 | 2007-04-24 | Robert D Norman | Ring oscillator dynamic adjustments for auto calibration |
US6853259B2 (en) * | 2001-08-15 | 2005-02-08 | Gallitzin Allegheny Llc | Ring oscillator dynamic adjustments for auto calibration |
US20050125181A1 (en) * | 2001-08-15 | 2005-06-09 | Norman Robert D. | Ring oscillator dynamic adjustments for auto calibration |
US7068557B2 (en) | 2001-08-15 | 2006-06-27 | Robert D Norman | Ring oscillator dynamic adjustments for auto calibration |
US20060197696A1 (en) * | 2001-08-15 | 2006-09-07 | Norman Robert D | Ring oscillator dynamic adjustments for auto calibration |
US20060250193A1 (en) * | 2001-09-21 | 2006-11-09 | Schmidt Dominik J | Integrated CMOS high precision piezo-electrically driven clock |
US9350360B2 (en) | 2002-10-15 | 2016-05-24 | Marvell World Trade Ltd. | Systems and methods for configuring a semiconductor device |
US9143083B2 (en) | 2002-10-15 | 2015-09-22 | Marvell World Trade Ltd. | Crystal oscillator emulator with externally selectable operating configurations |
US20040113709A1 (en) * | 2002-12-11 | 2004-06-17 | Dialog Semiconductor Gmbh. | High quality parallel resonance oscillator |
US6784757B2 (en) * | 2002-12-11 | 2004-08-31 | Dialog Semiconductor Gmbh | High quality parallel resonance oscillator |
US20060097808A1 (en) * | 2004-11-05 | 2006-05-11 | Nec Electronics Corporation | Semiconductor device and semiconductor chip |
US7469174B2 (en) * | 2005-07-15 | 2008-12-23 | Mitsubishi Denki Kabushiki Kaisha | Vehicle-borne electronic control device |
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US20080068107A1 (en) * | 2006-09-06 | 2008-03-20 | Luich Thomas M | High performance, flexible programmable clock circuit |
US8064221B2 (en) * | 2007-04-12 | 2011-11-22 | Nihon Dempa Kogyo Co., Ltd. | Electronic devices for surface mount |
US20080253102A1 (en) * | 2007-04-12 | 2008-10-16 | Nihon Dempa Kogyo Co., Ltd., | Electronic devices for surface mount |
US8669825B2 (en) * | 2011-04-18 | 2014-03-11 | Seiko Epson Corporation | Temperature-compensated oscillator and electronic device |
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US20120286890A1 (en) * | 2011-05-13 | 2012-11-15 | Seiko Epson Corporation | Temperature-compensated oscillator and electronic device |
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US9621107B2 (en) * | 2014-06-17 | 2017-04-11 | Seiko Epson Corporation | Oscillation circuit, oscillator, electronic apparatus, and moving object |
US20160211853A1 (en) * | 2015-01-19 | 2016-07-21 | Seiko Epson Corporation | Oscillator, electronic apparatus, and moving object |
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US10084459B2 (en) | 2015-01-19 | 2018-09-25 | Seiko Epson Corporation | Oscillator, electronic apparatus, and moving object |
US11290059B2 (en) * | 2016-11-03 | 2022-03-29 | Intel Corporation | Crystal oscillator interconnect architecture with noise immunity |
Also Published As
Publication number | Publication date |
---|---|
CA2192987C (en) | 2005-01-04 |
KR100235399B1 (ko) | 1999-12-15 |
EP0766376A4 (en) | 1998-08-26 |
DE69528265T2 (de) | 2003-01-23 |
JPH08288741A (ja) | 1996-11-01 |
CN1063889C (zh) | 2001-03-28 |
CA2192987A1 (en) | 1996-10-17 |
EP0766376A1 (en) | 1997-04-02 |
EP0766376B1 (en) | 2002-09-18 |
DE69528265D1 (de) | 2002-10-24 |
CN1149940A (zh) | 1997-05-14 |
WO1996032775A1 (fr) | 1996-10-17 |
KR970704266A (ko) | 1997-08-09 |
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