US4563654A - MOS-Transistor amplifier - Google Patents

MOS-Transistor amplifier Download PDF

Info

Publication number
US4563654A
US4563654A US06/581,271 US58127184A US4563654A US 4563654 A US4563654 A US 4563654A US 58127184 A US58127184 A US 58127184A US 4563654 A US4563654 A US 4563654A
Authority
US
United States
Prior art keywords
mos transistor
mos
electrode
source
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
US06/581,271
Other languages
English (en)
Inventor
Ikuya Arai
Toshinori Murata
Masafumi Kazumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=12141482&utm_source=***_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=US4563654(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Assigned to HITACHI, LTD., A CORP OF JAPAN reassignment HITACHI, LTD., A CORP OF JAPAN ASSIGNMENT OF ASSIGNORS INTEREST. Assignors: ARAI, IKUYA, KAZUMI, MASAFUMI, MURATA, TOSHINORI
Application granted granted Critical
Publication of US4563654A publication Critical patent/US4563654A/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/04—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
    • H03F3/16—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only with field-effect devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3205—Modifications of amplifiers to reduce non-linear distortion in field-effect transistor amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/34—DC amplifiers in which all stages are DC-coupled
    • H03F3/343—DC amplifiers in which all stages are DC-coupled with semiconductor devices only
    • H03F3/345—DC amplifiers in which all stages are DC-coupled with semiconductor devices only with field-effect devices

Definitions

  • This invention relates to an amplifier using MOS transistors (metal oxide semiconductor transistors).
  • LSI large-scale integrated circuits
  • An LSI having incorporated therein a CCD (charge coupled device) transversal filter for equalizing the waveform of video signal to remove the ghost mixed in a television signal is also one of the MOS analog LSIs.
  • This transversal filter includes a circuit for controlling the gain of an amplifier analog signal to the input signal.
  • the ghost mixed in a television signal has not only the same polarity as a video signal (desired signal) but opposite polarity thereto, and therefore in order to remove the ghost, it is necessary to properly control the gain of the non-inverted or inverted amplified video signal to the input video signal and thus to use two control signals therefor.
  • an amplifier is necessary which is suited to be integrated and has one input and two outputs, that is, non-inverted and inverted output signals the waveforms of which are the same.
  • FIG. 1 is a circuit diagram of a well-known differential amplifier with a load of resistors.
  • the input terminal 4 is connected to the gate electrode of the N-MOS transistor 5.
  • the anode of the biasing source 7 is connected to the gate electrode of the N-MOS transistor 6 and the anode of the biasing source 41 to the gate electrode of the N-MOS transistor 51.
  • the differential amplifier of FIG. 1 is excellent in the linearity of the amplification factor. To obtain a large voltage gain and to consume small power, it is necessary to select the load resistors to be of large value. Each of the resistors of large values needs a large area on the IC chip, and therefore the area of the chip must be large. Thus, a large-value resistor is not suited to be formed in an IC chip. This situation will be described below.
  • FIG. 2 shows the DC input-output characteristic of the differential amplifier of FIG. 1.
  • the abscissa shows an input voltage V in
  • the ordinate shows an output voltage V out
  • V 01 is inverted output signal
  • V 02 is a non-inverted output signal.
  • the actual usable range of the differential amplifier is the crossing portion with its vicinity of the outputs V 01 and V 02 , the slopes of which show the gains of the amplifier. Since the magnitudes of the gradients of the outputs V 01 and V 02 waveforms are the same and constant, the output signal waveforms are analogous to the input signal waveform, that is, good linearity can be achieved. However, for large voltage gains, the value of the load resistors must be large.
  • the voltage gain, Av can be expressed by
  • g m is the mutual conductance of the drive MOS transistors
  • R L is the load resistance value
  • the plus and minus signs, ⁇ show non-inverted and inverted outputs, respectively. Since the value of the mutual conductance g m is substantially constant, depending on the drive MOS transistors used, the value of load resistor R L must be increased for large gains. Generally to obtain the gains of several dB or above, the load resistance value must be selected to be several K ⁇ . If the load resistors of such value are formed on an IC chip, a large area is occupied on the chip by the resistors and in addition the actual resistance is deviates greatly from the target value. Therefore, it is difficult to produce circuits having good characteristics, and, hence, large-value resistors are not suited to be used in an IC.
  • FIG. 3 is a circuit diagram of another differential amplifier using loads of N-MOS transistors instead of the load resistors.
  • N-MOS transistors 22 and 23 for loads.
  • the gate electrodes of the N-MOS transistors 22 and 23 are connected to the power supply 1.
  • the differential amplifier of FIG. 3 can be small-sized because the loads used are not resistors. However, this amplifier has very poor linearity as compared with that of FIG. 1. The reason for this will be described below.
  • FIG. 4 shows the DC input-output characteristic of the differential amplifier of FIG. 3.
  • the abscissa indicates the input voltage V in , the ordinate the output voltage V out , V 03 the inverted output, and V 04 the non-inverted output.
  • those of FIG. 4 are unsymmetrical with respect to the line drawn through the crossing in the direction of abscissa. In other words, since the gradients of the output curves V 03 and V 04 are not constant, i.e., since the ratio between the input and output voltages is not constant, the linearity is poor.
  • FIG. 5 shows a curve of the resistance characteristic of the N-MOS transistors for loads.
  • the abscissa is the voltage V DS between the drain electrode and source electrode of each of the N-MOS transistors, and the ordinate is the on-resistance Ron-n thereof.
  • the drain-source voltages of the load-drive MOS transistors 5 and 51 are changed, and as a result the drain-source voltages V DS of the load MOS transistors 22 and 23 are changed.
  • the on-resistances Ron-n of the load transistors are changed with the change of the drain-source voltages V DS .
  • FIG. 1 is a circuit diagram of a conventional differential amplifier with resistors for load
  • FIG. 2 shows the DC input-output characteristic of the differential amplifier circuit of FIG. 1;
  • FIG. 3 is a circuit diagram of the differential amplifier with N-MOS transistors for load
  • FIG. 4 shows the DC input-output characteristic of the differential amplifier circuit of FIG. 3
  • FIG. 5 shows a curve of the on-resistance characteristic of the N-MOS transistor
  • FIG. 6 is a circuit diagram of a differential amplifier with a C-MOS transistor load according to this invention.
  • FIG. 7 shows the DC input-output characteristic of FIG. 6
  • FIG. 8 shows a curve of the on-resistance characteristic of the P-MOS transistor
  • FIG. 9 shows a curve of the on-resistance characteristic of the C-MOS transistor
  • FIG. 10 is a circuit diagram of a differential amplifier having a C-MOS transistor load and P-MOS transistors for the other portion;
  • FIG. 11 shows curves of the DC input-output characteristic of the differential amplifier of FIG. 10
  • FIG. 12 is a circuit diagram of an inverting amplifier having a C-MOS transistor load and an N-MOS transistor for driving the load;
  • FIG. 13 is a circuit diagram, of an inverting amplifier having a C-MOS transistor load and a P-MOS transistor for driving the load;
  • FIGS. 14 and 15 are circuit diagrams of different source followers with C-MOS transistors for loads, respectively.
  • FIG. 16 is a circuit diagram of a bias-voltage supply circuit connected to the gate electrodes of a C-MOS transistor.
  • FIG. 6 is a circuit diagram of one embodiment of this invention.
  • P-MOS P-channel MOS
  • FIG. 6 there are shown P-MOS (P-channel MOS) transistors 8 and 81 for loads having their source electrodes and drain electrodes connected in parallel to the drain electrodes and source electrodes of N-MOS transistors 22 and 23, respectively, and their gate electrodes connected to a common potential (ground).
  • the P-MOS transistors 8 and 81 for loads and N-MOS transistors 22 and 23 for loads constitute the so-called C-MOS transistors for the loads of a differential amplifier formed of the transistors 5 and 51.
  • FIG. 7 shows curves of the input-output characteristic of the differential amplifier of FIG.
  • FIG. 7 is almost the same as that of the conventional differential amplifier with resistance loads shown in FIGS. 1 and 2. The reason for this will be described below.
  • the on-resistance R on-n of the N-MOS transistor is changed by the value of the input signal V in .
  • the P-MOS transistor having the on-resistance characteristic of FIG. 8 is connected in parallel with the load of the N-MOS transistor to form a C-MOS transistor as a load.
  • the on-resistance characteristic of the C-MOS transistor is shown in FIG. 9. From FIG. 9, it will be seen that the value of the on-resistance R on-c of the C-MOS transistor is not much changed, or is substantially constant with the change of the drain-source voltage V DS , or the input voltage V in . Consequently, the differential amplifier with a C-MOS transistor for load has the same linearity as does the differential amplifier with resistance load.
  • FIG. 10 is a circuit diagram of a differential amplifier of another embodiment of the invention in which P-MOS transistors are used for load-driving transistors 52 and 53 and constant current source transistor 61.
  • an input reference biasing source (of V BB ) 42 there are shown an input reference biasing source (of V BB ) 42, the load-driving P-MOS transistors 52 and 53, the P-MOS transistor 61 for constant current source, and a biasing source 71 for the P-MOS transistor 61.
  • FIG. 11 shows curves of the DC input-output characteristic of the differential amplifier of FIG. 10.
  • the ordinate shows the output voltage V out , the abscissa the input voltage V in , V 07 the inverted output, and V 08 the non-inverted output.
  • the differential amplifier of FIG. 10 employs P-MOS transistors opposite in operation to the N-MOS transistor, and for driving the loads and making the constant current source, the DC outputs V out are low but the linearity is the same as that of the differential amplifier of FIG. 6, as shown in FIG. 11.
  • the gains of the differential amplifier of FIG. 10 can be determined by selecting the gates of the C-MOS transistors to be of a proper size. The power consumption thereof is as small as in the differential amplifier of FIG. 6.
  • FIG. 12 shows a single amplifier as still another embodiment of this invention.
  • the power supply 1, N-MOS and P-MOS transistors 22 and 8 as a load circuit
  • the output terminal 3 at which an inverted output signal is produced the signal input terminal 4
  • the N-MOS transistor 5 as a load-driving element.
  • the on-resistance R on-c of the C-MOS transistor as a load is constant. Therefore, the linearity of this inverter is substantially the same as that of the amplifier with resistance load, and the resistance values of the C-MOS transistors 8, 22 can be determined by properly selecting the size of the gates of the C-MOS transistor. The resistance value of the C-MOS transistor is increased with a decrease of the gate size, and as a result the power consumption of the circuit is reduced.
  • FIG. 13 is a circuit diagram of an inverting amplifier of a further embodiment in which the P-MOS transistor 52 is used as a load driving transistor.
  • the linearity is excellent.
  • the value of the load can be increased to a relatively large value by properly decreasing the size of the gates of the C-MOS transistor for the load.
  • a C-MOS transistor or C-MOS transistors are used as a load or loads, a relatively large value of load can be obtained in a simple manner and the power consumption can be decreased.
  • the load of C-MOS transistor has an almost constant on-resistance, the linearity is substantially the same as that of the circuit with resistance load.
  • the amplifying circuit of this invention is formed by only MOS transistors, this circuit occupies a small space when incorporated in an IC.
  • FIGS. 14 and 15 show different transistor amplifiers of source-follower configuration as further embodiments of this invention.
  • the C-MOS transistor 8, 22 is connected to the source electrode of the N-MOS transistor 5.
  • the C-MOS transistor 8, 22 is connected to the source electrode of the P-MOS transistor 52.
  • the linearity of the current amplification factor in FIGS. 14 and 15 is excellent.
  • FIG. 16 shows a bias-voltage supply circuit for supplying a bias voltage to the gate electrode of the C-MOS transistor.
  • a power supply 100 is connected to the gate electrode of the P-MOS transistor 8 (81), and a power supply 101 is connected to the gate electrode of the N-MOS transistor 22 (23).
  • the biasing circuit shown in FIG. 16 can be employed in the circuits of FIGS. 12, 13, 14 and 15.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Amplifiers (AREA)
US06/581,271 1983-02-18 1984-02-17 MOS-Transistor amplifier Expired - Fee Related US4563654A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP58024558A JPS59151510A (ja) 1983-02-18 1983-02-18 Ｃ−ｍｏｓ負荷型増幅器
JP58-24558 1983-02-18

Publications (1)

Publication Number Publication Date
US4563654A true US4563654A (en) 1986-01-07

Family

ID=12141482

Family Applications (1)

Application Number Title Priority Date Filing Date
US06/581,271 Expired - Fee Related US4563654A (en) 1983-02-18 1984-02-17 MOS-Transistor amplifier

Country Status (5)

Country Link
US (1) US4563654A (de)
EP (1) EP0121688B1 (de)
JP (1) JPS59151510A (de)
KR (1) KR900000992B1 (de)
DE (1) DE3463882D1 (de)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4641194A (en) * 1984-08-27 1987-02-03 Rca Corporation Kinescope driver in a digital video signal processing system
US4746875A (en) * 1986-03-21 1988-05-24 Deutsche Itt Industries Gmbh Differential amplifier using N-channel insulated-gate field-effect transistors
US4777451A (en) * 1986-09-13 1988-10-11 Fujitsu Limited Differential circuit
US5589785A (en) * 1994-04-29 1996-12-31 Analog Devices, Inc. Low-voltage CMOS comparator
US5600322A (en) * 1994-04-29 1997-02-04 Analog Devices, Inc. Low-voltage CMOS analog-to-digital converter
US5621409A (en) * 1995-02-15 1997-04-15 Analog Devices, Inc. Analog-to-digital conversion with multiple charge balance conversions
US5668551A (en) * 1995-01-18 1997-09-16 Analog Devices, Inc. Power-up calibration of charge redistribution analog-to-digital converter
US5852415A (en) * 1994-04-29 1998-12-22 Analog Devices, Inc. Charge redistribution analog-to-digital converter with system calibration
US20040150432A1 (en) * 2003-01-30 2004-08-05 Poulton Kenneth D. CMOS controlled-impedance transmission line driver
US20170179848A1 (en) * 2015-12-17 2017-06-22 Synaptics Japan Gk Cmos inverter circuit

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4841254A (en) * 1987-05-29 1989-06-20 International Business Machines Corp. CMOS precision gain amplifier
US5798660A (en) * 1996-06-13 1998-08-25 Tritech Microelectronics International Pte Ltd. Cascoded differential pair amplifier with current injection for gain enhancement
JPH11251848A (ja) * 1998-03-05 1999-09-17 Nec Corp チューナブルｍｏｓ線形トランスコンダクタンス・アンプ
JP2005223627A (ja) * 2004-02-05 2005-08-18 Asahi Kasei Microsystems Kk 演算増幅回路

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3913026A (en) * 1974-04-08 1975-10-14 Bulova Watch Co Inc Mos transistor gain block
JPS5341057A (en) * 1976-09-26 1978-04-14 Masao Takagi Drainage treating method
GB1592800A (en) * 1977-12-30 1981-07-08 Philips Electronic Associated Linear amplifier
GB2058248B (en) * 1979-09-12 1982-09-22 Butterworth System Inc Sealing arrangement

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Black et al., "CMOS Process for High-Performance Analog LSI", International Electron Devices Meeting, Technical Digest, 6-8, Dec. 1976.
Black et al., CMOS Process for High Performance Analog LSI , International Electron Devices Meeting, Technical Digest, 6 8, Dec. 1976. *

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4641194A (en) * 1984-08-27 1987-02-03 Rca Corporation Kinescope driver in a digital video signal processing system
US4746875A (en) * 1986-03-21 1988-05-24 Deutsche Itt Industries Gmbh Differential amplifier using N-channel insulated-gate field-effect transistors
US4777451A (en) * 1986-09-13 1988-10-11 Fujitsu Limited Differential circuit
US5852415A (en) * 1994-04-29 1998-12-22 Analog Devices, Inc. Charge redistribution analog-to-digital converter with system calibration
US5589785A (en) * 1994-04-29 1996-12-31 Analog Devices, Inc. Low-voltage CMOS comparator
US5600275A (en) * 1994-04-29 1997-02-04 Analog Devices, Inc. Low-voltage CMOS comparator with offset cancellation
US5600322A (en) * 1994-04-29 1997-02-04 Analog Devices, Inc. Low-voltage CMOS analog-to-digital converter
US5668551A (en) * 1995-01-18 1997-09-16 Analog Devices, Inc. Power-up calibration of charge redistribution analog-to-digital converter
US5621409A (en) * 1995-02-15 1997-04-15 Analog Devices, Inc. Analog-to-digital conversion with multiple charge balance conversions
US20040150432A1 (en) * 2003-01-30 2004-08-05 Poulton Kenneth D. CMOS controlled-impedance transmission line driver
US6909310B2 (en) * 2003-01-30 2005-06-21 Agilent Technologies, Inc. CMOS controlled-impedance transmission line driver
US20170179848A1 (en) * 2015-12-17 2017-06-22 Synaptics Japan Gk Cmos inverter circuit
US10270363B2 (en) * 2015-12-17 2019-04-23 Synaptics Japan Gk CMOS inverter circuit that suppresses leakage currents

Also Published As

Publication number Publication date
EP0121688B1 (de) 1987-05-20
JPS59151510A (ja) 1984-08-30
DE3463882D1 (de) 1987-06-25
KR900000992B1 (ko) 1990-02-23
KR840008091A (ko) 1984-12-12
EP0121688A1 (de) 1984-10-17

Similar Documents

Publication Publication Date Title
US5907259A (en) Operational amplification circuit capable of driving a high load
US6885234B2 (en) Resistance load source follower circuit
CA1229386A (en) Level conversion input circuit
US5939945A (en) Amplifier with neuron MOS transistors
US5266887A (en) Bidirectional voltage to current converter
US4563654A (en) MOS-Transistor amplifier
EP0037406B1 (de) Cmos - operationsverstärker mit verminderter verlustleistung
US7057459B2 (en) Semiconductor integrated circuit
US4484148A (en) Current source frequency compensation for a CMOS amplifier
US4544854A (en) Analog switch structure having low leakage current
US4893090A (en) Amplifier arrangement
US4247824A (en) Linear amplifier
JPH08204470A (ja) 演算増幅器
US5289058A (en) MOS operational amplifier circuit
US5831480A (en) Operational amplifier adopted for input and output in wide ranges for driving a large load
EP0142167A2 (de) Pegel-Verschiebungsschaltung
US4737732A (en) Low voltage operational amplifier having a substantially full range output voltage
CA1158727A (en) Driver circuit having reduced cross-over distortion
US5418475A (en) Input/output circuit having the input buffer circuit being connected in parallel with two transistors with the same polarity
US6624696B1 (en) Apparatus and method for a compact class AB turn-around stage with low noise, low offset, and low power consumption
US5164614A (en) Low power bias voltage generating circuit comprising a current mirror
US4603267A (en) Low offset single ended MOS comparator
US4480231A (en) Circuit for reducing offset voltage drift in differential amplifiers
US5059922A (en) High speed low offset CMOS amplifier with power supply noise isolation
US6316999B1 (en) Operational amplifier

Legal Events

Date Code Title Description
AS Assignment

Owner name: HITACHI, LTD., 6, KANDA SURUGADAI 4-CHOME, CHIYODA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNORS:ARAI, IKUYA;MURATA, TOSHINORI;KAZUMI, MASAFUMI;REEL/FRAME:004232/0371

Effective date: 19840206

FPAY Fee payment

Year of fee payment: 4

REMI Maintenance fee reminder mailed
LAPS Lapse for failure to pay maintenance fees
FP Expired due to failure to pay maintenance fee

Effective date: 19940109

STCH Information on status: patent discontinuation

Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362