US3882447A

US3882447A - Hall lantern apparatus for elevator system

Info

Publication number: US3882447A
Application number: US358428A
Authority: US
Inventors: Jr Clyde A Booker
Original assignee: Westinghouse Electric Corp
Current assignee: CBS Corp
Priority date: 1973-05-08
Filing date: 1973-05-08
Publication date: 1975-05-06
Anticipated expiration: 1992-05-06
Also published as: FR2228706A1; GB1473519A; ES426050A1; AU6793774A; DE2422248A1; JPS5015248A; BE814689A; AU473124B2; AU6808074A; FR2228706B1; JPS5926588B2; IT1013899B; CA998191A

Abstract

An elevator system for a building having a plurality of floors, an elevator car mounted to serve the floors, and hall lamps disposed at the floors which are selectively operated in response to predetermined actions of the elevator car. A matrix having a plurality of row conductors, column conductors, and associated row and column drivers is provided, with the hall lamps being connected between predetermined row and column conductors such that any selected hall lamp may be energized by activating its associated row and column driver.

Description

United States Patent [191 in] 3,882,447 Booker, Jr. May 6, 1975 [5 41 HALL LANTERN APPARATUS FOR 3,740,709 6/l973 Savino H 340/21 ELEVATOR SYSTEM [75] Inventor: Clyde A. Booker, Jr., Pittsburgh, Pa. Primary Examiner-Marsha Cums Attorney, Agent, or FirmD. R. Lackey [73] Assignee: Westinghouse Electric Corporation,

Pittsburgh, Pa.

[57] ABSTRACT [22] Filed: May 8, 1973 An elevator system for a building having a plurality of PP A28 floors, an elevator car mounted to serve the floors,

and hall lamps disposed at the floors which are selec- [52] CL 340/21, 187/28. 340/166 EL tively operated in response to predetermined actions [51] Int. Cl B66b 3/02 of the elevator can A matrix having a pluramy 0f row [58] Field of Search 340/19 21 166 EL mucmm comm" corducmrs and associated 187/28, and column drivers is provided, with the hall lamps being connected between predetermined row and col- [56] References Cited umn conductors such that any selected hall lamp may be energized by activating its associated row and col- UNITED STATES PATENTS umn driven 2,875,853 3/l959 Borden et al. 340/21 3,328,790 6/1967 Rhodes 340/166 EL 15 Claims, 6 Drawing Figures rmms 4e Tmms I CORRIDOR REMANNG CARS INTERFACE TIMING name 38 we We HATCNWAY 52 mum noon noon HA mm m T lius UERATOR I MOTOR SPEED m a g 55.5%? l PULSE IETE PATENTEU W 51975 SHEET 1 BF 5 TIMING-1, 4s TIMING-1 [II D ER SYSTEM 89 3a? CARS coNTRoL PROCESSOR HECTOR}:

+ 22 INTERFACE TIMING 56 3a 3Oth LANDlNG f UM fig cAR cALL SWITCHES 62 ooNTRoL IN y HATCHWAY TIMING-l 34 7 I 44 -36 g1 TO DOOR FLOOR HALL v- SS OPERATOR 'fsELEcToR LANTERNs 2nd LANDING OPERATOR 1 L MOTOR SPEED -...Ol TANCE DDNTRDLLER EQEE S' 4o F IG.|. 55 Is? LANDING PULSE DETECT0R\ 64 ofim E\ *THZSV CURRENT LIMITS M |T R N RESEHW) SHORT cIRcuIT 8+ ON 0 I G FIG 3 PROTECT 0N ENABLE CURRENT SOURCE IAvPs/ATsI sHuToowN SIGNAL I cuRRENT LIMIT AVPO F INDICATION SIGNAL DRIVER 2-cuRRI-:NTLIMIT INHIBIT DELAY IAVPZ TIMING(S2S) POSWDN DECODER ROWDRIVER a2 SECTOR SIGNALS INHIBIT (PSECO-PSECI) POSITION PSEC2-PSEC3 1g AVP3 SECTOR COLUMN AVP4-ad DECODING DRWERS UP/DOWN HALL LANTERN ENA LEs 1 4 QLHALL L WTERN a (HLUHLD ROW cAR POSITION Row ENABLE. ..DR'VERS MATRIX IAvP5/IWR5I Pmlimmm ems NOE PMENTEU HAY 75 SHEET a BF 5 mwoOowo mm NNN N M 9m EN EN O m ml-M mmmzmn 223 60 qmm m 4 mm I mm wm HALL LANTERN APPARATUS FOR ELEVATOR SYSTEM CROSS-REFERENCE TO RELATED APPLICATIONS Certain of the apparatus disclosed but not claimed in the present application may be claimed in one of the following concurrently filed co-pending applications:

Application Ser. No. 358,430, filed May, 8, I973, in the name of C. A. Booker, Jr. and A. F. Mandel, which application is assigned to the same assignee as the present application.

Application Ser. No. 358,429, filed May 8, 1973, in the name of A. F. Mandel, which application is assigned to the same assignee as the present application.

BACKGROUND OF THE INVENTION 1. Field of the Invention The invention relates in general to elevator systems, and more specifically to new and improved hall lantern apparatus for elevator systems.

2. Description of the Prior Art Elevator systems having one or more elevator cars mounted in a building to serve the floors conventionally include, for each car, up and down hall lanterns at each floor for which the car provides up and/or down service, respectively. Further, each hall lantern uses a separate wire and a separate driver for each lamp circuit. When using electromagnetic relay drivers, this prior art arrangement is of little consequence.

In certain elevator installations it is desirable to use solid state control and thus it would be desirable to replace the electromagnetic driver circuits for the hall lamps with solid state driver circuits. The hall lamps, however, are relatively high current devices in the ratings conventionally used for this function, and thus replacing electromagnetic relay drivers with solid state drivers is unattractive from an economic viewpoint.

SUMMARY OF THE INVENTION Briefly, the present invention is a new and improved elevator system including one or more elevator cars mounted in a building to serve a plurality of floors therein. Each elevator car has up and/or down hall lanterns associated with the floors it serves. Instead of using a solid state driver to drive each hall lamp, the present invention utilizes a matrix. The matrix includes a plurality of row and column conductors and associated row and column drivers connected thereto. The hall lamps are connected between selected row and column conductors, with any specific hall lamp being energized by activating its associated row and column drivers. This arrangement substantially reduces the number of drivers and external connections required.

If a specific building were to require 64 hall lamps, for example, an 8 X 8 matrix having 16 row and column drivers and I6 external connections would fulfill the requirements. A prior art arrangement for the same number of lamps would require 64 drivers and 64 external connections.

BRIEF DESCRIPTION OF THE DRAWINGS The invention may be better understood and further advantages and uses thereof more readily apparent, when considered in view of the following detailed description of exemplary embodiment, taken with the accompanying drawings, in which:

FIG. I is a block diagram of an elevator system which may utilize the teachings of the invention;

FIG. 2 is a graph which illustrates certain signals which may be used in the hall lantern apparatus constructed according to the teachings of the invention;

FIG. 3 is a block diagram of a new and improved hall lantern arrangement constructed according to the teachings of the invention;

FIGS. 4A and 4B are schematic diagrams which may be assembled to illustrate a specific embodiment of the invention shown in block form in FIG. 3; and

FIG. 5 is a partially schematic and partially block diagram of hall lantern circuits constructed according to another embodiment of the invention.

DESCRIPTION OF PREFERRED EMBODIMENTS FIG. 1

Referring now to the drawings, and FIG. 1 in particular, there is shown an elevator system 10 which may utilize the teachings of the invention. Elevator system 10 includes an elevator car 12, the movement of which may be controlled by a system processor 11. Since each car of a bank of cars, and the controls therefor, would be similar in construction and operation, only the controls for a single car 12 are illustrated and described.

More specifically, car 12 is mounted in a hatchway 13 for movement relative to a structure 14 having a plurality of landings, such as 30, with only the first, second and thirtieth landings being shown in order to simplify the drawing. The car 12 is supported by a rope 16 which is reeved over a traction sheave 18 mounted on the shaft of a drive motor 20, such as a direct current motor as used in the Ward-Leonard drive system, or in a solid state drive system. A counterweight 22 is connected to the other end of the rope I6. A governor rope 24 which is connected to the top and bottom of the car is reeved over a governor sheave 26 located above the highest point of travel of the car in the hatchway l3, and over a pulley 28 located at the bottom of the hatchway. A pick-up 30 is disposed to detect movement of the car 12 through the effect of circumferentially spaced openings 26A in the governor sheeve 26. The openings in the governor sheave are spaced to provide a pulse for each standard increment of travel of the car, such as a pulse for each 05 inch of car travel. Pick-up 30, which may be of any suitable type, such as optical or magnetic, provides pulses in response to the movement of the openings 26A in the governor sheave. Pickup 30 is connected to a pulse detector 32 which provides distance pulses for a floor selector 34. Distance pulses may be developed in any other suitable manner, such as by a pick-up disposed on the car which cooperates with regularly spaced indicia in the hatchway.

Car calls, as registered by push button array 36 mounted in the car I2, are recorded and serialized in car call control 38, and the resulting serialized car call information is directed to the floor selector 34.

Corridor calls, as registered by push buttoms mounted in the corridors, such as the up push button 40 located at the first landing, the down push button 42 located at the thirtieth landing, and the up and down push buttons 44 located at the second and other intermediate landings, are recorded and serialized in corridor call control 46. The resulting serialized corridor call information is directed to the system processor 11. The system processor 11 directs the corridor calls to the cars through an interface circuit, shown generally at 15, to effect efficient service for the various floors of the building and effective use of the cars.

The floor selector 34 processes the distance pulses from pulse detector 32 to develop information concerning the position of the car 12 in the hatchway 13, and also directs these processed distance pulses to a speed pattern generator 48 which generates a speed reference signal for a motor controller 50, which in turn provides the drive voltage for motor 20.

The floor selector 34 keeps track of the car 12 and the calls for service for the car, it provides the request to accelerate signal to the speed pattern generator 48, and provides the deceleration signal for the speed pattern generator 48 at the precise time required for the car to decelerate according to a predetermined deceleration pattern and stop at a predetermined fioor for which a call for service has been registered. The floor selector 34 provides signals for controlling the door operator S2, and it controls the resetting of the car call and corridor call controls when a car or corridor call has been serviced. The floor selector 34 also provides the signals for controlling the hall lanterns 54, with the present invention relating to new and improved hall lantern circuits for this block function 54.

Landing, and leveling of the car at the landing, is accomplished by a hatch transducer system which utilizes inductor plates 56 disposed at each landing, and a transformer 58 disposed on the car 12.

The motor controller 50 includes a speed regulator responsive to the reference pattern provided by the speed pattern generator 48. The speed control may be derived from a comparison of the actual speed of the motor and that called for by the reference pattern by using a drag magnet regulator, such as disclosed in US. Pat. Nos. 2,874,806 and 3,207,265, which are assigned to the same assignee as the present application. The precision landing system using inductor plates and transformer 58 is described in detail in US. Pat. No. 3,207,265.

An overspeed condition near either the upper or lower terminal is detected by the combination of a pick-up 60 and slow-down blades, such as a slow-down blade 62. The pick-up 60 is preferably mounted on the car 12, and a slow-down blade is mounted near each terminal. The slow-down blade has spaced openings, such as a toothed edge, with the teeth being spaced to generate pulses in the pick-up 60 when there is relative motion between them. These pulses are processed in pulse detector 64 and directed to the speed pattern generator 48 where they are used to detect overspeeds.

A new and improved floor selector 32 for operating a single elevator car, without regard to operation of the car in a bank of cars, has been disclosed in application Ser. No. 254,007, filed May 17, I972, now US. Pat. No. 3,750,850, which is assigned to the same assignee as the present application. Modification of the floor selector 32 to adapt it to bank operation and control by system processor 11 is disclosed in application Ser. No. 340,6l8 filed Mar 12, I973 now US. Pat. No. 3,804,209, which is assigned to the same assignee as the present application. In order to avoid duplication and to limit the complexity of the present application, these applications are hereby incorporated by reference, and will hereinafter be referred to as the first and second incorporated applications, respectively.

FIG. 2

The specific signals obtained from the floor selector 32 which are used by the hall lattem circuits 54 are AVPO-AVP6, which gives the floor number of the advanced car position in binary, Pt Ii, which goes low (true) each time the advanced car position changes floors, and clock signal 528. Signal AVPO-AVP6 is developed in a counter in FIG. 6 of the first incorporated application, WR is developed by the synchronizing circuit shown in FIG. 10 of the first incorporated application, and clock S28 is illustrated in FIG. 12A of the second incorporated application. FIG. 2 illustrates signal AVPO-AVP6 for each of the floors 0 through 64, as well as position sector signals PSECO-PSEC3. Signals PS ECO-PSEC3 are derived from bits AVP3 and AVP4 of signal AVPO-AVP6, as will be hereinafter described.

FIG. 3

FIG 3 is a block diagram of a new and improved hall lantern circuit arrangement which may be used for the block function 54 shown in FIG. I which is entitled hall lanterns. In prior art hall lantern circuits, an electromechanical relay is provided to drive each hall lantern. The first and second incorporated applications utilize solid state components in the floor selector, car station, car controller, system processor, and related circuits. Thus, it would be desirable to use solid state drive circuits for the lamps associated with the up and down hall lanterns placed at the various floors of the building served by an elevator car. Each elevator car of a bank of elevator cars would have its own group of hall lanterns associated with the hoistway in which the car operates and with the specific floors served by the car. The bottom fioor served by a car would only have an up hall lantern, the top floor served by a car would only have a down hall lantern, while the intermediate floors would have both up and down hall lanterns. An audible signal, such as a gong, is usually provided at each landing for each car serving the landing, which signal is initiated when its associated hall lantern, up or down, is energized, to draw prospective passengers attention to the location of the arriving car and its service direction.

The incandescent type of lamp conventionally used in the hall lantern circuits, draws a heavy initial current when energized which is many times its normal operat ing current. This large inrush current is due to the cold filament of the lamp, which has a lower resistance than the resistance of a filament which has reached its normal elevated operating temperature. The cost of semiconductor switching devices increases with the current rating of the device, and thus the cost of solid state or semiconductor switching devices required to carry the heavy inrush current of a lamp would be substantially greater than the cost of solid state devices selected on the basis of carrying only the normal operating current of a lamp.

Another problem in applying solid state drivers to lamp circuits is the possibility of lamp failure in a shorted mode, which would cause short circuit currents capable of quickly destroying solid state switching devices, even if they were selected on the basis of handling the high inrush current of a lamp.

Providing a solid state driver for each hall lantern is also quite costly in a tall building having a bank of elevator cars, since each driver would require several semiconductor swtiching devices, such as transistors, along with the necessary biasing resistors, rectifier diodes, and logic elements for turning the lamps on and off in synchronism with the elevator car and its stops.

In addition to the hall lanterns, each car includes a plurality of relatively small lamps associated with a car position indicator. The car position indicator lights a lamp associated with the floor of the advanced car position of the elevator car. When a car is stationary, the advanced car position is the floor at which the car is standing. When a car is moving, the advanced car position is that floor at which the car could make a normal stop according to a predetermined deceleration schedule. The car position indicator is conventionally operated from contacts disposed on the electromechanical floor selector. It would be desirable to provide solid state driver circuits for these lamps which are driven by signals from a solid state floor selector. However, the short circuit problem of the hall lantern circuitsjust described would also be applicable here, as would be the economic problem of requiring a large number of driver circuits for a car which serves a large plurality of floors.

The hall lantern arrangement 70 solves the current inrush problem, enabling each solid state driver circuit to utilize solid state switching devices selected such that they will be subjected to a limited value of inrush current. Current limited power supply means is provided which enables each solid state switching device to operate in a saturated mode when conducting normal lamp current. The current limited power supply protects each drive circuit from excessive currents, both inrush and short circuit. Thus, smaller, less costly solid state switching devices may be employed in the driver circuits.

Arrangement 70 also includes short circuit detection means which quickly removes a shorted load from the current limited power supply, preventing destruction of the switching devices in the power supply.

Arrangement 70 shown in FIG. 3 substantially reduces the number of solid state drive circuits required to drive a given number of hall lanterns, by utilizing a matrix arrangement which includes a plurality of solid state row and column drivers. The binary advanced car position signal AVPO through AVP6 is utilized to selectively energize a predetermined row and a predetermined column, energizing a lamp-diode circuit connected between the energized row and column. Thus, for example, an 8 by 8 matrix utilizing only l6 drivers will selectively energize 64 lamps, a saving of 48 solid state drivers, as well as a concomitant reduction in the number of external connections to the hall lantern circuit boards.

A matrix arrangement is used for the car position lamps associated with the car position indicator, as well as any other car position lamps, such as those which might be utilized above the car door at the main floor of the building, and those utilized in a traffic director station. The matrix for the car position indicator may be separated from the matrix used for the hall lanterns. However, in certain applications it will be advanta geous to combine them, as the same column drivers and conductors may be used for both functions. With a matrix 8 columns, for example, 8 car position lamps may be selectively energized for each car position row driver added to the matrix of the hall lanterns.

More specifically, the block diagram of FIG. 3 illustrates a new and improved hall lantern and car position arrangement 70, which includes a new and improved hall lantern and car position matrix 72 having a predetermined number of rows, each driven by a solid state row driver circuit, collectively shown generally at 74, and a predetermined number of columns, each driven by a solid state column driver circuit collectively shown generally at 76.

A new and improved power supply 78 provides a current limited drive voltage for the row drivers 74. As il lustrated in FIG. 3, the power supply 78 is connected to a source of unidirectional potential, indicated generally by terminal 80. The proper row driver is selected by a combination of signals which include position sector signals PSECO, PSECl, PSECZ and PSEC3, the 6th bit AVPS or AVPS of signal AVPO-AVP6, and the up and down hall lantern enable signals HLU and HLD, respectively. The position sector signals PSECll-P- SEC3 are provided by decoder 82, which decodes the 4th and 5th bits AVP3 and AVP4 of signal AVP- 0-AVP6.

Short circuit protection for the current limited power supply 78 is provided by a protective or current limit delay circuit 84. When the predetermined current limit is exceeded, power supply 78 provides a current limit indication signal which starts a timing circuit in the current limit delay circuit 84. The timing circuit is clocked by timing signals SZS, and it delays shutdown of the current limited power supply 78 for a time sufficient for a lamp filament to reach operating temperature and its current to settle to its normal operating current. If the current limit indication persists beyond the time required for the lamp current to settle to its normal value, the current limit delay provides a current source shutdown signal. The shutdown signal is applied to the power supply 78 to remove the drive from the power supply and reduce dissipation in the solid state circuits to zero. The shutdown signal is also applied to a drive inhibit circuit 86 which in turn provides a row driver inhibit signal. The row driver inhibit signal removes all loading from the power supply 78, which removes the current limit indication signal and allows the power supply 78 to return to normal operation. When the elevator car moves to another floor, signal F C R resets the drive inhibit circuit 86 and removes the row driver inhibit signal from the decoder 82. Thus, a short circuit associated with a lamp circuit only disables the power supply 78 for the specific lamp circuit involved, automatically returning the power supply 78 and row drivers 74 to normal operation when the elevator car moves to a floor having a non-shorted hall lantern circuit.

The column drivers 76 are driven by a decoder 88 which drives the proper column driver in response to a column enable signal, which is the 7th bit AVP6 or AVP6 of signal AVPO-AVP6, and the 3 least significant bits AVPO, AVPl and AVPZ of signal AVP- 0-AVP6.

FIGS. 4A and 4B FIGS. 4A and 48 may be assembled to provide a schematic diagram of a new and improved hall lantern and car position indicator arrangements which may be used to provide the functions of the block arrangement illustrated in FIG. 3. Like reference numerals in FIGS. 3, 4A and 48 indicate like functions.

The hall lantern and car position matrix 72 shown in FIG. 4B has been selected, for purposes of example, to illustrate 16 floors, but any number, up to 128 floors may be accomodated by extending the matrix, as will be hereinafter described.

Matrix 72 includes first and second sets of conduc tors, with the first set being referred to as row conductors and the second set as column conductors. Howeover. it is to be understood that the functions of the row and column conductors could be interchanged. Matrix 72 includes 8 columns, represented by

conductors

90, 92, 94, 96, 98, 100, l02 and 104, and 6 rows, represented by

conductors

106, 108, 110, 112, 114 and 116. All of the rows may be associated with drivers for up or down hall lanterns, if desired, but the hall lantern matrix provides an economical arrangement for obtaining an indication of the advanced car position for use by a car position indicator, A car position indicator is provided in each car. Additionally, a matrix similar to matrix 72, except directed entirely to the function of providing car position, may be used to provide a car position indicator for any other location, such as above the car door at the main floor, and/or at a traffic director station. Thus, matrix 72 combines the hall lantern function with the car position function to illustrate how the car position function may be easily added to the hall lantern function, and to illustrate how either may be used alone in a matrix.

Rows

106 and 108 are associated with the down hall lanterns. disposed at all floors for a specific car, except for the lowest floor served by the car,

rows

110 and 112 are associated with up hall lanterns, disposed at all floors for a specific car, except the uppermost floor served by the car, and

rows

114 and 116 are associated with car position lamps, which are disposed, for example, within the cab of the elevator car.

Row 106 and the seven

columns

92, 94, 96, 98, 100, l02 and 104 are associated with down hall lanterns for floors 1 through 7, and row 106 and the eight

columns

90, 92, 94, 96, 98, 100, 102 and 104 are associated with down hall lanterns for floors 8 through 15. The uppermost floor served by the associated elevator car is floor 15, and thus floor has a single hall lantern, i.e., a hall lantern for signaling the arrival of the advanced car position of the elevator car at the floor for down service. The down hall lantern for floor 15 requires a lamp 120, a diode 122, and a gong 124 or other suitable audible indicator, which devices are serially connected between row 108 and column 104. The diode 122 is poled to conduct current through the lamp 120 and gong 124 from the row to the column, with the diode being necessary to prevent back paths" and thus false operation of other hall lamps and gongs. Lamp-diodegong arrangements for down hall lanterns, similar to the arrangement for the 15th floor, may be connected from each of the two

rows

106 and 108 to each column, except from row 106 to column 90, since there will be no down hall lantern for the lowest floor served by the car. However, the floors which have both an up hall lantern and a down hall lantern preferably utilize a common gong or audible signal. Thus, the down hall lantern for the first floor may utilize a diode 126, a lamp 128, and a gong 130, serially connected from row 106 to column 92, and the up hall lantern for the first floor may utilize the same gong, as will be hereinafter explained. The remaining down hall lanterns, along with the diodes and gongs are not illustrated in FIG. 4B,

since it will now be apparent how they would be connected in the matrix 72.

Rows 110 and the eight

columns

90, 92, 94, 96, 98, lOO, I02 and 104 are connected with up hall lanterns for floors 0 through 7, and row 112 and the seven

columns

90, 92, 94, 96, 98, and 102 are associated with up hall lanterns for floors 8 through 14. The bottom floor served by the elevator car is floor zero, and thus floor zero has a single hall lantern, i.e., a hall lantern for signaling the arrival of the advanced car position of the elevator car at floor zero for up service. The up hall lantern for floor zero requires a lamp 132, a diode 134, and a gong 136, which are serially connected from row to column 90. The up hall lantern for the first floor may utilize the gong of the first floor, which has already been described relative to the down hall lantern for the first floor, by serially connecting a diode 138 and a lamp 140 from row 110 to the side of gong 130 which is not directly connected to column 92.

Car position lamps for the advanced car position indicator mounted in the car, or elsewhere, may be easily provided by utilizing the two

rows

114 and 116 to indicate car position. No additional column conductors and column drivers are necessary. For example, a lamp 142 and a diode 144 may be serially connected from row 114 to column 90, to indicate an advanced car position at floor zero, and a lamp 146 and a diode 148 may be serially connected from row 116 to column 90 to indicate an advanced car position at the eighth floor. A similar diode-lamp combination would be connected from each of the

rows

114 and 116 to each of the remaining columns to complete the car position indicator.

A selected lamp is energized by connecting the associated row to a source of unidirectional potential, and the associated column to ground, establishing a current path from the row, through the associated diode and lamp, and also the gong if the lamp is associated with a hall lantern.

The rows and columns are selected by energizing a row driver and a column driver, which will then energize one of the up or down hall lanterns, depending upon whether the up or down hall lanterns are enabled, and a car position lamp. The car position lamps are enabled for both the up and down hall lanterns,

Row drivers A through F are associated with

rows

106, 108, 110, 112, 114 and 116, respectively, and column drivers A through H are associated with

columns

90, 92, 94, 96, 98, 100, 102 and 104, respectively. Since the row drivers are similar in construction, only row driver F is shown in detail, and since the column drivers are similar in construction, only column driver A is shown in detail.

More specifically, row driver F includes a three input NAND gate 160, an inverter or NOT gate 162, first, second and third solid

state switching devices

164, 166, and 168, respectively, such as transistors, rectifier diodes 170, 172 and 174, and

resistors

176, 178, 180, 182, 184, 186 and 188. NAND gate has three input terminals A, B and C, with input terminal A being permanently enabled for car position row driver F by connecting it to a source of unidirectional potential, represented by terminal 190, via resistor 176. This input terminal A for the up and down lantern row drivers is connected to receive the up and down hall lantern enable signals HLU and HLD, respectively, which are received at

input terminals

192 and 194 from the call selector of the floor selector of the associated elevator car, as disclosed in the first and second incorporated applications. Signal l-ILU or l-ILD is provided when the car is going to stop at a predetermined floor and is enabled for up or down calls, respectively. Once installed, the signal persists until the car stops at the floor, opens its door, and the door open time expires.

Input terminal B of row driver F is connected to position sector signal PSECI which, as illustrated in FIG. 2, enables row driver F for floors 8 through 15. Row drivers B and D, which are also associated with floors 8-15 have the inputs of their associated NAND gates connected to row enable signal PSECI. Row enable signal PSECO, which, as illustrated in FIG. 2, enables floors through 7, is connected to the B input terminal of row drivers A, C and E. Position sector signals PSECZ and PSEC3 are not used in this embodiment, since they enable floors having a higher number than the number of floors of the building used in the example of the present embodiment. For example, if a building had 32 floors numbered 0 through 31 signal PSECZ would enable floors 16-23 and signal PSEC3 would enable floors 24-31.

The position sector decoding function 82 provides the position sector signals PSECO, PSECl, PSEC2 and PSEC3 by decoding the 4th and 5th bits AVP3 and AVP4 of the advanced car position signal AVP- 0-AVP6, such as by using four AND

gates

191, 193, I95 and 197, and four inverter or

NOT gates

199, 201, 203 and 205. The fourth bit AVP3 is connected to inputs of AND

gates

193 and 197 via

inverters

199 and 201, and the junction of inverters I99 and 201, which is bit AVP3, is connected to inputs of AND

gates

191 and 195. The 5th bit AVP4 is connected to inputs of AND

gates

195 and 197 via

inverters

203 and 205 and the junction of these inverters, which is bit AVFI, ,is connected to inputs of AND gates 19] and 193. Thus, when AVP3 and AVP4 are both high, which occurs when the advanced car position is at a floor in the group of floors 0 through 7, signal PSECO will high or true. Signal PSECl will be true when AVP3 and AVPz and both high, which occurs when the advanced car position is at a floor in the group of floors 8 through 15. Signal PSECZ will be true when AVP3 and AVP4 are both true, which occurs for floors 16-23. Signal PSEC3 will be true when AVP3 and AVP4 are both high, which occurs for floors 24-31. The sector signals then repeat for floors higher than 32 floors, in the same order as hereinbefore described.

The output of NAND gate 160 is connected to the input of inverter I62, and the output of inverter 162 is connected to input terminal 190 via resistor 178, and to switching device 164 via diode 170. Switching device 164 may be an NPN transistor, with the diode 170 connected to its base electrode b and poled to conduct current into the base and switch transistor 164 to its saturated state when the output ofinverter 162 is high. The base of transistor 164 is also connected to ground 198 via resistor 180. The collector electrode c of tran sistor 164 is connected to an input terminal D via a voltage divider which includes

resistors

182 and 184. Input terminal D of row driver F, as well as this same input terminal of the remaining row drivers is connected to the current limited and short circuit protected power supply 78, which will be hereinafter described, which power supply limits the amount of current which can be drawn by the switching devices of the row drivers. Thus, the solid state switching devices of the row drivers are selected to withstand the maximum current which will be provided by the power supply 78, and need not to be selected to take the normal high inrush current of a cold lamp. The solid state switching devices of the row drivers may thus be selected with a lower current rating than they would if the power supply was not current limited, since they can operate in a saturated mode when conducting. The solid state switching devices are also protected in the event of a shorted load because dissipation is limited. As will be hereinafter explained, the current limited power supply 78 is shut down if the maximum current provided by the power supply persists for a predetermined period of time beyond the time required for a lamp filament to reach its normal operating temperature and the current drawn by the lamp to settle to the normal value, in order to protect the solid state switching devices of the power supply 78. The emitter electrode e of transistor 164 is connected to ground 198, and to the anode electrode a of diode 172.

Solid state switching device 166, which may be a PNP transistor, has its base electrode b connected to the junction 200 between

resistors

182 and 184. Its emitter electrode e is connected to input terminal D, and its collector electrode c is connected to the cathode electrode c of diode 172 and to output terminal E, via resistor 186. Thus, when transistor 164 turns on, it provides base drive for transistor 166, switching it to its saturated condition. The collector electrode 0 of transistor 166 is also connected to switching device 168, which may be an NPN transistor, wherein the base electrode b of transistor 168 is connected to the collector electrode 0 of transistor 166. The collector electrode c of transistor 168 is connected to input terminal D via resistor 188, and its emitter electrode e is connected to output terminal E. Output terminal E is also connected to a source of unidirectional potential, indicated by terminal 202, via diode 174, which has its anode electrode a connected at output terminal E. This clamps the output voltage at output terminal E to a maximum level set by the voltage connected to the terminal 202. When transistor 166 conducts, it provides base drive for transistor 168, causing it to saturate and connect input terminal D to output terminal E. Output terminal E is connected to row conductor 116 of matrix 72.

In the operation of row driver F, when any input to NAND gate is low, the output of NAND gate 160 is high, which is inverted to logic zero by inverter 162, causing transistor 164 to be in its non-conductive state. When transistor 164 is non-conductive,

transistors

166 and 168 are also non-conductive, and row 116 of matrix 72 is not energized. If all inputs to NAND gate 160 are high, the output of NAND gate 160 is driven low, and inverter 162 then provides a logic one output turning on

transistors

164, 166, 168, and connecting row conductor 116 of matrix 72 to the output of the current limited power supply 78.

When one of the row drivers is turned on to energize a row of the matrix, one of the column drivers will also be turned on to connect a predetermined column to ground and thus energize the lamp connected from the energized row to the grounded column. A specific row driver is enabled by decoder 88 which decodes the three LSB of the advanced car position signal, i.e.,

1 l AVPO, AVPl and AVPZ. A low AVP6 bit enables the decoder, which thus enables decoder 88 for floors 63. Bit AVP6 is used for floors 64-127, as will be observed when describing another embodiment of the invention. Decoder 88, which for example may be Texas Instruments 3 to 8 line decoder SN 74 l 55, has a different low ouput for the 8 possible combinations of the three LSB of the advanced car position signal AVP- 0-AVP6. When the advanced car position is at floor zero or floor 8, output conductor 210 of decoder 88 which is connected to column driver A will be low, while the other output lines of decoder 88 will be high. Thus, the lamps associated with floor zero or floor 8 will be energized, depending upon which row is energized. In like manner, when the advanced car position is at floors 1 or 9, conductor 212 is connected to column driver B is driven low; when the advanced car position is at

floors

2 or 10 conductor 214 connected to column driver C is driven low; when the advanced car position is at

floors

3 or 11 conductor 216 connected to column driver D is driven low; when the advanced car position is at

floors

4 or 12 conductor 218 connected to column driver E is driven low, when the advanced car position is at

floors

5 or 13 conductor 220 connected to column driver F is driven low; when the advanced car position is at

floors

6 or 14 conductor 222 connected to column driver G is driven low; and, when the advanced car position is at

floors

7 or 15 conductor 224 connected to column driver H is driven low.

The column drivers are all similar, and may be constructed as illustrated for column driver A shown in FIG. 4B. Column driver A includes an inverter or NOT gate 230,

rectifier diodes

232, 234, and 236, solid

state switching devices

238 and 240, such as NPN transistors, and

resistors

242, 244, 246 and 248. The decoder 88 is connected to the input of inverter 230 via conduc tor 210, and the output of inverter 230 is connected to the base electrode b of transistor 238 via diode 232 which is poled to conduct current into the base. A source of unidirectional potential is also connected to the base electrode b of transistor 238 via resistor 242 and diode 232, with the source of unidirectional potential being represented generally by terminal 250. The base electrode b of transistor 238 is connected to ground 252 via serially connected

resistors

244 and 246. The collector electrode 0 of transistor 238 is connected to output terminal F and thus to column eonductor 90 of the matrix 72, and its emitter electrode e is connected to the junction between

resistors

244 and 246, which junction is also connected to the base electrode b of transistor 240. The collector electrode c of transistor 240 is connected to output terminal F via resistor 248, and its emitter electrode e is connected to ground 252. Diode 234 has its cathode and anode electrodes connected to output terminal F and ground 252, respectively, and diode 236 has its cathode electrode c and anode electrode a connected to a source of unidirectional potential, represented by terminal 254, and output terminal F, respectively. Diode 236 provides a clamp on the maximum voltage to which column 90 may rise,

In the operation of column driver A, when the output of decoder 88 connected to line 210 goes low, the inverter 230 provides base drive for transistor 238, turning it on, which then provides base drive for transistor 240, turning it on. Column conductor 90 of matrix 72 is thus connected to ground 252 via

resistor

248 and 12 transistor 240. When the output from the decoder 88 to a column driver is high, the inverter provides a logic zero level to the base of transistor 238, turning it off, which in turn turns transistor 240 off, and the associ- 5 ated column of the matrix is isolated from ground.

As hereinbefore stated, the power supply 78 con nected to the row drivers is limited as to the maximum current that it will supply, providing a limited inrush current through the transistors of the row and column drivers. Thus, the transistors, or any other solid state switching devices in the row and column drivers may be selected on this basis, substantially reducing the cost of these devices. The solid state switching devices in the current limited power supply 78 are selected to have substantial dissipation capabilities since the voltage drop across them is quite high during the current inrush when a lamp is energized. However, economies are effected even in the selection of these solid state switching devices, as they need not be selected on the basis of continuously providing current for a shorted load. The power supply 78 is automatically shut down when a predetermined magnitude of load current persists for a predetermined period of time.

More specifically, the current limit and short circuit protection functions are performed by the power supply 78, a current limit delay circuit 84, and a driver inhibit circuit 86. The power supply 78 includes solid

state switching devices

260, 262, 264, 266, 268 and 270, such as transistors, an inverter or NOt gate 272,

voltage regulating diodes

274 and 276, such as ZENER diodes,

rectifier diodes

278, 280 and 282, and

resistors

284, 286, 288, 290, 292, 294, 296 and 298.

Transistors

260 and 262, which may be PNP and NPN transistors, respectively, are interconnected between a source of unidirectional potential, represented by terminal 80, and an output terminal BP. The base of transistor 260 is connected to terminal 80 via

resistors

284 and 288, and the base is also connected to terminal 80 via Zener diode 274. The emitter electrode e of transistor 260 is connected to terminal 80 via resistor 288, and its collector electrode c is directly connected to the base electrode of transistor 262, and to the emitter electrode e of transistor 262 via bias resistor 286. The Zener diode 274 is selected, along with the value of resistor 288, to provide a predetermined maximum current output from this pair of transistors to terminal BP. In other words, the Zener diode 274 limits the base drive voltage which may be applied to transistor 260. The collector electrode 0 of transistor 262 is connected to terminal 80 via

resistors

290 and 288, and its emitter electrode e is connected to output terminal 8?.

Transistors

264 and 266, which may be PNP and NPN transistors, respectively, are interconnected between the source potential 80 and output terminal BP in the same manner as

transistors

260 and 262, with the base drive to transistor 264 also being limited by the voltage across Zener diode 247. Using a 1N959 Zener for Zener diode 274 and about ohms resistance for each of the

resistors

288 and 296 in the emitter circuits of

transistors

260 and 264, will cause the maximum current passed by each pair of transistors to output terminal BP to be about 375 mA. Other Zener diode ratings and resistor values may of course be chosen to obtain other maximum currents, as desired.

The short circuit protection function of power supply 78 includes

transistors

268 and 270. Transistor 268, which may be an NPN transistor, has its collector electrode connected to the Zener diode 274 via resistor 304, its emitter electrode e is connected to ground 312, and its base electrode b is connected to receive a signal from current limit delay circuit 84 via inverter 272 and a diode 278. Inverter 272 is connected between an input terminal 313 and the anode electrode a of diode 278. The cathode electrode 1' of diode 278 is connected to the base of transistor 268. The anode or diode 278 is connected to a source of unidirectional potential, represented by terminal 314, via resistor 300. The base electrode b of transistor 268 is also connected to ground 312 via bias resistor 302.

Transistor 270, which may be an NPN transistor, has its base electrode b connected to ground 312 via resistor 308, and also to the emitter electrode e of transistor 266 via diode 282, Zener diode 276 and diode 280. The cathode of diode 282 is connected to the base electrode b of transistor 270, the anode of diode 282 is connected to the anode of Zener diode 276, the cathode of Zener diode 276 is connected to the anode of diode 280, and the cathode of diode 280 is connected to the emitter of transistor 266. The junction between Zener diode 276 and diode 280 is connected to terminal 80 via resistor 306. The collector electrode 0 of transistor 270 is connected to a source of unidirectional potential, represented by terminal 316, via resistor 310, and also to the output terminal 318, which provides a signal for the current limit delay circuit 84. The emitter electrode e of transistor 270 is connected to ground 312.

As long as the signal from the current limit delay circuit 84, which is applied to input terminal 313 of power supply 78 is a logic zero, the output of inverter 272 will be high and transistor 268 will be turned on, connecting the Zener diode 274 to ground 312 via resistor 304, and allowing the power supply 78 to operate normally. When the power supply 78 is operating with a normal load current, the transistors which supply current to the output terminal BP are saturated and have a low dissipation. The Zener diode 276 is selected such that the voltage at the emitters of

transistors

262 and 266, when they are supplying normal load current, is high enough to exceed the breakdown voltage of the Zener and transistor 270 is turned on, providing a logic zero signal at output terminal 318. During lamp turn on, and under short circuit conditions, the transistors supplying current to the output terminal BP are forced out of saturation and their dissipation increases, dropping the voltage at the emitter electrodes of

transistors

262 and 266 below the breakdown voltage of Zener diode 276. Transistor 270 thus turns off and the signal at output terminal 318 goes to a logic one, indicating a current limit condition. Current limit delay circuit 84 receives this current limit indication signal and distinguishes between the normal current inrush during turn on of a lamp, from a short circuit condition, by timing the duration of the current limit signal. If the high current indication signal ceases before circuit 84 times out, no protective action is taken by circuit 84. If the high current indication signal from power supply 78 continues until circuit 84 times out, circuit 84 provides a logic one signal to the input of inverter 272 of power supply 78, turning transistor 268 off and shutting down the power supply 78.

Delay circuit 84 also removes the shorted load from the power supply 78 by providing a signal for driver inhibit circuit 86 which in turn provides driver inhibit signals for the position sector decoding circuit 82, removing the row-enable signals from the row drivers. Removing the shorted load from the power supply 78 enables the power supply 78 to be returned to normal status to await a change in car position to another floor, which presumably will not have a shorted lamp circuit associated with it. A change in the advanced car position of the elevator car resets the driver inhibit circuit 86 to reenable the correct row drivers with the position sector signals.

A current limit delay circuit for providing the delay function 84 shown in FIG. 3 is illustrated in FIG. 4A. Delay circuit 84 includes a time delay device 330, such as Texas Instruments retriggerable monostable multivibrator SN 74122,

NAND gates

332, 334, 336 and 338, a flip-flop 340, which may be of the cross coupled NAND gate type, having

NAND gates

342 and 344, inverter or

NOT gates

346 and 348, a source of unidirectional potential represented by terminal 350, a resistor 352, and a capacitor 354. Terminal 350, resistor 352 and capacitor 354 are connected to device 330 to es tablish the required time delay. A lamp filament will heat up and settle to its steady state current in less than 200 ms. Thus, the delay device and its external capacitor and resistor may be selected to provide a delay of 200 ms. before it times out. Its output terminal 6 is held low as long as device 330 does not time out. If the current limit signal persists for longer than 200 ms.,6 goes high.

NAND gate 332 has an input connected to terminal 318 of power supply 78 via inverter 346, an input connected to the output of NAND gate 344, which will be called the T3 output of flip-flop 340, and an input connected to clock SZS. Clock S28 is shown in FIG. 12A of the second incorporated application. The output of NAND gate 332 is connected to the Al input of device 330.

NAND gate 334 has an input connected to receive clock signal 828, an input connected to the B output of flip-flop 340, and its output is connected to the A2 input of delay device 330.

NAND gate 336 has an input connected to theTToutput of flip-flop 340, an input connected to output terminal 318 of power supply 78, and an input connected to the Goutput of delay device 330. Its output is connected to the set input of flip-flop 340, i.e., to an input of NAND gate 342.

NAND gate 338 has an input connected to terminal 318 of power supply 78 via inverter 348, an input connected to the B output of flip-flop 340, and its output is connected to the reset input of flip-flop 344, i.e., an input of NAND gate 344.

The B output of flip-flop 340 is additionally connected to input terminal 313 of power supply 78, and itsF output is additionally connected to the driver inhibit circuit 86.

The driver inhibit circuit 86 includes a flip-flop 360 which may be of the cross coupled NAND gate type, having

NAND gates

362 and 364, and inverter or

NOT gates

366 and 368. The set input to flip-flop 360, i.e., an input of NAND gate 362, is connected to the ioutput of flip-flop 340 of the delay circuit 84, and the reset input of flip-flop 360, i.e., an input of NAND gate 364, is connected to receive signal C 1?. Signal PCR goes low each time the advanced car position signal AVP- 0-AVP6 changes floor numbers, with the development of signal R l R being illustrated in the first incorporated application. The set output of flip-flop 360, i.e., the

output of NAND gate 362, is connected to the AVP4 inputs of AND

gates

195 and 197 via inverter 366, and to the W inputs to AND

gates

191 and 193 via inverter 368. Thus, when flip-flop 360 is reset, the driver inhibit output signals from

inverters

366 and 368 are at the logic one level and have no circuit effect. When flip-flop 360 is set, however, all the AND gates 191, I93, 195 and 197 are inhibited and thus all row drivers are inhibited.

The operation of the current limited power supply 78, delay circuit 84, and driver inhibit circuit 86 will now be described. When a row driver and column driver are energized to provided voltage for operating a hall lantern and a car position lamp, if car position lamps are included in the matrix, the normal inrush to the lamps is limited by action of Zener diode 274 in the power supply 78, but the inrush drives

transistors

262 and 266 out of saturation to drop the voltage at their emitter electrodes below the breakdown voltage of Zener diode 276. Transistor 270 thus cuts off and terminal 318 goes to logic one. The output of NAND gate 332, which was switching high and low at the rate of clock signal S25 is now held high by virtue of inverter 346 which now applies a logic zero to an input of NAND gate 332. The 8 output of flip-flop 340 is high at this time. The high output of NAND gate 332 starts the timing interval of delay device 330, such as the hereinbefore mentioned 200 ms. If the high current indication was due to a normal current inrush of a cold lamp, the current settles to a value, before delay device 330 times out, which will raise the voltage at the emitter electrodes of

transistors

262 and 266 above the breakdown voltage of Zener diode 276, turning transistor 270 on, and applying a logic zero signal to inverter 346 which in turn applies a logic one to the input of NAND gate 332, and NAND gate 332 once again starts switching at the clock rate to prevent delay device 330 from timing out. Therefore, the high current indication at terminal 318 does not result in any protective action being taken by the current limit delay circuit 84, as long as the high current indication disappears before the delay device 330 times out.

Now assume that a connected lamp filament fails in a shorted mode, or the energized lamp circuit is otherwise shorted. The high current indication at output terminal 318 remains high, causing delay device 330 to time out, and the 6 output, which has been held low, goes high. All inputs to NAND gate 336 are now high, the output of NAND gate 336 goes low and flip-flop 340 is set, changing its B output to a logic one and its 8 output to logic zero. The B output of flip-flop 340 applied to input terminal 313 of inverter 272 turns transistor 268 off and shuts down the power supply 78. The high B input to NAND gate 334 switches the output of NAND gate 334 at the clock rate to hold 6 high. The 8 output of flip-flop 340 goes low, setting the flip-flop 360 in the driver inhibit circuit 86, providing a logic one input to

inverters

366 and 368, which thus provides logic zero inputs to all of the AND gates of position secttor decoder 82. All of the row drivers are thus disabled, disconnecting the shorted load from the power supply 78. As soon as the shorted load is disconnected from the power supply 78, the voltage across Zener diode 276 exceeds its breakdown voltage rating due to its connection to terminal 80 via resistor 306. When Zener diode 276 breaks down, base drive is provided for transistor 270 and the current limit signal goes to logic zero. When terminal 318 goes low, NAND gate 338 switches its output to logic zero resetting flip-flop 340. Signal B goes low to turn on transistor 268 and start up the power supply 78. Signal l3 goes high to enable flipflop 360 and also enable NAND gate 332 which starts switching its output at the clock rate returning 6 to logic zero. The power supply 78 is thus placed back into operation, but at this point there is no load connected to it. When the elevator car changes its advanced car position, signal FC R goes low to reset flipflop 360, removing the inhibits from the AND gates in decoder 82. Thus, the complete circuit is returned to normal when the advanced car position of the elevator car is changed.

FIG. 5

FIG. 5 is a partially schematic and partially block diagram of a new and improved matrix 380 which illustrates how the matrix 72 shown in FIG. 48 may be extended to a structure having up to 128 floors when used only for up and down hall lanterns, or proportionately less when used in combination with a car position indicator. Like reference numerals in FIGS. 4A, 4B and 5 indicate like components.

As illustrated in FIG. 5, a hall lantern matrix for 31 floors may be constructed by adding two

additional row conductors

382 and 384 to the matrix shown in FIG. 4B, and two additional row drivers G and

H. Rows

106, 108, and 112 would accomodate down hall lanterns for floors 1-7, 8-15, 16-23 and 24-31, respectively, while

rows

114, 116, 382 and 384 would accomodate up hall lanterns for floors 0-7, 8-15, 16-23 and 24-30, respectively. Row drivers A and E would be enabled by position sector signal PSECO, row drivers B and F by signal PSECl, row drivers C and G by signal PSEC2, and row drivers D and H by signal PSEC3. No change would be required in the column driver portion of the circuit.

The matrix may be extended to 64 floor capability by adding 8 additional row drivers A through 11' and associated row conductors 106', 108, 110', l12',114', 116', 382', and 384'. No additional column conductors or column drivers are required to extend the matrix to 64 floors. The position sector signals are connected to the same row drivers as hereinbefore described. The only change required is to enable row drivers A through H with AVPS instead of A V FS. It will be noted from FIG. 2 that AVPS will enable floors 0-31, while AVPS will enable floors 32-63.

The number of floors which may be accomodated may be extended from 64 up to 128 by adding eight additional column drivers A through H, and a decoder 88'. No additional row drivers would be required to extend the matrix from 64 floors to 128 floors. The only change required in the column driver circuitry is to enable the decoder 88' with m instead of AVP6. It will be noted from P16. 2 that AVP6 is in only two states for 128 floors, and thus may be conveniently used to switch from one set of column drivers to the other when the advanced car position changes from floor 63 to floor 64. The position sector signals also repeat to automatically enable the proper row regardless of which set of column drivers are operative. For example, signal PSECO, in addition to enabling floors 0-7, also enables floors 64-71 associated with the same row 106 of the matrix. Thus, all of the 7 bits of the advanced car position signal AVPO-AVP6 are utilized to selectively enable the correct row and column ofa matrix to light a lamp associated with the advanced car position of the elevator car.

in summary, there has been disclosed a new and im proved elevator system which includes hall lantern ap paratus constructed and arranged to substantially reduce the number of lamp drivers and external connections. The new and improved elevator system includes a matrix having a plurality of row and column conductors and associated row and column drivers. Thus, instead of a driver and external connection for each lamp, the new and improved hall lamp circuits only require a driver for each row and column conductor, and the same number of external of connections. The hall lamps are connected between the rows and columns, with a specific lamp being selected by activating a row driver according to car position and service direction signals, and a column driver according to a car position signal.

I claim as my invention:

1. An elevator system comprising:

a building having a plurality of floors,

an elevator car mounted for movement in said building to serve the floors, means providing a position signal responsive to the location of the elevator car in said building,

means providing a first enable signal when said elevator car is preparing to stop at a floor and provide up service for that floor,

means providing a second enable signal when said elevator car is preparing to stop at a floor and provide down service for that floor,

up and down indicating means disposed at the floors of the building for which the elevator car provides up and down service, respectively,

a matrix having first and second sets of conductors and associated drivers,

each of said up and down indicating means being connected between predetermined conductors of said first and second sets of conductors,

each of said drivers being responsive to said position signal and each of the drivers associated with one of the sets of conductors being responsive to one of said first and second enable signals, to selectively activate predetermined drivers associated with the first and second sets ofconductors and energize an indicating means according to the floor at which the elevator car is preparing to stop and the service direction to be served by the car.

2. The elevator system of claim 1 wherein each conductor of the first set of conductors of the matrix is associated with a predetermined group of floors of the building and a predetermined service direction for those floors, with the position signal and one of the first and second enable signals selecting a driver connected to a conductor of the first set of conductors which is associated with the service direction of the elevator car and with a floor at which the elevator car is preparing to stop.

3. The elevator system of claim 2 wherein a driver connected to a conductor of the second set of conductors is selected in response to the position signal to select the indicating means of the selected driver conductor of the first set of conductors which is associated with the floor at which the elevator car is preparing to stop.

4. The elevator system of claim 1 wherein the floors of the building are divided into groups, with first and second different conductors of the first set of conductors of the matrix associated with each group, the up indicating means connected to the first conductors of the first set of conductors, and the down indicating means connected to the second conductors of the first set of conductors, and wherein the first enable signal is connected to the drivers associated with the first conductors and the second enable signal is connected to the drivers associated with the second conductors.

5. The elevator system of claim 1 wherein each indicating means includes a lamp and a rectifier diode serially connected between selected conductors of the first and second sets of conductors, with the rectifier diode being poled to energize only its associated lamp.

6. The elevator system of claim 5 including audible signal means disposed at certain of the floors, said audible signal means being connected between conductors of the first and second sets of conductors such that an audible signal means for a floor is activated when a lamp associated with that floor is energized.

7. The elevator system of claim 6 wherein a single audible signal means is provided for any one floor, connected in series with both the up and down lamps when associated with a floor for which the elevator car provides up and down service.

8. The elevator system of claim 1 wherein the means providing the position signal provides the signal in the form ofa binary word having a sufficient number of bits to represent each floor ofthe building served by the elevator car as a different binary number, with said binary word representing the actual floor position of the car when it is stopped, and the closest floor at which the car could make a normal stop when it is moving.

9. The elevator system of claim 8 including means responsive to predetermined bits of the binary word for selectively enabling the drivers associated with the first and second sets of conductors.

10. The elevator system of claim 8 wherein the binary word includes at least 4 bits. and wherein the second set of conductors includes eight conductors and associated drivers and including means responsive to the 3 least significant bits of the binary word for providing selective enable signals for these drivers.

11. The elevator system of claim 8 wherein the binary word includes at least 5 bits, and wherein each conduc tor of the first set of conductors is associated with a group of floors of the building, and including means responsive to the 4th and 5th bits of the binary word for providing selective enable signals for the driver means associated with the first set of conductors.

12. The elevator system of claim 8 wherein the binary word includes at least 6 bits, and wherein each conduc tor of the first set of conductors is associated with a group of up to and including eight floors of the building, and the second set of conductors includes at least eight conductors and associated driver means.

13. The elevator system of claim 12 including first and second groups of first sets of conductors and associated drivers, with a selected one of the first and second groups of drivers being enabled in response to the 6th bit of the binary word.

14. The elevator system of claim 8 wherein the binary word includes at least 7 bits, and wherein each conductor of the first set of conductors is associated with a group of up to 16 floors 0f the building, and the matrix includes first and second groups of the second sets of conductors and associated drivers, with a selected one of the first and second groups of drivers being enabled in response to the 7th bit of the binary word 15. The elevator system of claim 8 wherein the binary word includes at least 7 bits, and wherein the matrix includes first and second groups of first sets of conductors and associated drivers. with each driver of the first sets of conductors associated with up to and including l6 floors of the building, and first and second groups of second sets of conductors and associated drivers, with a selected one of the groups of drivers associated with the first sets of conductors being enabled in response to the 6th bit of the binary word, a selected one of the groups of drivers associated with the second sets of conductors being enabled in response to the 7th bit of the binary word, a driver of the enabled group of drivers associated with the first set of conductors being selected by means providing selection signals in response to the fourth and fifth bits of the binary word, and with a driver of the enabled group of drivers associated with the second group of conductors being selected by means providing a selection signal in response to the 3 least significant bits of the binary word.

Claims

1. An elevator system comprising: a building having a plurality of floors, an elevator car mounted for movement in said building to serve the floors, means providing a position signal responsive to the location of the elevator car in said building, means providing a first enable signal when said elevator car is preparing to stop at a floor and provide up service for that floor, means providing a second enable signal when said elevator car is preparing to stop at a floor and provide down service for that floor, up and down indicating means disposed at the floors of the building for which the elevator car provides up and down service, respectively, a matrix having first and second sets of conductors and associated drivers, each of said up and down indicating means being connected between predetermined conductors of said first and second sets of conductors, each of said drivers being responsive to said position signal and each of the drivers associated with one of the sets of conductors being responsive to one of said first and second enable signals, to selectively activate predetermined drivers associated with the first and second sets of conductors and energize an indicating means according to the floor at which the elevator car is preparing to stop and the service direction to be served by the car.

8. The elevator system of claim 1 wherein the means providing the position signal provides the signal in the form of a binary word having a sufficient number of bits to represent each floor of the building served by the elevator car as a different binary number, with said binary word representing the actual floor position of the car when it is stopped, and the closest floor at which the car could make a normal stop when it is moving.

10. The elevator system of claim 8 wherein the binary word includes at least 4 bits, and wherein the second set of conductors includes eight conductors and associated drivers and including means responsive to the 3 least significant bits of the binary word for providing selective enable signals for these drivers.

11. The elevator system of claim 8 wherein the binary word includes at least 5 bits, and wherein each conductor of the first set of conductors is associated with a group of floors of the building, and including means responsive to the 4th and 5th bits of the binary word for providing selective enable signals for the driver means associated with the first set of conductors.

12. The elevator system of claim 8 wherein the binary word includes at least 6 bits, and wherein each conductor of the first set of conductors is associated with a group of up to and including eight floors of the building, and the second set of conductors includes at least eight conductors and associated driver means.

14. The elevator system of claim 8 wherein the binary word includes at least 7 BITS, and wherein each conductor of the first set of conductors is associated with a group of up to 16 floors of the building, and the matrix includes first and second groups of the second sets of conductors and associated drivers, with a selected one of the first and second groups of drivers being enabled in response to the 7th bit of the binary word.

15. The elevator system of claim 8 wherein the binary word includes at least 7 bits, and wherein the matrix includes first and second groups of first sets of conductors and associated drivers, with each driver of the first sets of conductors associated with up to and including 16 floors of the building, and first and second groups of second sets of conductors and associated drivers, with a selected one of the groups of drivers associated with the first sets of conductors being enabled in response to the 6th bit of the binary word, a selected one of the groups of drivers associated with the second sets of conductors being enabled in response to the 7th bit of the binary word, a driver of the enabled group of drivers associated with the first set of conductors being selected by means providing selection signals in response to the fourth and fifth bits of the binary word, and with a driver of the enabled group of drivers associated with the second group of conductors being selected by means providing a selection signal in response to the 3 least significant bits of the binary word.