US3846646A

US3846646A - Control apparatus for supplying operating potentials

Info

Publication number: US3846646A
Application number: US00313349A
Authority: US
Inventors: E Peters
Original assignee: Owens Illinois Inc
Current assignee: Techneglas LLC
Priority date: 1972-12-08
Filing date: 1972-12-08
Publication date: 1974-11-05
Anticipated expiration: 1991-11-05

Abstract

There is disclosed a system for supplying operating potentials which is particularly useful with load devices wherein at least two transversely oriented conductors are dielectrically isolated from a gaseous discharge medium between the conductors. The system utilizes a wave form generator having at least one output transistor. Novel transformer-diode clamping means are provided to reverse bias the collector-base junction of the output transistor. The transformer-diode clamping means is responsive to the removal of a turn-on signal and the saturation of the transistor to automatically reverse bias the collector-base junction to provide a system which produces a more effective wave form. The wave form in the embodiment shown is used as a sustaining voltage for cells in a gas discharge display/memory panel. This embodiment of the transformer-diode clamping means is particularly effective when connecting the output of the wave form generator to ground.

Description

Peters Nov. 5, 1974 CONTROL APPARATUS FOR SUPPLYING OPERATING POTENTIALS [75] Inventor: Edwin F. Peters, Maumee, Ohio [73] Assignee: Owens-Illinois, Inc., Toledo, Ohio [22] Filed: Dec. 8, 1972 [211 App]. No.: 313,349

[52] US. Cl 307/268, 307/237, 307/263, 315/169 TV [51] Int. Cl.. [103k 17/04, G06k 15/18, 1-105b 41/29 [58] Field of Search 315/169 TV, 169 R; 307/268, 261, 263, 280, 237

[56] References Cited UNITED STATES PATENTS 3,155,921 11/1964 Fischman 307/261 X 3,470,391 9/1969 Granger 307/268 X 3,588,597 6/1971 Murley 315/169 3,654,388 4/1972 Slottow et al. 315/169 TV 3,700,928 10/1972 Milberger et al. 307/268 3,706,023 12/1972 Yamada et al. 315/169 TV Primary ExaminerRudolph V. Rolinec Assistant Examiner-William D. Larkins Attorney, Agent, or Firm-Donald Keith Wedding [57] ABSTRACT There isdisclosed a system for supplying operating potentials which is particularly useful with load devices wherein at least two transversely oriented conductors are dielectrically isolated from a gaseous discharge medium between the conductors. The system utilizes a wave form generator having at least one output transistor. Novel transformer-diode clamping means are provided to reverse bias the collector-base junction of the output transistor. The transformer-diode clamping means is responsive to the removal of a turn-on signal and the saturation of the transistor to automatically reverse bias the collector-base junction to provide a system which produces a more effective wave form. The wave form in the embodiment shown is used as a sustaining voltage for cells in a gas discharge display/- memory panel. This embodiment of the transformer diode clamping means is particularly effective when connecting the output of the wave form generator to ground.

11 Claims, 7 Drawing Figures 'l'V l l l l I BZTI WAVE FQRM I PULSE I PULL-UP I UP "ON" CIRCUIT l oca PULSE DOWN "ON PATENIEDnnv 5 1924 SIIUIN 4 INTERFACE 8- ADDRESSING CIRCUIT PATENTEURUV sum sum 20: 4

m QLH CONTROL APPARATUS FOR SUPPLYING OPERATING POTENTIALS BACKGROUND OF THE INVENTION In the Baker, et al. US. Pat. No. 3,499,167, issued Mar. 3, 1970, there is disclosed a multiple discharge display and/or memory panel which may be characterized as being of the pulsing discharge type having a gaseous medium, usually a mixture of two gases at a relatively high gas pressure, in a thin gas chamber or space between opposed dielectric charge storage members which are backed by conductor arrays. The conductor arrays backing each dielectric member are transversely oriented to define or locate a plurality of discrete discharge volumes or sites and constitute a discrete discharge unit. In some cases, the discharge units may be additionally defined by physical structures such as perforated glass plates and the like and in other cases capillary tubes and like structures may be used. In the above-identified patent application of Baker, et al., physical barriers and isolation members for discrete discharge sites have been eliminated. In such devices, charges (electrons and ions) produced upon ionization of the gas at a selected discharge site or conductor crosspoint, when proper operating potentials are applied to selected conductors thereof, are stored upon the surfaces of the dielectric at the selected locations or sites and constitute an electrical field opposing the electrical field which created them. After a firing potential has been applied to initiate a discharge, the electrical field created by the charges stored upon the dielectric members aids in initiating subsequent momentary or pulsing discharges on succeeding half-cycles of an applied sustaining potential so that the applied sustaining potential, and hence the storage charges indicate the previous discharge condition of a discharge unit or site and can constitute an electrical memory.

In dynamic operation, in addition to the sustaining voltages, writing and erasing pulses may be superimposed on and algebraically added to the sustaining wave forms applied to selected transverse conductor pairs in the conductor arrays to manipulate discharge conditions of discharge sites. Some of the preferred types of circuits for supplying the sustaining potentials, and for generating the manipulating pulses to be added to the sustaining potentials, utilize output transistors which are driven into deep saturation to abruptly switch the wave form from one potential level to another. Difficulties have been encountered in the past, in that when a transistor is turned on and driven into deep saturation, it is difficult to bring the transistor out of saturation and turn it off quickly. This makes control of the shape of the trailing edge of the wave form difficult, may interfere with the addition of manipulating pulses, etc. and is undesirable.

Diode clamping circuits have been proposed and are useful in certain applications for bringing the transistor out of saturation within the time limits of those systems. However, as the switching speeds increase and as the type of wave forms applied as sustaining potentials and as manipulating pulses become more complex, the diode clamping circuit is not suitable for all applications.

Accordingly, it is an object of this invention to provide an improvedsystem for supplyingoperating potentials to load devices, particularly wherein the load devices are of the gas discharge display/memory type.

It is another object of this invention to provide im proved voltage wave form generating means which includes at least two sections, each of the sections having an output transistor to connect first and second potential levels to the load device. In a preferred embodiment an output transistor senses the removal of a turnon signal to the transistor and the saturation of the transistor to automatically reverse bias a collector-base junction of the transistor enabling the transistor to turn off quickly.

It is a further object of this invention to provide improved control apparatus for transistors which are operable to connect a load device input to ground enabling a novel transformer-diode clamping circuit to automatically bring the transistor out of saturation after flow of discharge currents from the load device and permit the transistor to turn off" more quickly.

SUMMARY OF THE INVENTION The invention is disclosed and described herein in a system for supplying operating potentials to a gas discharge display/memory device of the type disclosed and described in my copending application filed concurrently with this application and also entitled Control Apparatus for Supplying Operating Potentials. A wave form generating means is shown which includes at least two sections, a first of the sections being operative to connect a first potential level to the output of the generator, while a second of the sections is operative to connect a second potential level to the output, the output being connected to conductors in the array of the gas discharge device, either directly or thru line to line isolation elements, such as diodes.

Each of the output sections preferably includes at least one output transistor means operating as a switching means between its respective potential level and the output of the wave form generating means. Each of the transistors has a collector, base and emitter electrode and a collector-base junction.

Means are provided for selectively applying turn-on signals to the base electrodes of each of the output transistor means, the signals being sufficient in magnitude to drive each of the output transistors into saturation. Means may also be provided for selectively applying turn-off signals to the output of one of the transistor means. Means responsive to the turn-off signals for the one transistor means selectively establishes current flow through the collector-base junction of that output transistor to reverse bias the collector-base junction to bring that transistor out of saturation and enable the output transistor to turn off quickly. This circuit is not shown in detail herein but is included herein by reference to my copending application noted hereinbefore.

Reverse bias establishing means are provided for both of the output transistors discussed herein, and each includes a transformer having primary and secondary windings, an isolating rectifier means, and means for connecting a reverse bias source to the primary winding of the transformer. There are two embodiments of the reverse bias establishing means discussed herein, each useful in a particular application. Both of the reverse bias establishing means may be generically described as having at least one of the primary and secondary windings connected ina circuit across the collector-base junction of the output transistor with the isolating rectifier means. The isolating rectifier means is connected to prevent current flow from a collector electrode through one or more windings of the transformer in response to potential differences establishing a forward bias across the collector-base junction.

The primary winding of the transformer of both of the reverse bias establishing means may be generically described as being connected to receive current from a reverse bias source which will induce a potential on the secondary winding which will cause current flow through the isolating rectifier in a forward direction and through the collector-base junction in a direction to reverse bias the collector-base junction and discharge the minority carriers from the saturated junction to enable the transistor to turn of quickly.

Specifically, the novel embodiment of the reverse bias establishing means described and disclosed herein has the primary winding connected directly between one side of a reverse bias source through the isolating rectifier to the collector electrode of the output transistor. The rectifier prevents current flow in the primary winding from the collector electrode. The secondary winding is directly connected between the base electrode and the other side of the reverse bias source so that current flow in the primary winding from the reverse bias source is automatically enabled when the transistor becomes saturated and will induce a voltage on the secondary winding which will reverse bias the collector-base junction of the transistor.

There is also described means for selectively applying turn-on signals to the base electrode of the output transistor of the preferred embodiment herein, which includes switching means responsive to turn-on signal to connect a turn-on source to the output transistor. The switching means is interposed between a turn-on source and the base electrode of the output transistor. The bias source may be derived from the turn-on source, or vice versa, so that only a single such source or a single set of connections to such source is required.

' which:

FIG. 1 is a partially cut-away plan view of a gaseous discharge display/memory panel as connected to a diagrammatically illustrated source of operating potentials;

FIG. 2 is across-sectional view (enlarged, but not to proportional scale since the thickness of the gas volume, dielectric members and conductor arrays have been enlarged for purposes of illustration) taken on lines 2 2 of FIG. 1;

FIG. 3 is a diagrammatic layout of a system for supplying sustaining voltage for a gaseous discharge display/memory panel;

FIG. 4 is a graphical representation of cell sustaining voltage which may be supplied by the system of FIG. 3 and cell current flow in response to application of the sustaining voltage thereto and/or to gaseous discharges;

FIG. 5 is a schematic diagram of a circuit embodying the teachings of this invention for supplying sustaining voltage to the row conductors of the panel; and

FIG. 6 is a graphical representation of the sustaining voltage supplied by the apparatus of FIG. 5 in response to the graphically represented input pulses from the row logic circuits.

FIG. 7 is a schematic diagram of the "PULL-UP CIR- CUIT of FIG. 5.

DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention utilizes a pair of dielectric films 10 and 11 shown in FIG. 1 and 2 as separated by a thin layer or volume of a gaseous discharge medium 12, the medium 12 producing a copious supply of charges (ions and electrons) which are alternately collectable on the surfaces of the dielectric members at opposed or facing elemental or discrete areas X and Y defined by the conductor matrix on non-gas-contacting sides of the dielectric members, each dielectric member presenting large open surface areas and a plurality of pairs of elemental X and Y areas. While the electrically operative structural members such as the dielectric members 10 and 11 and conductor matrixes I3 and 14 are all relatively thin (being exaggerated in thickness in FIGS. 1 and 2) they are formed on and supported by rigid

nonconductive support members

16 and 17 respectively.

Typically, one or both of

nonconductive support members

16 and 17 pass light produced by discharge in the elemental gas volumes. Usually, they are transparent glass members and these members essentially define the overall thickness and strength of the panel. For example, the thickness of gas layer 12 as determined by spacer 15 is usually under 10 mils and typically about 4 to 6 mils, dielectric layers 10 and 11 (over the conductors at the elemental or discrete X and Y areas) are usually between 1 and 2 mils thick, and

conductors

13 and 14 about 8,000 angstroms thick. However, support

members

16 and 17 are much thicker (particularly in large panels) so as to provide as much ruggedness as may be desired to compensate for stresses in the panel.

Support members

16 and 17 also serve as heat sinks for heat generated by discharges and thus minimize the effect of temperature on operation of the device. If it is desired that only the memory function be utilized, then none of the members need be transparent to light.

Except for being nonconductive or good insulators the electrical properties of

support members

16 and 17 are not critical. The main function of

support members

16 and 17 is to provide mechanical support and strength for the entire panel, particularly with respect to pressure differential acting on the panel and thermal shock. As noted earlier, they should have thermal expansion characteristics substantially matching the thermal expansion characteristics of dielectric layers 10 and 11. Ordinary inch commercial grade soda lime plate glasses have been used for this purpose. Other glasses such as low expansion glasses or transparent devitrified glasses can be used provided they can withstand processing and have expansion characteristics substantially matching expansion characteristics of the dielectric coatings l0 and 11. For given pressure differentials and thickness of plates, the stress and deflection of plates may be determined by following standard Spacer 15 may be made of the same glass material as dielectric films and 11 and may be an integral rib formed on one of the dielectric members and fused to the other members to form a bakeable hermetic seal enclosing and confining the ionizable gas volume 12. However, a separate final hermetic'seal may be effected by a high strength devitrified glass sealant S. Tubulation 18 is provided for exhausting the space between dielectric members 10 and 11 and filling that space with the volume of ionizable gas. For large panels small bead-like solder glass spacers such as shown at 15B may be located between conductor intersections and fused to dielectric members 10 and 11 to aid in withstanding stress on the panel and maintain uniformity of thickness of gas volume 12.

Conductor arrays

13 and 14 may be formed on

support members

16 and 17 by a number of well-known processes, such as photoetching, vacuum deposition, stencil screening, etc. In one embodiment, the centerto-center spacing of conductors in the respective arrays is about 17 mils. Transparent or semitransparent conductive material such as tin oxide, gold or aluminum can be used to form the conductor arrays and should have a resistance less than about 1,000 ohms per linear inch of conductor line, usually less than about 50 ohms per inch. Narrow opaque electrodes may alternately be used so that discharge light passes around the edges of the electrodes to the viewer. It is important to select a conductor material that is not attacked during processing by the dielectric material.

It will be appreciated that

conductor arrays

13 and 14 may be wires or filaments of copper, gold, silver or aluminum or any other conductive metal or material. For example l mil wire filaments are commercially available and may be used in the invention. However, formed in situ conductor arrays are preferred since they may be more easily and uniformly placed on and adhered to the

support plates

16 and 17.

Dielectric layer members 10 and 11 are formed of an inorganic material and are preferably formed in situ as an adherent film or coating which is not chemically or physically effected during bake-out of the panel. One such material is a solder glass such as Kimble SG-68 manufactured by and commercially available from the assignee of the present invention.

This glass has thermal expansion characteristics substantially matching the thermal expansion characteristics of certain soda-lime glasses, and can be used as the dielectric layer when the

support members

16 and 17 are soda-lime glass plates. Dielectric layers 10 and 11 must be smooth and have'a dielectric strength of about 1,000 volts per mil and be electrically homogeneous on a microscopic scale (e.g., no cracks, bubbles, crystals, dirt, surface films, etc.) In addition, the surfaces of dielectric layers 10 and 11 should be good photo-emitters of electrons in a baked-out condition. Alternatively, dielectric layers 10 and 11 may be overcoated with materials designed to produce good electron emission, as in US. Pat. No. 3,634,719, issued to Roger E. Emsthausen. Of course, for an optical display at least one of dielectric layers 10 and 11 should pass light generated on discharge and be transparent or translucent and, preferably, both layers are optically transparent.

The preferred spacing between surfaces of the dielectric films is about 4 to 6 mils with

conductor arrays

13 and 14 having center-to-center spacing of about 17 mils.

The ends of conductors 14-1 14-4 and support member 17 extend beyond the enclosed gas volume 12 and are exposed for the purpose of making electrical connection to interface and addressing circuitry 19. Likewise, the ends of conductors 13-1 13-4 on support member 16 extend beyond the enclosed gas volume 12 and are exposed for the purpose of making electrical connection to interface and addressing circuitry 19.

As described in detail in the Baker, et al. US. Pat. No. 3,499,167, the entire gas volume can be initially conditioned for subsequent operation at substantially uniform firing potentials by the use of internal or external radiation to supply free electrons throughout the gas medium 12.

Normal operation of a panel of the type described herein will be described with reference to FIGS. 1, 2, 3, and 4, the interfacing and addressing circuit indicated generally at 19 in FIG. 1 being'shown in more detail in FIG. 3. Potentials having the wave forms 90 and 120 as shown in FIG. 3 are supplied from row and column

sustainer circuit generators

80, 110 via row and column pulsing and addressing

circuits

100, 130 to

conductor arrays

14, 13 in response to control pulses from row and

column sections

72, 74, respectively of the logic control circuit 70. The resultant or composite potential wave form appearing across each cell is indicated at 140 in FIG. 4 as a periodic wave form of an alternating character. The wave form 140 is derived for the purpose of analysis of the operation of the panel by assuming that the wave forms 90 and 120 are spaced 180 apart or are oppositely phased within the cycles of the periodic composite wave form 140, and that the wave form 120 is subtracted from the wave form )0.

1n the examples set forth in FIG. 3, the wave form 90 is a square wave with a duration of less than one-half of the cycle defined by the composite wave form 140 and with a magnitude of +Vcc as will be shown hereinafter. Thus, more than 180 of the cycle of the composite wave form 140 elapses between occurrences. The wave form 120 is also a square wave with a duration of less than one-half of the cycle defined by the composite wave form 140, and with a magnitude of +Vcc, since the sustainer 110 may be identical to the sustainer 80.

The logic inputs to the

sustainers

80 and 110 are phased 180 apart with respect to the cycle of wave form 140. Therefore, the positive wave 120 is produced when the positive wave is not being produced. When the positive wave form is subtracted from the positive wave form 90, the wave form 120 appears to be negative in the composite wave form 140.

The voltage 90 from sustainer 80 constitutes approximately one-half of the sustaining voltage necessary to operate the panel, the remaining one-half which is necessary being supplied by voltage 120 phased 180 as noted above with respect to the voltage 90. Thus, onehalf of the sustainer potential is applied to each of the row conductors 14 and one-half of the sustainer potential 140 is applied to each of the column conductors 13. The

sustainer circuits

80 and 110 advantageously have a common ground so that the panel 10 floats with respect to ground.

Individual cells or discharge sites located by the crossing of selected conductors or

conductor arrays

14, 13 are manipulated by adding unidirectional voltage pulses at the proper time to each of the sustaining voltages on the selected conductors, which, when combined, are sufficient to exceed the firing potential for the selected cells and to initiate a sequence of discharges, one for each half-cycle of the applied composite sustaining potential 140. By also properly timing such unidirectional voltage pulses and applying them at a different portion in a cycle of the composite sustaining potential 140 to each of the sustaining voltages on the selected conductors, the sequence of discharges may be terminated. Thus, any individual discharge site may be manipulated ON or OFF, by manipulation of the times of occurrences of the unidirectional voltage pulses.

The unidirectional voltage pulses are added to the

sustainer voltages

90, 120 on the selected conductors by the row and column pulsing and addressing

circuits

100, 130 in response to logic signals from the logic control circuit 70 via leads 72-1 through 72-4 and 74-1 through 74-4, respectively, to select the conductor pairs for the individual cells.

Referring again to FIG. 4, it will be noted that between the positive half-cycles 90 and the negative halfcycles 120 of the composite wave form 140 there are provided plateaus 142, 144 at the apparent zero voltage level indicating a brief time interval between the cessation of the generation of one-half cycle of the wave form 140 and the initiation of the other half-cycle of the wave form 140. These plateaus 142, 144 may be provided to reduce interference between operation of various circuits for reasons that need not be detailed here.

However, the plateaus 142, 144 provide an opportunity to more clearly show what happens as the composite sustaining voltage 140 periodically alternates between the opposite polarities derived by subtracting the wave form 120 from the wave form 90. Referring to the graphical representation of cell current flow, shown in FIG. 4 in a timed relationship with the composite wave form 140, it can be seen that as the wave form goes from the negative level of the subtracted wave form 120 to the zero level a cell displacement current flow occurs and is indicated by the positive current spikes 122. As the wave form 140 goes from the zero level to its positive level 90, a second cell displacement current flow occurs and is indicated by the positive current spikes 92.

Similarly, as the wave form 140 goes from the positive level 90 to the zero level, a negative current spike 94 occurs. As the wave form 140 goes from zero to the negative level of the subtracted wave form 120 a negative current spike 124 occurs.

Obviously, if separation plateaus 142 and 144 are not provided then the

spikes

122, 92 and 94, 124 would occur at substantially the same time and a single resultant larger current spike would occur when the composite wave form 140 reverses polarity.

If the cell in question has been manipulated to an ON condition as hereinbefore described then the cell will discharge when the difference between the wall voltage built up from a previous discharge and the sustainer potential exceeds the firing potential necessary to discharge the cell. There then occurs a cell discharge current flow, indicated as current spikes 146, 148 shown in dotted lines in FIG. 4.

It is desirable that the cell not see any appreciable voltage change in the sustainer wave form during the wave form will continue to occur in a manner to maintain the cell ON in the condition required.

Row and column sustainer circuits 80, are advantageously constructed using power transistors as output devices. It is desirable to be able to turn the power transistors ON and OFF as quickly as possible so that the transition slope in the wave form controlled by the power transistors is as steep as possible. To turn a power transistor ON quickly it is necessary to drive it with a comparatively large current pulse which will drive the transistor into deep saturation. The further the transistor is driven into saturation the smaller the internal resistance will be to the power output circuit it is controlling. If driven sufficiently far into saturation the displacement and discharge currents of FIG. 4 may flow freely through the transistor and there will be very little voltage drop across the transistor during the time the cell is discharging. Therefore, the voltage drop across the transistor will be very small during the discharge cycle of the cell, will make very little change as a subtraction to the composite sustainer wave form, and will not appreciably effect the transfer of wall charges during the discharge cycle of a cell.

Difficulties have been encountered, however, in that when the transistor is driven into deep saturation to reduce the wave form alteration to and below a desired level, it takes a longer time to turn the transistor OFF. This decreases the slope of the wave form being produced and may delay or slow a voltage transition to a point which will interfere with the proper panel operation. It also caused an excessive power loss, which can lead to component degradation due to unnecessary heating.

A diode clamping network has been used in the past to overcome the above-discussed problem. In one embodiment a single diode is connected to conduct in a forward direction from a clamping bias junction to the collector electrode of a power transistor connected to a voltage being controlled. Two diodes in series are connected to conduct in a forward direction from the clamping bias junction to the base electrode of the transistor. The emitter electrode may be connected through a resistor to the base electrode.

In operation, the just-discussed circuit receives a turn-on pulse having a large magnitude to drive the transistor toward deep saturation, changing the configuration of the wave form being controlled and permitting the free flow therethrough of the displacement current and discharge current, if any, from the panel being controlled. Since the transistor is going toward deep saturation the resistance offered thereby to the discharge current results only in a voltage change in the composite sustaining wave form which is below a level which would significantly interfere with the transfer of the wall charges in any cells in the panel which are iON.9! I

If, in the embodiment of the diode clamping circuit being discussed, the collector electrode is connected to an output voltage source being controlled, when the flow of displacement and discharge current ceases there is no load on the transistor and if the transistor is still being driven hard, then deep saturation will occur because the collector voltage is lower than the base voltage.

To keep the transistor out of deep saturation the collector voltage is kept just above the base voltage by the diode clamping circuit. The diode between the collec tor and the clamping bias junction is required to isolate the voltage wave form being controlled from the base of the transistor. If the transistor requires a V voltage drop across the base-emitter junction (and the resistor connecting the base and emitter electrodes) to turn it on" then the isolating diode means is selected to have a voltage drop in the forward direction in response to current flow through the clamping bias junction which is less than the voltage drop in the forward direction of the serially connected base diode means plus the voltage drop across the base-emitter resistor in response to current flow through the clamping bias junction.

Thus, if the isolating diode and any resistance associated therewith has a voltage drop thereacross which is less than the clamping bias voltage necessary at the clamping bias junction to keep the transistor on, then the collector voltage is equal to the clamping bias voltage minus the isolating diode voltage drop and is therefore larger than the base voltage. The transistor is kept out of saturation and turns off when the drive pulse is removed and stops conducting relatively quickly.

The clamping bias voltage is preferably applied to the clamping bias junction at the same time that the drive pulse is removed from the base of the transistor.

While the just-described diode clamping circuit has worked well in some applications, it is desirable to be able to turn the power transistor off even more quickly in certain applications. It is also desirable to be able to use power transistors which have longer storage times (the length of time a transistor stays in saturation without a driving potential applied) since the longer storage time transistors are less expensive. It is further desirable to be able to saturate the power transistor as much as-possible, without interfering with the ability to turn the transistor off quickly, to reduce the internal resistance even further than reduced with the diode clamping circuit, so that the voltage drop across the transistor during flow of cell discharge current is as low as possible.

Referring now to FIG. there is illustrated in detail a schematic diagram of a circuit which may be used as the sustainer wave form generator 80 to produce the wave form 90 as shown in FIGS. 3 and 6. As noted hereinbefore, an identical circuit may be used to produce the wave form 120.

The upper half of the circuit in FIG. 5 is illustrated in detail in FIG. 7, which embodiment is also disclosed and discussed in the upper portion of FIG 5 of my copending US. Pat. application Ser. No. 313,480, simultaneously filed on Dec. 8, I972, with the instant application. For the purpose of avoiding obtaining a copy of the referenced application in order to understand the operation of this invention, there is included hegeinafter a description of the operation of an embodiment of the referenced application which is suitable for use here.

A bypass diode D4 is connected around the emittercollector electrodes of the output transistor of the wave form pull-up circuit section 81 to permit current flow to the panel when the column sustainer circuit 110 is operative to provide the wave form 120 and for the flow of any of the displacement and any discharge currents that may be involved as the result thereof. Similarly, a bypass diode D5 is connected around the emitter-collector electrodes of the power transistor Q8.

In operation of the circuit section 81, a short duration pull-up turn-on pulse 82 (see FIG. 6) is applied to terminal 82T on the base of a first switching transistor from the logic control via the lead 74UN (see FIG. 3) to turn the first switching transistor on," thereby also turning a second switching transistor on and permitting current flow from a turn-on source through the primary winding of an isolating transformer. A drive pulse is induced on the secondary winding of the isolating transformer causing current flow to turn an output power transistor of circuit section 81 on. The driving pulse induced in the secondary of the isolating transformer is of sufficient magnitude to drive the output power transistor very hard to bring the output terminal 92 to the voltage level +Vcc as indicated in FIG. 6, and also leaves the output power transistor of circuit section 81 saturated.

Any time after the panel displacement and discharge current flow is, for the most part, over a pull-up turn off pulse is applied to the base electrode of a third switching transistor via the lead 74UF from the logic circuit 70. This pulse causes the third switching transistor to conduct, which, in turn, causes a fourth switching transistor to conduct and provide a current flow in the primary winding of a transformer of a transformerdiode clamping circuit. Current flow is induced in the secondary winding of the clamping circuit transformer causing a potential to be provided between the collector and the base of the output switching transistor which is higher at the collector than at the base. The minority carriers of the saturated collector-base junction of the output power transistor of circuit section 81 are discharged through a diode connected in series with the secondary winding of the clamping transformer. The transformer-diode circuit just described turns the output power transistor off very quickly allowing negative panel-address pulses to also be applied quickly to the sustainer wave form 90, which is a requirement in some addressing circuit schemes or techniques.

When the voltage is to be dropped at the output terminal 92 from the level of the potential +Vcc to ground or zero as illustrated in FIG. 6, a short duration pulldown turn-on pulse 86 is applied to the terminal 86T connected to the base of the transistor Q6 via the lead 74DN from the logic circuit 70. This turns the transistor Q6 on allowing conduction through its emittercollector circuit thereby also turning the transistor Q7 on." The bypass capacitor C1 enables bypassing of the emitter of the transistor Q7 and application of the driving pulse to the base-emitter circuit of the power transistor Q8 turning it on very quickly and deeply saturating the transistor. This reduces the voltage at the terminal 92 to ground level providing the zero output from the sustainer circuit as noted in FIG. 6.

The capacitor C1 is used in the pull-down driving circuit only, in this instance, because discharge current will immediately follow the pull-down transition of either the output transistor of the circuit section 80 or transistor Q8, and the pull-down transistor Q8 has very little time to become saturated. So, the transistor Q8 requires a harder drive than the pull-up output transistor of the circuit section 81 which will have the time provided by the plateau 142 to be driven deeply into saturation before it will have to pass discharge current after it is turned on.

Alternatively, or in addition to the use of bypass capacitors, the value of the resistance of the resistors R and/or R11 may be varied to vary the drive applied to transistors Q8.

When the transistor 08 is deeply saturated and the panel displacement and discharge current flow through the transistor O8 is over, for the most part, there will be very little voltage drop across the collector-emitter circuit of the transistor Q8, both because the internal resistance has been reduced by the hard driving pulse, and because there is little or no current flow through the internal resistance to cause a voltage drop. Therefore, when the voltage drop across Q8 falls below the value of the reverse bias source +Vdc3, the diode D3 becomes forward biased and permits current flow through the primary winding of the transformer T3 and the isolating diode D3 to the collector of the power transistor Q8. This applies a potential to the collector of the power transistor Q8 and current may flow from the collector through the emitter and back to the other side of +Vdc3 through a common ground connection. Current flow also occurs because of the voltage now induced on the secondary winding of the transformer T3 which is connected to the base electrode of the power transistor 08. The developed potentials allows current to flow through the primary winding of the transformer T3, the isolating diode D3, the saturated collector-base junction of the power transistor Q8, and the secondary winding of the transformer T3 to ground through a current limiting resistor R15 and then back to the other side of +Vdc3, discharging the minority carriers from the saturated collector-base junction, and turning off the power transistor Q8 very quickly.

As is evident by examining the drawings, only one source is now required since the reverse bias source may be derived from the turn-on source, or vice versa. Therefore an extra source of supply and/or an extra set of connections to an additional source are not required.

The isolating rectifier D3 is preferably interposed between the primary winding of T3 and the collector electrode of Q8, rather than between the primary winding and the reverse bias source +Vdc3 so that any possibility of current flow from the primary winding as a result of current flow in charging the primary to secondary capacitance does not flow to the secondary as it would if the primary swung with the output.

It should be noted that there will then be no significant current flow through the secondary winding of the transformer T3 from the driving pulses for the transistor Q8, since there is no current flow through the primary winding of transformer T3 until the reverse bias on the diode D3 is removed. Therefore, a high impedance will be reflected to the secondary winding and the driving current will flow through the base of the transistor Q8 and the resistor R11, respectively.

It should be noted that logic leads 72DF and 74DF from the logic circuit 70 to the

sustainer circuits

80, 110 are not needed for the embodiment illustrated in FIG. 5. There is no need for a pull-down turn-off logic pulse when using the present invention, because of the automatic sensing and acting capabilities of the novel circuit of this invention. This circuit thus saves components and timing logic.

It should also be noted that a mirror image type modification of the circuit illustrated in FIG. 5 may be constructed to produce

negative pulse outputs

90 and 120 rather than the positive pulses as shown. That is, the signal, bias, and supply voltages would have opposite polarities, while P-N-P type transistors would be substituted for N-P-N type transistors (and vice versa), and the connections of the diodes and the transformers of the clamping circuits would be reversed where necessary to enable the reverse biasing of saturated collector-base junctions to bring the clamped transistors out of saturation at a desired time.

Phasing of the negative logic signals from section 74 of units on leads 74UN, 74UF, and 74DN, with spacings in a composite wave form cycle with respect to the negative logic signals 72UF, 72UN, and 72DN, would also be obvious to obtain the resultant or composite cell sustainer voltage wave form illustrated in FIG. 4.

It should also be noted that combinations of positive and negative sustainer wave form generator circuits may be used in certain applications.

There have thus been described and disclosed a transformer-diode clamping circuit which may be used to turn output power transistors of after a very heavy turn-on drive pulse, enabling the power transistor to be turned off in a fraction of the normal storage time for such devices. This enables a sustainer performance to meet and match the very fast switching speed and high current requirements of newly developed display/memory panels, as well as prior art panels. The very fast, high voltage, high current switching of the apparatus disclosed herein far outperforms the present prior art devices. The use of the transformerdiode clamp described herein also permits greater flexibility in unique logic address requirements. The present invention may also be used to take advantage of gaseous mediums which are presently being tested and which exhibit much faster discharge times than past mediums.

What is claimed is: v

1. In a system for supplying operating potential to a load device wherein at least two transversely oriented conductors are dielectrically isolated from a gas discharge medium between said conductors, comprising a. voltage wave form generator means having an output means adapted to be connected to a transverse conductor;

b. said wave form generating means including at least two sections, a first of said sections being operative to connect a first point at a first potential level to said output means while a second of said sections is operative to connect a second point at second potential level different from said first potential level to said output means;

c. one of said output sections including an output transistor connected as a switching means, said transistor having collector, base, and emitter electrodes and a collector-base junction, the emitter electrode to collector electrode current path through said transistor being connected in series between said output means and the point at a potential level associated with said one of said output sections;

d. means for selectively applying turn-on signals to the base electrode of said output transistor means, said signals being sufficient in magnitude to drive said transistor means into saturation; and

e. means responsive to saturation of said transistor and the removal of a turn-on signal from the base electrode for establishing current flow throughsaid collector-base junction of said transistor means to reverse bias said collector-base junction to enable said transistor to turn off quickly; I

1'. said reverse bias establishing means including a transformer having primary and secondary windings, an isolating rectifier means, and means for connecting one side of a reverse bias source to said primary winding of said transformer;

g. said primary winding being connected in series with said isolating rectifier means between said bias source connecting means and said collector electrode of said transistor means, said isolating rectifier being connected in said series circuit to be reverse biased by potential levels on said collector electrode which are greater in magnitude than that of the reverse bias source thereby preventing current flow from said collector electrode through said primary winding;

h. said secondary winding being connected between said base electrode of said transistor and the other side of the reverse bias source, the emitter electrode of said transistor having a circuit connection to said other side of said reverse bias source;

. the attainment of an on condition of said transistor means wherein the internal resistance of the collector-emitter circuit drops below a predetermined value which, in combination with current flow therethrough from the output potential level being controlled, provides a voltage drop across said emitter-collector circuit which is less than the potential of the reverse bias source enabling current flow from said reverse bias source through said primary winding and said isolating rectifier means in the forward direction to said collector electrode;

means of said wave form generator means to a ground level potential to enable rapid discharge of any potentials derived from the load device to ground, thereby j. current flow in said primary winding from said reverse bias source inducing a voltage on said secondary winding which causes current flow through said collector-base junction in a direction to reverse bias said collector-base junction and discharge excess minority carriers from the saturated junction to enable said transistor to turn off quickly when a turn-on signal is removed from the base electrode.

2. A system as defined in claim 1 wherein said isolating rectifier means is interposed between said primary winding and said collector electrode, thus preventing current flow from said primary winding to said collector electrode when the potential on said collector electrode is higher than that of the reverse bias source thereby reflecting a high impedance to said secondary winding and preventing current flow therethrough in response to the application of a turn-on signal to said base electrode.

3. A system as defined in claim 1, in which a. said means for selectively applying turn-0n signals includes a turn-on source and switching means responsive to a turn-on signal for connecting said turn-on source to said base electrode of said transistor means, and which further includes b. means for deriving one of said turn-on and reverse bias sources from the other, thereby requiring the provision of only one such source for the control of said transistor.

4. A system as defined in claim 1 in which said one of the output sections is operable to connect the output enabling said primary winding-isolating rectifier combination to rapidly sense the required low voltage drop across the emitter-collector circuit of said transistor and initiate the establishment of reverse bias across said collector-base junction and enable said transistor to turn off quickly when a turn-on signal is removed from the base electrode.

5. In a system for supplying operating potential to a load device wherein at least two transversely oriented conductors are dielectrically isolated from a gas discharge medium between said two conductors, comprising a. voltage wave form generating means adapted to be connected to a transverse conductor;

b. said wave form generating means including at least one transistor means operating as a switching means between a point at an operating potential and a transverse conductor, said transistor means having collector, base, and emitter electrodes with collector-base and base-emitter junctions;

c. means for applying a turn-on signal to said base electrode having a magnitude sufficient to turn said transistor on and drive said transistor into a saturated condition; and

d. means for selectively establishing current flow through said collector-base junction to reverse bias said junction;

e. said reverse bias establishing means including a transformer having primary and secondary windings, an isolating rectifier means, and means for connecting a reverse bias source to said primary winding of said transformer;

f. said primary winding being connected in a series circuit with said isolating rectifier means between said bias source connecting means and said collector electrode of said transistor means, said isolating rectifier means being connected in said series circuit to prevent current flow in said primary winding from said collector electrode;

g. said secondary winding being connected between said base electrode of said transistor and the other side of the reverse bias source, the emitter electrode of said transistor having a circuit connection to said other side of said reverse bias source;

h. the attainment of an on condition of said transistor means wherein the internal resistance of the collector-emitter circuit drops below a predetermined value which, in combination with current flow therethorugh from the output being controlled, provides a voltage drop across said emittercollector circuit which is less than the potential of the reverse bias source enabling current flow from said reverse bias source through said primary winding and said isolating rectifier means in the forward direction to said collector electrode;

. current flow in said primary winding from said reverse bias source inducing a voltage on said secondary winding which causes current flow through said collector-base junction in a direction to reverse bias said collector-base junction and discharge excess minority carriers from the saturated junction to enable said transistor to turn off quickly when a tun-on signal is removed from the base electrode.

6. A system as defined in claim 5 in which a. said means for applying a turn-on signal includes a turn-on source and switching means responsive to a turn-on signal for connecting said turn-on source to said base electrode of said transistor means, and which further includes b. means for deriving one of said turn-on and reverse bias sources from the other, thereby requiring the provision of only one such source for the control of said transistor.

7. A system as defined in claim 5 in which said output transistor means is operable to connect the output means of said wave form generator means to a ground level potential to enable rapid discharge of any potentials derived from the load device to ground, thereby enabling said primary winding-isolating rectifier combination to rapdily sense the required low voltage drop across the emitter-collector circuit of said transistor and initiate the establishment of reverse bias across said collector-base junction and enable said transistor to turn off quickly when a turn-on signal is removed from the base electrode.

8. Control apparatus, comprising a. transistor means having collector, base, and emitter electrodes with collector-base and base-emitter junctions between said electrodes;

b. means for connecting a turn-on source to provide a driving signal to said base electrode having a magnitude sufficient to turn said transistor on and drive said transistor into a saturated condition; and

0. means responsive to saturation of said transistor and the removal of a turn-on signal from the base electrode for establishing current flow through said collector-base junction of said transistor means to reverse bias said collector-base junction to enable said transistor to turn off quickly;

d. said reverse bias establishing means including a transformer having primary and secondary windings, an isolating rectifier means, and means for connecting one side of a reverse bias source to said primary winding of said transformer;

e. said primary winding being connected in series trode of said transistor having a circuit connection to said other side of said reverse bias source;

g. the attainment of an on" condition of said transistor means wherein the internal resistance of the collector-emitter circuit drops below a predetermined value which, in combination with current flow therethrough from the output being controlled, provides a voltage drop across said emittercollector circuit which is less than the potential of the reverse bias source enabling current flow from said reverse bias source through said primary winding and said isolating rectifier means in the forward direction to said collector electrode;

h. current fiow in said primary winding from said reverse bias source inducing a voltage on said secondary winding whcih causes current flow through said collector-base junction in a direction to reverse bias said collector-base junction and dis charge excess minority carriers from the saturated junction to enable said transistor to turn off quickly when a turn-on signal is removed from the base electrode.

9. A system as defined in claim 8 wherein said isolating rectifier means is interposed between said primary winding and said collector electrode, thus preventing current flow from said primary winding to said collector electrode when the potential on said collector electrode is higher than that of the reverse bias source thereby reflecting a high impedance to said secondary winding and preventing current flow therethorugh in response to the application of a turn-on signal to said base electrode.

10. A system as defined in claim 8 in which a. said means for selectively applying turn-on signals includes a turn-on source and switching means responsive to a turn-on signal for connecting said turn-on source to said base electrode of said transistor means, and which further includes b. means for deriving one of said turn-on and reverse bias sources from the other, thereby requiring the provision of only one such source for the control of said transistor.

11. A system as defined in claim 8 in which said output transistor is operable to connect a potential level input to a load device to a ground level potential to enable rapid discharge of any potentials derived from the load device to ground, thereby enabling said primary winding-isolating rectifier combination to rapidly sense the required low voltage drop across the emittercollector circuit of said transistor and initiate the establishment of reverse bias across said collector-base junction and enable said transistor to turn off quickly when a turn-on signal is removed from the base electrode.

Claims

1. In a system for supplying operating potential to a load device wherein at least two transversely oriented conductors are dielectrically isolated from a gas discharge medium between said conductors, comprising a. voltage wave form generator means having an output means adapted to be connected to a transverse conductor; b. said wave form generating means including at least two sections, a first of said sections being operative to connect a first point at a first potential level to said output means while a second of said sections is operative to connect a second point at second potential level different from said first potential level to said output means; c. one of said output sections including an output transistor connected as a switching means, said transistor having collector, base, and emitter electrodes and a collector-base junction, the emitter electrode to collector electrode current path through said transistor being connected in series between said output means and the point at a potential level associated with said one of said output sections; d. means for selectively applying turn-on signals to the base electrode of said output transistor means, said signals being sufficient in magnitude to drive said transistor means into saturation; and e. means responsive to saturation of said transistor and the removal of a turn-on signal from the base electrode for establishing current flow through said collector-base junction of said transistor means to reverse bias said collector-base junction to enable said transistor to turn off quickly; f. said reverse bias establishing means including a transformer having primary and secondary windings, an isolating rectifier means, and means for connecting one side of a reverse bias source to said primary winding of said transformer; g. said primary winding being connected in series with said isolating rectifier means between said bias source connecting means and said collector electrode of said transistor means, said isolating rectifier being connected in said series circuit to be reverse biased by potential levels on said collector electrode which are greater in magnitude than that of the reverse bias source thereby preventing current flow from said collector electrode through said primary winding; h. said secondary winding being connected between said base electrode of said transistor and the other side of the reverse bias source, the emitter electrode of said transistor having a circuit connection to said other side of said reverse bias source; i. the attainment of an ''''on'''' condition of said transistor means wherein the internal resistance of the collector-emitter circuit drops below a predetermined value which, in combination with current flow therethrough from the output potential level being controlled, provides a voltage drop across said emittercollector circuit which is less than the potential of the reverse bias source enabling current flow from said reverse bias source through said primary winding and said isolating rectifier means in the forward direction to said collector electrode; j. current flow in said primary winding from said reverse bias source inducing a voltage on said secondary winding which causes current flow through said collector-base junction in a direction to reverse bias said collector-base junction and discharge excess minority carriers from the saturated junction to enable said transistor to turn off quickly when a turn-on signal is removed from the base electrode.

3. A system as defined in claim 1, in which a. said means for selectively applying turn-on signals includes a turn-on source and switching means responsive to a turn-on signal for connecting said turn-on source to said base electrode of said transistor means, and which further includes b. means for deriving one of said turn-on and reverse bias sources from the other, thereby requiring the provision of only one such source for the control of said transistor.

4. A system as defined in claim 1 in which said one of the output sections is operable to connect the output means of said wave form generator means to a ground level potential to enable rapid discharge of any potentials derived from the load device to ground, thereby enabling said primary winding-isolating rectifier combination to rapidly sense the required low voltage drop across the emitter-collector circuit of said transistor and initiate the establishment of reverse bias across said collector-base junction and enable said transistor to turn off quickly when a turn-on signal is removed from the base electrode.

5. In a system for supplying operating potential to a load device wherein at least two transversely oriented conductors are dielectrically isolated from a gas discharge medium between said two conductors, comprising a. voltage wave form generating means adapted to be connected to a transverse conductor; b. said wave form generating means including at least one transistor means operating as a switching means between a point at an operating potential and a transverse conductor, said transistor means having collector, base, and emitter electrodes with collector-base and base-emitter junctions; c. means for applying a turn-on signal to said base electrode having a magnitude sufficient to turn said transistor on and drive said transistor into a saturated condition; and d. means for selectively establishing current flow through said collector-base junction to reverse bias said junction; e. said reverse bias establishing means including a transformer having primary and secondary windings, an isolating rectifier means, and means for connecting a reverse bias source to said primary winding of said transformer; f. said primary winding being connected in a series circuit with said isolating rectifier means between said bias source connecting means and said collector electrode of said transistor means, said isolating rectifier means being connected in said series circuit to prevent current flow in said primary winding from said collector electrode; g. said secondary winding being connected between said base electrode of said transistor and the other side of the reverse bias source, the emitter electrode of said transistor having a circuit connection to said other side of said reverse bias source; h. the attainment of an ''''on'''' condition of said transistor means wherein the internal resistance of the collector-emitter circuit drops below a predetermined value which, in combination with current flow therethorugh from the output being controlled, provides a voltage drop across said emitter-collector circuit which is less than the potential of the reverse bias source enabling current flow from said reverse bias source through said primary winding and said isolating rectifier means in the forward direction to said collector electrode; i. current flow in said primary winding from said reverse bias source inducing a voltage on said secondary winding which causes current flow through said collector-base junction in a direction to reverse bias said collector-base junction and discharge excess minority carriers from the saturated junction to enable said transistor to turn off quickly when a tun-on signal is removed from the base electrode.

8. Control apparatus, comprising a. transistor means having collector, base, and emitter electrodes with collector-base and base-emitter junctions between said electrodes; b. means for connecting a turn-on source to provide a driving signal to said base electrode having a magnitude sufficient to turn said transistor on and drive said transistor into a saturated condition; and c. means responsive to saturation of said transistor and the removal of a turn-on signal from the base electrode for establishing current flow through said collector-base junction of said transistor means to reverse bias said collector-base junction to enable said transistor to turn off quickly; d. said reverse bias establishing means including a transformer having primary and secondary windings, an isolating rectifier means, and means for connecting one side of a reverse bias source to said primary winding of said transformer; e. said primary winding being connected in series with said isolating rectifier means between said bias source connectng means and said collector electrode of said transistor means, said isolating rectifier being connected in said series circuit to be reverse biased by potential levels on said collector electrode which are greater in magnitude than that of the reverse bias source thereby preventing current flow from said collector electrode through said primary winding; f. said secondary winding being connected between said base electrode of said transistor and the other side of the reverse bias source, the emitter electrode of said transistor having a circuit connection to said other side of said reverse bias source; g. the attainment of an ''''on'''' condition of said transistor means wherein the internal resistance of the collector-emitter circuit drops below a predetermined value which, in combination with current flow therethrough from the output being controlled, provides a voltage drop across said emitter-collector circuit which is less than the potential of the reverse bias source enabling current flow from said reverse bias source through said primary winding and said isolating rectifier means in the forward direction to said collector electrode; h. current flow in said primary winding from said reverse bias source inducing a voltage on said secondary winding whcih causes current flow through said collector-base junction in a direction to reverse bias said collector-base junction and discharge excess minority carriers from the saturated junction to enable said transistor to turn off quickly when a turn-on signal is removed from the base electrode.

11. A system as defined in claim 8 in which said output transistor is operable to connect a potential level input to a load device to a ground level potential to enable rapid discharge of any potentials derived from the load device to ground, thereby enabling said primary winding-isolating rectifier combination to rapidly sense the required low voltage drop across the emitter-collector circuit of said transistor and initiate the establishment of reverse bias across said collector-base junction and enable said transistor to turn off quickly when a turn-on signal is removed from the base electrode.