US3812485A - Visual display device - Google Patents

Visual display device Download PDF

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US3812485A
US3812485A US00251066A US25106672A US3812485A US 3812485 A US3812485 A US 3812485A US 00251066 A US00251066 A US 00251066A US 25106672 A US25106672 A US 25106672A US 3812485 A US3812485 A US 3812485A
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register
line
values
displacement
registers
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D Moreton
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Fujitsu Services Ltd
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Fujitsu Services Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G1/00Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
    • G09G1/06Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows
    • G09G1/08Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows the beam directly tracing characters, the information to be displayed controlling the deflection and the intensity as a function of time in two spatial co-ordinates, e.g. according to a cartesian co-ordinate system
    • G09G1/10Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows the beam directly tracing characters, the information to be displayed controlling the deflection and the intensity as a function of time in two spatial co-ordinates, e.g. according to a cartesian co-ordinate system the deflection signals being produced by essentially digital means, e.g. incrementally

Definitions

  • Information describing the lines to be drawn is held in a store and is presented in the form of positional information describing one end (the initial end) of a line together with values representing the displacement from the initial end of the terminal end of the line.
  • positional information describing one end (the initial end) of a line together with values representing the displacement from the initial end of the terminal end of the line.
  • the present invention relates to visual display devices, and in particular to apparatus for drawing displays on theface of a cathode ray tube.
  • FIG. 1 is a block schematic drawing of a line drawing arrangement
  • a visual display arrangement includes a cathode ray tube 1 arranged to draw lines on its display face by the displacement of an electron beam in conventional manner.
  • the displacement of the beam is controlled by mutually perpendicular sets of electrodes 2.
  • Displacement of the beam is produced by signals on the electrodes 2 from conventional digital to analogue address decoders 3 and 4, the decoder 3 being connected to the X-axis electrodes while the decoder 4 is connected to the Y-axis electrodes.
  • the decoder 3 is conne cted to a multidenominal binary X- positionregister 5a which is formed by the more signficant half of a shift register 5.
  • the half 5b of the register 5 of lower denominational significance is not connected to the decoder 3 and is used to accumulate increments of the displacement information, in a manner to be described, in order to alter the value expressed in the position register 5a so that the position value is progressively changed to produce movement of the cathode ray tube beam and thus draw a line on the display face of the tube 1.
  • a register 15 is provided for Y-axis deflection control, and is similar to the register 5 in that it consists of a more significant half 15a connected to the decoder 4 and a less significant half 15b for the accumulation of displacement increments.
  • a further multidenomination binary shift register 7 is provided for X-axis information and a similar register 17 is provided for Y-axis information.
  • the registers 7 and 17 are termed the AX and AY registers respectively, and these two registers 7 and 17 are each divided into more and less significant halves 7a, 7b and 17a, l7b'respectively.
  • an adder network 6 is provided between the registers 7 and 5. The adder network 6 receives the values contained in the registers 5 and 7 and forms the sum of these values, these sum values being presented at outputs from an adder within the adder network 6.
  • the sum value outputs of the adder are connected to the register 5 by means of transfer gates within the adder network 6 so that the sum value may be transferred into the register 5. This transfer is controlled by an add control line 27 from a control unit 26.
  • the Y-axis arrangement is similar to that for the X-axis and an adder network 16, similar to the adder network 6, is positioned between the registers 15 and 17.
  • the network 16 is also connected to the add control line 27.
  • a shift control line '14 is connected from the control unit 26 to the shifting control input of the registers 7 and 17 to enable the values in these registers to be shifted denominationally with respect to the values in the registers-5 and 15 respectively.
  • a number of indicators are provided in association with the foregoing arrangement.
  • a state indicator 8 is provided in'association with the AX register 7 to indicate a condition in which all the stages of the register half 7a contain like binary digits, or bits. Because the values inserted into the register 7 are in twos-complement form and are signed, as will be described, progressive shifting of bits from the half register 7a into the half register 7b can leave the half register empty, and in this case filler bits,
  • the half register 7a will contain either all zeros or all ones in dependence upon the sign of the value shifted, and the indicator 8 produces a signal when all the bits in the half register 7a are either all zeros or all ones.
  • the indicator 8 includes a pair of AND gates each connected to all the stages of the half register 7a. One AND gate of the pair responds to the presence of a binary zero in all the stages, while the other responds to the presence of a binary one in all the stages. The outputs of these AND gates are connected to an OR gate. Thus, the output of the OR gate provides the required indication and is connected to the control unit 26.
  • a similar state indicator 18 is provided gates are conditioned by five input channels, one gate 20 being opened only if all the channels are concurrently registering binary ones and the other being opened only if all the channels are registering binary zeros.
  • the outputs of the two AND gates are connected together by an OR gate so that an output signal is produced only if the bits applied to the input channels are all of the same value, whether the value is one or zero.
  • the five input channels are switchable by a signal from the control unit 26 to be connected either to the five most significant denominations of the X-position register 5a or to 30 the corresponding denominations of the sum outputs of the adder network 6.
  • a field indicator 29 is provided for the Y-axis arrangement and is similar to the indicator 19.
  • the indicator 29 is associated with the Y-position register 15a and the adder network 16.
  • the outputs from the indicators l9 and 29 are connected to the control unit 26 and are also connected to an AND gate 20 which therefore produces an output signal only if both indicators 19 and 29 are concurrently producing outputs.
  • the AND gate output is also connected to the control unit 26.
  • An X-axis indicator 24 is connected between the most significant demoninations of the X-position register and the corresponding denominational position of the sum outputs of the adder network 6.
  • the indicator 24 has a pair of AND gates whose outputs are connected through an OR gate.
  • the AND gates are respectively conditioned by unlike inputs from the two denominations to which they are connected.
  • the one AND gate produces an output if the register 5a stage contains a one and the corresponding sum output respresents a zero, and the other AND gate produces its output if the register 5a stage contains a zero and the corresponding sum output represents a one.
  • the OR gate output to the control unit 26 indicates that the most significant bits respectively of the register 5a and the adder network 6 output are unlike.
  • a Y-axis indicator 25, similar to the indicator 24 is provided between the Y-position register 15a and the 6 into the counter 13 after it has been formed. It will be realised that the adding and transferring operations of the present arrangement are controlled in a conventional manner by clock pulses. However, for the sake of simplicity, the usual clock pulse control system is omitted from FlG. l.
  • the pointer register 11 and the pointer counter 13 have denominational capacities equal to one of the half registers 7a, 17a.
  • the register 11 has an additional stage 11a at the most significant end. The stage is connected to the control unit 26 so that a one may be forcibly entered into the stage.
  • An all zero indicator 22 is connected to the pointer counter register 13
  • the indicator 22 includes 'an AND gate arrangement connected to all the stages of the counter register 13 and responsive to the presence of a zero in all the stages to produce an output, which is fed to the control unit 26.
  • a skip logic indicating network 21 is connected between the pointer register 11 and the pointer counter register 13.
  • the network 21 includes a group of AND gateswhich are respectively each connected corresponding denominational stages of the registers 11 and 13 and which are each conditioned to be open if a binary one is registered in both the corresponding stages. The outputs of these AND gates are connected in common through an OR gate, the output of the OR gate being applied to the control unit 26.
  • Information specifying the lines to be drawn on the display face of the tube 1 is stored in a display store 28.
  • the information for each line consists of two values for each axis, a position value and a displacement value, expressed in binary code notation.
  • the position values on the two axestogether specify an initial or starting position at one end of the line.
  • the displacement values specify for each axis the displacement along that axis of the other end of the line with respect to the initial position.
  • the displacement values if added to the position values will specify the position of the terminal end of the line.
  • a second store 9 contains information specifying the location of a window which corresponds, in a manner to be described, with the field of view of the display face where the display face area is smaller than the total display capacity of the line information. lt will be explained hereinafter that, in order to draw a line it is necessary to subtract the window location information from the line position information before drawing the line. in order to accomplish this subtraction, the information from the stores 9 and 28 is passed through a subtractor 10. From the subtractor 10, the difference values are passed via a zoom shift register 31 to the registers 5 and 7 for the X-axis and the registers 15 and 17 for the Y-axis respectively.
  • the zoom shift register 31 is a four-channel parallel shift register arranged to perform a predetermined right-shift operation on all values passing between the subtractor l0 and the registers 5, 15, 7 and 17 for the purpose of scaling, as will be explained hereinafter, a different channel being associated with each of these registers respectively.
  • the operation of the arrangement is controlled by a data processor 30, which is also arranged to provide input information to the stores and to-the shift register 31.
  • a data processor 30 which is also arranged to provide input information to the stores and to-the shift register 31.
  • the unit 26 contains a network of logic gates arranged to function as illustrated in the flow diagram shown in FlGS. 2a and 2b. This diagram assumes that the operations start with the loading of position and displacement values into the registers 5, 15, 7 and 17, and indicates, for each step of the operation, the sources of indicating signals snd the. action to be taken according to the indicated condition.
  • the displacement values are respectively entered into the X and Y registers 7 and 17 and are shifted along into the less significant halves of these registers 7b and 17b. Then, considering the X- axis, if the displacement value from register 7b is added through adder 6 into the register 5, the displacement value will be transferred into the X-position accumulator, which is the less significant half 5b of this register. If the adding cycle is repeated, the value in the X- position accumulator will overflow into the more significant half 5a of the register 5, altering the value applied to the decoder 3 and moving the cathode ray tube beam to start drawing the line.
  • the successive adding cycles are, in practice, controlled by clock pulses and it will be realised that the speed of movement of the cathode ray tube beam, for a given clock pulse frequency, is dependent upon the rate at which overflows occur from the less significant halves 5b or 15b to the more significant halves 5a or 15a of the registers 5 or 15 respectively. It will also be appreciated that if the contents of the registers 7 and 17 are shifted by one place towards the left before adding, then, for the same clock pulse frequency, the rate of overflow, and hence the speed of beam movement, will be doubled. It follows, then, that a greater degree of shifting applied to'the contents of the register 7 will produce a correspondingly greater effective beam movement speed. The manner in which such relative shifting is employed to control the drawing speed will be described later.
  • the denominational capacity'of the registers 5, 15, and 17 is determined by the minimum increment of movement in beam position required for the display,
  • this capacity of register is capable of specifying a beam position in an area approaching 10 meters square.
  • the positional and displacement information used in the storage device 9, and the registers 5, 15, 7 and 17 of the present device have a sixteen bit capacity and are capable of defining beam positions greatly in excess of the 12-bit capacity of the window represented by the display face of the cathode ray tube 1.
  • this information may be regarded as specifying a virtual picture drawn on this much larger area and the display face of the tube 1 may then be regarded as a window looking at a part of this virtual picture.
  • the virtual picture is regarded as having its origins on the X and Y axes at the centre of the picture, and positional designation along an axis is indicated as a signed binary number in twos-complement form on each side of the origin.
  • the second store 9 is used to contain the coordinates of the origin of a required window position relative to the virtual picture, and again the convention is observed that the origins on the X and Y axes for the window respectively specify the position of the centre of the window on the virtual picture.
  • the window co-ordinates are read out from the store 9 to the subtractor l0, and the position co-ordinates from the display store 28 are also read out to the subtractor 10.
  • the subtractor l subtracts the X-and Y-axis values of the window co-ordinates respectively from the position co-ordinates and passes the differences respectively into the X-position register a and the corresponding register a for the Y axis value.
  • the speed of writing such small displacement lines may be increased by a leftshift of the displacement information in the register halves 7b and 17b, and it will be appreciated that such a left-shift effect is readily obtainable in the case of the X-axis, for example, by applying less than a l6-position right-shift in moving the displacement information from the register-half 7a into the registerhalf 7b. Accordingly, instead of a fixed right-shift of 16 places, the present device is arranged to apply successive right shifts until all significant bits have left the register-half 7a. It will be understood that as the shifting of the information takes place filler bitsare inserted into the lefthand end of the register-half 7a.
  • the filler bits will be zeroes, while in the case of negative displacement information, the filler bits will be ones, since these are the respective non-significant bit values respectively for the positive and negative displacement information values.
  • the shifting-right is continued until all the bits in the register-half 7a have the same value. Since the displacement information for the X and Y axes may specify quite different values, the determination of the end of the shifting operation is made dependent upon both the register halves 7a and 17a respectively and independently containing bits of the same value throughout, irrespective of the actual value of the bits contained in the registers, and this condition is indicated by the indicators 8 and 18 respectively.
  • the pointer register 11 is connected in common with the registers 7 and 17 to the common shift control line 14 so that as the information in the registers 7 and 17 is right-shifted the binary 1 from the stage 11a is shifted into the main register 11 by a corresponding amount.
  • the adder 12 is connected to the add" control line 27 in common with the adder networks 6 and 16 so that the contents of the pointer register 11 are added into the pointer counter 13 whenever an adding cycle takes place. The succession of adding cycles is terminated when the pointer counter 13 reaches an all-zero state.
  • the above-described selection of a required degree of right-shifting ensures that all lines are drawn at approximately the same speed and have a substantially constant visual brightness. While this is desirable for lines wholly within the view of the window and also for parts of lines which are included within the field of view, it will be appreciated that since the window is only a small part of the virtual picture, it is also desirable to ignore or to scan rapidly over lines and parts of lines that cannot fall within the window field. in the case under consideration it will be recalled that the position information with respect to the virtual picture is expressed as a 16 bit value for each axis, while the extent of window field in each axis is expressed only as a 12-bit value.
  • the AND gate While the line being drawn lies wholly in the window field, the AND gate will continue to produce its output throughout the drawing sequence. However, if the line being drawn moves out of the window field, the absence of the output from the AND gate 20 indicates this fact. Under these conditions it is required to skip as rapidly as possible to the terminal end of the line, since the. remainder of the line cannot actually be drawn on the display, and the cathode ray tube beam will be fully deflected in one direction on at least one of the axes.
  • the skip logic network 21 controls this operation.
  • the network 21 produces an output
  • the network 6 (for the X-axis) performs an adding cycle during which the contents of the AX register 7 are added into the register 5, and the registers 5, 7 and 11 are then left-shifted'one place. If the network 21 still produces an output after this shifting operation, the adding and left-shifting cycles are repeated. If, however, the network 21 does not produce an output at any point in this sequence of cycles, then the left-shifting cycle is carried out without an adding cycle. The sequence of cycles is terminated when the pointer counter 13 contains zero, as indicated by the all zero indicator 22.
  • Both axes X and Y will be crossed by the line; a condition which may be determined by a change of sign for the values of both axes if the displacement value is added to the initial position value.
  • the X-and Y-axis indicators 24 and 25 respectively indicate an axis crossed condition for the two axes independently.
  • One axis will be crossed and the value for the position of the terminal end of the line on the opposite axis lies within the window field range.
  • the X-position register 5a will be connected, as previously described, to the field indicator l9, and the absence of an output from this indicator inhibits an output from the AND gate 20 to indicate that the initial position is not within the window field.
  • the adder network 6 includes sum outputs from which a sum derived from the values in registers 5 and 7 may be gated into the register 5. Clearly, if the sum transfer gates of the network 6 are inhibited, a sum may be formed without the value in the register 5 being altered.
  • the field indicator 19, it will also be recalled, is selectively connectable to the five most significant digits of the sum outputs of the adder 6. Thus, the test procedure next requires that the sum outputs be connected to the indicator 19 but that the sum represented by the outputs is inhibited by closure of the transfer gates of the adder 6 from entering the register 5.
  • the output of the AND gate 20 is again examined to determine whether the mid-point lies within or outside the window field. If the mid-point is outside the window field it will be clear that the entire first half of the line is also outside the field and need not be drawn. Hence, if the AND gate 20 does not produce an output at this point, the transfer gates of the network 6 are opened to permit the new mid-point position value to be registered in the X-position register a as a new start-point for the line. This has the effect of substituting a new line specification into the X and Y registers, the new line corresponding to the second half of the originally-loaded line and therefore having an initial position corresponding to the mid-point of the original line.
  • the AND gate 20 output indicates this fact and the network transfer gates are inhibited so that this mid-point information is not transferred to the position registers 5 and 15.
  • the line drawing mode of operation is reinstituted, the current position values in the X- and Y- position registers are treated as initial position values, and the shifting down of the displacement values in the registers 7 and 17 continues without further testing until the normal drawing position is reached under control of the state indicators 8 and 18. The remaining part of the line is then drawn as previously described.
  • the procedure outlined above for dividing a line to be drawn into successive halves may also be used to reduce the time required to draw lines in the other categories b, c and d set out above.
  • the whole-line information as represented by the initial position information in registers 5 and and the terminal position information represented by the sum outputs of networks 6 and 16 respectively may be used to test for the conditions b, c and d. If one of these conditions is found, then the single right-shift of the registers 7 and 17 is performed so that the sum outputs of the networks 6 and 16 now specify the mid-point of the line. If this mid-point lies within the window field, then the procedure described above is followed, because the situation is now that wherein a line ends within the window field.
  • the first right shift operation produces a result in which the conditions b to d do not apply, then the possibility of a window crossing exists only in relation to the latter half of the line, so that the sum outputs of networks 6 and 16 are transferred to the position registers 5 and 15 respectively to form a new initial position" values corresponding to the mid-point of the line.
  • a second right-shift of the displacement infonnation in registers 7 and 17 is then made so that the latter half of the original line is then in its turn halved and the tests are repeated.
  • the shifting and testing process is continued until either the state indicators 8 and 18 indicate that the total right-shifting of the registers 7 and 17 has brought the displacement values into the required predetermined position for initiating drawing (in which case the drawing operation begins) or that the current initial position represented by the value in only one of the position registers 5a or 15a lies within the window field range while the current terminal position represented in the sum register of that one of the adders 6 or 16 associated with the same axis lies outside the window field range (in which case the line cannot cross the window and the pronedure described above, for left-shifting to reach the end of the line rapidly, is initiated).
  • the indicators 24 and 25 show, for the X and Y axes respectively, that the most significant bit of the initial position information (in the position register 5 or 15, according to the axis concerned) is unlike the most significant bit of the terminal value currently represented in the sum register of that one of the networks 6 or 16 concerned with the same axis. Because these bits are in practice zero if the values are positive and one if the values are negative, the unlike condition occurs only if one value is positive while the other is negative. In other words, the line between these two positions must cross the axis. Thus the indicator 24 produces on output if the X axis would be crossed by the line and the indicator 25 produces an output if the Y axis would be crossed.
  • the pointer register 11 is shifted in sympathy with the registers 7 and 17.
  • the registers 7, 17 are shifted to the right, then the pointer register 11 is also shifted to the right, and conversely, if the registers 7, 17 are left-shifted, then the pointer register 11 is also left-shifted.
  • the contents of the pointer register 11 are added into the pointer counter 13 only when the sum outputs from the networks 6, 16 are transferred into the position registers 5, 15 since the add control line 27 is connected to all the adding networks 6, l6 and 12.
  • the pointer counter is represented by the values in the X- and Y- position registers a and a and the operations in respect of the line under consideration are at an end.
  • the all zero condition indicated by an indicator 22 is therefore used to recognise this fact, and the output of the indicator 22 is used to condition the control unit 26 to proceed to deal with the next line to be drawn.
  • the control unit 26 is therefore made to respond to the indicator 22 output to initiate the withdrawal of the next line information from the display store 28 and to load the registers 5, l5, 7 and 17 with the new line information.
  • the zoom shift register 31 controls the scale of the display in relation to the virtual picture size.
  • the zoom shift register receives the values from the subtractor l0 and permits these values to be read out to the registers 5, l5, 7 and 17 with an effective right-shift to an extent dependent upon the scale of the drawing specified by the processor 30.
  • Visual display apparatus for controlling the effective drawing speed of a line having initial and terminal ends respectively,-the line being drawn by deflection of an electron beam over a cathode ray tube display face of predetermined area, including for each of two coordinate axes respectively a multidenominational accumulating position register, the position registers being arranged respectively initially to store binary coded digital beam deflection values together representative of the position of the initial end of the line to be drawn; a multidenominational accumulator connected as an extension to that end of the position register having least denominational significance the connection permitting overflow digits from the accumulator to be acbrought in an all zero state, then the final position cumulated in the position register; and a multidenominational displacement shift register; means for entering into the displacement registers binary coded digital displacement values respectively representing relative to the position of the initial end of the line the position of the terminal end of the line, all the binary-coded digital values being expressed respectively in terms of minimum beam displacement increments, the significance of the denominations of each displacement register
  • the shifting means includes control means and the terminating means is connected to said control means and includes a pointer register and a counter, the contents of the pointer register being shifted in synchronism with the relative shifting applied to the displacement register and being added into the counter in synchronism with the adding of the contents of the displacement register into the position register, the control means responding to the registration of a predetermined value in said counter to terminate the addition.
  • Apparatus as claimed in claim 2 including an information store arranged to store for both axes respectively in respect of each line to be drawn initial position values representing the initial end and the displacement values representing the terminal end,'the values being expressed in relation to a notional display area larger than said predetermined area; means for entering the initial position values into the respective position registers; indicating means for each axis arranged to examine predetermined denominations of higher denominational significance of a position value to produce a second control signal if that part of a line currently to be drawn falls within said predetermined area, the control means being responsive to the absence of second control signals to modify the degree of relative shifting appliedvalues entered into the displacement registers to skip over those parts of the line outside said predetermined area at a higher speed than that effective drawing speed of a line portion within the predetermined area.
  • Apparatus as claimed in claim 3 including a further store containing values representative of the position of the required display area relative to the virtual total display expressible by values within the information store and in which the means for entering the values from the information store into the position registers is connected to said further store and includes means for arithmetically modifying the position values from the information store by values from said further store to represent positions with respect to the required display area.
  • Apparatus as claimed in claim 4 in which the entering means further includes means for applying a predetermined shift to values before entry into the position and displacement registers to modify the scale of displayed ines.

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  • Engineering & Computer Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
US00251066A 1971-05-15 1972-05-08 Visual display device Expired - Lifetime US3812485A (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4143360A (en) * 1976-08-27 1979-03-06 The Magnavox Company Method and apparatus for controlling a display terminal
US4365305A (en) * 1981-01-05 1982-12-21 Western Electric Company, Inc. Vector generator for computer graphics
US4475172A (en) * 1978-05-30 1984-10-02 Bally Manufacturing Corporation Audio/visual home computer and game apparatus
CN112346679A (zh) * 2019-08-07 2021-02-09 西安诺瓦星云科技股份有限公司 多显示屏控制***、显示***和多显示屏控制方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2836500C3 (de) * 1978-08-21 1981-09-24 Siemens AG, 1000 Berlin und 8000 München Anordnung zum Einblenden von Graphiken in ein auf dem Bildschirm eines Sichtgerätes dargestelltes Bild

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4143360A (en) * 1976-08-27 1979-03-06 The Magnavox Company Method and apparatus for controlling a display terminal
US4475172A (en) * 1978-05-30 1984-10-02 Bally Manufacturing Corporation Audio/visual home computer and game apparatus
US4365305A (en) * 1981-01-05 1982-12-21 Western Electric Company, Inc. Vector generator for computer graphics
CN112346679A (zh) * 2019-08-07 2021-02-09 西安诺瓦星云科技股份有限公司 多显示屏控制***、显示***和多显示屏控制方法
CN112346679B (zh) * 2019-08-07 2024-01-09 西安诺瓦星云科技股份有限公司 多显示屏控制***、显示***和多显示屏控制方法

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GB1360487A (en) 1974-07-17
DE2223257C3 (de) 1979-11-29
DE2223257A1 (de) 1972-11-30
FR2139542A5 (de) 1973-01-05
DE2223257B2 (de) 1979-04-12
AU4194172A (en) 1973-11-08
AU458508B2 (en) 1975-02-27

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