US3786480A

US3786480A - Digital display system of floating point representation

Info

Publication number: US3786480A
Application number: US00201856A
Authority: US
Inventors: I Hatano; K Urasaki
Original assignee: Omron Tateisi Electronics Co
Current assignee: Omron Corp
Priority date: 1970-11-25
Filing date: 1971-11-24
Publication date: 1974-01-15
Anticipated expiration: 1991-01-15
Also published as: DE2158011B2; DE2158011A1; IT942941B; DE2158011C3; CA989979A; GB1360468A; JPS5013131B1; FR2116025A5

Abstract

A digital display system of floating point representation for use in an electronic calculator for displaying a decimal number in the form of effective figure representation together with an index X10n, which means the use of n-th power of the base 10. This system is provided for enabling the result of an arithmetic operation, which has a number of digits exceeding the capacity of the display device, to be easily read.

Description

United States Patent [191 Hatano et a].

[ DIGITAL DISPLAY SYSTEM OF FLOATING Jan. 15, 1974 3,074,635 1/1963 Borne et al. 235/92 SH X POINT REPRESENTATION 3,358,125 12/1967 235/92 SH X 3,396,378 8/1968 Keith 340/324 R [75] Inventors: Isao Hatano; Kazuaki Urasaki, th 3,492,656 1 1970 Hildebrand! 340/324 R x of Kyoto, Japan 3,526,887 9/1970 Erni 340/324 R [73] Assignee: Omron Tateisi Electronics Co.,

Kyoto'shh Kyoto'fu" Japan Primary Examiner-David L. Trafton [22] Filed: Nov. 24, 1971 Attorney-Craig, Antonelli and Hill [21] Appl. No.: 201,856

A ST A T [30] Foreign Application Priority Data [57] B R C NOV. 25, Iapan A ystem of floating point representation for use in an electronic calculator for displaying a 340/324 235/92 235/92 SH decimal number in the form of effective figure repre- IIIL CI. ent ti together an index X10", means [58] Field of Search 340/324 R; the use f h power f h b 1() Thi st m is 235/92 SH, 92 EA provided for enabling the result of an arithmetic operation, which has a number of digits exceeding the ca- References Cited pacity of the display device, to be easily read.

UNlTED STATES PATENTS I 3,420,988 l/I969 Hunt et al. 235/92 EA X 28 Claims, 11 Drawing Figures T1 Tues 11; 2. 3 4 5 6 r 81 Q i. DRIVING I CIRCU'T VI V2 Al V8 A2 [5 J f? P FLIP- FLOP E DECORDER CIRCUIT L I e DISCRIMINATOR es en 94 f e2 95 i D HD8ID4 02 0| ALcutArlou SHIFT REGISTER UN|T DECIMAL POINT SIGNAL- NUMERAL SIGNAL PATENTEU 519/4 3. 786,480

SHEET 1 BF 5 H IA m "J [ilfffjjjijfjfjwfl Fig. 2

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l l, 8 \A I l 5 4 5 6 7 8 XIO TUBE 8 DRIVING \vr v2 Al V8 A2} 95cm 1 J .0 9 --F FLIP-FLOP -P E DECIMAL POINT POSITIONING L DECORDER d3 d2 DISCRIMINATOR ddsr d! d D8 D4 D2 CALCULATION O SHIFT REGISTER UNIT DECIMAL POINT SIGNAL NUMERAL SIGNAL Fig.5

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A TUBE l 3 4 5 6 7 8 XIO DRIVING CIRCUIT W Va Al V8 A2 FLIP- FLOP E DECIMAL POINT POSITIONING [EL DECORDER CIRCUIT M DISCRIMINATOR BB 7 I an 5 en 94 e2 e5 l K D8D4D2Dl' l CALCULATIW SHIFT REGISTER UN|T NH DECIMAL POINT SIGNAL NUMERAL SIGNAL Fig. 9 I

' M DIGITS sb slI z 53 s4s5 56 87 n DIGITS The present invention relates to a-digital display system and, more particularly, to a system for displaying a resultant decimal number with the use of powers of when the overflow condition occurs in such a way that the number of digits of the resultant decimal number exceeds that of the figure illuminating elements provided in a display window.

Specifically, the present invention can be advantageously applied to electronic instruments each having a digital display window through which the counted or measured digital figure can be viewed, such as an electronic computer, electronic desk-top calculator, digital weighing machine and others. However, the present invention is most suitable for use in an electronic calculator and, accordingly, the description will proceed as employed in such electronic calculator.

Heretofore, various methods for treating the resultant decimal number when overflow takes place have been practiced in different electronic calculators each having a display window capable of illustrating the resultant decimal number. Of these methods, one is such that the digits of the resultant decimal number located to the right of the most significant column or left of the least significant column are displayed as shown in FIG. 1 (A) or FIG. 1 (B) respectively. Another is such that the display of the resultant number is cancelled while only the zero digits are displayed as shown in FIG. 1 (C) and others are such that, instead of the display of the resultant number, the digits selected at random are displayed and such that the first half of the resultant decimal number is first displayed while the remaining half thereof is subsequently displayed by operating a Call Back key.

In the conventional electronic calculator capable of performing any one of the above-mentioned methods except for the last mentioned one, there is a fatal disadvantage in that the result of the arithmetic operation performed thereby cannot be exactly read off. Even in an electronic calculator capable of performing the last mentioned method, there is a disadvantage in that, if the calculator has an 8-digit display and entry'capacity, the calculator should be provided with a register of relatively larger capacity and enough to-store multidigits of the number substantially equal to the sum of the numbers of the digits of the multiplicand and the multiplier both to be entered in the calculator unless otherwise the product thereof, i.e., the result of an arithmetic operation performed thereby, has a certain number of digits smaller than eight. The last mentioned disadvantage has a tendency to bring about an increase in the manufacturing cost of such a calculator.

Accordingly, the present invention has been made to eliminate these disadvantages commonly inherent in the conventional electronic calculator or like devices and has for its essential object to provide a digital display system for use in an electronic calculator capable of reading off or indicating the result of an arithmetic operation in the decimal form with the use of powers of 10 when the overflow condition occurs, substantially without necessitating any additional operational procedure such as operating a CallBack key.

It has been well known that a decimal number can be expressed in terms of a suitable integral power of 10, that is, X10". By way of example the decimal number 123,456 can be expressed in the form of 1.23456 X 10 12.3456 X10 123.456 X 10 and so on. 1n this case, the original number 123,456 can be identified by shifting the decimal point n places to the right.

If the electronic calculator has a display system capa ble of indicating or reading off the result of an arithmetic operation performed thereby with the use of the nth power of 10 n: an integer the effective figures of the resultant number with the decimal point located n places to the left from the least significant digit position of the display system can be read off even though the overflow condition occurs beyond the capacity of the electronic calculator.

The wording effective figures "hereinabove and hereinafter employed is definedas figures of a decimal number indicated or read off by the display system of an electronic calculator within its capacity. By way of example, if the calculator has an 8-digit display and entry capacity while the product of the multiplicand and the multiplier, both to be entered in such calculator, is 123,456, 789, that is, the consecutive digits of the number exceed eight or the capacity, the effective figures according to the definition hereinabove given are said to be 12345678, that is, the number or digits read off within the capacity of the electronic calculator.

Another object of the present invention is to provide a digital display system for use in an electronic calculator having an M-digit display and entry capacity M an integer)which substantially comprises means for storing the positioning of a decimal point with respect to a decimal number entered therein or the result of an arithmetic operation performed thereby, means disposed about a digital display window of the calculator for visually representing a symbol X10" and means for determining as to whether the content stored in said storing means exceeds the value of n, said determining means being capable of generating a signal to said representing means only when said content stored in said storing means actually exceeds the value of n, that is, the overflow condition occurs, so that said representing means can be brought into an operative position by said signal from said determining means and concurrently the decimal point can be moved n places to the left with respect to the position of the decimal point stored in said storing means, whereby the result of arithmetic operation performed thereby or thedecimal number entered in said calculator can be read off in the form of effective figures with the decimal point located n places to the left. v

A further object of the present invention is to provide the digital display system which can be provided with a plurality of means for visually representing the symbol X10" anyone of which can be selectively brought into an operative position depending upon the number of digits of the result of arithmetic operation.

According to the present invention, the means for visually representing the symbol X10" is employed in the form of an electrical lamp bearing or illuminating the symbol X10 upon energization thereof, said lamp being located to the right of the digital display window of an electronic calculator If the present invention, is for example, applied to an electronic calculator having a 8-digit display and entry capacity, the product of l 1, 111, 111 X 11,111, l11, i.e., 123456787654321 can be read off in the form as shown in FIG. 2, while the X10 if the exponent n is 8 lamp is energized. 1n

other words of these consecutive digits, only the effective figures 12345678 within the capacity of the calculator are indicated with the decimal point located 8 places left of the consecutive digits corresponding to the product of the above multiplication. Thus, it is clear that the approximate result can be obtained by mentally multiplying the effective figures l234567.8 times the 8th power of ten, that is, 12345678 X 10 These and other objects and features of the present invention will be clearly understood from the following full description of the present invention taken by way of example in conjunction with preferred embodiments thereof with reference to the accompanying drawings, in which,

FIG. 1(A) through FIG. 1 (C) are schematic diagrams respectively showing types of digital displays which are employed in prior art electronic calculators,

FIG. 2 is a similar diagram to FIG. 1, but showing a type of digital display which is employed in the display system incorporated in an electronic calculator according to the present invention,

FIG. 3 is a block diagram showing the digital display system according to one preferred embodiment of the present invention,

FIG. 4 is a block diagram showing the digital display system according to another preferred embodiment,

FIG. 5 is a schematic diagram showing various positions of a decimal point in the display window,

FIG. 6 is a block diagram showing a digital display system according to a further preferred embodiment of the present invention,

FIG. 7 is a schematic diagram, on a somewhat enlarged scale, showing the details of a visualregister employed in the embodiment of FIG. 6,

FIG. 8 is a block diagram showing the digital display system according to a still further preferred embodiment of the present invention,

FIG. 9 is a similar diagram to FIG. 5, which may be employed to illustrate the applicability of the present invention to the display system wherein means is provided for preventing the decimal point from shifting to the left exceeding a predetermined decimal point position counted from the least significant digit position of the display window,

FIG. 10 is a schematic diagram showing a display window of the digital display system according to a still further preferred embodiment of the present invention, and

FIG. 11 is a schematic diagram showing waveforms of various timing pulses employed in the present invention.

Before the description of the present invention proceeds, it is to be noted that like parts are designated by like reference characters throughout the several views of the accompanying drawings. In addition, for the sake of brevity, the present invention will be hereinafter described in conjunction with a digital display device with floating point representation system as incorporated in an electronic calculator having an M digit display and entry capacity and including a XlO" index lamp, wherein both M and n have a selected value of eight. More particularly, there are various types of electronic calculators such as one wherein a decimal number entered can be displayed in such a way that the most significant digit of the decimal number is first indicated at the leftmost position of a display window while the other digits thereof. are stepwisely indicated in the direction of the rightmost position of the display window or one wherein the most significant digit of the decimal number is shifted from right to left until the least significant digit thereof appears at the rightmost position of the display window. In either case, the present invention can be advantageously applied in both types of electronic calculators. However, for the purpose of simplification, the electronic calculator hereinafter referred to should be considered as of the latter type.

Particularly, in the case where the present invention is applied in an electronic calculator having an M-digit display and entry capacity, the values of M and n can be suitably selected depending upon the design of the calculator if and only if the value of M is equal to or greater than that of n.

Referring now to FIG. 3, the digital display device of floating point representation-system according to the present invention includes a display window unit A capable of representing a decimal number consisting of M, that is, eight digits, which may be concurrently used as that provided in, for example, an conventional electronic calculator, and a control unit B for causing the display window unit A to represent the floating point numbers.

The display window A comprises a digital display window A having eight digital indicating tubes V, V V transversely arranged with respect to each other and an index or X10 window A having, for example, a lamp capable of illuminating the symbol l0 Each of the digital indicating tubes V V V is adapted to illuminate a certain digit upon application of a signal thereto from a decoder E through indicating tube driving circuitry J, said decoderE being effective to convert a binary coded number into decimal form. Each of the digital indicating tubes is also adapted to receive a signal from decimal point positioning circuitry F for determining the position of the decimal point to be assigned, whereby the decimal point can be illuminated at a selected position depending upon the presence thereof in the decimal number entered.

In addition to the elements as indicated by E, F and J, the control unit B includes a register R for memorizing the position of the'decimal point included in the decimal number, an input signal representative of said position of the decimal point being applied thereto from a terminal X. This register R is constructed so that if the decimal point is to be represented at a position as indicated by S inFIG. 5, the content of the register R contains information that the position of the decimal point is 0 if the decimal point is to be represented at a poisition S the content thereof is l and, in a likewise manner, if the decimal point is to be represented at a position 8,, the content thereof is 7 Reference character C is an output terminal of the register R from which a signal representative of the position of the decimal point can emerge to the decimal point positioning circuitry F, while reference character C is an output terminal of said register R from which a binary signal representative of [1] can emerge when the content of the register R exceeds 8 namely, when the integral numbers to be represented through the display window A exceed eight digits. This output terminal C is connected with the index illuminating lamp of the index window A through a discriminator L and then a flip-flop P. The discriminator'circuit L may provide an output signal when the output signal from the terminal C of the register R is [l while the flip-flop circuitry P is set by the output signal from discriminator circuit L and remains in the set state until the once-displayed numerals have been updated.

The register R has a third output terminal C from which an output signal indicative of the contents of said register can emerge which are, in turn, fed to an input terminal of an adder K,

A terminal C is adapted to apply a signal representative of binary coded digits of the value n therefrom to the adder K. This signal from the terminal C is, since the value of n is eight in this example, representative of binary coded decimal number of 8. As hereinbefore described, the output terminal C of the register R is also connected with the input terminal C of the adder K so that, upon application of the binary signal [1] from the output terminal C of said register R to said adder K, the content of the register R that has been stored in the adder K can be reduced by 8 However, it is to be noted that, although the content of the register R is adapted to circulate from the third output terminal to the input terminal through the adder K, the above mentioned subtraction can be effected only upon application of the signal [1 from the output terminal C of the register R to the input terminal C of the adder K.

As a result thereof, the content of the adder K in which the subtraction of 8 has been effected, upon receipt of the signal from the register R through its terminal C is transferred to and stored in the register R as a new content.

Although the construction of the display device according to the preferred embodiment of the present invention has been described, it is to be noted that the adder K employed may be any type such as, for example, one in which a register addition can be effected between the content of the register R and the binary signal representative of 8 which is used as a complement, other than that wherein subtraction can be effected therebetween as hereinbefore described.

The operation of the digital display device of the above construction will hereinafter described on the assumption that a binary coded digital signal representative of, for example, the product 123456787654321 of 11111111 X llllllll has been applied tothe decoder E from a terminal Y which may be connected with keyboard switches or the arithmetic circuit of the electronic calculator and only the number of the digits of the above product within the capacity of the display device, that is, 12345678 has been illuminated through the corresponding digital indicating tubes V V,

V while the other digits 7654321 constitute overflow. However, the decimal point included in the number l2345678765432l is, if expressed by way of FIG. 5, supposed to be at the position S In this case, the input signal applied to the terminal X is such as to indicate that the position of the decimal point is at S this input signal being fed to the register R. Since the value of this input signal representative of the position S is higher than 8 the register R generates an output signal representative of 1 through its output terminal C which is in part applied to the discriminator L and in part applied to the adder K.

The signal thus applied to the discriminator L can be compared as to whether the content stored in the register R, that is, the signal 1 fed from the register R, exceeds the value ofn and, when said signal 1 exceeds the value of n 8, an output signal is generated from the discriminator L to the index window A, through the flip-flop circuitry P so that the index lamp in said window A can be illuminated. It is to be noted that the flip-flop circuitry P is adapted to be set by the output signal from the discriminator L and acts to maintain the 5 index lamp in the illuminating condition until a subsequent input signal representative of different decimal number is applied to the terminal Y or the decoder E.

The signal [1] that has been applied to the adder K as hereinbefore described acts to subtract 8 from the content, i.e., l4 of the register R that has been transferred thereto through the third output terminal of the register R.

The output signal of the adder K, which is the difference between the content of the register R and the signal l, i.e., representative of 6 is then circulated back to the register R and subsequently fed to the decimal point positioning circuitry F through the output terminal C of the register R so that the decimal point positioned at S can be illuminated by an output signal from said circuitry F, with the result in that the display window unit A can indicate the'number 12345678 while the index lamp is illuminated. Thus, it is clear that the operator of the display device can obtain the result in the form of the effective numbers multiplied by X10 and namely;

It is noted that although the register R employed has been described in the form of a register having a suitable number of bits for storing the signal representative of the position of the decimal point included in a decimal number, it can be replaced with a pair of series connected counters of an octal number system if the value of n is 8 t In the foregoing embodiment of the present invention, the content of the register R has been described as reduced by n in the adder K. However,without subtracting n from the content of the register R, asimilar operation of the display device can be possible. For this purpose, another embodiment of the present invention is provided such as shown in FIG. 4.

In FIG. 4, reference character D indicates a 4-bit dynamic shift register consisting of binary storage elements D,, D D and D having respective weights of 1, 2, 4 and 8. This 4-bit shift register D has ari'input terminal d to which a binary coded signal representative of the position of the decimal point included in'a decimal number is applied being received from, for example, an arithmetic calculation unit H of an electronic calculator, and an output terminal d being connected with the arithmetic calculation unit H. Reference characters d d d, and d,, are respective output terminals of the 4-bit register D, the terminals d d and d, being. connected with the decimal point positioning circuitry P so that the positioning of the decimal point can be determined depending upon application of an output signal thereto from any one of the output terminals d d;, and d of the storage elements D D, and D, while the output terminal 11,, of the storage element D is connected with the discriminator L which is in turn connected with the index lamp of the index window A through the flip-flop circuitry P.

As is well known by those skilled in the art, the dynamic shift register is designed such that binary coded digits to be stored therein are circulated therethrough in succession in response to bit timing pulses t, t t and r, and digit timing pulses T T T, emerging from the output terminal d, In the instance as shown, the register D is of the arrangement wherein the decimal point position signal is adapted to be applied to the input terminal d of the register, said position signal being transferred bit by bit in the register in response to the timing pulses t to t and T, to T and then to emerge from the output terminal (1 which is in turn applied to the arithmetic unit H. Accordingly, the decimal point position signal emerging from the output terminal d of the register D is applied to the decimal point positioning circuitry F through a gating element which is triggered on in response to a suitable timing signal. However, for the sake of brevity, in the embodiment as shown, each bit of the register D is shown as having its own output terminal from which the decimal point position signal can be obtained.

The decimal point positioning circuitry F operates in response to the output signals from the storage elements D D and D in such a manner that, when the output signals from said elements are [0], [0] and [0], respectively, the decimal point can be illuminated at S when said output signals are [0], [0] and [1], respectively, the decimal point can be illuminated at S and likewise, when the output signals are [l], [0] and [0] the decimal point can be illuminated at 8,.

It is to be noted that, in the case where the input signal fed from the arithmetic calculation unit H to the 4-bit shift register D represents a decimal number of up to 15 digits, the register D should have the capacity of storing up to 14. Accordingly, the number of storage elements of the 4-bit register D is satisfactory with four, such as indicated by D D ,D and D However, in the case where the input signal fed from the arithmetic calculation unit H to the 4-bit register D represents a decimal number of more than l5 digits, it is advisable to utilize a 5-bit register consisting of five storage elements. In this case, the storage element D herein employed is connected with the decimal point positioning circuitry F in a similar way as other storage elements D D and D while an additional storage element having a weight of 16 is employed so as to operate the index lamp in the index window A bearing another symbol X In the embodiment shown in FIG. 4, in the case where the decimal number to be read off by the display device consists of not, more than eight digits, the position of the decimal point included therein which is stored by the 4-bit register D is not more than 7 Accordingly, the content of the storage element D is [0] without producing any output signal at its output terminal d and, hence, the index lamp in the index window A will not be illuminated. However, instead thereof, output signals can be obtained at the output terminals 11;, d and d of the storage elements D D and D depending upon the contents respectively stored therein so that the positioning of the decimal point can be determined. In this case, the content obtainable from the output terminal d, is substantially the same as the content obtainable from the output terminals d d and d with respect to the positioning of the decimal point.

On the other hand, in the case where the decimal number to be read off by the display device consists of more than eight digits, for example, 1234567890.] the input signal fed from the arithmetic calculation unit H represents a digit 9 since the integral portion of the decimal number to be read off consists of 10 digits.

Upon receipt of the input signal the storage elements D D D and D of the 4-bit register D generates through their individual output terminals d d d and d respective output signals of [l] [0] [0] and [ll 5 a binary combination of which represents the digit 9.

[l represents the digit 1 and, therefore, the position of the decimal point can be determined at 3,. This procedure is substantially the same as wherein the content 9 of the 4-bit register D is subtracted by 8 Thus, it is clear that the display window unit A represents the following decimal number:

wherein the effective numbers, 12.345678, are illuminated through the digital display window A while the index l0 can be illuminated through the index windOW A2.

It is to be noted that the decimal point position signal representative of 9 that has been initially applied to the 4-bit register D from the arithmetic calculation unit H can be obtainable at the output terminal d of the 4-bit register D.

In the foregoing embodiment shown in P10. 4, although the description has been made in connection with the display device having an 8-digit display cavity wherein the 4-bit register is composed of series connected storage elements, the general arrangement is such that, in the case where the n-th power of IQ is employed, the register should have storage elements of the number l log n the output from the most significant bit of said register being utilized to operate the index lamp representative of X10" while the outputs from rightward bits including the least significant bit thereof are utilized to determine the position of the decimal point. In addition, instead of a dynamic register, a static register may be employed for the same purpose. However, in this case, the static shift register is capable of storing the content until a reset signal is applied thereto.

The 4-bit register D employed in the foregoing embodiment ofFIG. 4 may be utilized in the form of a portion of a register included in the arithmetic calculation unit H of the electronic calculator.

Referring now to FIG. 6, an essential portion of the arithmetic calculation unit H includes first and second serial shift registers WR and KR connected in series, the output of the register KR being impressed on a full adder FA through a gate G A third serial shift register AR is connected to the full adder FA through a gate G The contents of the register WR, i.e., the information stored in the register WR in the form of various combinations of binary coded digits, is circulated around a circulation path through a gate G In other words, the output of the register WR is applied to the input of the same register WR through the gate G which can be turned on by electric signals in a known manner. Similarly, the contents of the register KR and those of the register AR are circulated around circulation paths through a gate G, and through a gate G respectively.

To facilitate transfer of the contents of the register WR to the register KR, a gate G is connected between the register WR and the register KR so that, when the gate G is turned on, the contents of the register WR can be transferred to the register KR through the gate G8 In order to transfer the contents of the register AR back to the reigster WR, the gate G is arranged between the register AR and the full adder FA while gates G and G are connected in'series between the full adder FA and the register WR. In this arrangement, when the gates G, G and G are individually turned on, it will be understood that the contents of the register AR can be transferred to the register WR through the gate G the full adder FA and gates G and G This arrangement is such that the arithmetic operation in the calculator proceeds in such a manner that a signal representative of information of a decimal number entered and of information ofthe position of the decimal point included in said decimal number are circulated from one register to another register or adder in response to the timing signal suitably allocated therefor.

A gate G is disposed between the registers KR and AR for transfer of the content of the register KR thereto.

The shift register WR is a visual register for transferring a signal representative of information of the decimal number and the position of the decimal point entered to the display unit A 'and comprises, particularly as shown in FIG. 7, a storage element having 8-bits for storing the information of the decimal point position and a storage element having 32-bits for storing the information of the decimal number consisting of eight decimal digits. The content stored in the register WR is, in a manner known to those skilled in the art, shifted bit by bit in the shift register WR in response to each bit timing pulse t,, t t and t, while a combination of binary digits corresponding to one decimal digit of the content can be transferred in response to each digit timing pulse T1, T2 and T each having a duration substantially equal to 'the'sum of durations of each four of said bit timing pulses. 7

It is to be noted that the condition shown in FIG. 7 is such that, during a period in which the duration of the bit timing pulse t falls onthat of the digittiming pulse T1, the digit signal occupies from the first stage to the eighth stage while the decimal point position signal occupies the second bit to the fourth bit of the ninth stage and the first bitof the tenth stage. However, in practice, the signals each representative of one decimal digit occupying the corresponding first to tenth stages emerge from the output terminal d of the shift register in response to the digit timing pulses T1 to T10, respectively. I

In this shift register WR, four bits for example the three bits 0,, D and D, of the ninth stage and one bit D; of the tenth stage are utilized to act as an equivalent of the 4-bit shift register D shown in FIG. 4. Accordingly, it is clear that, in a similar manner as shown in FIG. 4, binary digit signals can be obtained from the terminals d,, d, and d, during a period in which the duration of the bit timing pulse t, falls in that of the digit timing pulse Tl, which are in turn utilized to operate the decimal point positioning circuitry F. The signal obtainable from the terminal d, is, on the other hand, utilized to operate the discriminator L so that the index lamp in the window A can be illuminated only when the decimal point position signal exceeds over 8 namely, when the bit position of the bit 0,, of the shift register WR becomes [1].

As hereinbefore stated, the arithmetic operation in the calculator proceeds in such a manner that signal representative of information of a decimal number entered and of information of the decimal point position included in the decimal number are circulated from one register to another register or full adder in response to the timing pulses suitably allocated therefor.

If the result of this arithmetic operation is assumed to be 1234567890.] the signal representative of the aboveresult and the signal representative of the decimal point position the latter signal is indicative of 9 since the decimal point included in this result locates at the ninth position from the most significant digit. are fed to the visual register WR from the full adder FA in response to the timing pulse and, thereafter, stored in the corresponding bits of said register. The content thus stored in the visual register WR is in turn circulated in the circulation path through the gate G back to said register WR. During this process, binary digit signals are fed to the display window A, through the decoder H and then the indicating tube driving circuitry J thereby to represent the effective numbers of the result, that is, 12345678.

On the other hand during the same duration of the timing pulse T1, the decimal point position signal is stored in the bits D D D and D, of the visual register WR in the form of binary digits, [1], [O], [O] and [1] respectively. However, since this position signal is indicative of a number greater than 8 a signal [I] can be obtained at the terminal d, which is in turn utilized to indicate X10 at the window A As a result, thereof, the result of the arithmetic operation can be represented in the following manner:

in FIG. 5, the content of the register is l when the decimal point is to be represented at a position 8,, the content thereof is 2 and, likewise, when the decimal point to beat a position 8-,, the content of the register is 8 As hereinbefore described, in the electronic calculator of 8-digit display and entry capacity, the arithmetic operation performed thereby produces the result of 15- digit decimal number at maximum and, accordingly, the means for storing the position of the decimal point should be such that the number 15 can be stored. In this case, the number of storage elements of the 4-bit register is satisfactory with four elements D,, D,,, D, and D having respective weights of l, 2 4 and 8.

In FIG. 8, reference character 21 represents an output terminal of the 4-bit shift register D of static type and reference character 22, e3 and e4 represents output terminals of the storage elements D,, D, and D, of the register D. These output terminals of these storage elements are connected with an input terminal of an AND circuit e9 through an OR circuit e8 An output terminal e5 of the storage element D is connected with another input terminal of the AND circuit e9,while being connected with an input terminal of an AND circuit e10. The AND circuit e9 has an output terminal connected with the discriminator L so that, upon receipt of a signal from the AND circuit e9, this discriminator L can provide a signal for the index lamp in the index window A to thereby illuminate said lamp.

Another input terminal of the AND circuit e10 is adapted to receive an output signal from the AND circuit e9 through an inverter ell. This AND circuit e10 includes an output terminal 26. The output terminals e2, e3, e4 and this output terminal e6 are individually connected with the decimal point positioning circuit F so that the positioning of the decimal point can be determined depending upon a combination of binary output signals from these output terminals.

The decimal point positioning circuit F in this preferred embodiment operates in response to output signals from the output terminal e6 of the AND circuit e10 and output terminals e4, e3 and e2 of the register D in such a manner that, when the output signals from said output terminals are [0], [0] and l respectively, the decimal point can be illuminated at the position S when said output signals are [0], [0], [l] and [1], respectively, the decimal point can be illuminated at the position S and, likewise when the output signals are I l], [0], [O] and [O], the decimal point can be illuminated at the position 8,. 7

While in the above arrangement, as long as the content of the 4-bit register D is not more than 7 no output can be obtained at the output terminal of the AND circuit e9 since the input signal at the input terminal of the AND circuit e9 connected with the storage elements D D and D is [0], so that no index lamp in the index window A cannot be illuminated. However, only when the content of the register 'D is 8 can an output signal of [1] be generated from the output terminal e of the storage element D However, in this case, the output signals present at the output terminals 22, e3, and e4 of the storage elements D,,D and D respectively [0], [0] and [0], and the OR circuit e9' does not generate any output signal. Accordingly, the AND circuit e9 cannot be triggered 'and therefore the index lamp in the index window A will not be illuminated.

So long as no output signal is generated from the AND circuit 29, the output signal from the inverter ell is [l] which is in turn applied to the corresponding input terminal of the AND circuit e10. Thus, the AND circuit e10 receives output signals [1 and [1] from the inverter ell and the output terminal e5 of the storage element D, so that an output signal [1] can be generated by said AND circuit e10. Hence, the decimal point positioning circuit F receives a combination of binary signals l [0], [0] and [0] whereby the position of the decimal point can be determined at S ln other words, unless otherwise the content of the 4-bit register is greater than or equal to 8 the index lamp will not be illuminated, while the content stored in the register itself can be represented. On the other hand, if the content of the register exceeds 9 the signal [1] can be obtained at the output terminal 25 of the storage element D and concurrently the signal l can also be obtained at any one or all of the output terminals e2, e3 and e4 of the other storage elements, which are in turn fed to the OR circuit 28 thereby to generate an output signal to the AND circuit e9 so that an output signal [1] can be obtained from AND circuit e9, result- 1 ing in that the index lamp in the index window A can be illuminated. At this time, since the output signal of the inverter ell is [0] AND circuit e10 does not generate any output signal.

From the foregoing description, it is clear that the position of the decimal point can be determined by a binary combination of output signals fed from the output terminals e2, e3 and e4 of the storage elements D,, D and D It is also clear that the determined value is such that the number of the position of the decimal point is subtracted by 8.

Referring now to FIG. 9, there is schematically shown a display window unit having M-digit display capacity wherein the number of digits after the decimal point is limited up to n-l digits while, depending upon, for example, the design practice, the decimal point can be positioned at any one of positions as indicated by S S S S I Even in this case, if it is designed such that the decimal point is positioned atS with respect to the content 0 at S, with respect to the content 1 and likewise, at S 1 with respect to the content it this system of display can be employed in the embodiments as disclosed in FIGS. 4, 6 and 8.

By way of example, in the display device of l2-digit display capacity wherein the provision has been made to limit the number of digits displayed up to seven digits, the decimal point can be positioned at S when the content of the decimal point position storing means is 0 the decimal point can be positioned at S when said content is l and likewise, the decimal point can be positioned at S, when said content is 7 However, if the content thereof exceeds 7 the index lamp representative of 10 can be illuminated while the decimal point can be positioned eight places moved with respect to the content stored in the storing means.

By utilizing the system thus outlined above, in an electronic calculator of M-digit display and entry capacity, consecutive arithmetic operations can be performed even if the result thereof exceeds over M-digits.

A still further embodiment of the present invention will be hereinafter described by way of example in conjunction with the electronic calculator of 8-digit display and entry capacity with reference to FIG. 10.

It is to be noted that, in this embodiment, an additional storage element D having a weight of 16 is provided in the register D shown in FIG. 4, while the index lamp bearing another symbol l0 is additionally provided together with its index display window in the digital display window unit A as shown.

In this arrangement, if the result of the arithmetic operation exceeds eight digits as hereinbefore described, substantially in the same way as in the embodiment shown in FIG. 4, the index lamp can be illuminated while the decimal point can be moved eight places to the right with respect to the decimal point position stored in the register D, so that only the effective numbers in the leftward portion of the resultant decimal number can be illuminated together with the index lamp.

Meanwhile, if the multiplier is multiplied to the resultant decimal number thus displayed while the latter is the multicand, the display window unit A represents new effective numbers of the result, i.e., the product of this second multiplication, while the register D stores a new content, that is, information of the decimal point position which is substantially the sum of the initial content indicative of the initial decimal point position and the content indicative of the decimal point position included in the multiplier. In the event that this new content exceeds 15 the storage element D of the reg ister D generates a signal [l]. With this signal [1] from the register D, the index lamp representative of X10 can be illuminated in place of the index lamp represen tative of l On the other hand, the positioning of the decimal point can be determined by a combination of output signals from the storage elements D,, D, and D and, in this instance, the decimal point is positioned sixteen places to the left with respect to the content stored in the register D.

If the result of this second multiplication is to be further multiplied by a different multiplief of S-digits, the effective numbers of the result of the third multiplication can be displayed while information of a new decimal point position can be stored in the register D. If the content thus stored in the register D exceeds 23 the output signal from the storage elements D and D are respectively [1 and [l] and therefore the both index lamps representative of X and X10 can be illuminated to designate the value of X10" while the decimal point position can be determined by a binary combination of the output signals from the storage elements D D and D l in such a way that the decimal point is positioned 24 places to the left with respect to the content stored in the register. Thus, it is clearly understood that consecutive arithmetic operations can be performed without necessitating any special operational procedures.

As an alternative of method for performing the consecutive arithmetic operations, the following is possible. Once the index lamp is illuminated to indicate that the result of arithmetic operation exceeds over 8 this index lamp is switched on by, for example, operating or depressing a Clear key while the effective numbers of the result is left uncleared. Thereafter, another multiplier is multiplied by this result and, if the index lamp is switched on at this time, the index lamp is switched off again by operating the Clear key. In other words, each time the index lamp representative of X10 is switched on, it is cleared by depressing the key while the number of ignition of the index lamp should be counted by the operator. The finally displayed effective number of the result of consecutive operation can be mentally multiplied by the number of ignition of the X10 lamp to give a desired approximate decimal number.

As hereinbefore fully disclosed, the present invention is such that, in the case where the result of arithmetic operation or the number entered exceeds 'n-digits which is the maximum capacity, the index lamp representative of X10" can be represented while the decimal point is positioned n-placed to the left with respect to the content stored in the storing means as to the decimal point position. Accordingly, without necessitating any special operational procedures other than specitied, the effective number of M-digits can be read off.

Although the present invention has been fully described as having the digital indicating tubes, it is to be noted that, instead thereof, digital printer can be employed without any reduction in the performance of the device of the present invention. In addition, particularly in the embodiment shown in FIG. 6, the output terminal d of the register WR may be connected with the decimal point positioning circuitry F so that an output signal from said terminal d, can be applied to the circuitry F during a period in which the duration of a certain bit timing pulse falls in that of a digit timing pulse.

We claim:

1. A digital display system capable of displaying a decimal number composed of up to M-digits, wherein M is an integer, which comprises:

means for storing the position of a decimal point included in a signal representative of a decimal number fed from an external electrical device; means for visually representing a symbol X10", wherein n is an integer, which corresponds to the multiplication by the use of n-th power of the base 10; and

means for determining whether the content stored in said storing means exceeds the value of said integer n, said determining means including means for generating a signal to said representing means only when said content stored in said storing means exceeds the value of said integer n whereby an overflow condition occurs, means to thereby bring said representing means into an operative position by said signal from said generating means and means for concurrently moving the decimal point n-places to the left with respect to the position of the decimal point stored in said storing means, resulting in the condition that the effective figures of said number can be read off with the decimal point located n-places to the left.

2. A digital display system as claimed in claim 1, wherein said representing means includes an index lamp bearing said symbol which can be illuminated upon receipt of the signal from said determining means.

3. A digital display system as claimed in claim 1, wherein said representing means includes said symbol located to the right of the decimal number thus displayed.

4. A digital display system as claimed in claim 1, wherein said storing means comprises a pair of series connected counters each capable of generating an output when the number counted thereby attains the value of n.

5. A digital display system as claimed in claim 1, wherein said storing means comprises a shift register ,having at least( 1 logn )'bits.

6. A digital display system comprising means for displaying a decimal number composed of up to M-digits, wherein M is an integer;

means for visually representing a symbol X10" wherein n is an integer;

a register having a least l' log,n stages for storing a signal representative of a decimal number;

a discriminator adapted to receive an output signal from one of said stages of said register which stores the most significant bit of a binary coded number of the decimal point for determining whether the number represented by said output signal from said register exceeds the value n, said discriminator being capable of generating a signal to said representing means only when said number represented by said output signal actually exceeds over the value of n, that is, the overflow condition occurs, to thereby bring said representing means into an operative position by said signal from said discriminator; and i a decimal point positioning means adapted to receive output signals representative of binary coded digits which are fed from the stages of the register which stores significant bits of a binary coded number of the decimal point positioned to the right of the most significant bit, for determining the position of the decimal point to be displayed in response to a binary combination of said binary digits represented by said output signals.

7. A digital display system comprising:

means for displaying a decimal number composed of up to M-digits, wherein M is an integer;

means for visually representing a symbol X10" wherein n is an integer;

a register having (1 log n) stages for storing a signal representative of a decimal number fed from an external device, said signal including the position of the decimal point included in said decimal number,

an OR circuit arranged so as to receive an output signal from each of said stages of the register other than the stage thereof corresponding to the most significant bit of a binary coded number of the decimal point;

a first AND circuit having a pair of input terminals connected with said stage of the register corresponding to the most significant bit and with an output terminal of said OR circuit,

an inverter connected with said first AND circuit for inverting the output of said first AND circuit;

a second AND circuit having a pair of input terminals connected to the output terminal of said inverter and to the stage of the register corresponding to the most significant bit;

a discriminator adapted to receive an output signal from said first AND circuit for determining whether the number represented by said output signal from said first AND circuit exceeds the value of said integer n, said discriminator being capable of generating a signal to said representing means only when said number represented by said output signal actually exceeds the value of said integer n, that is, the overflow condition occurs, to thereby bring said representing means into an operative position by said signal from said discriminator; and

a decimal point positioning meansadapted to receive an output signal from said second AND circuitand output signals representative of binary coded digits which are fed from the other stages of the register except for that corresponding to the most significant bit, for determining the position of the decimalpoint to be displayed in response to a binary combination of said binary digits represented by said output signals.

8. A display system comprising:

first means for providing a display of a decimal number; and

second means, responsive to a first signal corresponding to said decimal number, for supplying first and second indication signals to said first means, said first and second indication signals respectively corresponding to a predetermined number of decimal digits of said decimal number for displaying said predetermined number of decimal digits and a representation of a factor corresponding to an integral power of 10, said factor, when multiplied by said predetermined number ofdigits, providing an indication representing said decimal number according to a predetermined number of significant digits and the same number of digits of which said decimal number is composed for displaying said factor.

9. A display system according to claim 8, wherein said second means includes means responsive to a signal representative of the position of the decimal point with respect to the most significant digit of said decimal number for comparing said representative signal with a stored number, and upon the number of digits representing said decimal point corresponding to said representative signal exceeding said stored number, for generating said second indication signal to be suppliedto said first means.

10. A display system according to claim 8, wherein said second means further includes means, responsive to a signal representative of the number of significant digits of said decimal number, for storing said number of digits and, upon the number of digits stored exceeding a predetermined number, for generating a first output signal therefrom, and further including means, responsive to said first output signal of said storing means and the number of significant digits stored therein for subtracting therein said predetermined number of digits from said number of significant digits and for providing a second output signal representative of the difference.

11. A display system according to claim 10, wherein said second means further includes means, coupled to the output of said subtracting means and to a numerical display provided in said first means, for providing a decimal point indication superimposed on said first indication signal corresponding to the difference between said number of significant digits and said predetermined number of digits.

12. A display system according to claim 11, wherein said first means comprises first and second display windows, the first of which comprises a number of numerical display indicators corresponding to said predetermined number and said second display comprises a numerical indicator for indicating a factor of an integral power of i0 said first and second indication signals being supplied to the indicators of said first and second display windows, respectively.

13. A display system according to claim 12, wherein said second means further includes means, responsive to the first output signal provided by said storing means, for comparing said first output signal with a predetermined number and upon the number ofsignificant digits represented by saidfirst output signal exceeding said stored number for generating said second indication signal to be supplied to the numerical indicator of said second display window.

14. A display system according to claim 13, wherein said decimal indicator superimposing means comprises a decimal point positioning circuit, responsive to the output of said storing means, said storing means being fed with the output of said subtracting means, for supplying to said decimal point positioning circuit the difference signal therefrom.

15. A display system according to claim 14, wherein said second means further includes means, responsive to a series-of digital signals representing a decimal number in binary form for decoding said decimal number into decimal form and providing driving signals to the numerical indicators of said first display window.

16. A display system according to claim 15, wherein said comparing means comprises a discriminator circuit and a flip-flop circuit connected between the output of said storing means and said second numerical indicator.

17. A display system according to claim 8, wherein said second means further includes means, responsive to a signal representative of the number of significant digits of said decimal number, for storing said representative signal and for generating a digital output representative of the position of the decimal point of said decimal number with respect to the most significant digit thereof.

18. A display system according to claim 17, wherein said second means further includes means, responsive to the output of said storing means and being coupled to a numerical display provided in said first means, for superimposing a decimal point indication signal on said first indication signal supplied to said first means.

19. A display system according to claim 18, wherein said first means comprises first and second display windows, the first of which includes a number of numerical display indicators corresponding to said predetermined number and said second display window comprises a numerical indicator for indicating a factor of an integral power of i said first and second indication signals being supplied to the indicators of said first and second display windows, respectively.

20. A display system according to claim 19, wherein said second means further includes means, responsive to the output provided by said storing means for comparing the output of said storing means with a predeter mined number, and upon the number of digits between the most significant digits and the decimal point represented by the output signal of said storing means exceeding said storage number for generating said second indication signal to be supplied to the numerical indicator of said second display window.

21. A display system according to claim 19, wherein said storing means comprises a shift register for providing a plurality of digital signals therefrom corresponding to a digital indication of the position of said decimal point with respect to the most significant digits of said decimal number and wherein said second means further includes means, coupled to the output of said comparing means, and to a numerical display provided in said first means, for providing a decimal point indication superimposed on said first indication signal corresponding to the position of said decimal point with respect to the most significant digit of said decimalnumber.

22. A display system according to claim 21, wherein the output of the first stage of said shift register is connected to said comparing means.

23. A display system according toclaim 22, wherein said second means further includes. means, responsive to a series of digital signals representing said decimal number in binary form-for decoding said decimal number into decimal form and for providing driving signals to the numerical indicators of said first display window and wherein said comparing means comprises a discriminator circuit and a flip-flop circuit connected between the output of said shift register and said second numerical indicator.

24. A display system according to claim 21, further including first and second AND gates, each having a common input connected to the first stage of said shift register within said storage means, a second output of said first AND gate being coupled to each of the outputs of the-remaining stages of said shift register within said storing means, the output of said first AND gate providing said second indication signal and being coupled to the other input of said second AND gate through an inverter circuit, the output of said second AND gate being connected to said decimal point position circuit.

25. A display system according to claim 21, wherein said arithmetic calculator unit comprises first and second circulating shift registers, each receiving said digital input signals representative of said decimal number and coupled at the respective outputs thereof to a full adder circuit, the output of which is coupled to the input of said storing means, further including first and second AND gates, each having a common input connected to the first stage of said shift register within said storage means, a second output of said first AND gate being coupled to each of the outputs of the remaining stages of said shift register within said storing means, the output of said first AND gate providing said second indication signal and being coupled to the other input of said second AND gate through an inverter circuit, the output of said second AND gate being connected to said decimal point position circuit.

26. A display system according to claim 17, further including an arithmetic calculator unit, responsive to digital input signals representative of a decimal number,for supplying said signal representative of the number of significant digits of said decimal number and the position of said decimal point with respect to the most significant digit to said storing means.

27. A display system according to claim 26, wherein said arithmetic calculator unit comprises said first and second circulating shift registers, each receiving said digital input signals representative of said decimal number and coupled at the respective outputs thereof to a full adder circuit, the output of which is coupled to the input of said storing means.

28. A display system according to claim 27, wherein the output of said shift register of said storing means is fed back to the input thereof in parallel with the output of said full adder circuit and the digital signals representative of said decimal number.

Claims

1. A digital display system capable of displaying a decimal number composed of up to M-digits, wherein M is an integer, which comprises: means for storing the position of a decimal point included in a signal representative of a decimal number fed from an external electrical device; means for visually representing a symbol X 10n, wherein n is an integer, which corresponds to the multiplication by the use of n-th power of the base 10; and means for determining whether the content stored in said storing means exceeds the value of said integer n, said determining means including means for generating a signal to said representing means only when said content stored in said storing means exceeds the value of said integer n whereby an overflow condition occurs, means to thereby bring said representing means into an operative position by said signal from said generating means and means for concurrently moving the decimal point n-placeS to the left with respect to the position of the decimal point stored in said storing means, resulting in the condition that the effective figures of said number can be read off with the decimal point located n-places to the left.

5. A digital display system as claimed in claim 1, wherein said storing means comprises a shift register having at least ( 1 + log2n ) bits.

6. A digital display system comprising: means for displaying a decimal number composed of up to M-digits, wherein M is an integer; means for visually representing a symbol X 10n , wherein n is an integer; a register having a least ( 1 + log2n ) stages for storing a signal representative of a decimal number; a discriminator adapted to receive an output signal from one of said stages of said register which stores the most significant bit of a binary coded number of the decimal point for determining whether the number represented by said output signal from said register exceeds the value n, said discriminator being capable of generating a signal to said representing means only when said number represented by said output signal actually exceeds over the value of n, that is, the overflow condition occurs, to thereby bring said representing means into an operative position by said signal from said discriminator; and a decimal point positioning means adapted to receive output signals representative of binary coded digits which are fed from the stages of the register which stores significant bits of a binary coded number of the decimal point positioned to the right of the most significant bit, for determining the position of the decimal point to be displayed in response to a binary combination of said binary digits represented by said output signals.

7. A digital display system comprising: means for displaying a decimal number composed of up to M-digits, wherein M is an integer; means for visually representing a symbol X 10n wherein n is an integer; a register having (1 + log2n) stages for storing a signal representative of a decimal number fed from an external device, said signal including the position of the decimal point included in said decimal number, an OR circuit arranged so as to receive an output signal from each of said stages of the register other than the stage thereof corresponding to the most significant bit of a binary coded number of the decimal point; a first AND circuit having a pair of input terminals connected with said stage of the register corresponding to the most significant bit and with an output terminal of said OR circuit, an inverter connected with said first AND circuit for inverting the output of said first AND circuit; a second AND circuit having a pair of input terminals connected to the output terminal of said inverter and to the stage of the register corresponding to the most significant bit; a discriminator adapted to receive an output signal from said first AND circuit for determining whether the number represented by said output signal from said first AND circuit exceeds the value of said integer n, said discriminator being capable of generating a signal to said representing means only when said number represented by said output signal actually exceeds the value of said integer n, that is, the overflow condition occurs, to thereby bring said representing means into an operative position by said signal from said discriminator; and a decimal point positioning means adapted to receive an output signal from said second AND circuit and output signals representative of binary coded digits which are fed from the other stages of the register except for that corresponding to the most significant bit, for determining the position of the decimal point to be displayed in response to a binary combination of said binary digits represented by said output signals.

8. A display system comprising: first means for providing a display of a decimal number; and second means, responsive to a first signal corresponding to said decimal number, for supplying first and second indication signals to said first means, said first and second indication signals respectively corresponding to a predetermined number of decimal digits of said decimal number for displaying said predetermined number of decimal digits and a representation of a factor corresponding to an integral power of 10, said factor, when multiplied by said predetermined number of digits, providing an indication representing said decimal number according to a predetermined number of significant digits and the same number of digits of which said decimal number is composed for displaying said factor.

9. A display system according to claim 8, wherein said second means includes means , responsive to a signal representative of the position of the decimal point with respect to the most significant digit of said decimal number for comparing said representative signal with a stored number, and upon the number of digits representing said decimal point corresponding to said representative signal exceeding said stored number, for generating said second indication signal to be supplied to said first means.

12. A display system according to claim 11, wherein said first means comprises first and second display windows, the first of which comprises a number of numerical display indicators corresponding to said predetermined number and said second display comprises a numerical indicator for indicating a factor of an integral power of 10, said first and second indication signals being supplied to the indicators of said first and second display windows, respectively.

13. A display system according to claim 12, wherein said second means further includes means, responsive to the first output signal provided by said storing means, for comparing said first output signal with a predetermined number, and upon the number of significant digits represented by said first output signal exceeding said stored number for generating said second indication signal to be supplied to the numerical indicator of said second display window.

15. A display system according to claim 14, wherein said second means further includes means, responsive to a series of digital signals representing a decimal number in binary form for decoding said decimal number into decimal form and providing driving signals to the numerical indicators of said first display window.

19. A display system according to claim 18, wherein said first means comprises first and second display windows, the first of which includes a number of numerical display indicators corresponding to said predetermined number and said second display window comprises a numerical indicator for indicating a factor of an integral power of 10, said first and second indication signals being supplied to the indicators of said first and second display windows, respectively.

20. A display system according to claim 19, wherein said second means further includes means, responsive to the output provided by said storing means for comparing the output of said storing means with a predetermined number, and upon the number of digits between the most significant digits and the decimal point represented by the output signal of said storing means exceeding said storage number for generating said second indication signal to be supplied to the numerical indicator of said second display window.

21. A display system according to claim 19, wherein said storing means comprises a shift register for providing a plurality of digital signals therefrom corresponding to a digital indication of the position of said decimal point with respect to the most significant digits of said decimal number and wherein said second means further includes means, coupled to the output of said comparing means, and to a numerical display provided in said first means, for providing a decimal point indication superimposed on said first indication signal corresponding to the position of said decimal point with respect to the most significant digit of said decimal number.

23. A display system according to claim 22, wherein said second means further includes means, responsive to a series of digital signals representing said decimal number in binary form for decoding said decimal number into decimal form and for providing driving signals to the numerical indicators of said first display window and wherein said comparing means comprises a discriminator circuit and a flip-flop circuit connected between the output of said shift register and said second numerical indicator.

24. A display system according to claim 21, further including first and second AND gates, each having a common input connected to the first stage of said shift register within said storage means, a second output of said First AND gate being coupled to each of the outputs of the remaining stages of said shift register within said storing means, the output of said first AND gate providing said second indication signal and being coupled to the other input of said second AND gate through an inverter circuit, the output of said second AND gate being connected to said decimal point position circuit.

26. A display system according to claim 17, further including an arithmetic calculator unit, responsive to digital input signals representative of a decimal number, for supplying said signal representative of the number of significant digits of said decimal number and the position of said decimal point with respect to the most significant digit to said storing means.