US3641556A - Character addressing system - Google Patents
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- US3641556A US3641556A US837790A US3641556DA US3641556A US 3641556 A US3641556 A US 3641556A US 837790 A US837790 A US 837790A US 3641556D A US3641556D A US 3641556DA US 3641556 A US3641556 A US 3641556A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G1/00—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
- G09G1/06—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows
- G09G1/08—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows the beam directly tracing characters, the information to be displayed controlling the deflection and the intensity as a function of time in two spatial co-ordinates, e.g. according to a cartesian co-ordinate system
- G09G1/10—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows the beam directly tracing characters, the information to be displayed controlling the deflection and the intensity as a function of time in two spatial co-ordinates, e.g. according to a cartesian co-ordinate system the deflection signals being produced by essentially digital means, e.g. incrementally
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- ..340/324 A 315/18 characters be generated e divided into two groups [51] "Goa 3/14 representing the two directions of deflection.
- a first group 5 Field of Search 340/324 24 A. 315/1 2 provides a linear region in which uniform deflection steps are 178763 3 generated for each signal increment, while a second group provides a nonlinear region in which varied deflection incre- [56] Reerem Cited ments are generated for each signal increment.
- the nonuniform regions provide higher resolution in those areas where UNITED STATES PATENTS curves nonnally occur and less resolution in the remaining areas thus providing higher character resolution in specified 3,1 19,949 1/ 1964 Greatbatch et a].
- the nonuniform deflection 3,422,304 1/1969 is obtained from associated decoders through a weighted ad- 3479453 11/1969 dressing system which provides nonuniform current increments independent of the digital data input.
- FIG. 3b I IG-3c- CHARACTER ADDRESSING SYSTEM BACKGROUND OF THE INVENTION 1.
- the invention relates to a display device'and more particularly to an improved character generatordeflection system suitable for use with cathode-ray tubes for displaying the generated characters.
- digital signals indicative of characters to be generated on a CRT display are decoded into analog signals suitable for'deflecting the beam of the cathode-ray tube.
- the present invention utilizes a linear deflection for onecoordinate of the character (the horizontal), and a nonlinear deflection for the second coordinate of the character. This nonlinear deflection is obtained by weighting the individual decoded deflection signals such that smaller deflection units aflording higher resolution are provided at those areas where the curved segments of most characters tend to occur. Those areas of the matrix not normally associated with curved characters utilize higher deflection units resulting in greater spacing without character degradation.
- a primary object of the present invention is to provide an improved character generator circuit.
- Another object of the present invention is to provide an improved deflection system for improving the resolution of specific character areas by modifying the deflection control to provide a nonuniform deflection in one of the character coordinates.
- Another object of the present invention is to provide an improved character generator'having a linear and nonlinear addressable grid system designed to improve the aesthetic appearance of characters.
- FIG. 1 illustrates in block logical form a preferred embodiment of the present invention.
- FIG. 2a illustrates in schematic form a binary weighted decoder shown in block form in FIG. 1.
- FIG. 2! illustrates in schematic form a nonlinear weighted decoder shown in block form in FIG. 1.
- FIG. 3 illustrates character display formats
- FIG. 3a illustrates a character generated by using the conventional addressable grid matrix.
- FIGS. 3b and 3c illustrate characters generated in accordance with the addressable matrix of the present invention.
- binary coded signals are applied from a data source which might comprise, for example, a data processor such as Central Processing Unit 11 through input lines 21 and 23 to the X input register 25 and the Y input register 27, respectively.
- a data byte comprising six binary bits is used for each character stroke, three bits for the horizontal deflection and three hits for the vertical deflection.
- the preferred embodiment of the present invention utilizes an 8X8 character matrix which can be provided by three bits for each coordinate, each three-bit signal designating the end point of the vector.
- the contents of the X and Y input register are transferred through conductor pairs labeled X1, X2, X3 and Y1, Y2 and Y3, with X1 and Y1 representing the lowest order binary bits, to the'X and Y Position Registers 33 and 35, respectively.
- the preferred embodiment of the instant invention is described as operating in double-ended, push-pull configuration such that each binary designation utilizes separate lines to represent the l and 0 states.
- the X and Y position registers 33 and 35 comprise count-up, countdown counters or registers which are incremented or decremented in accordance with the input signals applied from the associated input registers.
- a +X signal on line 34 will increment Position Register 33 by one, a -X signal on line 36 will decrement the counter by one. While various count-up, countdown counters are known in the art, one preferred embodiment is shown in US. Pat. No. 3,403,286 (IBM Docket 16866009), Digital Cathode Ray Deflection System" filed by F. R. Carlock et al., Dec. 27, 1966. Since the present invention is directed only to character generation, the initial positioning for each character has been omitted as unnecessaryto an understanding of the present invention. However, either a separate deflection coil could be utilized to initially position the beam for character generation, oralternatively, the Xand Y position registers 33 and 35 could be large .enough to accommodate both the character position and individual stroke deflection signals.
- the horizontal decoder 43 is a conventional binary weighted linear decoder in which uniform increments or decrements of current are provided for each positive of negative signal applied to the X position register 33.
- the vertical decoder 45 in the preferred embodiment of the instant invention is a nonlinear decoder in which the digital addresses, when decoded, generate nonuniform incremental steps to provide higher resolution in the upper, lower and center areas and lesser resolution in the noncritical intermediate area as more fully described hereinafter.
- the cumulative X signals on lines 47 and 49 from horizontal linear decoder 43 are transferred via lines 47 and 49 to their respective buffer transistors 51 and 53, respectively.
- Buffer transistors 51 and 53 function to isolate the decoder output from the associated deflection drive circuits 55 and 57, respectively.
- the output from the deflection drivers 55 and 57 are then applied to the horizontal yoke winding 59 of CRT 61.
- the output from the vertical decoder 45 on lines 60 and 62 is applied through associated buffer transistors 63 and 65 and associated deflection drivers 67 and 69 to the vertical yoke winding 71 of CRT 61.
- the grid 73 is maintained unblanked by means of intensity control circuit 75.
- Intensity control circuits for maintaining a CRT beam in the unblarrked condition during character generation are well known in the art such that a block showing is considered to constitute adequate description.
- one conventional method is to include an extra bit in the end point data for intensity control information.
- FIG. 2a there is illustrated in block schematic form details of the horizontal linear decoder shown as block 43 in FIG. 1.
- the decoder as shown is a double-ended decoder operating on three bits ranging from the lowest order bit XI through X2 and X3. Since the decoder operates in a push-pull fashion, a latch register comprising latch circuits 81, 83 and 85 is employed, each stage having binary l and outputs, the respective outputs of which in turn are connected to binary weighted resistors 87, 89 and 91 and 87, 89' and 91'.
- Latch circuits are well-known components in a data processor, are similar to flip-flops or triggers except for timing considerations related to reversal of state.
- the horizontal decoders provide uniform horizontal deflection increments for each input signal permutation. Since the characters or character segments may be generated either from left to right or right to left, depending on the specific character configuration, the decoder 43 responds to the output from the X position register 33 (Fig. l) which may be incremented or decremented in single steps heretofore described.
- the nonlinear vertical decoder 45 utilized in the preferred embodiment of the invention is shown in block schematic fonn.
- the three-bit coded signals for each character segment are applied to the appropriate latch register stages 93, 95 or 97, the individual outputs of which are connected to resistors 101, 103 and 105 and 101, 103 and 105'.
- the vertical decoder stages are weighted in a ratio of 1:315 to reflect the expansion factor of l which has been added to the weighting values corresponding to the binary place values of 2 and 4. The weighting value corresponding to the place value of 1 has not been expanded.
- the low order bit of decoder 45 is also designated as 4R, the next more significant bit as 4/3 R, and the most significant bit 4/5 R.
- the relative ratio of the currents for the eight possible input combinations to the decoder is shown in decreasing binary increments in the table below, the tabulated coded values corresponding to those shown in Figures 3b and 30.
- nonlinear decoder 45 are applied through associated conductors 60 and 62 to the vertical winding 71 of the magnetic yoke.
- FIG. 3 there is illustrated a sequence of characters including one generated by the conventional rectangular grid and several characters generated in accordance with the preferred embodiment of the present invention, all characters being generated on an 8X8 matrix.
- the character 5 is shown on an 8X8 coordinate matrix, eight segments representing the maximum resolution which can be achieved from a three-bit by three-bit word.
- the numeral 5 has been selected as exemplary of problems associated with the conventional coordinate grid matrix. As shown thereon, and particularly at the normally curved center and lower portions of the figure, the limited resolution provides a very poor image quality such that the numeral 5" cannot be readily distinguished from the letter Further, purely from a human factors standpoint, the appearance of the character is undesirable.
- One way and the conventional way of improving image quality is to increase the resolution of the available grid from 8X8 to some higher number depending on the degree of resolution desired.
- this requires a larger word size, and the entire system including the input registers, the position registers, decoders, buffer and even the data processor transmitting the data bytes would all necessarily be larger to accommodate the larger word such that this solution from an economic standpoint is impractical.
- FIG. 3 A practical solution for improving character quality is provided by the instant invention.
- the drawings of FIG. 3 are not intended to indicate a precise character size, but are enlarged and exaggerated to identify the problem. However, the relative proportions correspond to characters generated by the instant invention.
- FIGS. 3b and 30 there are shown several characters generated on a variation of an 8X8 matrix utilizing the principles of the instant invention. It will be noted that the upper lines of the matrix (111, the lower lines (000,001) each have areas of fine resolution and that a series of fine resolution lines are shown in the center portion (010, 011, 100, 101). However, both the intermediate lower (001 to 010) and intermediate upper (101 to 110) sections provide a relatively gross resolution in this area. However, it is apparent from FIGS.
- a cathode-ray tube having beam deflection means and intensity control means
- first and second decoder means for converting said video data into deflection signals
- said first decoder means being adapted to produce uniformly weighted linear signals
- a method for decoding digital signals each having a plurality of groups representing coordinates of display stroke end points of a character to be displayed with increased resolution comprising the steps of: p
- Steps '1 through 6 for each digital signal representing a display stroke end point of a character to be displayed whereby said character has a high resolution concentrated in upper, medial, and lower regions, and has a lower resolution between said upper and said medial and between said medial and said lower regions.
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Abstract
In a cathode-ray tube display, digital signals representative of characters to be generated are divided into two groups representing the two directions of deflection. A first group provides a linear region in which uniform deflection steps are generated for each signal increment, while a second group provides a nonlinear region in which varied deflection increments are generated for each signal increment. The nonuniform regions provide higher resolution in those areas where curves normally occur and less resolution in the remaining areas thus providing higher character resolution in specified positions on the same size matrix. The nonuniform deflection is obtained from associated decoders through a weighted addressing system which provides nonuniform current increments independent of the digital data input.
Description
United States Patent Jones 1 Feb. 8, 1972 [54] CHARACTER ADDRESSING SYSTEM 3,165,729 1/1965 Richman 340/324 A 3,335,416 8/1967 Hughes ..340/324 A [721 Invent Richard Red 3,403,286 9/1968 Carlock et al ..340/324 A x [73] Assignee: International Business Machines Corporation, Armonk, NY. Primary ExaminerDavid L. Trafton Fl d J 30 1969 An0meyl-lanifin and Jancin and Joseph J. Connerton 1e 21 Appl. 110.; 837,790 1 ABSTRACT In a cathode-ray tube display, digital signals representative of [52] us. or. ..340/324 A, 315/18 characters be generated e divided into two groups [51] "Goa 3/14 representing the two directions of deflection. A first group 5 Field of Search 340/324 24 A. 315/1 2 provides a linear region in which uniform deflection steps are 178763 3 generated for each signal increment, while a second group provides a nonlinear region in which varied deflection incre- [56] Reerem Cited ments are generated for each signal increment. The nonuniform regions provide higher resolution in those areas where UNITED STATES PATENTS curves nonnally occur and less resolution in the remaining areas thus providing higher character resolution in specified 3,1 19,949 1/ 1964 Greatbatch et a]. ..3 1 5/26 positions on the same size matrix The nonuniform deflection 3,422,304 1/1969 is obtained from associated decoders through a weighted ad- 3479453 11/1969 dressing system which provides nonuniform current increments independent of the digital data input. 315211241 7/1970 6 Claims, 7 Drawing Figures INTENSITY 1s CONTROL ,55 57 DEFL DEFL omv new LINEAR 1 NON-LINEAR DECODER DECODER 7 4/ x POSITION Y POSITION 55 REG REG 25 51 x INPUT 27 Y lNPUT REG XFER PATENTEIJFEB 8 I972 3.641.556
SHEET 1 0? V FIGJ-V INTENSITY CONTROL 5? DEFL DEF L DRIV DRIV NON-LINEAR oecoosn DECODER 43 45j s3 mm 4 mm x POSITION Y POSITION 55 REG REG I I I I I 5 I /56 Y3 Y2 Y1 25 W XINPUTI 27H REG XFER 29- s TIMING BI J31 21 CONTROL II INVENTOR AM I 6617a. m RICHARD A. JONES PAIENTEUFEB 8 I872 3. 641 .556
F1630 FIG. 3b I IG-3c- CHARACTER ADDRESSING SYSTEM BACKGROUND OF THE INVENTION 1. Field of the Invention The invention relates to a display device'and more particularly to an improved character generatordeflection system suitable for use with cathode-ray tubes for displaying the generated characters.
2. Description of the Prior Art In known cathode-ray tube character generation systems, characters are normally generated on a linear coordinate matrix on the CRT screen either as a sequence of strokes or dots in which the size-of the matrix determines the resolution. An example of a stroke character. generator using a uniform rectangular matrix is shown in US. Pat. No. 3,334,304,
Asynchronous Character Generator for Successive Endpoint Definition, issued to R. J. Fournier et al., Aug. 1, 1967. However, where the size of the coordinate matrix is limited, uniform resolution in all areas of the character tends to produce an undesirable font, particularly in those areas where curves tend to occu'nAn analysis of stroke characters indicates that most endpoints occur at the extremities and center of the character such that increased resolution in this area will improve character quality. While improved resolution can normally be provided by increasing the size of the character matrix, this is undesirable because of added circuit complexity, flicker problems and storage capacity limitations. Where the video information is stored in arecirculating buffer, for example, an increase of the character matrix from 7X7 to 10 l0 effectively more than doubles the storage requirements of the display. The present invention is directed to a means for increasing character resolution in a cathode-ray tube display without any added complexity in size or cost.
SUMMARY OF THE INVENTION In one arrangement according to the invention, digital signals indicative of characters to be generated on a CRT display are decoded into analog signals suitable for'deflecting the beam of the cathode-ray tube. Rather than generate the characters on'a uniform coordinate grid, the present invention utilizes a linear deflection for onecoordinate of the character (the horizontal), and a nonlinear deflection for the second coordinate of the character. This nonlinear deflection is obtained by weighting the individual decoded deflection signals such that smaller deflection units aflording higher resolution are provided at those areas where the curved segments of most characters tend to occur. Those areas of the matrix not normally associated with curved characters utilize higher deflection units resulting in greater spacing without character degradation.
Accordingly, a primary object of the present invention is to provide an improved character generator circuit.
Another object of the present invention is to provide an improved deflection system for improving the resolution of specific character areas by modifying the deflection control to provide a nonuniform deflection in one of the character coordinates.
Another object of the present invention is to provide an improved character generator'having a linear and nonlinear addressable grid system designed to improve the aesthetic appearance of characters.
The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular description of a preferred embodiment of the invention as illustrated in the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS In the drawings:
FIG. 1 illustrates in block logical form a preferred embodiment of the present invention.
FIG. 2a illustrates in schematic form a binary weighted decoder shown in block form in FIG. 1.
FIG. 2!; illustrates in schematic form a nonlinear weighted decoder shown in block form in FIG. 1.
FIG. 3 illustrates character display formats.
FIG. 3a illustrates a character generated by using the conventional addressable grid matrix.
FIGS. 3b and 3c illustrate characters generated in accordance with the addressable matrix of the present invention.
DESCRIPTION OF A PREFERRED EMBODIMENT Referring now to the drawings and more particularly to FIG. 1 thereof, binary coded signals are applied from a data source which might comprise, for example, a data processor such as Central Processing Unit 11 through input lines 21 and 23 to the X input register 25 and the Y input register 27, respectively. A data byte comprising six binary bits is used for each character stroke, three bits for the horizontal deflection and three hits for the vertical deflection. The preferred embodiment of the present invention utilizes an 8X8 character matrix which can be provided by three bits for each coordinate, each three-bit signal designating the end point of the vector. In response to a transfer signal on the line 29 from timing and control circuit 31, the contents of the X and Y input register are transferred through conductor pairs labeled X1, X2, X3 and Y1, Y2 and Y3, with X1 and Y1 representing the lowest order binary bits, to the'X and Y Position Registers 33 and 35, respectively. The preferred embodiment of the instant invention is described as operating in double-ended, push-pull configuration such that each binary designation utilizes separate lines to represent the l and 0 states. The X and Y position registers 33 and 35 comprise count-up, countdown counters or registers which are incremented or decremented in accordance with the input signals applied from the associated input registers. A +X signal on line 34 will increment Position Register 33 by one, a -X signal on line 36 will decrement the counter by one. While various count-up, countdown counters are known in the art, one preferred embodiment is shown in US. Pat. No. 3,403,286 (IBM Docket 16866009), Digital Cathode Ray Deflection System" filed by F. R. Carlock et al., Dec. 27, 1966. Since the present invention is directed only to character generation, the initial positioning for each character has been omitted as unnecessaryto an understanding of the present invention. However, either a separate deflection coil could be utilized to initially position the beam for character generation, oralternatively, the Xand Y position registers 33 and 35 could be large .enough to accommodate both the character position and individual stroke deflection signals.
In response to a transfer signal from timing and control circuit 31 on line 37, the contents of the X and Y Position Re gisters 33 and 35 are transferred through conductors 39 and 41 to their associated decoders 43 and 45, respectively. The horizontal decoder 43, as more fully described hereinafter, is a conventional binary weighted linear decoder in which uniform increments or decrements of current are provided for each positive of negative signal applied to the X position register 33. The vertical decoder 45 in the preferred embodiment of the instant invention is a nonlinear decoder in which the digital addresses, when decoded, generate nonuniform incremental steps to provide higher resolution in the upper, lower and center areas and lesser resolution in the noncritical intermediate area as more fully described hereinafter. In response to a control signal on line 46, the cumulative X signals on lines 47 and 49 from horizontal linear decoder 43 are transferred via lines 47 and 49 to their respective buffer transistors 51 and 53, respectively. Buffer transistors 51 and 53 function to isolate the decoder output from the associated deflection drive circuits 55 and 57, respectively. The output from the deflection drivers 55 and 57 are then applied to the horizontal yoke winding 59 of CRT 61. Likewise, the output from the vertical decoder 45 on lines 60 and 62 is applied through associated buffer transistors 63 and 65 and associated deflection drivers 67 and 69 to the vertical yoke winding 71 of CRT 61.
As the individual horizontal and vertical deflection signals are applied to the associated yoke windings 59 and 71 in the manner above described, the grid 73 is maintained unblanked by means of intensity control circuit 75. Intensity control circuits for maintaining a CRT beam in the unblarrked condition during character generation are well known in the art such that a block showing is considered to constitute adequate description. However, one conventional method is to include an extra bit in the end point data for intensity control information.
Referring now to FIG. 2a, there is illustrated in block schematic form details of the horizontal linear decoder shown as block 43 in FIG. 1. The decoder as shown is a double-ended decoder operating on three bits ranging from the lowest order bit XI through X2 and X3. Since the decoder operates in a push-pull fashion, a latch register comprising latch circuits 81, 83 and 85 is employed, each stage having binary l and outputs, the respective outputs of which in turn are connected to binary weighted resistors 87, 89 and 91 and 87, 89' and 91'. Latch circuits are well-known components in a data processor, are similar to flip-flops or triggers except for timing considerations related to reversal of state. For a detailed description of latch registers and latch circuits, reference is made to U.S. Pat. No. 3,115,574 to G. T. Paul et al., entitled High Speed Multiplier," FIGS. 33-35 and related description. The values of 4R, 2R and R are merely relative to reflect the binary weighting of each binary bit in proportion to its place value. Actual values would vary according to the deflection system employed, the character size, etc., and such values represent mere design considerations known to those skilled in the art. The outputs on lines 47 and 49, representing the cumulative horizontal deflection signals, are connected to the buffer transistors 51 and 53 as shown in FIG. 1. As shown in the grid arrangements of FIG. 3, the horizontal decoders provide uniform horizontal deflection increments for each input signal permutation. Since the characters or character segments may be generated either from left to right or right to left, depending on the specific character configuration, the decoder 43 responds to the output from the X position register 33 (Fig. l) which may be incremented or decremented in single steps heretofore described.
Referring now to FIG. 2b, the nonlinear vertical decoder 45 utilized in the preferred embodiment of the invention is shown in block schematic fonn. The three-bit coded signals for each character segment are applied to the appropriate latch register stages 93, 95 or 97, the individual outputs of which are connected to resistors 101, 103 and 105 and 101, 103 and 105'. However, instead of being binary weighted as in the horizontal deflection, the vertical decoder stages are weighted in a ratio of 1:315 to reflect the expansion factor of l which has been added to the weighting values corresponding to the binary place values of 2 and 4. The weighting value corresponding to the place value of 1 has not been expanded. For purposes of comparison, the low order bit of decoder 45 is also designated as 4R, the next more significant bit as 4/3 R, and the most significant bit 4/5 R. The relative ratio of the currents for the eight possible input combinations to the decoder is shown in decreasing binary increments in the table below, the tabulated coded values corresponding to those shown in Figures 3b and 30.
It should be noted that the values for current indicated in the table above are relative, the actual values again being determined by various design considerations associated with the specific cathode-ray tube display. The outputs from nonlinear decoder 45 are applied through associated conductors 60 and 62 to the vertical winding 71 of the magnetic yoke.
Referring now to FIG. 3, there is illustrated a sequence of characters including one generated by the conventional rectangular grid and several characters generated in accordance with the preferred embodiment of the present invention, all characters being generated on an 8X8 matrix. Referring inifially to FIG. 3a, the character 5 is shown on an 8X8 coordinate matrix, eight segments representing the maximum resolution which can be achieved from a three-bit by three-bit word. The numeral 5 has been selected as exemplary of problems associated with the conventional coordinate grid matrix. As shown thereon, and particularly at the normally curved center and lower portions of the figure, the limited resolution provides a very poor image quality such that the numeral 5" cannot be readily distinguished from the letter Further, purely from a human factors standpoint, the appearance of the character is undesirable. One way and the conventional way of improving image quality is to increase the resolution of the available grid from 8X8 to some higher number depending on the degree of resolution desired. However, this requires a larger word size, and the entire system including the input registers, the position registers, decoders, buffer and even the data processor transmitting the data bytes would all necessarily be larger to accommodate the larger word such that this solution from an economic standpoint is impractical.
A practical solution for improving character quality is provided by the instant invention. The drawings of FIG. 3 are not intended to indicate a precise character size, but are enlarged and exaggerated to identify the problem. However, the relative proportions correspond to characters generated by the instant invention. Referring to FIGS. 3b and 30, there are shown several characters generated on a variation of an 8X8 matrix utilizing the principles of the instant invention. It will be noted that the upper lines of the matrix (111, the lower lines (000,001) each have areas of fine resolution and that a series of fine resolution lines are shown in the center portion (010, 011, 100, 101). However, both the intermediate lower (001 to 010) and intermediate upper (101 to 110) sections provide a relatively gross resolution in this area. However, it is apparent from FIGS. 3b and 3c that gross resolution in this area does not constitute a problem but from an aesthetic standpoint, actually enhances the character appearance. Thus it is seen that although the digital data input is not increased, improved overall resolution is achieved by using grossly resolved data in noncritical areas and finely resolved data in critical areas. The corresponding vertical addresses of each unit of deflection are shown in FIGS. 3b and 3c and the image quality, as readily apparent, is substantially enhanced over that provided by the conventional square address matrix of FIG. 3a.
While the advantages of improved character quality may not be readily apparent from the exaggerated drawings of FIG. 3, they are apparent in a display system when it is recognized that in actual size where up to 960 characters may be displayed on a cathode-ray tube screen of approximately 14 inches. The invention affords improved image quality with no required change in input data and minimum change from the conventional square grid matrix.
While the invention has been shown and described with reference to a specific embodiment, it is apparent that other modifications to either or both deflection systems to alter character appearance are encompassed within the teaching of the subject invention, and that while the invention has been particularly shown and described with reference to a preferred embodiment thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention.
What is claimed is:
1. In a cathode-ray tube character generator, the combination comprising:
a cathode-ray tube having beam deflection means and intensity control means;
a source of video data representative of characters to be displayed;
said video data being applied for each stroke of said character, first and second decoder means for converting said video data into deflection signals;
said first decoder means being adapted to produce uniformly weighted linear signals;
said second decoder producing a nonuniformly weighted incremental signals, and
means connectingsaid uniformly weighted and said nonuniformly weighted signals to said beam deflection means to produce linear deflection signals in one direction and nonlinear deflection in the orthogonal direction whereby the resolution of the generated characters is substantially improved.
2. Apparatus of the type claimed in claim 1 wherein the output of said first decoder means has a plurality of regions within its output range, said regions including areas of high resolution and low resolution.
3. Apparatus of the type claimed in claim 2 wherein said areas of high resolution include the upper, lower and medial regions of said characters.
4. A method for decoding digital signals each having a plurality of groups representing coordinates of display stroke end points of a character to be displayed with increased resolution, comprising the steps of: p
l. weighting a first binary data bit of a first digital signal group by a first value corresponding to the binary place value of said first binary data bit to provide a first analog signal;
2. weighting a next more significant binary bit of said first digital signal group by a second value corresponding to the binary place value of said next more significant binary data bit plus an expansion factor to provide a second analog signal;
3. weighting a second more significant binary data bit of said first digital signal group by a third value corresponding to the binary place value of said second more significant binary data bit plus said expansion factor to provide a third analog signal;
4. summing said first, second and third analog signals to provide a first coordinate of a display stroke end point.
5. The method of claim 4 further comprising the steps of:
5. weighting each binary data bit of a second digital signal group by values corresponding to the binary place values of each of said binary data bits of said second digital signal group to provide analog signals;
6. summing said analog signals to provide a second coordinate of said display stroke end point.
6. The method of claim 5 further comprising the steps of:
7. repeating Steps '1 through 6 for each digital signal representing a display stroke end point of a character to be displayed whereby said character has a high resolution concentrated in upper, medial, and lower regions, and has a lower resolution between said upper and said medial and between said medial and said lower regions.
Claims (12)
1. In a cathode-ray tube character generator, the combination comprising: a cathode-ray tube having beam deflection means and intensity control means; a source of video data representative of characters to be displayed; said video data being applied for each stroke of said character, first and second decoder means for converting said video data into deflection signals; said first decoder means being adapted to produce uniformly weighted linear signals; said second decoder producing a nonuniformly weighted incremental signals; and means connecting said uniformly weighted and said nonuniformly weighted signals to said beam deflection means to produce linear deflection signals in one direction and nonlinear deflection in the orthogonal direction whereby the resolution of the generated characters is substantially improved.
2. Apparatus of the type claimed in claim 1 wherein the output of said first decoder means has a plurality of regions within its output range, said regions including areas of high resolution and low resolution.
2. weighting a next more significant binary bit of said first digital signal group by a second value corresponding to the binary place value of said next more significant binary data bit plus an expansion factor tO provide a second analog signal;
3. weighting a second more significant binary data bit of said first digital signal group by a third value corresponding to the binary place value of said second more significant binary data bit plus said expansion factor to provide a third analog signal;
3. Apparatus of the type claimed in claim 2 wherein said areas of high resolution include the upper, lower and medial regions of said characters.
4. summing said first, second and third analog signals to provide a first coordinate of a display stroke end point.
4. A method for decoding digital signals each having a plurality of groups representing coordinates of display stroke end points of a character to be displayed with increased resolution, comprising the steps of:
5. The method of claim 4 further comprising the steps of:
5. weighting each binary data bit of a second digital signal group by values corresponding to the binary place values of each of said binary data bits of said second digital signal group to provide analog signals;
6. summing said analog signals to provide a second coordinate of said display stroke end point.
6. The method of claim 5 further comprising the steps of:
7. repeating Steps 1 through 6 for each digital signal representing a display stroke end point of a character to be displayed whereby said character has a high resolution concentrated in upper, medial, and lower regions, and has a lower resolution between said upper and said medial and between said medial and said lower regions.
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Application Number | Priority Date | Filing Date | Title |
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US83779069A | 1969-06-30 | 1969-06-30 |
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US3641556A true US3641556A (en) | 1972-02-08 |
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ID=25275435
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US837790A Expired - Lifetime US3641556A (en) | 1969-06-30 | 1969-06-30 | Character addressing system |
Country Status (5)
Country | Link |
---|---|
US (1) | US3641556A (en) |
JP (1) | JPS4947702B1 (en) |
DE (1) | DE2029628C3 (en) |
FR (1) | FR2052385A5 (en) |
GB (1) | GB1294162A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3746913A (en) * | 1971-12-22 | 1973-07-17 | Ibm | Cathode ray deflection system using field effect transistors |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52147502U (en) * | 1976-04-30 | 1977-11-09 |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3119949A (en) * | 1961-02-06 | 1964-01-28 | Jr William H Greatbatch | Television type selected raster lines display |
US3165729A (en) * | 1961-07-24 | 1965-01-12 | Robert L Richman | Crt display system having logic circuits controlled by weighted resistors in the deflection circuitry |
US3335416A (en) * | 1963-08-07 | 1967-08-08 | Ferranti Ltd | Character display systems |
US3403286A (en) * | 1966-12-27 | 1968-09-24 | Ibm | Digital cathode ray tube deflection system |
US3422304A (en) * | 1967-09-15 | 1969-01-14 | Ibm | Logic controlled deflection system |
US3479453A (en) * | 1965-01-04 | 1969-11-18 | Xerox Corp | Facsimile resolution improvement by utilization of a variable velocity sweep signal |
US3491200A (en) * | 1966-09-21 | 1970-01-20 | United Aircraft Corp | Variable scan rate high resolution image transmission system |
US3497760A (en) * | 1968-06-10 | 1970-02-24 | Sperry Rand Corp | Logical expansion circuitry for display systems |
US3521241A (en) * | 1967-01-03 | 1970-07-21 | Ibm | Two-dimensional data compression |
-
1969
- 1969-06-30 US US837790A patent/US3641556A/en not_active Expired - Lifetime
-
1970
- 1970-05-12 FR FR7017106A patent/FR2052385A5/fr not_active Expired
- 1970-05-29 JP JP45045734A patent/JPS4947702B1/ja active Pending
- 1970-06-16 DE DE2029628A patent/DE2029628C3/en not_active Expired
- 1970-06-25 GB GB30805/70A patent/GB1294162A/en not_active Expired
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3119949A (en) * | 1961-02-06 | 1964-01-28 | Jr William H Greatbatch | Television type selected raster lines display |
US3165729A (en) * | 1961-07-24 | 1965-01-12 | Robert L Richman | Crt display system having logic circuits controlled by weighted resistors in the deflection circuitry |
US3335416A (en) * | 1963-08-07 | 1967-08-08 | Ferranti Ltd | Character display systems |
US3479453A (en) * | 1965-01-04 | 1969-11-18 | Xerox Corp | Facsimile resolution improvement by utilization of a variable velocity sweep signal |
US3491200A (en) * | 1966-09-21 | 1970-01-20 | United Aircraft Corp | Variable scan rate high resolution image transmission system |
US3403286A (en) * | 1966-12-27 | 1968-09-24 | Ibm | Digital cathode ray tube deflection system |
US3521241A (en) * | 1967-01-03 | 1970-07-21 | Ibm | Two-dimensional data compression |
US3422304A (en) * | 1967-09-15 | 1969-01-14 | Ibm | Logic controlled deflection system |
US3497760A (en) * | 1968-06-10 | 1970-02-24 | Sperry Rand Corp | Logical expansion circuitry for display systems |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3746913A (en) * | 1971-12-22 | 1973-07-17 | Ibm | Cathode ray deflection system using field effect transistors |
Also Published As
Publication number | Publication date |
---|---|
DE2029628A1 (en) | 1971-01-14 |
JPS4947702B1 (en) | 1974-12-17 |
GB1294162A (en) | 1972-10-25 |
FR2052385A5 (en) | 1971-04-09 |
DE2029628C3 (en) | 1978-06-01 |
DE2029628B2 (en) | 1977-10-06 |
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