US3446984A - Current driver - Google Patents

Description

y 1969 N. M.SHUKLA 3,446,984

' CURRENT DRIVER Filed July 16, 1965 Fig. 1

44 48 m off 5 F time curr nt INVENTOR. NARENDRA M. SHUKLA ATTORNEY N. M. SHUKLA 3,446,984.

C URRENT DRIVER May 27, 1969- Filed July 16, 1965 Fig.4 T 88 g 96 I 98 g i 100 U L. I s l time IN V EN TOR. NARENDRA M. SHUKLA ATTORNEY United States Patent ABSTRACT OF THE DISCLOSURE A current driver circuit for providing a high energy current pulse to the set windings of a plurality of ferromagnetic cores. The high energy current pulse is due to the discharge of the large inductance of an inductor through the smaller inductance of the set windings. A low power transistor interrupts the flow of charging current through the inductor and gating means, having a predetermined voltage threshold, electrically connects the set windings of the ferromagnetic cores to the inductor thereby providing the discharge path for said inductor. The transistor additionally controls a separate low-current path through the reset windings of the ferromagnetic cores maintaining the cores in a reset condition during the charging time of the inductor.

This invention relates to apparatus for providing electrical power to utility devices, and more particularly, to pulse drivers for providing intermittent pulses of power to an electrical device.

It is frequently necessary to activate electrical units with power in the form of a series of pulses. For example, a device requiring this type of power is the keyboard transducer disclosed in the application of Flavius A. Mathamel, Ser. No. 433,359, filed Feb. 17, 1965, and assigned to the same assignee as this application. This transducer requires that a series of pulses be applied to a ferromagnetic core to switch this core from one remanent state to the opposite remanent state. It is intended that a plurality of these transducers have their cores continuously pulsed by a switching current.

The cores are normally inhibited from switching. However, when a selected key is depressed on a keyboard, some of the cores are released and provide output pulses from their output windings to a data processing device. The outputs of the keyboard transducers indicate which key has been depressed by a coded plurality of output signals.

It is desirable that the current drivers used to provide the pulsed energy to the cores be simple and economical. Because of this, semi-conductor devices are frequently used in the current driver circuitry. However, when magnetic cores are switched, they present a varying impedance to the driver. This characteristic is frequently encountered in devices which are activated by a series of energy pulses. The drivers, to operate efiiciently, must have a high output impedance. However, if resistors are used to increase the output impedance of a semi-conductor or if a power transistor connected in the common-base mode is used, a great deal of power is dissipated. This, of course, is undesirable.

Also, it is frequently necessary to provide AC pulses. However, AC generators are expensive. If two DC pulse generators having opposite polarity outputs are used, there is a duplication of equipment. Accordingly, it is an object of this invention to provide improved apparatus for applying energy pulses to a utility device.

It is a further object of this invention to provide a current pulse driver which is simple, economical, and which does not dissipate excessive amounts of power.

Patented May 27, 1969 It is a further object of this invention to provide a pulse generator which is capable of both setting and restting ferromagnetic cores without excessive duplication of components and which automatically resets the cores if they are set by noise.

In accordance with the above objects, a current driver is provided having a source of voltage, an inductor, gating means such as a diode, and a switch. The diode has a higher forward impedance than the switch when the switch is closed. One end of the inductor is connected to the voltage source and the other end is connected to both the diode and the switch. The windings of the cores are connected in series with the diode and are grounded at the other end so that current may flow from the power supply, through the inductor, the diode, and all of the windings, to ground. The switch short circuits the diode to ground while it is closed and presents a high impedance to ground while it is open.

The switch is normally closed so that no current flows through the windings of the cores. However, when it is desired to set the cores, the switch is opened. When the switch is opened the energy stored in the inductor discharges to ground through the diode and through the windings of the cores, setting each of the cores. It is noted that the switch may be a relatively inexpensive transistor connected in the common-emitter configuration. Therefore it is possible to fabricate a simple, economical, driver which does not dissipate large amounts of power. A similar driver may be used toreset the cores by connecting its output to reset windings wound in the opposite direction as the set windings.

It is possible'to use the driver of this invention'to both set and reset the cores. This is accomplished by connecting one end of the series of reset windings of the cores to the power supply and connecting the other end of the series-connected reset windings to the point in the circuit which is electrically between the diode and the switch. The resistance in this reset circuit is adjusted so that current fiows through it whenever the switch is closed. This current resets the cores. It is noted that current at the same time must flow through the alternate path between the power supply and ground, which path includes the inductor.

The above noted and other features of the invention will be understood more clearly and fully from the following detailed description when considered with reference to the accompanying drawings in which:

FIG. 1 is a schematic circuit diagram of a current driver according to an embodiment of the invention;

FIG. 2 is a graph of certain wave forms which occur during the operation of the circuit of FIG. 1;

FIG. 3 is a schematic circuit diagram of an embodiment of the invention in which a current driver is capable of applying pulses to a plurality of diifreent terminals of a load;

FIG. 4 is a graph of certain wave forms which occur during the operation of the circuit of FIG. 3; and

FIG. 5 is a schematic circuit diagram of another embodiment of the invention.

In FIG. 1 a schematic circuit diagram of a current driver is shown having an input terminal .10 for receiving trigger pulses and having an output terminal 12 for providing output current pulses to the set windings of a plurality of cores 1.4, which windings are connected in series with each other between the output terminal 12 and ground. A first NPN transistor 16 has its base electrically connected to the input terminal 10 through a resistor 18 and to a source of negative potential 20 through the resistor 22. Its emitter is grounded, and its collector is electrically connected to a source of positive potential 24 through a resistor 26.

A second NPN transistor 28 has its base electrically connected to the collector of the transistor 16 through the resistor 30 and to the source of negative potential 20 through a resistor 32. 'Its emitter is grounded, and its collector is electrically connected to the source of positive potential 24 through an inductor 34 and to the gating means such as the anode of the diode 36-. The cathode of the diode 36 is electrically connected to the output termirial 12.

The transistor 16 is biased to be normally nonconducting; the transistor 28 is biased to be normally conducting. When a positive trigger pulse is applied to the input terminal 10, the transistor 16 is driven to saturation causing the potential on its collector to become less positive. The base of the transistor 28 becomes negative since it is connected to the collector of the transistor .16 causing the transistor 28 to be cut off. Now the current from the source 24 which has been flowing through the inductor 34 to ground through the transistor 28 is forced to find an alternate path to ground. This path is through the diode 36 and the set windings of the cores 1 4.

The inductor 34 has a much larger inductance than the set windings of the cores 14. The energy stored in the inductor 34 sends a large transient current through the windings of the cores 14 whenever its normal current fiOlW is interrupted by opening the transistor switch 28. The current flowing through the set windings while the transistor switch 28 is closed is not large enough to set the cores 14 because the forward resistance of the diode 36 is greater than the collector-to-emitter resistance of the transistor 28. The voltage swing on the collector is equal to the back voltage or induced voltage in the primary windings of the setting cores. The current through the switching core is approximately constant because of the energy stored in the inductor during the time when the transistor switch was closed.

The transistor 28 may be a medium-powered transistor. If a transistor were to be used to directly drive the cores 14 without the benefit of stored energy in an inductor, it would have to be a high-polwer fast transistor. Also, in such a case, some provision would have to be made for increasing the output impedance of the transistor to provide efficient power transfer to the cores 14 when the input impedance increases during switching.

In FIG. 2, a graph of three curves is shown ha'ving common abscissae of time and individual ordinates of current. The curve 38 represents the current flow through the transistor 28. This current is normally large as indicated by the portion of the curve 40. However, when a positive trigger pulse is applied to the terminal 10, the current through the transistor 28 ceases to flow as indicated at 42 on the curve 38.

The curve 44 represents the current flow through the set windings of the cores 14. When the current 40 is flowing through the transistor 28, no current flows through the cores as indicated by the region 46 on the curve 44. However, when a positive trigger pulse is applied to the input terminal cutting olf the transistor 28, a high current 48 flows through the set windings of the cores 14. The curve 50 represents the current through the inductor 34. It is seen that this current is continuous and may be thought of as the sum of the currents represented by the curves 38 and 4 4. It is the resistance to a change in current of the inductor 34 that provides the eflicient switching of the cores 14.

In FIG. 3, a schematic circuit diagram of a modification of the invention is shown having a set line 52 capable of setting thirteen cores 54 in response to a 4-microsecond, 6 volt input pulse applied to the input terminal 56 and having a reset line 58 capable of resetting the thirteen :cores 54 during the 64-microsecond interval between the input pulses applied to terminal 56. The set windings of the cores 54 are connected in series with each other. One end of the series of windings is grounded and the other end is connected to the set line 52. Also, the reset wind- 4 ings of the cores 54 are connected in series with each other. One end of this series connection is connected to the reset line 58 and the other end is connected to the collector of a 2N2102, NPN transistor 60. Each of the thirteen cores may be used in a separate transducer for the keyboard described in the above-identified patent application to Flavius A. Mathamel.

The base of a 2N708, NPN transistor 62 is electrically connected to the input terminal 56 through a 470 ohm, A watt resistor 64 and to a source 66 of a negative 8 volts through the 6.8K (Kilo-ohm) /4 watt resistor 68. The emitter of the transistor 62 is grounded and its collector is electrically connected to a source 70 of a positive 24 volts through a 360 ohm, 1 watt resistor 72.

This stage of the current driver serves primarily as an inverter to invert the positive pulses applied to the input terminal 56 to negative pulses at the next stage of the current driver. The transistor 62 is normally cut off. However, the 6 volt, 4 microsecond input pulses applied to the terminal 56 bias it to saturation for a short time. When it is biased to saturation, the voltage on its collector drops from a potential of approximately 4.5 volts received from the source 70 to a potential close to ground received from the emitter of the transistor 62. This causes a negative pulse to be applied to the transistor 60 of the next stage of the current driver.

The transistor 60 has its base electrically connected to the collector of the transistor 62 through a ohm, /2 watt resistor 74 and to the source 66 through a 2K, /2 watt resistor 76. The emitter of the transistor 60 is grounded and its collector is connected to one end of the series connection of reset windings, to the anode of the 1N400 9 diode 78, and to one end of the 2.5 millihenry, 9.3 ohm inductor 80. The other end of the inductor 80 is connected to the source 70 through a 96 ohm resistor 82. The cathode of the diode 7 8 is electrically connected to the anode of the 1N4009 diode 84. The cathode of the diode 84 is connected to the end of the set line 52 opposite to the series connection of the set windings of the cores 54. A ohm resistor 86 is electrically connected at one end to the source 70 and at the other end to the end of the reset line 58 opposite the collector of the transistor 60.

Whenever a negative pulse is received on the base of the transistor 60 from the first stage of the current driver in response to input trigger pulses, the normally conducting transistor 60 is cut off. The potential of the collector of the transistor 60 is approximately 0.5 volt when it is conducting and it is approximately 40 volts when it is first cut oif. This 40 volt swing is the result of a transient generated by the inductor 80 when the opening of the transistor switch 60 tends to interrupt the flow of current through the inductor. This voltage swing causes a high current to fiow through the two diodes 78 and 84 and through the set windings of the thirteen cores 54 setting these cores. Approximately three volts per core are required.

When the transistor '60 is conducting, as it is between input pulses to the terminal 56, current flows through the reset line 58 from the source 70 to ground. This current resets the cores 54. Setting current does not flow through the set line 52 because it is blocked by the two diodes 78 and 84. These diodes each have 0.7 of an ohm forward resistance at 2 milliamperes. They may be thought of as self-actuated switches which present a relatively high resistance until they are forward biased, after which they present a low forward resistance. Of course, the transistor 60 is a separately-actuated switch since it is triggered by an input to its base from the previous stage of the current driver.

It can be seen that the embodiment of the invention shown in FIG. 3 has all of the advantages of the circuit shown in FIG. 1 plus an additional advantage: it is capable of both setting and resetting cores. It has low power dissipation and uses relatively inexpensive mediumpower transistors.

In FIG. 4, a graph is shown of four curves having common abscissae of time and individual ordinates of current. The curve 88 represents the current through the inductor 80. It can be seen that this current is relatively constant even though the circuit to which it flows changes: including, first, a path to ground through the transistor 60, and then, a path to ground through the set windings of the cores 54.

The curve 90 represents the current through the set line 52. This current is negligible for 64-rnicrosecond intervals indicated by the region 92 and has a pulse amplitude equal to the DC inductance current for 4-microsecond intervals such as that indicated by 94. These intervals correspond to the time-width of the input pulses applied to the input terminal 56.

The third curve 96 represents current through the reset line 58. This current is relatively high for 64-millisecond intervals such as that in the region 98 and falls to a negligible value for 4-microsecond intervals such as those indicated at 100. The fourth curve 102 represents the current through the transistor 60. It can be seen that this current is normally high during 6 4-microsecond intervals such as those indicated at 104 and falls to negligible amount during 4-microsecond intervals such as those indicated at 106. It is these interruptions that cause the voltage transients at the collector of the transistor 60 to open the two diode switches 78 and 84 to current flow from the inductor '80.

It is noted that the sum of the currents indicated by the curves 90 and 102 is a constant equal to the current through the inductor 80 and represented by the curve 88.

In FIG. 5, a schematic circuit diagram of another modification of the invention is shown. This modification of the invention has the same output circuit as the circuit of FIG. 3, including the source of potential 70, the resistor 82, the resistor 86, the reset line 58, the cores 54, the diode 84, the diode 78, the set line 52, the inductor 80, and the transistor 60. However, the input circuit has been modified to save one stage of the logical circuitry used to apply trigger pulses to the current driver and also to speed up the operation of the current driver. In this modification of the invention it is possible to activate the current driver by applying negative pulses to the input terminal 56. Also, the transistor 108 in the first stage of the current driver is biased to operate in the Class A mode so that it is never saturated. This speeds up its operation by reducing minority carrier storage. Since the input circuit stage is an emitter-follower type, it has higher current gain which can be advantageously used to saturate the output transistor.

The base of the NP-N transistor 108 is electrically connected to the input terminal 56 through a resistor 110 and to a source of a negative 8 volts 112 through the resistor 114. The emitter of the transistor 108 is directly connected to the base of the transistor 60 and also connected to the source 112 through the resistor 116. The value of the resistor 116 in this circuit is relatively high compared to the value of the corresponding resistor 76 in the circuit of FIG. 3. The collector of the transistor 108 is connected to the source 70 through a resistor 118.

It can be seen that the first stage of this current driver is not an inverter. When it receives a negative going input pulse on terminal 56, it conducts a negative pulse to the base of transistor 60 cutting this transistor off and switching the setting current to the setting windings of the cores 54. The transistor 108 does not saturate but merely operates as an amplifier to conduct these pulses to the transistor 60.

It can be seen that the current drivers of this invention are simple, economical, and reliable. Also, they do not dissipate an excessive amount of power. Because of the lower power requirements, less expensive components can be used. Also, many components serve two functions, that of setting and that of resetting the cores, resulting in further economy and reducing errors from noise. If a core is set by noise, it is automatically reset so that it is ready for use when the next set pulse is applied.

Of course, many modifications and variations of the invention are possible in the light of the above teachings. It is therefore to be understood, that within the scope of the appended claims, the invention may be practiced otherwise than as specifically described.

What is claimed is:

1. A current driver adapted to provide current pulses to a load through a first terminal and a steady flow of current to a load through a second terminal, comprising:

an inductor adapted to be connected at one end to a source of current;

gating means having a predetermined voltage threshold electrically connected between the second end of said inductor and the first terminal;

control means electrically connected to the second end of said inductor to alternately charge said inductor and discharge said inductor to provide high current pulses to the first terminal; and

current-limiting means connected to said one end of said inductor to limit the steady flow of current to the second terminal to an amount smaller than that flowing into said inductor.

2. A current driver for setting ferromagnetic cores comprising:

a set conductor adapted to be connected to the set windings of said ferromagnetic cores;

a reset conductor adapted to be connected to the reset windings of said ferromagnetic cores;

a first NPN transistor having its emitter grounded and its collector electrically connected to one end of said reset conductor;

a first diode having its anode electrically connected to the collector of said first NPN transistor;

a second diode having its anode electrically connected to the cathode of said first diode and having its cathode electrically connected to said set conductor;

said reset windings of said ferromagnetic cores being adapted to be connected to a source of positive potential at the opposite end from their connection to said reset conductor;

said set windings being adapted to be grounded at the opposite end as their connection to said set conductor;

an inductor having an inductance greater than the inductance of said set windings and being electrically connected at one end to the collector of said NPN transistor and at its other end being adapted to be connected to a source of electrical potential;

a second NPN transistor having its emitter grounded, and having its collector electrically connected to the base of said first NPN transistor;

an input terminal adapted to receive positive input triggering pulses and being electrically connected to the base of said second NPN transistor;

first biasing means for biasing said first NPN transistor to saturation; and

second biasing means for biasing said second NPN transistor to cut off.

3. A current driver for ferromagnetic cores comprising:

a plurality of set windings each wound around a different one of said ferromagnetic cores;

said plurality of set windings being connected in series from a set-winding input terminal to a set-winding output terminal;

a plurality of reset windings each wound around a different one of said ferromagnetic cores;

said plurality of reset windings being connected in series from a reset-winding input terminal to a reset winding output terminal;

a first NPN transistor having its emitter grounded and having its collector electrically connected to said reset windings input terminal;

a first diode having its anode electrically connected to the collector of said first NPN transistor;

a second diode having its anode electrically connected to the cathode of said first diode and having its cathode electrically connected to said set winding input terminal;

said reset winding output terminal being adapted to be connected to a source of positive potential;

said set winding output terminal being grounded;

an inductor having one end electrically connected to the collector of said first NPN transistor and having its other end adapted to be connected to said source of positive potential;

first bias means for biasing said first NPN transistor so as to be normally conducting;

a second NPN transistor having its emitter electrically connected to the base of said first NPN transistor; second biasing means for biasing said second NPN transistor so as to be normally conducting; and

an input terminal adapted to receive negative-going input pulses and being electrically connected to the base of said second NPN transistor, whereby said second NPN transistor is cut off by said input pulses so as to provide a negative pulse to the base of said first NPN transistor, cutting it off also.

4. A ferromagnetic core actuator circuit comprising:

an inductor connected at one end to a source of current,

control means electrically connected to said inductor controlling the flow of charging current in said inductor in a normal position,

a load comprising at least one ferromagnetic core having a set winding and a reset Winding, said reset winding connected in electrical parallel circuit with said inductor and in electrical series circuit with said control means to reset said ferromagnetic core in the normal position, and

gating means electrically connecting said set winding in electrical parallel circuit with said control means and operable to set said ferromagnetic core by discharging said inducto-r through said set winding when said control means interrupts the flow of charging current through said inductor.

5. The ferromagnetic core actuating circuit according to claim 4 wherein the inductance of said inductor is greater than the inductance of said load.

6. The ferromagnetic core actuating circuit according to claim 4 wherein the control means includes a transistor normally biased in a state of conduction.

7. The ferromagnetic core actuating circuit according to claim 4 wherein the gating means has a predetermined voltage drop independent of the amount of current flowing through said element and said voltage drop is greater than the voltage drop across said control means in the normal position.

References Cited UNITED STATES PATENTS 3,065,358 11/1962 Lee et a1. 307-88 BERNARD KONICK, Primary Examiner.

G. M. HOFFMAN, Assistant Examiner.

U.S. Cl. X.R. 307-238, 270

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