US3330968A - Electronic devices for switching high-level voltage signals - Google Patents

Description

July 11, 1967 R. LOYEN 3,330,968

ELECTRONIC DEVICES FOR SWITCHING HIGH-LEVEL VOLTAGE SIGNALS Filed June 9, 1964 United States Patent 3,330,968 ELECTRONIC DEVICES FOR SWITCHING HIGH-LEVEL VOLTAGE SIGNALS Roger Loyen, Vernon, Eure, France, assignor to Etat Francais (French State), represented by the Minister of Armed Forces, Ministerial Delegation for Armaments, Direction of Research and Munitions, Laboratory of Ballistic and Aerodynamic Researches, Vernon, Eure, France Filed June 9, 1964, Ser. No. 373,675 Claims priority, application France, June 21, 1963, 938,962, Patent 1,391,697 1 Claim. (Cl. 307-885) This invention relates to an electronic device for switching high-level voltage signals, i.e. signals of which the amplitude may vary within a range of 50 volts to +50 volts in relation to a reference potential, for transmitting these signals on a single line, this device comprising a plurality of gates receiving at their inputs the various voltage signals respectively and having their outputs connected in common to said single line, said gates being normally closed and adapted to be opened in succession and cyclically by periodic switching signals, said device being characterized in that each gate comprises a transistor, the voltage signal transmitted by the gate con cerned being fed between the two input electrodes, i.e. the emitter and collector electrodes, of said transistor, the switching signal of this specific gate being fed to the control or base electrode of said transistor, one of said input electrodes of the transistor being connected to said single line transmitting said voltage signals whilst the other input electrode is brought to the common earth potential of all the gates of the device.

The switching device according to this invention is advantageous in that it permits of switching on said single ouput line, at a rate ranging from zero to several thousand switchings per second, a considerable number of variable voltage signals called high-level signals having a maximum amplitude excursion of :50 volts.

In order to afford a clearer understanding of this invention and of the manner in which the same may be carried out in practice, reference will be made to the accompanying drawing of which the single figure illustrates a block and wiring diagram of a device constructed according to the teachings of the present invention.

In the drawing, it will be seen that the switching device according to this invention comprises a plurality of gates 10, 20 30 equal in number to the electric voltage signals to be switched on a single line 1. Voltage signals S1, S2 Sn occurring in the form of variable voltage levels in relation to a reference or control voltage, which is the voltage of the common earth, are fed to said gates 10, 20 30. The voltage range in which these various signals may vary is of the order of 50 volts to +50 volts in relation to the earth potential.

The signals S1, S2 Sn are fed respectively between the pairs of input terminals 11 and 12, 21 and 22, 31 and 32 of the aforesaid gates 10, 20 and 30. These gates are controlled successively and cyclically as a consequence of the application of the respective switching signals C1, C2 Cn, which may be delivered for example by a clock 2 of any conventional type Well known in the art. The polarity and relative spacing in time of these switching signals C1, C2 Cn are such that at a given moment only one of the gates 10, 20, etc. is open.

Since all the gates 10, 20, etc. are constructed in the same manner, only one of them, i.e. gate 10, will be described in detail hereinafter. This gate comprises a transistor 13 of the PNP type in the example illustrated. The emitter electrode of this transistor is connected on the one hand through a resistance 14 to the input terminal 12 and, on the other hand, through another resistance 15 to a multiple connecting point 3. The collector electrode of this transistor is connected to the input terminal 11, that is, the common earth. Finally, the base of transistor 13 is connected through a resistance 16 to the output of the clock 2 delivering the synchronization signal C1 causing the opening of gate 10.

The switching device according to this invention operates as follows: The voltage signals S1, S2 Sn fed to the inputs of gates 10, 20 30' respectively, are constantly present. These signals may constitute for example the results of separate measurements to be transmitted on a single output line. At a predetermined moment all the gates of the switching device are closed except one of them. Considering for example gate 10 before the switching signal C1 is applied thereto the base potential of transistor 13 is selected to have a value low enough to make transistor 13 conducting irrespective of the amplitude of the input signal S1. Therefore the emitter of this transistor, i.e. the junction point between resistances 14 and 15, is substantially at the earth potential, and the same applies to all the other gates which are closed.

On the other hand, when the positive-alternation switching signal C1 of this example is fed to the base electrode of transistor 13 it causes this transistor to become non-conducting. The potential of the transistor emitter will thus rise as well as that of the multiple connecting point 3 which is connected to the terminals of all the resistances of the other gates 20 30 which are similar to resistance 15, the other terminals of these resistances being at the earth potential since these gates are closed. Therefore, the potential of the connecting point 3 is proportional to the voltage of the input signal S1. The connecting point 3 is thus brought successively, during a complete switching cycle, to potentials respectively proportional to the various input signals S1, S2 Sn.

The connecting point 3 is also connected to the input of an operative amplifier 4 comprising a feedback resistance 5. Under these conditions, there is obtained at the output of amplifier 4, on the aforesaid single line 1, a sequence of signals corresponding to the input signals S1, S2 Sn fed to gates 10, 20 30, respectively.

In order to minimize any intermodulation likely to subsist as a consequence of the saturation resistance of chopper transistors, such as transistor 13, of the various gates 10, 20 30, a corrector circuit consisting of resi tances 17, 27 37 is provided, these resistances having one end connected to the input terminals 12, 22 32, respectively, and their other ends connected in common to one end of another resistance 6 of which the other end is earthed. This set of resistances constitutes a logical adder of which the properly attenuated output signal is fed as a feedback through a resistance 7 to the operative amplifier 4.

Typical values of the various components of the switching device of this invention when the input signals S1 Sn have a maximum range of i5 volts are given herebelow:

Resistance 14 220K Resistance 15 200K Resistance 16 6K Resistance 5 440K Of course, it is clear that the form of embodiment of this invention which is described hereinabove and illustrated diagrammatically in the accompanying drawing should not be construed as limiting the invention since many modifications may be brought thereto without departing from the spirit and scope of the invention as set forth in the appended claim.

Thus, a NPN-type transistor may be substituted for the PNP-type transistor 13 illustrated, provided that the switching signal polarity is inverted.

What I claim is:

An electronic switching network for switching input voltage signals whose amplitude may vary within a range of -50 volts to +50 volts in relation to a given reference potential for transmission on a single output line, which comprises a plurality of gates having their inputs arranged to receive respective ones of said input voltage signals and having their outputs connected in common and to said output line, said gates being normally closed and being arranged to be opened successively and cyclically by periodic switching signals, each of said gates comprising a transistor to the base of which is applied the switching signal and between the emitter and collector of which is applied the input voltage signal to be transmitted, first resistances associated with each of said gates respectively and a second common resistance, one end of each of said first resistances being connected to the emitter-collector circuit of a respective one of said gates and the other ends of the first resistances being connected in common to said second resistance such that said first resistances and said second resistance form a summation circuit for the voltage signals, and an operational amplifier having first and second inputs and an output connected to said output line, the junction point between said first resistances on the one hand and said second resistance on the other hand being connected to the first input of said operational amplifier the second input of which is connected to the common output of said gates, the signals fed to said amplifier inputs having opposing effects on the amplifier output.

References Cited UNITED STATES PATENTS 3,050,587 8/1962 Carbrey 307--88.5 3,078,378 2/1963 Burley et al. 30788.5 3,135,873 6/1964 Werme 30788.5 3,153,729 10/1964 Leakey 307-88.5

ARTHUR GAUSS, Primary Examiner.

20 J. BUSCH, Assistant Examiner.

Images