US3309244A

US3309244A - Alloy-diffused method for producing semiconductor devices

Info

Publication number: US3309244A
Application number: US267220A
Authority: US
Inventors: Charles B Ackerman; Daniel J Sullivan
Original assignee: Motorola Inc
Current assignee: Motorola Solutions Inc
Priority date: 1963-03-22
Filing date: 1963-03-22
Publication date: 1967-03-14
Anticipated expiration: 1984-03-14
Also published as: GB995527A; BE645252A; NO116431B; NL6402683A; JPS4911033B1; DE1935088U; DK117363B; FR1397401A

Description

Mmm-14, 1967 c. B. ACKERMAN ET AL ALLQYf-DIFFUSED METHOD'FOR PRODUCING SEMICONDUCTOR DVVICES Filed Maron 22, 196s Fig.6

Fig?.

IN V EN TORS Charles B. Ackerman Daniel J. Sullivan ATTYs.

United States Patent O 3,309,244 ALLOY-DIFFUSED METHOD FR PRODUCING SEMICNDUCTR DEVlCES Charles B. Ackerman and Daniel J. Sullivan, Phoenix,

Ariz., assignors to Motorola, Inc., Chicago, Ill., a corporation of Illinois Filed Mar. 22, 1963, Ser. No. 267,220 4 Claims. (Cl. 148-178) This invention relates to transistors and in particular to drift-base power transistors of a post-alloy-diifused type especially designed for switching purposes.

There are a large number of industrial applications for power transistors characterized by the ability to switch on and ol large currents at high speeds and at high operating or transient voltages. In order to withstand these voltages, the collector-to-emitter breakdown voltage characteristic (BVCER) of the transistor must be relatively high, and for some applications a BVCER in excess `of 150 volts is required. A typical example of such an application would =be in an automobile ignition system in which a power transistor would Vbe operated on signals from low current breaker points to switch sharp heavy pulses of current into a primary winding of an ignition coil. The breaker points do not tend to pit and burn as is usually the case since, in the transistorized ignition system, the heavy current pulses are through the transistor rather than through the breaker points. When such pulses rise or fall quickly to or from a peak value, a high voltage is available across a secondary winding which fires the spark plug. As the spark arcs the gap of the spark plug, a reverse voltage is induced in the primary coil and may he measured across the terminals of the transistor. The reverse voltage induced in the primary winding is many times the ordinary operating voltage supplied to the primary by the automobile battery and will destroy a transistor having a low collector-to-emitter reverse voltage breakdown characteristic, BVCER. In an application such as this, it is desirable while not essential to have a fast switching transistor, since the quicker the change from one current level in the primary to a much :different level, the hotter and sharper will be the discharge across the gap of the spark plug thereby igniting the fuel more efhciently; since, however, this more desirable spark leads to a higher reversed primary voltage, in this application a faster transistor requires a higher BVCER Another application requiring a fairly high BVCER but with an extremely `fast current switching speed is when a power transistor is used as a driver to switch current to the horizontal deflection windings of a television tube through an output transformer. The current wave form supplied to the horizontal deflection windings is a sawtooth form which rises at an approximately constant rate to a peak value, during which time the trace of the electron Vbeam traverses the face of the picture tube, and then the current falls abruptly to an almost equal but opposite value. This full current reversal returns the trace to the opposite side of the tube and must be accomplished during a very fast interval known as the blanking interval during which time the return trade is rendered invisible. Fall times in some cases measured from one current level to another over as much as a l amp range must occur in less than a microsecond and such a desirable characteristic has not been previously possible in typical power transistors at the present state of the semiconductor art.

Since the switching speed of a transistor depends largely on how quickly electrical charge can cross the base region of a device `from emitter to collector and on how quickly stored electrical charge may be removed from the base region as well as the capacitive device junctions, the

fr 3,3%,244 Ice Patented Mar. 14, 1967 Switching speed of the transistor may be improved by optimizing the nature of the `base region of the transistor and lby reducing the values of the resistive and capacitive Constants of the device. In the power transistor it is difiicult to reduce the size, and therefore, the capacitance of the junctions since large area junctions are necessary for handling the larger amounts of current that the applications in which such devices are used require.

In the typical PNP alloy-junction transistor, hole transport across the base is achieved by relatively slow diffusion. In the drift or diffused base transistor, these minority carriers are swept across the base region by a strong electric field resulting from the particular distribution of impurity material resulting from the solid state diffusion process used in forming the diffused base. The impurity distribution is such that the concentration of N-type impurity is much higher nearer the emitter than the collector, and as a physical consequence, an electric field exists of polarity such that the iiow of N-type carriers or electrons from regions of high N impurity concentration to regions of low impurity concentration is opposed.

Such a field, of course, aids hole or minority carrier travel since they are of opposite electrical sign. Thus, when normal operating bias is applied to the transistor, holes injected from the emitter into the base are swept rapidly across the base =by this lield.

As in most switching applications, a very small minority carrier transport time across the base is desirable. Therefore, it is also desirable to have the base region as thin as possible consistent with maintaining other desirable device characteristics, and especially that of keeping the base resistance of the transistor at a Alow value.

One of the most useful methods of producing a very thin diffused base is by solid state diffusion from an alloyed emitter region which contains both N- and P-type impurities of which the emitter forming impurity is in excess. For the PNP transistor, the N-type impurity is chosen so that it has a high diffusion rate so that during a post-alloying heating cycle it soon penetrates into the original wafer of P-type germanium a short distance past the boundary formed by the wafer and the recrystallized emitter region. Because this region, which is the base of the transistor, forms to a thickness independent of any prior operation on the wafer, extremely small base widths are physically possible. Electrical connection between the metal base contact of the transistor and the active or spreading region -of the base is due to a diffused region which also forms essentially along the surface of the transistor at the same time the base region beneath is being diffused. This extrinsic base region (rb) is never thicker than the active region of the base, and it therefore has a high sheet resistance.

The extrinsic base resistance may be reduced by a significant degree using a separate diffusion step to thicken this region and this is frequently done, but with respect to power transistors the reduction that can be achieved is only enough to permit moderate optimization of the device. The reduction in resistance in the base by diffusion is limited to a large extent since even for fairly deep diffusions, most of the impurity concentrates near the surface of the wafer, and since the resistivity of the underlying base material is fairly high on the average, its contribution toward a low base resistance is not too great.

While a low base resistance is a generally desirable device characteristic, it is especially so in power switching transistors since a number of pertinent device parameters are improved as a result of having a low base resistance. Among those related to power and switching which are materially improved over an otherwise equivalent transistor by lowering the base resistance and used to form the collector connection.

otherwise not changing the base of the transistor is the voltage drop across the emitter and collector junctions of the device while in the saturated or full on condition, which is lowered. When this drop is low, little power is dissipated within the transistor and the transistor is more efficient and less prone to heat up in operation. Also, the transconductance of a device is improved by the lowered base resistance so that a given base voltage change produces a larger change in collector current in the unsaturated condition, and the switching speed of the transistor is increased.

Therefore, it is an object of this invention to provide a high voltage power-switching transistor of post-alloydiused base type having a signicantly lower extrinsic base resistance than has previously been possible.

Another object of the invention is to increase the switching speed of diffused base power transistors while keeping the collector breakdown voltage BVCER high and the saturation voltage VCMSAT) low.

A feature of the invention is a diffused base transistor having an alloyed extrinsic base region which connects the diffused base region to the base contact of the transistor and provides a relatively low extrinsic base resistance.

Another feature of this invention is the method of forming yan extrinsic base region of heavily N doped recrystallized germanium using alloying techniques.

Another feature of this invention is the method of forming the base-spreading region independent of the extrinsic base region by alloying the emitter through the extrinsic base region before diffusing the active base region.

In the accompanying drawings:

FIG. l is a cutaway drawing of an embodiment of this invention, a power transistor the Aactive element of which features an extremely low extrinsic base resistance although the spreading region of the ibase was formed by post-.alloyed diffusion procedures;

FIG. 2 is an isometric View of a completed active element of the transistor which illustrates the ring emitterdouble base construction of the device;

FIG. 3 is a cross section of FIG. 2 taken at section line 3 3 in order to show the internal structure of the active element of the transistor;

FIG. 4 is an isometric view which shows the result of the first major processing step in preparing the active element of the transistor from a germanium die, which has formed an alloyed region of the opposite conductivity type across the surface of the germanium die;

FIG. 5 is a cross section of FIG. 4 taken at section line 5 5 in order to show the metal used for alloying and the -alloyed region of recrystallized germanium;

FIG. 6 is another cross sectional view showing the regrown germanium but following the etching operation in which the metal used for alloying to form this regrowth Ihas been etched away; and

FIG. 7 is a cross sectional view of the active element of the transistor during the emitter alloying operation prior to base diffusion.

In accordance with this invention, post-alloyed-diiused transistors having very low extrinsic base resistance may be prepared as follows.

A germanium die of P conductivity type is alloyed with lead containing an impurity thereby forming an N-type regrowth layer of recrystallized germanium at one face of the die. The lead is then removed to expose the regrowth and prepare the die for subsequent alloying and diffusion steps. The regrowth will become the extrinsic base region of the transistor.

Contact is made to the P region of the die by alloying a metal contact of lead to it and this subsequently is The emitter of the device is formed in a separate alloying step rather than at the same time.

The metal used to make the emitter is lead containing appropriate P and N impurities in the proper proportions in order to form a base region beneath a recrystallized emitter region by post-alloy diffusion. The emitter alloying step is accomplished at a temperature high enough so that the region of dissolved germanium is deep enough to penetrate the extrinsic base N region formed by the rst alloying step. After the alloying step, the temperature is lowered somewhat to establish a thin P-type regrowth region which is the emitter, and then .a thin N region is caused to form beneath the emitter by post-alloyed diffusion from the still molten lead.

The thick N region formed by the rst alloying operation provides a low resistance electrical connection from a thin active base region of N material beneath the emitter to a metal base contact region concentric to the emitter of the transistor. The metal base contact region was formed by alloying following the emitter alloying operation.

The described alloying and diffusion operations form the active transistor element of the power transistor. The active element and appropriate piece parts are assembled together and are processed to form a completed power transistor.

Due to the lower base resistance of the transistor fabricated according to this invention, the switching speed and the internal power dissipation in the device as well as several other parameters are improved.

The text which follows and the accompanying drawings will serve to explain the invention more fully.

FIG. 1 is an enlarged cutaway View of .an improved power transistor 11 of la post-alloy-diffused type. The transistor consisting of the active element 12, a mounting base 13, feedthrough terminals 14 and

connections

15 and 16 from the feedthroughs to the active element, is sealed after assembly by welding a steel cap 19 onto the copper mounting base 13. As shown by the cutaway view, metal stampings provide the connector means used to make electrical connection between the emitter and the two base contacts of the active element and the feedthrough terminals 14. A small arch of metal 17 on the base connector stamping 16 serves to electrically connect the two base contacts of the device.

The active element 12 of the transistor, shown in FIG. 2 and in section in FIG. 3, is prepared from a .260 inch in diameter by .007 inch thick monocrystalline die of l2 to 20 ohm-centimeter P-type germanium. This element is soldered or fused in a later assembly operation into the embodiment shown in FIG. l by using as a form of solder the high lead alloys of the collector contact 22, the emitter contact 23 and the two

base contacts

24 and 25. A low resistivity extrinsic base region 26 provides a low resistance electrical path between the

base contacts

24 and 25 and the active base region 27.

The emitter region of P-type material is formed by alloying a suitably doped metal containing both P and N impurity (the metal contact 23) into germanium to form a P-type germanium regrowth 29 and subsequently diffusing out the N impurity to form a base region. The collector region 30 forms a larger part of a crystal portion of the active element. The collector contact 22 is prepared by alloying a metal to the collector region which forms ka P-type regrowth region 31.

The low resistivity base region of the transistor is formed by an alloying operation. In FIG. 4 and its cross sectional View (FIG. 5) a die 32 of P-type semiconductor material is shown after an alloying operation in which the top surface has been alloyed with a disc of lead 33 .011 inch thick, of the same diameter as the die and containing about two percent (2.0%) antimony. This alloying is done in such a way as to penetrate into the die somewhat less than the anticipated penetration of the emitter. In the present embodiment of the invention, this penetration is about 0.001 inch. This alloying step produces a heavily doped alloy regrowth 35 which will be used to connect the active base region 27 to the region of the

base contacts

24 and 25.

After the base layer alloying step, all remaining lead and antimony is removed, leaving only the recrystallized antimony doped germanium layer. These materials are easily etched away from the germanium by using a chemical etch consisting of one part -by volume of 100% acetic acid and one part by volume of 30% hydrogen peroxide. This etch attacks the antimony doped lead vigorously, but leaves the germanium substantially untouched. FIG. 6 shows the die after the lead antimony has been etched away and only the N+ germanium regrowth is left behind.

Referring back to FIGS. 2 and 3, the metal collector contact 22, alloyed to the bottom of the germanium die, is .187 inch in diameter by about .011 inch thick and is of gallium doped lead (0.2% Ga). In this alloying operation, the alloying temperature is somewhat higher than the temperature of the subsequent diffusion step used to form the active base region 27 of the transistor. Alloying at this higher temperature placed the regrowth region 31 of the collector contact deep enough so that no antimony which may dissolve in the collector alloy in a subsequent operation can diffuse into the region of the interface to any appreciable extent and thereby produce an undesirable structure. Had the collector contact been alloyed after the alloying diffusion process, the collector side of the die would have a diffused N layer produced by antimony vapor from this diffusion step. This layer would have to be etched off prior to collector alloying. However, with the collector alloyed prior to the diffusion operation, the N layer forms on the germanium surface of the collector side, but is easily removed by conventional electrolytic etch after assembly. The emitter of the device is alloyed in the next operation.

The alloyed ring emitter contact 23 is dimensionally .156 inch outside diameter, .089 inch inside diameter by .011 inch thick and this alloy metal is a lead alloy containing 0.8% gallium and 1.2% antimony. Alloying temperatures are approximately 800 C. and the amount of alloy used is such that at this temperature the emitter alloy penetrates completely through the base layer. Now this condition is shown in FIG. 7 in which the interface 37 of the germanium to the germanium-lead-antimonygallium solution 38 is shown below the extrinsic base region regrowth 35. The temperature is then reduced somewhat to establish a slight amount of alloy regrowth early in the cycle so that minor temperature variations will not cause the alloying front to advance and obliterate the thin base layer which is being diffused out of the regrowth region. Due to the double doping of the emitter alloy the regrowth will be strongly P-type since the segregation coefiicient of gallium is much greater than antimony.

Iowever, the regrowth will also be doped with antimony to the extent dictated by its concentration in the alloy and the segregation coefficient of antimony in the alloy system. Since antimony has a diffusion constant an order of magnitude greater than gallium, the antimony diffuses rapidly out ahead of the regrowth thus forming a base layer typically about 6 microns thick. This layer, of course, diffuses into and becomes connected to the relatively thick alloyed base layer. The diffusion cycle dictates the base thickness of the active region in the particular device as herein described; it is about one hour at about 800 C. but always less than the collector alloying temperature.

During the alloying diffusion process, gallium and antimony tend to become distributed over the entire surface of the structure and, of course, lead to the formation of an exceedingly thin P-type layer and a thicker N-type layer. lt is because vof this gallium migration that the base contact alloying must be postponed until a final step. Since traces of gallium in the base alloy will produce an unwanted structure in the base contact, a light chemical etch is used to remove the P layer prior to the base contact alioying. The base contacts are simply alloyed at about 600 C. to the base layer after a light etch to remove the above-mentioned P layer. In this device the outer base contact has about the same outside diameter as the germanium die, and both base contacts are separated about the emitter by about .015 inch. Both contacts are of .011 inch thick lead doped with 2% antimony. Thus, all contacts on this device are formed substantially of the element lead.

After the active element of the transistor has been cornpleted, it is assembled into a semi-finished device which consists of the assembly shown in FIG. 1 without the cap portion. It is then etched and washed.

Etching of the transistor to clean the junctions may be accomplished by electrolytic etching or by chemical etching although electrolytic etching is the preferred method. The collector etching procedure removes a rather substantial amount of germanium so that in cases where it is desirable to keep the base and emitter resistance as 10W as possible, it is desirable to mask olf the surface of the base region of the device with wax so that during the collector etching procedure the base is not etched. Subsequently, the procedure is to remove the wax from the base region and then etch lightly to clean up the emitter-base junction of the transistor. The device is then given a thorough washing in deionized water and is then dried and encapsulated.

In the encapsulation steps the active transistor element is finally encapsulated in a hermetically sealed package which has been thoroughly baked and back-filled. In the case of this transistor, it is then advantageous to use dry nitrogen rather than dry air to fill the region of the transistor enclosed within the can. Dry nitrogen tends to decrease leakage and increase the breakdown voltage on the collector-base junction because of the fact that when the high resistivity side of the junction is P-type, the effect of air (oxygen) on the surface states is such as to tend to favor device degrading channel or inversion layer formation. This completes the manufacture of the transistor insofar as assembly processes are involved. The device is given a final test to be sure that it meets necessary electrical and mechanical specifications and this cornpletes the manufacture of the transistor.

The most important advantages of this process is the use of the alloyed base layer in place of a diffused layer.v A diffused layer is a common method of supplying a connecting base layer between the active base region and the base contact. As previously pointed out, this diffused layer in some devices is at best no more heavily doped than the active base layer under the emitter. In the case of such a thin base device, this will lead to relatively high emitter to base resistance, that is, a high sheet resistance. Also the danger of over etching the base layer when cleaning up the emitter-base junction is very acute. In order to alleviate these problems, a separate diffused layer may be put on before alloy-diffusion and used in a similar manner to the alloyed layer. This procedure greatly improves the situation since a thicker layer may be used thus reducing the base-to-emitter resistance and also permitting a reasonable amount of emitter etching. However, the use of the alloyed layer of this invention is a decided improvement over the use of any diffused layer.

The use of the alloyed layer has three advantages over a diffused layer in the formation of the extrinsic base region:

(1) The impurity distribution in the alloyed layer is more nearly homogeneous instead of being graded in nature; therefore, the sheet resistance is much lower for a given layer thickness.

(2) The alloying step is much faster and cheaper than the diffusion step.

(3) Relatively thick layers may be produced quickly and easily.

The process step in which the collector contact is alloyed before the emitter alloying and diffusion step simplifies the processing of the device. If this were not asociaal;

done, the collector contact alloying would have to he preceded by the removal of an N layer produced during the diffusion. This means that an extra step as well as an extra variable on the depth of placement of the collector contact has been eliminated.

Alloying and soldering operations may be done with lead `or with other metals in such a manner that the final structure need have no metal with a melting point below 300 and this, of course, means that the device can he baked o u't at a relatively high temperature thus making transistor more stable during use at elevated tempaturs; j A j Typical characteristics of devices manufactured according to this invention are as llws Collector-emitter cutoff current,

ICES, VEBIO, VCESIIGO il. iiiilp- Collector-emitter breakdown voltage, j BVCEO ai, ma., IB--O VlS` Collector-to-emitter saturation voltage, VCEAT) at a., 13:1 3. dO Base-to-emitter saturation voltage, VBE(SAT) ai, a., IB=1 a. dO Switching times measured at 10:10 a.,

1321.0 a., VCE-220 V., IB (turn volts applied through 3 ohms:

Rise time Y v microseconds 2.0 Fall time do- 1.0 ,A Storage time do 3.0 Common emitter D`.C a short circuit forward current transfer-ratio current gain, hFg at IGf=l0 ai, VQ'z vi s s 55 mall signal current gain frequency cutol,

In the above table: is the basato-emitter voltage (D.C.) VCS is the collector-to-einitter voltage with base snorted to emitter, VCE ,is the collector-to-emitter voltage 4(D`.C.), BVCEO is the breakdown voltage with the collector to emitter reverse biased and the base open, OEO is the collector-cutoff current with the base open, IB is the base current (15.0.), and Ic is the collector current 'ru-ci.

The operational advantages of this transistor over conventional post-alloy-diifused transistors are many. Since the base resistance has been reduced, the saturated voltage drops between the base-to-emitter, VBMSAT), and the collector-to-ernitter, VCMSAT), are considerably lower. The

rise and fall times for the device used as, a switch are shorter, especially when the driving source for the device Aapproaches being a constant voltage source as is the case in most power switching circuits. The transconductance of the device, which is the rate of change of collector current with respect to an incremental change of base voltage, is improved and is much higher in devices manufactored according to this invention. Since the extrinsic base resistance of the device is extremely low, the collector resistivity may be made high enough so that a breakdown voltage (BVCFR) in excess of volts is achieved while still having improved values for the series resistance of this transistor and its closely related parameter VcEA-r) as compared to conventional post-alloydiffused types.

We claim:

1. A method of making transistor structures, comprising the steps of alloying impurity-bearing metal with a semiconductor wafer at one side thereof to form a thin alloy regrowth layer in said wafer in which impurity material of one conductivity type predominates, fusing ,an impurity element containing both donor and acceptor impurity materials to said regrowth layer to form an .alloyed electrode including a regrowth region which extends through said layer, the impurity material in said element of the conductivity type opposite to that predominating in said regrowth layer having a higher :segregaiQIl ,CQQQieut Aand a lower diffusion constant than the other impurity material in said element so that said regrowth region of said electrode is of said opposite conductivity type, diffusing impurities from said regrowth region into said layer and into the material or said water adjoining said regrowth region under said layer to form there a thin diused base region in which said other impurity material predominates and which merges into said regrowth layer, and providing electrical connections respectively to said regrowth layer and to said electrode and to the bulk material of said wafer. I

2. A method of making transistor structures, comprising the steps of all-oying impurity-bearing metal with a semiconductor wafer at one side thereof to form a thin 4alloy regrowth layer in said wafer in which impurity material of one conductivity type predominates, providing an impurity element containing bot-h donor and acceptor impurity materials, with the impurity material in said element of the same conductivity type as that predominating in said regrowth layer having a lower segregation coeilicient and a higher diiiusion constant than the other impurity material in said element, alloying said impurity element with a portion of said regrowth layer to form an electrode including a regrowth region which extends through said layer and in which said other impurity material predominates, diffusing impurities from said regrowth region into said layer and into the material of said wafer adjoining said regrowth region under said layer to form a thin diffused base region in which the impurity material `of said one conductivity type predominates and which merges into said regrowth layer, and providing electrical connections respectively to said regrowth layer and to said electrode and to the bulk material of said wafer.

3. A method of making transistor structures comprising the steps of alloying impurity-bearing metal with a semiconductor body at one side thereof to form a thin alloy regrowth layer in said body in which impurity material of one conductivity type predominates, fusing a collector ohmic contact to the opposite side of said semiconductor -body to provide a substantially ohmic :collector connection to said body, providing an impurity element containing both donor and acceptor impurity materials at the surface of said regrowth layer, the impurity material in said element of the conductivity type opposite to that of said regrowth layer having a higher segregation coeicient and a lower diffusion constant than the other impurity material in said element, subjecting said impurity element and said semiconductor body to a temperature above the alloying point of said element and said body and then lowering the temperature thereof to form an electrode including a regrowth region which extends through said regrowth layer and in which said one impurity material predominates, further heating said semiconductor body and said impurity element at a temperature below said alloying point to diffuse impurities from said regrowth region into said layer and into the bulk material of said wafer adjoining said regrowth region to form a diffused base region in which said other impurity material predominates and which merges into said regrowth layer, fusing at least one base contact to said regrowth layer to provide a low resistance connection to said base region through said regrowth layer, and providing electrical connections respectively to said emitter electrode and to said base contact and to said collector contact.

4. A method of making transistor structures including the steps of alloying impurity metal with a semiconductor wafer at one side thereof to form a thin alloy regrowth layer in said wafer bounded by a junction, fusing impurity-bearing material to the opposite side of said wafer to provide a substantially low resistance connection to said wafer, alloying an impurity element containing both donor and acceptor impurity material with a portion of said regrowth layer at a temperature suicient to form a regrowth region which extends through said layer, the

9 l@ impurity material predominating in said regrowth region References Cited bythe Examiner being of the conductiyity-type 'opposite to that of said UNITED STATES PATENTS regrowth layer, dlffusmg impurlties from said regrowth region into said layer and into the material of said wafer 2943006 6/1960 Henkeis 148`178 adjoining said regrowth region under said layer to form 5 3,029,170 4/1962 Lammmg 14S-178 a diffused base region of the same conductivity type as 3211594 10/1965 Andfes et al u 14S-"178 said layer, fusing impurity-bearing material to said alloy 3216871 11/1965 Kool et al' 148178 regrowth region to form at least one base contact, and l providing electrical connections respectively to said DAVID L' RECK Pllmmy Exammel' emitter electrode and said base contact and said collector 10 R. O. DEAN, Examiner. Contact.

Claims

1. A METHOD OF MAKING TRANSISTOR STRUCTURES, COMPRISING THE STEPS OF ALLOYING IMPURITY-BEARING METAL WITH A SEMICONDUCTOR WAFER AT ONE SIDE THEREOF TO FORM A THIN ALLOY REGROWTH LAYER IN SAID WAFER IN WHICH IMPURITY MATERIAL OF ONE CONDUCTIVITY TYPE PREDOMINATES, FUSING AN IMPURITY ELEMENT CONTAINING BOTH DONOR AND ACCEPTOR IMPURITY MATERIALS TO SAID REGROWTH LAYER TO FORM AN ALLOYED ELECTRODE INCLUDING A REGROWTH REGION WHICH EXTENDS THROUGH SAID LAYER, HE IMPURITY MATERIAL IN SAID ELEMENT OF THE CONDUCTIVITY TYPE OPPOSITE TO THAT PREDOMINATING IN SAID REGROWTH LAYER HAVING A HIGHER SEGREGATION COEFFICIENT AND A LOWER DIFFUSION CONSTANT THAN THE OTHER IMPURITY MATERIAL IN SAID ELEMENT SO THAT SAID REGROWTH REGION OF SAID ELECTRODE IS OF SAID OPPOSITE CONDUCTIVITY TYPE, DIFFUSING IMPURITIES FROM SAID REGROWTH REGION INTO SAID LAYER AND INTO THE MATERIAL OF SAID WAFER ADJOINING SAID REGROWTH REGION UNDER SAID LAYER TO FORM THERE A THIN DIFFUSED BASE REGION IN WHICH SAID OTHER IMPURITY MATERIAL PREDOMINATES AND WHICH MERGES INTO SAID REGROWTH LAYER, AND PROVIDING ELECTRICAL CONNECTIONS RESPECTIVELY TO SAID REGROWTH LAYER AND TO SAID ELECTRODE AND TO THE BULK MATERIAL OF SAID WAFER.