US3133190A - Universal automatic computer utilizing binary coded alphanumeric characters - Google Patents
Universal automatic computer utilizing binary coded alphanumeric characters Download PDFInfo
- Publication number
- US3133190A US3133190A US279713A US27971352A US3133190A US 3133190 A US3133190 A US 3133190A US 279713 A US279713 A US 279713A US 27971352 A US27971352 A US 27971352A US 3133190 A US3133190 A US 3133190A
- Authority
- US
- United States
- Prior art keywords
- input
- group
- trains
- adder
- binary coded
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49905—Exception handling
- G06F7/4991—Overflow or underflow
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49942—Significance control
- G06F7/49947—Rounding
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Optimization (AREA)
- Mathematical Analysis (AREA)
- Computational Mathematics (AREA)
- Color Printing (AREA)
- Optical Record Carriers And Manufacture Thereof (AREA)
- Calculators And Similar Devices (AREA)
Description
May 12, 1964 J. P. EcKERT, JR.. ETAL 3,133 190 UNIVERSAL AUTOMATIC COMPUTER UT BINARY CODED ALP ILIZING HANUMERIC CHARACTERS 110 Sheets-Sheet l Filed March 31, 1952 IN VEN T ORS -J. PRESPER ECKERT, JR. JAMES R. WEINER ROBERT F. SHAW H. FRAZ; WELSH ATTORN Y 22.2 *man man 00a mha ohm mwa own non onu nvm ovm mmm ont Own n n. O n nu O o o Q oo o Oooooo o`QOoo Oc O O- O OoO Oo O 6-O o oo o 0o0* c oOoT. O O -ooooooo* z. m H o M o u m T wmmmomoz. mmxl omo; o mmaz|u m rn o o oo` oooo o ooo oo oo oo oco o ooo o O o ooo c ocoo Ooo o o o,o oo oo*oooooon May l2, 1964 J. P. ECKERT, JR.. UN IVERSA ET AL 3,133,190 L AUTOMATIC COMPUTER UTILTZING BINARY CODED ALPHANUMERIC CHARACTERS 110 Sheets-Sheet 2 Filed March 31, 1952 IN V EN TORS RR EEWW. Y www... EESW M Rw-P. nmrmm SSR A EEERKM RMB May 12, 1964 J. P. EcKERT, JR., ETAL 3,133,190 UNIVERSAL AUTOMATIC COMPUTER UTILIZING BINARY CODED ALPHANUMERIC CHARACTERS Filed March 51. 1952 110 Sheets-Sheet 3 Ffa. 4 d
ADDEND DA B s2 suu AuGENo DB B l CARRY INVENTORS -J. PREsPeR Ecken?. JR. H6 G1 JAMES kwamen ROBERT F. SHAW H. FRAZER WELSH BY ATTORN Y May 12, 1964 Filed March 3l, 1952 P. E AL UNIVERSAL AUTOMATIC COMPUTER UTILIZING HANUMERIC CHARACTERS SuM.
BINARY CODED ALP CKERT JR.. ET
o" 19N gg cf C? o m u m h t m u 1 'f 4 rf- :l D o. n Z E INVENTORS J. PRESPER ECKERT. JR. JAMES R. wElNER ROBERT F. SHAW H. FRAZER WELSH BY ATTORN Y May 12, 1364 J. P ECKERMR. ETA 3,133,190
L UNIVERSAL AUTOMATIC COMPUTER UTILIZING BINARY CODED ALPHANUMERIC CHARACTERS Filed March 51, 1952 110 Sheets-Sheet 5v vJ. PRESPER ECKERT, JR.
JAMES R. WEINER ROBERT F. SHAW`l H. FRAZER WELSH Al 'I'ORN Y May 12, 1964 I I J. P. EcKERT, JR.. z-:TAL 3,133,190
UNIVERSAL AUTOMATIC COMPUTER UTILIZING BINARY CODED ALPHANUMERIC CHARACTERS Filed March 51, 1952 110 Sheets-Sheet 6 FROM X-REGISTER FROM X-REGISTER FROM HSB IN V EN TORS -J. PRssPl-:R ECKERT, JR.
JAMES R. wElNl-:R ROBERT F. SHAW H. FRAZER WELSH BV /geql ATTORN Y May 12, 1964 J. P. EcKERT, JR., ETAL 3,133,190 UNIVERSAL AUTOMATIC COMPUTER UTILIZING BINARY CODED ALPHANUMERIC CHARACTERS Filed March 3l. 1952 110 Sheets-Sheet '7 J. PRESPER ECKERT, JR.
JAMES R. WEINER ROBERT F. SHAW H. FRAZER WELSH AIIORN Y May 12,1964 3,133,190
v OMPUTER UTILIZING HANUMERIC CHARACTERS 11o sheets-sheet 8 INVENTORS J. PRESPER ECKERT. JR JAMES n. wElNl-:R ROBERT F. SHAW H. FRAzlE/R wELsH XZWATTORNY ay 64 UNIVERJLPLELZIIT' JR" ETAL 3,133,190
COMPUTER UTILIZING BINARY CODED ALPHANUMERIC CHARACTERS 110 Sheets-Sheet 9 Filed March 3l, 1952 v INVENToRs J. Presper Eckert, Jr. James R. Weiner Rober? F. Shaw N mm1 EDE H. Frazer Welsh ATTORNEY May 12; 1964 J. P. ECKERT, JR.. ETAL 3,133,190
UNIVERSAL AUTOMATIC COMPUTER UTILIZING BINARY coDEn ALPHANUMERIG CHARACTERS INVENTORL PREsPeR Eck/ERT, dR. MM5-s R. wrm/5R Rasur F. SHAW *Lf-RAZER WELSH May 12, 1964 J. P. EcKER-r, JR., l-:TAL
UNIVERSAL AUTOMATIC COMPUTER UTILIZING BINARY CODED ALPHANUMERIC CHARACTERS Filed March 5l, 1952 110 Sheets-Sheet 11 vF/G. 76
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fmof uuRH J. P. EcKERT, JR., ETAL. 3,133,190 UNIVERSAL AUTOMATIC COMPUTER uTTLTzING BINARY CODED ALPHANUMERIC CHARACTERS May l2, 1964 110 Sheets-Sheet 12 Filed March 31, 1952 May 12, 1964 J. P. ECKERT, JR.. ETAL 3,133,190
UNIVERSAL AUTOMATIC COMPUTER UTILIZING BINARY CODED ALPHANUMERIC CHARACTERS Filed March 51. 1952 110 Sheets-Sheet 13 al am F/67 AIl LNVENTORS (/.PResPE/a EcKERL'dR JAMES R. v5/NER Rosa/a1' F. vmw- H. FRAzER WELSH JR., ETAL 3,133,190 L AUTOMATIC COMPUTER UTILIZING BINARY CODED ALPHANUMERIC CHARACTERS May 12, 1964 J. P. EcKERT,
UNIVERSA 110 Sheets-Sheet 14 Filed March 3l, 1952 /N VEN 70H5 -.l. PRESFER 5c Ksxr, JA. JRMEs k. WEI/VEA7 RaaERr F. SHA w 'h'. FRAZER WEI-f NN .QQ
A T'ORNE'Y May 12, 1964 .1. P. EcKERT, JR., ETAL 3,133,190
UNIVERSAL AUTOMATIC COMPUTER UTILIZING BINARY CODED ALPHANUMERIC CHARACTERS Filed March 3l, 1952 110 Sheets-Sheet 15 cf@ 50/ l CFI INVENTOR` z/.PRESPER ECKERL-un. JA/wss n, wem/ER Rossm- F. sHAw H. FRAzEre WELS BY er an/Ey FIG. 79'
May 12, 1964 J. P. EcKERT, JR., ETAL 3,133,190 UNIVERSAL AUTOMATIC COMPUTER UTILIZING BINARY CODED ALPHANUMERIC CHARACTERS 110 Sheets-Sheet 16 Filed March 5l, 1952 IN VEN TORA` d. PRESPER ECKER; dR. L/AME.: R. wE/NER RQBERT F. SHAW H. FRHZER WELSH H ORNEY J. P. EcKERT, JR.. ETAL 3,133,190 UNIVERSAL AUTOMATIC COMPUTER UTILIZING BINARY coman ALPHANUMERIC CHARACTERS l 110 Sheets-Sheet 1? May l2, 1964 Filed March 51. 1952 M W .1.5K
J. P. ECKERT, JR.. ETAL. UNIVERSAL AUTOMATIC C May 12, 1964 3,133,190 i oMPuTER UTILIZING BINARY coDED ALPHANUMERIC CHARACTERS Filed March 31, 1952 11C Sheets-Sheet 1 8 .Arron/@Y May 12, 1964 J. P. ECKERT, JR.. ETAL 3,133,190
UNIVERSAL AUTOMATIC COMPUTER UTILIZING BINARY CODED ALFHANUMERIC CHARACTERS 110 Sheets-Sheet 19 Filed March 3l, 1952 May 12, 1964 J. P. EcKERT, JR.. ETAL 3,133,190
UNIVERSAL AUTOMATIC COMPUTER UTILIZING BINARY CODED ALPHANUMERIC CHARACTERS 110 Sheets-Sheet 2O Filed March 31, 1952 R sw, w w mem N N2 u man mw N ws l R R A E R F E E E Mmm MMR. I v. B W mwx u 36k lh-IJ n. l
Claims (1)
1. THE COMBINATION COMPRISING A FULL BINARY ADDER FOR OPERATING ON TRAINS OF ELECTRICAL SIGNALS REPRESENTATIVE OF ALPHABETICAL AND NUMERICAL INFORMATION; EACH OF SAID TRAINS COMPRISING A FIRST GROUP OF PULSE POSITION REPRESENTING BY THE COMBINATIONS OF PULSES PRESENT AND ABSENT IN INDIVIDUAL POSITIONS OF SAID GROUP INFORMATION OF DIFFERENT RELATIVE VALUES AND A SECOND GROUP OF PULSE POSITIONS INDENTIFYING BY THE ABSENCE OF PULSES THEREFROM INFORMATION REPRESENTED BY SAID FIRST GROUP AS NUMERICAL AND IDENTIFYING BY THE PRESENCE OF PULSES THEREIN THE INFORMATION REPRESENTED BY SAID FIRST GROUP AS ALPAHABETICAL SAID ADDER HAVING A FIRST INPUT, A SECOND INPUT, AND AN OUTPUT; MEANS FOR APPLYING A FIRST TRAIN OF ELECTRICAL SIGNALS TO SAID FIRST INPUT; MEANS FOR APPLYING A SECOND TRAIN OF ELECTRICAL SIGNALS TO SAID SECOND INPUT; A BYPASS NETWORK CONNECTING SAID INPUTS AND SAID OUTPUT; A FIRST MEANS INTERPOSED BETWEEN SAID FIRST INPUT OF THE ADDER AND SAID BYPASS NETWORK FOR DETECTING THE PRESENCE OF PULSES IN THE SECOND GROUP OF PULSE POSITIONS IN FIRST TRAINS OF ELECTRICAL SIGNALS APPLIED TO SAID FIRST INPUT TO CASE SAID FIRST TRAINS OF SIGNALS TO BE BYPASSED AROUND SAID ADDER; AND A SECOND MEANS INTERPOSED BETWEEN SAID SECOND INPUT OF THE ADDER AND SAID BYPASS NETWORK FOR DETECTING THE PRESENCE OF PULSES IN THE SECOND GROUP OF PULSE POSITIONS IN SECOND TRAINS OF ELECTRICAL SIGNALS APPLIED TO SAID SECOND INPUT TO CAUSE SAID SECOND TRAINS OF SIGNALS TO BE BYPASSED AROUND SAID ADDER.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US279713A US3133190A (en) | 1952-03-31 | 1952-03-31 | Universal automatic computer utilizing binary coded alphanumeric characters |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US279713A US3133190A (en) | 1952-03-31 | 1952-03-31 | Universal automatic computer utilizing binary coded alphanumeric characters |
Publications (1)
Publication Number | Publication Date |
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US3133190A true US3133190A (en) | 1964-05-12 |
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US279713A Expired - Lifetime US3133190A (en) | 1952-03-31 | 1952-03-31 | Universal automatic computer utilizing binary coded alphanumeric characters |
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Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3244862A (en) * | 1958-08-07 | 1966-04-05 | Itt | Earth navigational system |
US3244866A (en) * | 1961-12-26 | 1966-04-05 | Ibm | High to low order arithmetic calculator |
US3257645A (en) * | 1962-09-21 | 1966-06-21 | Gen Precision Inc | Buffer with delay line recirculation |
US3278731A (en) * | 1963-12-18 | 1966-10-11 | Rca Corp | Multiplier having adder and complementer controlled by multiplier digit comparator |
US3278733A (en) * | 1962-12-10 | 1966-10-11 | Burroughs Corp | Adding and subtracting unit for a digital computer |
US3309671A (en) * | 1962-09-04 | 1967-03-14 | Gen Precision Inc | Input-output section |
US3502853A (en) * | 1960-02-12 | 1970-03-24 | Gen Electric | Data processing system |
US3508037A (en) * | 1967-01-30 | 1970-04-21 | Sperry Rand Corp | Decimal add/subtract circuitry |
US20130176068A1 (en) * | 2012-01-10 | 2013-07-11 | Mitsumi Electric Co., Ltd. | Sensor output correction circuit, sensor output correction device, and sensor output correction method |
US11206146B2 (en) * | 2019-08-01 | 2021-12-21 | University Of Kentucky Research Foundation | Architecture for generating physically unclonable function response |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2199537A (en) * | 1934-05-10 | 1940-05-07 | Ibm | Multiplying machine |
US2304495A (en) * | 1941-05-17 | 1942-12-08 | Ibm | Multiplying machine |
US2580768A (en) * | 1947-08-14 | 1952-01-01 | Ibm | Data look-up apparatus for computing or other machines |
US2772050A (en) * | 1949-06-22 | 1956-11-27 | Nat Res Dev | Electronic digital computing machines |
-
1952
- 1952-03-31 US US279713A patent/US3133190A/en not_active Expired - Lifetime
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2199537A (en) * | 1934-05-10 | 1940-05-07 | Ibm | Multiplying machine |
US2304495A (en) * | 1941-05-17 | 1942-12-08 | Ibm | Multiplying machine |
US2580768A (en) * | 1947-08-14 | 1952-01-01 | Ibm | Data look-up apparatus for computing or other machines |
US2772050A (en) * | 1949-06-22 | 1956-11-27 | Nat Res Dev | Electronic digital computing machines |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3244862A (en) * | 1958-08-07 | 1966-04-05 | Itt | Earth navigational system |
US3502853A (en) * | 1960-02-12 | 1970-03-24 | Gen Electric | Data processing system |
US3244866A (en) * | 1961-12-26 | 1966-04-05 | Ibm | High to low order arithmetic calculator |
US3309671A (en) * | 1962-09-04 | 1967-03-14 | Gen Precision Inc | Input-output section |
US3257645A (en) * | 1962-09-21 | 1966-06-21 | Gen Precision Inc | Buffer with delay line recirculation |
US3278733A (en) * | 1962-12-10 | 1966-10-11 | Burroughs Corp | Adding and subtracting unit for a digital computer |
US3278731A (en) * | 1963-12-18 | 1966-10-11 | Rca Corp | Multiplier having adder and complementer controlled by multiplier digit comparator |
US3508037A (en) * | 1967-01-30 | 1970-04-21 | Sperry Rand Corp | Decimal add/subtract circuitry |
US20130176068A1 (en) * | 2012-01-10 | 2013-07-11 | Mitsumi Electric Co., Ltd. | Sensor output correction circuit, sensor output correction device, and sensor output correction method |
US9268973B2 (en) * | 2012-01-10 | 2016-02-23 | Mitsumi Electric Co., Ltd. | Sensor output correction circuit, sensor output correction device, and sensor output correction method |
US11206146B2 (en) * | 2019-08-01 | 2021-12-21 | University Of Kentucky Research Foundation | Architecture for generating physically unclonable function response |
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