US3120651A - Traffic adjusted traffic control systems - Google Patents

Description

Feb. 4, 1964 v G. DuHENDRlCKS TRAFFIC ADJUSTED TRAFFIC CONTROL SYSTEMS s Sheets-Sheeti Filed Dec. 4, 1958 u S W S 8 mm 67 V W m E II C C H m m L L O 1 N m R m M OY u m W C B U 0 n nm 0 w n w I a 0 w s W mruo L N c B 2 c L .lisil\ Lu il 1 l -1 Sm? l C C 5 T C; C D o v C C W H L G L R .Y E O-HTT r L m Q m R w OTDO NGYE 5 T M S C .ITT AN MFI-U AR 5 C O REM G C .L l- ETDC .L s A 5 k DD v ll BY 5 a ATTORNEY FIG.|

Feb. 4, 1964 G. D. HENDRICKS 3,120,651

TRAFFIC ADJUSTED TRAFFIC CONTROL SYSTEMS Filed Dec. 4, 1958 5 Sheets-Sheet 2 SOUTHBOUND TRAFFIC DENSITY COMPUTER LG 2 5K [if gig:- ST 2 8 3 ST 4 v ST 5 STQ LC Jib Ji D4 I ol l EASTBOUN 0ND); /|2 D I3 ,l5 a wesreouuo 3'33 I EH JESSE? g b ll 4 I I DI COMPUTER NORTHBOUND D l4 NC TRAFFIC E C DENSITY w c COMPUTER I MASTER cc\ INVENTOR. F 2 SSQ AE G, DONALD HENDRICKS I BY MC V 2%, M44

ATTORNEY Feb. 4, 1964 Filed Dec.

EASTBOUND TRAFFIC osusmr COMPUTER G. D. HENDRICKS TRAFFIC ADJUSTED TRAFFIC CONTROL SYSTEMS 5 Sheets-Sheet 3 ADD WESTBOUND TRAFFIC DENSITY COMPUTER Diwa NO RTI'EOUNDF T RAFF IO CIRCUIT LEVEL one c'ron:

OYOLE GENERATOR AND SELECTOR BALANCE DETECTOR DENSITY COMPUTER SOUTHBOUND TRAFFI O DENSITY COMPUTER FIG.3

I B D BALANCE DETECTOR RATIO DETECTOR RATIO DETECTOR S LIT -$ELEOTOR OFFSET SELECTOR 08 INVENTOR.

' G. DONALD HE NDRIGKS ATTORNEY Feb. 4, 1964 G. D. HENDRICKS 3,120,651

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l B05 INVENTOR. 2 e. DONALD HENDRICKS TEGTORS 2 BY BLOCKING ,1 h c, M4414 OSOILLATORS ATT O RNE Y Feb. 4, 1964 e. D. HENDRICKS TRAFFIC ADJUSTED TRAFFIC CONTROL SYSTEMS 5 Sheets-Sheet 5 Filed Dec. 4, 1958 VOLTAGE RATIO C C-\ DIVIDERS OETEOTORs EAST-WEST GREATER VDI 1 SLAVE FLOOR 'BALANGE GEN. DETECTOR RELAY 26 FG B D NORTH-SOUTH cmcun LESSER I VD 3 SR F I G Y 6 uoRTIIsouTII GREATER R04 B D I l I SIMULTANEOUS OPERATION EWI L 9 I I I SO I GREATER DC.RATIO VOLTAGE 6, DIVIDER DETECTOR l I v02 ROz '-I FLOOR BALANCE FFSET 1 REAL OETscTpR SELECTOR ""1 /f F6 BD VOLTAGE LESSER 08 DIVJBIE R 0.0. RATIO DETECTOR NSI/ RDI use INVENTOR.

G. DONALD HEN DRICKS ATTORNEY United States Patent 3,120,651 TRAFFIC ADEUSTED TRAFFIC CONTRGL SYSTEMS George Donald Hendricks, Camphells Island, Ill, assrgnor, by mesne assignments, to The Gamewell Company, Newton, Mass, a corporation of Delaware Filed Dec. 4, 1958, Ser. No. 77 8,199 14 Claims. (Cl. 340-35) This invention relates to a completely integrated trafiic control system in which the operation of all local intersection controllers within a grid of intersecting streets or along a thruway is governed by a master controller from information received from a multiplicity of traffic detectors located at the various entrances to the grid or thruway.

Heretofore, local controllers governing traflic on a grid of intersecting streets have had their trafiic cycles altered from a master controller governed by a time clock. The program of change from one cycle length, split, or offset to another was set up on a multi-channel program timer and effected at the local controller over a multi-conductor cable or single channel pulsing type control.

It is also known to sample trafiic along a thoroughfare and from this data change cycle length and/ or preferential offset at the local controllers along the thoroughfare. Known systems disregarded traffic on intersecting streets.

The invention intends to overcome the disadvantages of both systems noted above. It proposes to relate change or" cycle length, split, and offset to actual rather than estimated traffic conditions, and to actual traffic conditions on a plurality of intersecting streets Within a grid, rather than on a single street. It employs a plurality of traffic density computing devices to determine the volume of traflic in each direction on a number of intersecting streets within the grid. In another form it samples trafiic on two intersecting thoroughfares and then sets the traffic pattern for the surrounding grid. In another form it samples traflic entering and leaving a thruway and sets the traffic pattern at the entrances thereof.

Although no known traffic control system is able to accomplish all the purposes of this invention, various devices are available which are able to accomplish one or the other steps of this invention. Traffic cycle length, which is defined as the duration of a cycle of signals from the beginning of one main street right-of-way interval to the beginning of the next main street right-of-way interval, has been altered to meet actual conditions by a trafiic cycle length selector disclosed in United States patent application No. 771,256 by George Donald Hendricks, filed Nov. 3, 1958, now US. Patent 3,047,838.

Traffic cycle split, which is defined as the percentage relationship between right-of-way time allotted to main street and to cross street traffic, has been made to agree with actual traffic volumes by a traffic cycle split selector disclosed in United States patent application 742,160, filed June 16, 1958.

Trafiic cycle offset is defined as the percent relationship between the beginning of the main street right-of-way period at one intersection with respect to the same indication at the master controller, and has been made to vary with traffic volume in a traffic cycle offset selector disclosed in United States patent application 768,193, filed October 20, 1958.

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The novel feature of this invention is its ability to vary the complete traffic pattern with respect to actual traffic conditions on a network of streets. The invention samples traffic flow at a number of points on streets leading into the grid and computes the volume of traffic in each of four directions. The volumes of traflic in each direction are weighed to determine their individual value and compared to determine their relative value, and the various patterns of operation are determined therefrom. The changes from the previous pattern are then effected at the local controllers over an interconnecting cable or channel.

Normally, a city has a number of areas in which traffic moves best when the signals at the various intersections in the areas are integrated. Such an area may encompass a number of city blocks in each direction, as in the downtown district, or may include a thoroughfare and a number of parallel and intersecting streets. The network of streets is herein referred to as a grid. In many cases traflic on two or more main intersecting streets predomi nates, and traffic on other streets is secondary. If traffic can be controlled efficiently on the main intersecting thoroughfares, it is much less a problem on the secondary streets. The invention is intended to alter the pattern of trafiic signals over an area based on multiple samples of traffic in all four directions on two or more intersecting thoroughfares. The signals are controlled and changed by local traffic controllers of the type described in United States patent application 642,469 entitled Multiple Pro gram Traffic Control Systems.

The invention also provides a solution to the problem that arises during a rush hour when a number of factories and shops located along a thoroughfare close at the same time. Large numbers of vehicles leave the parking areas in close succession and heavily tax the highway facilities. The traffic actuated detectors signal the traffic volume computers whose output builds up to the new level gradually over a period which may take six minutes. The computers in turn signal the cycle length, split, and offset selectors which make the necessary changes in the trafiic signal pattern. The new cycle length is put into effect immediately, and the new cycle split is effective with the first cross street portion of the cycle, but the ofiset may take up to 5 minutes to be completed at those controllers requiring the greatest degree of adjustment. By the time these automatic adjustments are made the traffic rush has ceased. To meet this unusual but daily repeated condition, the master controller is equipped with a supplemental program timer of the type shown in Patent 2,832,071 to supplement the trafiic adjusted pattern.

After a period of time sufficient to permit the computers to respond to actual traffic volume and the local offset control means to adjust to the new offset, the program timer becomes ineffective because the output of the computers exceeds the output of the program timer. Control thus resides with the traffic adjusted computers.

Objects It is the principal object of the invention to provide apparatus for a traffic control system which takes multiple samples of traflic moving in both directions along two or more intersecting thoroughfares and regulates the traffic pattern accordingly.

Another object of the invention is to provide apparatus to sample trafiic at diverse points and compute a composite traffic volume therefrom.

Another object of the invention is to provide apparatus which will select the highest traffic volume in any of four directions of trafiic and determine cycle length according ly.

Another object of the invention is to provide apparatus which will select the higher traffic volume in each of two intersecting directions and determine the split of the traffic cycle between the two intersecting directions relative to the higher volume of trafiic in each direction.

Another object of the invention is to provide apparatus which will select the highest traffic volume in any of four directions and the trafiic volume in the opposite direction on the same street and determine progressive offset for the direction having highest traffic volume.

Another object of the invention is to provide a master controller comprised of the above apparatus which determines cycle length, split, and offset best adapted for traffic conditions in an entire area, and control means to energize one or more channels interconnecting a group of local controllers with the master controller to effect the plan of operation.

Another object is to provide a master controller adapted to control local controllers of the type disclosed in patent application 642,469 to thus effect the desired changes in signal pattern.

Another object is to provide a master controller that transmits to each local controller a cycle length determining signal frequency related to trafiic volume.

Another object is to provide a program timer in a traffic adjusted master controller to supplement the truths adjusted portion.

Figures The invention will be described in connection with the following drawings in which like reference characters designate the same or similar parts in the various views.

FIGURE 1 is a plan view of two intersecting thoroughfares with parallel intersecting secondary streets, trafiic detectors mounted in all or most of the lanes of the thoroughfares, a plurality of traffic density computers, a master controller, and local trafiic signal controllers interconnected with a multi-conductor cable.

FIGURE 2 is a plan view of a grid system of intersecting streets, trafiic detectors mounted therein, a group of trafiic density computers, a master controller, and local traffic controllers connected to the master with a cable.

FIGURE 3 is a block diagram of the master controller showing detectors, computers, voltage detectors, balance and ratio detectors, level detector and various function selectors.

FIGURE 4 is a block diagram of one of the traffic density computers.

FIGURE 5 is a block diagram of an add circuit, and a group of level detectors used to control a group of cycle generators which determine cycle length.

FIGURE 6 is a block diagram of the balance and ratio detectors used to compare trafiic density on the main thoroughfare with that on the intersecting thoroughfare and to select the proper traffic cycle split.

FIGURE 7 is a block diagram of the balance and ratio detectors used to compare densities in two directions on the more heavily traveled thoroughfare and to select the proper offset.

Thoroughfare S stem One application of the invention is shown in FIGURE 1. Two main thoroughfares are shown at their intersection. Secondary streets parallel to each of the thoroughfares also intersect forming a grid. Local trafiic signal controllers are shown at each intersection. The controllers are electrically interconnected with a control circuit to permit control of the cycle length, offset, and split for 4 most efiicient flow of traffic on both the main thoroughfares and on the secondary streets.

Some distance from the main intersection trafiic actuated detector devices are located in, on, above, or along all the lanes in both thoroughfares. In this description pressure sensitive traffic detectors are used because they are easy to represent and describe. However, any of the well known detectors may be used without departing from the spirit of the invention. These include for example, magnetic, electrostatic, photoclectric, radar, and infrared.

Traffic approaching the main intersection is permitted to control the trafiic signals within the entire grid. It is assumed that a greater number of vehicles will travel along the thoroughfares than on the secondary streets and that a trafiic signalling system permitting eflicicnt movement of traffic at the main intersection will best serve trafiic movement in the grid including the secondary streets.

It is important to the accuracy of the system that detectors be located in all heavily traveled lanes leading to the representative intersection and preferably in all of the lanes. Lanes not detected reduce the accuracy of the traffic density computers.

As shown in FIGURE 1, the eastbound lanes of the main thoroughfare MT are provided with detectors Dl-D3, and the westbound lanes with detectors D6D"tl. The northbound lanes of the cross thoroughfare CT are sampled with detectors DIE-D13, and the southbound lanes with detectors DIG-DIS. Each detector D1 to D18 consists of two plates mounted in the pavement, the bottom plate being electrically and mechanically grounded, and the upper plate insulated from ground. Upon passage of a vehicle over the upper plate of detector D1, for example, a circuit is established to ground over conductor l. Passage of a vehicle over any one of the eastbound detectors D1-D3 grounds a circuit in the main thoroughfare eastbound traffic density computer EC.

Passage of a vehicle over anyone of the westbound detectors Dee-D8 grounds a circuit in the main thoroughfare westbound trafiic density computer WC.

Passage of a vehicle over northbound or southbound detectors D11-D13, D16Dlfl, grounds a circuit in the cross thoroughfare northbound or southbound traffic density computers NC or SC, respectively.

Traffic density computers EC, WC, NC, SC receive signals from their respective detectors, amplify the signals, reduce the number of signals by a factor of two, give the remaining signals a definite duration, integrate the number of signals over a short interval, again integrate the number of signals over a long interval, and develop a direct current potential proportional to the running average of traffic density in that direction. The complete computer circuit is disclosed and explained fully in United States patent application 738,327, entitled Traffic Lane Control, filed May 28, 1958.

The output of the traffic density computers is available for a variety of purposes. In the present invention the outputs are used to determine traffic cycle length, to

provide progression, and to determine the proper split of trafiic cycle time between the main thoroughfare and.

the cross thoroughfare.

In the master controller MC the outputs of the various traflic volume computers may be applied in a variety of ways to produce different results. One method of applying the computer outputs is shown in FIGURE 3 and described in detail in a later section. Normally, the computer outputs representative of trafiic density in each direction are utilized to select a cycle length, split, and offset to permit most efficient traffic flow. The electric signals required to effect the cycle changes at the local controllers LC are transmitted over an interconnecting cable CC or other channel. The local controllers LC are of the type adapted to make whatever changes in their timing is demanded by the master controller. An example of this type of equipment is found in United States patent application 642,469, entitled Multiple Program Traffic Control Systems, filed February 26, 1957. Various portions of the local controller are explained in detail in the above named patent applications.

Grid System The preferred application of the invention is shown in FIGURE 2 as: employed with a grid system of a plurality of streets ST1ST3 normal to another plurality of streets ST 4-816. The streets are shown as two-way thoroughfares but may be the less common one-way streets or any combination thereof.

Each signalized S intersection is equipped with a local traffic controller LC which may be either pretimed or traffic actuated or any combination thereof. =For purposes of illustration, pretirned controllers are used. To simplify nomenclature, the drawing is oriented to the north and the various lanes are named after the direction of traffice moving thereon: northbound, southbound, eastbound, and westbound.

Traffic actuated detector devices D1-D20 are located in, or, above, or along the lanes of travel on a number of representative streets in each direction. Again, pressure sensitive traffic detectors are used byway of illustration but any of the well known types of detectors may be used.

The lanes chosen for traffic sampling purposes must preferably be representative of the major portion of streets running in that direction. In FIGURE 2, six streets are illustrated with traffic detectors in each lane of eastbound, westbound, northbound, and southbound trailic. To count most accurately and to anticipate changing traflic conditions as they occur, it is preferred that the traffic detectors be located at the entry points to the grid.

Each of the eastbound traffic detectors D1-D5 feed in to individual circuits of the eastbound traffic density computer EC.

Each of the westbound traffic detectors D6-Dl feed in to individual circuits of the westbound traffic density computer WC.

Each of the northbound traflic detectors Bil-D feed in to individual circuits of the northbound trafiic density computer NC.

Each of the southbound traffic detectors Dl6-D2tl feed in to individual circuits of the southbound traffic density computer SC. It is important to the accuracy of the system that detectors be located in all heavily traveled lanes in the representative streets and preferably in every lane. Lanes not detected reduce the accuracy of the trfic density computation.

Passage of a vehicle over any eastbound detector D1- Dti grounds a circuit in the eastbound traffic density computer EC over conductor L5.

Passage of a vehicle over any westbound detector D6 Dlfl grounds a circuit in the westbound traffic density computer WC over conductor 6-10.

Passage of a vehicle over any northbound detector DlLDlS grounds a circuit in the northbound trafiic density computer NC over conductor 1145.

Passage of a vehicle over any southbound detector Dl6D2tl grounds a circuit in the southbound traffic density computer SC over conductor l6 2fl.

The operation of the traffic density computers NC, SC, EC, and WC is identical to that described above. The function of each computer is to develop a potential substantially proportional to traffic density for that direction of travel averaged over the running integrating interval.

The output of each computer is fed to the master controller MC which contains apparatus designed to determine the optimum cycle length, offset, and split for best traffic movement. The output of the eastbound and westbound computers may be compared to determine the higher and also compared as to ratio to determine which direction may be given the advantage of the offset. The output of the northbound and southbound computers may be compared similarly to determine offset. In the event the offsets in intersecting directions are incompatible for good traffic progression, the street having the higher density is awarded the offset and the signals in the intersecting direction set accordingly.

' For the purpose of determining split the two higher densities determined above are compared. The total traffic cycle is divided in the same proportion as the ratio of the two higher densities.

To determine cycle length the two higher densities determined above are added and the cycle length set accordingly. A longer traffic cycle is needed for heavy traffic moving in intersecting directions than in only a single direction. A cycle generator and selector within the master controller MC develops a frequency inversely proportional to cycle length. This signal frequency is transmitted over one conductor and the common return conductor in the interconnecting cable CC to all local controllers LC. The local controllers are of the type designed to utilize the signal frequencies to determine cycle length.

Other control conductors within the control cable CC are employed to make effective the various offsets and splits at each local controller LC.

Thus the cycle length, split, and offset at each of a plurality of local traffic signal controllers within a grid of intersecting streets is made to conform to traflic flowing on the intersecting streets.

The Zl Iaster Controller A block diagram of one form of the master traffic controller MC is shown in FIGURE 3. Four traffic density computers EC, WC, NC, and SC are employed to measure the flow of traffic in each direction on a plurality of east-west streets and in each direction on a plurality of north-south streets, in that order. Each computer is normally constructed to receive signals from five detectors. The signals received from the detectors are averaged in the trafiic density computers EC, WC, NC, SC, which develop an output proportional to the running average of traflic volume in that direction. The master controller then compares these outputs representative of traffic volume and determines a pattern of traffic flow best suited to traflic conditions at the time. The pattern is imposed on the local controllers which continue to function on that pattern until a new one is imposed.

The pattern of operation is imposed on the local controllers LC by transmitting over one conductor within control cable CC a frequency that determines the speed of a synchronous timing motor in each controller and over other conductor signals that determine traffic cycle split and offset. The synchronous motor drives a timing dial which makes one revolution to time a complete cycle of traflic signal change. The split and offset control conductors energize and de-energize relays in the local controllers which in turn make one of a number of splits and offsets effective.

The output developed by the computers in the preferred form of the invention is a direct current potential whose voltage corresponds with traffic volume. In other forms of the invention it may be a current or a frequency pro portional to traffic volume. A potential is used by way of illustration and not as a limitation.

The fiow of traffic in each direction on the east-west streets and in each direction on north-south streets is measured in trafiic density computers EC, WC, NC, SC. Each computer is adapted to receive signals from five detectors. Detectors D1D5 are shown connected to computer EC, detectors D5D1fl are shown connected to computer WC, detectors D11D15 are illustrated connected to computer NC, and detectors D16D2tl are illustrated connected to computer SC. More or fewer detectors may be employed depending on the number of lanes to be sampled. Detectors of the type which close a circuit upon passage of a vehicles wheels are shown but any of the well known types of vehicle detectors may be used. The pressure sensitive detectors shown close a circuit twice for each vehicle, once for the front wheels and once for the rear wheels. One stage in the computer blocks the second signal to keep the count accurate.

Each traffic density computer EC, WC, NC, and SC receives signals from its respective detectors, blocks the contact chatter or noise, substitutes a pulse of uniform wave shape and approximately uniform amplitude, reduces two signal pulses to one, gives each signal a uniform duration, and integrates the signals over a short time interval. The integrated total is then impressed on a long-time integrator which develops a potential proportional to the running average of traflic density in that direction.

The potentials representative of eastbound and westbound traffic volume are compared in a simple voltage detector circuit consisting of two rectifiers 21, 22, which pass the positive DC potential from the computers EC, WC, respect vely. The potential appearing at their junction point 23 is equal to the higher of the two potentials passed through rectifiers 21, 22. Neither computer has a feedback effect on the other because of the high backimpedance of the rectifiers. The higher potential is applied to the add circuit AC associated with the cycle length selector CS, and to the balance detector DB associated with the split selector SS.

Potentials representative of northbound and southbound trafiic volume are likewise compared in a voltage detector circuit including rectifiers 2.4, 25. One rectifier 24 is arranged to pass the positive DC potential from computer NC, and another rectifier 25 is arranged to pass the positive DC potential from computer SC. The potential appearing at their junction 26 is equal to the higher of the two potentials. The higher potential does not feed back to the other computer because of the high backimpedance of the rectifiers. The higher potential is also applied to the add circuit AC associated with the cycle length selector CS, and to the balance detector BD associated with the split selector SS.

Thus the higher potential representative of eastbound or westbound traffic and the higher potential representative of northbound or southbound traffic are applied to both the cycle length selector circuit and the split selector circuit.

The potentials from all of the computers EC, WC, NC, and SC are also switched to balance detector BD associated with the offset selector OS through a switching device 27. The purpose of the switching device 27 is to apply to the offset selector 08 the potentials from the eastbound and westbound computers EC, WC or from the northbound and southbound computers NC, SC whichever has the highest volume of traffic. Balance detector BD energizes switch 27 into any of three positions which disconnects balance detector BD' when east-west traffic is low and balanced with north-south traffic, connects balance detector 3D to the east-west computers when east-west traffic is heavier, and connects balance detector BD' to the north-south computers when northsouth traffic is heavier.

At least three plans for awarding offset are available. When the east-West streets are more important than the north-south streets, offset selection for the grid may be made using east-west traffic volume as the criterion. When the north-south streets are considered most important, offset selection may be made using north-south traffic volume as the criterion. When each direction is of equal importance, the offset for the grid may be selected using the highest traffic volume in any direction and the traffic volume in the direction opposite to the direction of highest traffic volume as the criterion. In each case traffic in opposite directions is weighed to find its ratio and the offset is set accordingly to favor the direction of maximum density. The changes in offset on the intersecting streets (having the lesser density) are made as part of the overall pattern.

Having described how the various potentials representative of traffic volume are applied to the cycle length selector, to the split selector, and to the offset selector, the function of the'selectors will now be explained.

The apparatus required for cycle selection consists of an add or averaging circuit AC, a level detector LD, a cycle frequency generator and selector CS, and an amplifier A. The potential representative of the heavier volume of traffic in the east or west direction and available at point 23 is applied to the add circuit AC. The potential representative of the heavier volume of traffic in either the north or south direction and available at point 26 is also applied to the acid circuit AC. The add circuit is described in detail in a later section. The potentials are added to obtain a value representative of total trafiic volume. The values may be averaged if desired, and a divide-by-two circuit may be provided. The output of the add or average circuit is applied to level detector LD.

The level detector LD in the preferred embodiment consists of a group of thyratron tubes having progressively higher bias voltages. The output of the add circuit C is applied to the grid of each tube. One or more tubes may conduct, the tube having the highest grid bias being effective to energize its corresponding cycle frequency generator CG. Each cycle frequency generator in the preferred embodiment consists of a vibrating reed signal generator excited during the conduction of its corresponding thyratron. The output of the vibrating reed signal generator is amplified by amplifier A which may be of any well known type. The amplified signal is impressed onto a control conductor in the interconnecting cable CC which leads to each local trafiic controller LC.

Each local intersection trafiic signal controller LC is equipped with a special amplifier and a synchronous motor driven by the variable frequency signal. The special amplifier develops an output signal whose frequency is identical with its input frequency at a voltage proportional to frequency. The voltage energizes a motor which drives a cycle timing dial thus controlling the duration of the cycle of trafiic signals. When a long cycle is desired to accommodate heavy trafiic, a low frequency is transmitted to drive the timing motors at a low speed thus lengthening the cycle. When a short cycle is permitted by low volume trafficas during the night-a higher frequency is transmitted to the local controllers to drive the timing motors at a higher speed thus shortening the cycle.

The apparatus required for determining the proper split of the signal cycle between east-west arteries and northsouth arteries includes balance detector BD, ratio detector RD, and split selector SS. The potential representative of the higher density on the east-west arteries is fed to balance detector BD. The potential representative of the higher trafiic density on the north-south arteries is fed to the same unit BD where the two potentials are compared. The higher potential-if it is sufficiently high-energizes one-half of the balance detector which switches the higher potential to a group of preset potential dividers which form a part of the group of ratio detectors. One or more ratio detectors may be energized if the higher incoming potential reduced through the variously set potential dividers is sufficient to overcome the lower incoming potential. The highest ratio detector energized pulls in its corresponding relay in the split selector unit SS to select the proper split.

In one form of the invention four ratio detectors are employed, two for the east-west direction of trafiic and two for the north-south direction of traffic, to permit different values of traffic density in each direction to effect different splits. For example, a 60-40 split favoring the east-west artery may be put into effect when the ratio of east-west traffic to north-south trafiic is 55/45, and a 6S35 split may be put into effect when the ratio of east-west trafiic to north-south traffic is 60/40. It can be seen that these ratios favor the east-west artery thus permitting more facile movements of traffic thereon. The ratios of northsouth trafiic to east-west traffic at which the splits favoring the north-south traffic become effective are preset on the other two voltage dividers. The ratios need not be the same as those set on the east-west voltage dividers.

A more complete description of the split selector apparatus will be found in a later section. The apparatus is more fully disclosed in United States patent application 742,160, named above.

The function of each ratio detector is to energize its corresponding relay in the split selector circuit SS. One or two relays may be energized at a time, the relay corresponding to the higher ratio being effective to energize one of the split control conductors in the interconnecting cable CC.

At each local controller, a pair of split control relays make the selected split effective. The preferred method for accomplishing this is shown in a later section describing the local controller and in application 742,160 mentioned above. The selected split divides the allotted traific cycle time between the east-west artery and northsouth artery to permit most expeditious traffic flow on both arteries.

The apparatus required for offset selection consists of balance detector BD', ratio detector RD, and offset selector OS. The potentials from the traific density computers EC and WC are switched to balance detector BD when balance detector BD senses that they are higher than the potentials from computers NC and SC, or, the potentials from computers NC and SC are switched to balance detector BD when balance detector ED senses that the latter are higher. Switch 2'7 performs the switching function and is controlled by balance detector BD.

In balance detector ED the two potentials are first applied to a floor or bias generator and then to the balance detector. The higher potential, representative of the higher traflic density, energizes a switching device if it exceeds a preset minimum value. The switching device routes the higher potential to one or more potential dividers or dropping resistors. The variously reduced potentials are compared with the lower potential in an equal number of ratio detectors RD. One or more ratio detectors may be unbalanced by the reduced higher potential, in which case the highest ratio detector governs which offset selector relay is energized. The latter relay is located in the offset selector unit OS.

For one condition of traffic on the east-west artery a signal sequence described as double alternate may be put into effect by the offset selector. For another condition of trafiic on the east-west artery a signal sequence described as single alternate may be called into effect by the offset selector. When traffic slows considerably under saturated conditions the signals along the east-west artery may be operated simultaneously as a group to provide continuous passage for large numbers of vehicles, thus eliminating the loss of time resulting from frequent stopping and starting.

The latter sequence may be put into effect by the simultaneous offset selector OS which is energized when the balance detectors in unit BR are energized at the same time. Both balance detectors in unit BR are energized when the traffic densities in both directions on the eastwest artery are very high.

The above offset conditions would be obtained for the north-south artery if it had the higher volume of traffic and switch 27 was energized into the up position by balance detector BD.

In another embodiment of the invention switch 27 may be disconnected from operation by balance detector BD and thrown manually. Thus, when the master controller is used in a location where one direction of streets is more important or better suited for the offsets, the switch would be permanently thrown to the up or the down position. If the east-west streets were better suited to be operated for progressive offset the switch would be set to connect the eastbound and westbound computers EC and WC to the balance detector BD' associated with the offset selector OS. :If the north-south streets were better suited for progressive offset the switch would be set to connect the northbound and southbound computers NC and SC to balance detector BD'. Then, when traffic in one direction exceeded that in the opposite direction by the ratio preset in ratio detector RD, the offset would be selected for that direction.

Having described the function of the composite master controller, the details of each selector will now be disclosed.

T rafiic Density Computer Having described the master traffic control system as a whole, the various units which go to make up the master controller will now be described in detail. The traffic density computers EC, WC, NC, and SC will be described first.

The preferred form of traffic density computer is shown in block diagram in FIGURE 4. This is the type of computer disclosed in United States patent application 738,327, entitled Traffic Lane Control. One computer is provided for each direction of trafiic on the east-west arteries and one is provided for each direction of traffic on the north-south arteries. Using a modified master controller one computer may be provided for the minor arteries and a combined density found for both directions of traffic.

FIGURE 4 shows detectors DllD5, each connected to a blocking oscillator BOT-B05. A blocking oscillator is provided for each detector to assure maximum accuracy. Each oscillator receives signals from its detector, the signal from a contactor type detector actually consisting of a series of signals resulting from repeated closing and opening of the contact plates. The blocking oscillator accepts the first pulse and blocks out the noise and contact chatter for the next 6 or 7 milliseconds. Each signal is reduced to as short a pulse as possible so that pulses arriving at the next stage at closely spaced intervals are distinguishable.

The signals are next fed to a bistable multi-vibrator MVT which reduces two pulses to one and is able to distinguish between pulses arriving from the blocking oscillators BOlBO5 at closely spaced intervals. Since one rnulti-vibrator is receiving signals from a number of blocking oscillators it is necessary that the multi-vibrator be able to distinguish between closely spaced signals. If signals are lost occasionally it will not adversely affect the accuracy of the master to control traffic because two Vehicles tr'as/eling abreast causing almost simultaneous detector actuations will be able to travel through the same right-of-way indication together. If the device is being used as a traffic counter it is envisioned that some calls will be lost. 1 3

Two pulses are reduced to one in the multi-vibrator MVl so that the count of vehicles will be accurate. Each vehicle initiates two signals when it travels over a detector pad, one signal for the front wheels and one for the rear wheels. A magnetic detector and amplifier initiates only one signal per vehicle. Thus, a computer receiving signals from magnetic detectors does not require this stage.

The bistable multi-vibrator emits a sharp pulse of short duration for each two pulses received. This pulse is fed to a mo-nostable multi-vibrator MVZ where it is given a constant duration W. Because the next stage is an integrator, it is desirable that the pulses be given a uniform amplitude and duration.

An instantaneous integrator I1 forms the next stage. It integrates the pulses arriving from multi-vibrator MVZ by allowing them to charge a capacitor which drains off through a high resistance. The RC time constant is 20 seconds in this embodiment. The potential on the capacitor is applied to the grid of a triode vacuum tube. A cathode follower provides a potential across its cathode resistor proportional to the running average of the number of vehicles counted during the previous 20 seconds.

The potential from the short time integrator 11 is applied to a long time integrator 12 which is an RC circuit with a longer time constant. In this embodiment its charge circuit is independent of its discharge circuit and each may be set with a dilferen-t time constant. Each may be set independently from 1 to 9 minutes. The potential from the integrator is applied to the grid of a triode vacuum tube. A cathode follower circuit provides a potential proportional to the running average of the number of vehicles counted during the running interval.

The output potential from integrator I2 is applied to a Percent Trafiic Density meter VM which registers traffic density as a percent of the setting on an adjustment dial entitled Vehicles Per Hour at 100%. This latter adjustment permits the computer to be used on highways with widely different tratfic densities.

Output is provided at output terminal OT for use by the cycle length selector, split selector, and offset selector.

Cycle Selector Having described the operation of the traffic density computers, the cycle length selector apparatus will now be described with the aid of FIGURE 5.

The output of the eastbound or westbound trafiic density computer BC or WC, whichever is higher, is applied to the grid G1 of add circuit AC from the voltage detector circuit comprised of rectifiers 21, 22 and junction 23. The higher potential is used as a criterion of the eastwest arterial traffic density.

The output of the northbound or southbound traffic density computer NC or SC, whichever is higher, is applied to the grid G2 of the add circuit AC from the voltage detector circuit comprised of rectifiers 24, 25 and junction 26. The higher potential is used as a measure of the north-south arterial trafiic density. Traffic cycle duration is determined from the sum of these two higher densities.

Add circuit AC is comprised of a double triode vacuum tube having heaters H, cathodes C1, C2, grids G1, G2, and plates P1, P2. A source of positive potential B+ is applied to the plates P1, P2 through current limiting resistors R1, R2. Resistor R3 is a cathode resistor; a potential appears across it proportional to the sum of the potentials appearing at points 23, 26. The choice of circuit parameters determines whether the latter potentials are added, averaged, or proportioned. The value of resistor R3 may be chosen to obtain the proportion desired.

The added or averaged potentials from the cathode follower circuit is applied to all of the level detectors LD-1 LDS simultaneously. Successive level detectors are biased with successively higher biases producing a ladder effect. The bias voltage for each level is adjustable so that different steps in traffic density will be required to trigger the various detector levels.

When the density of traffic is very low, as during the hours from midnight to early morning, none of the level detectors LDl-LDS is energized and thus cycle frequency generator CGA is permitted to operate. Cycle A is thus in effect. Cycle A may be the shortest length cycle or may permit all local traffic actuated controllers to dwell with the right-of-way signal illuminated to the main artery. If traffic actuated controllers are used they may be permitted to answer calls from traffic arriving on the cross artery. If pretimed controllers are used, the signals may be set to provide a flashing right-of-way indication to east-west traffic and a flashing stop indication to northsouth trafiic. This permits north-south traffic to proceed with caution after a full stop, yielding the right-of-way to east-west trafiic.

As traffic density increases during the morning hours the potential from one or more of the traflic density computers may be sufficient to overcome the bias voltage on the first level detector LDl. When this occurs the first level detector LDl energizes a relay which switches plate potential from an amplifier associated with cycle frequency generator CGA and applies plate potential to an amplifier associated with cycle frequency generator CGB. Cycle B is thus in effect. Cycle B may be a slightly longer cycle length or may be a plan which permits the local traffic actuated controllers to answer calls only at certain intermittent times. Thus, a cycle and progression is established at successive intersections along the thoroughfares.

Traffic density may build up in both directions substantially equally without changing the offset, and may increase on both the east-west and nortlrsouth arteries substantially equally without changing the split. However, the increase will effect a change in cycle length. As the potential from the traffic density computers increases, it may be sufficient to overcome successively higher biases and cause higher level detectors LD2-LD5' to conduct. As each level detector LD2LD5 becomes effective it energizes its corresponding cycle frequency generator preamplifier CGC to CGF, respectively, and deenergizes the preamplifier associated with the next lower cycle frequency generator. Only one cycle frequency generator is effective at any time. The cycle frequency generators are all operating all the time to reduce start-up time and to make the full generator frequency available instantly as required. Their preamplifiers are switched on or off to make the desired cycle generator effective.

Amplifier A1 receives the preamplified signal from the effective preamplifier associated with cycle frequency generators CGACGE. Here the selected frequency is amplified before it is sent out on a conductor in the interconnecting cable CC to all the local controllers LC. In each local controller LC, shown in FIGURES 1 and 2, the signal is again amplified before it is applied to the synchronous motor which drives the cycle timing dial. The portion of the apparatus within the local controller is described in greater detail in the final section.

Cycle F, the cycle plan put into effect when traffic density is greatest, may constitute the longest cycle length employed or may be a plan for simultaneous operation of a group of controllers, or may constitute a quadruple oifset plan. The plan chosen to be put into effect would be the plan found to handle heavy trafiic most efficiently for the thoroughfares involved. The plan found to be most efficient along one group of thoroughfares may not be satisfactory along another group. Therefore, the plans are made flexible so that the largest number of installations can be accommodated.

Split Selector Having described the cycle length generators, the split selector will now be described.

A complete disclosure of the traffic cycle split selector apparatus will be found in a patent application bearing the same name filed June 16, 1958, Serial No. 742,160. The block diagram which comprises FIGURE 6 of the aforementioned application is reproduced in the present application also as FIGURE 6.

Referring for a moment to FIGURE 3 it will be noted that the higher of the potentials from the east-west traffic density computers EC, WC and the higher of the potentials from the north-south computers NC, SC are applied to the balance detector BD and then switched to the ratio detector RD. The latter unit forms one stage of the split selector.

Unit ED is thus supplied with input potentials representative of trafiic in the heavier direction on the eastwest arteries and of traffic in the heavier direction on the north-south arteries.

Referring now to FIGURE 6, the input potentials identified above are applied to the input terminals of floor generator unit PG. The function of the floor generator is to develop a base potential for the grids of the electron tubes in the next stage. The floor generator FG also limits the current drawn from the computers and thus protects them from overload. The unit also reduces the range of variation of voltage from the computers so they are more accurately compared. The input potentials are next fed to the balance detector BD where their values are compared. The higher potential, if it is sufliciently high, will cause its electron tube to conduct. Current flow may be sufiicient to energize a relay which switches the higher potential to a group of voltage dividers VD1- VD4. The lower potential is switched directly to the ratio detectors RDIl-RD4.

Voltage dividers VD1VD4 are provided to permit independent adjustment of the ratios of traflic density, one artery to another, at which a change in cycle split will occur. For example, the east-west artery lesser voltage divider VDll may be preset to provide a first split favoring the east-west arteries when the ratio of east-west to north-south trafiic is 55/45. The east-west artery greater voltage divider VDZ may be set to provide a second split favoring the east-west arteries to a greater extent when the ratio of east-west to north-south traf'ric is 60/40.

Likewise, the north-south artery lesser voltage divider VDS may be adjusted to provide a first split favoring north-south traiiic when the ratio of north-south to eastwest traiiic is 57/ 43. The north-south artery greater voltage divider VD may be preset to provide a second split favoring north-south tralfic to a greater extent when the ratio of north-south to east-west trafic is 62/48.

The above ratios are given by way of illustration. In a grid system where the intersecting thoroughfares are of equal dignity the ratios may be set the same for each street.

The higher potential reduced through the potential dividers VDl-VD4 is applied to one side of its corresponding ratio detector RD1RD4. The lower potential is fed directly to the other side of each ratio detector RDl-RD4- from the balance detector BD. The potentials are compared in the ratio detectors.

If the potential from the eastbound or westbound traffic density computer EC or WC is somewhat higher than the potential from the northbound or southbound traflic density computer NC or SC, it will unbalance the balance detector BD in favor of the east-west artery. The balance detector will switch the higher potential through the plurality of voltage dividers VDl-VD4 to the ratio detectors RDIt-RD L If the potential from the eastbound or westbound computer EC or WC reduced through the voltage dividers VDi, VDZ is sufliciently higher than the potential from the northbound or southbound computer NC or SC, ratio detector RDi will be energized. Ratio detector RDl in turn will energize a larger relay in the slave relay circuit SR. If the former potential is sufficiently higher than the latter, both ratio detectors RDl, RD will be energized in turn energizing corresponding relays in the slave relay circuit SR. The relays in the slave relay circuit SR control power to one or more conductors in the interconnecting cable CC which energize and make effective the various splits at the local controllers LC.

If northbound or southbound traffic is heavier than eastbound or westbound traffic, and the output potential of computer NC or SC is sufiiciently higher than that from computer EC or WC, the balance detector BD will be unbalanced in favor of the north-south artery. The higher potential will be switched through the voltage dividers V133, VD4 to ratio detectors RD3, RD4. The lower potential will be switched directly to the other half of each ratio detector R133, RD4. If the former potential is sufficiently higher than the latter, the north-south lesser ratio detector R133 will be energized. Ratio detector RD3 will in turn energize a larger relay in the slave relay circuit SR. If the former potential is sufficiently higher than the latter, the north-south greater ratio detector RD4 will also be energized in turn onergizing corresponding relays in the slave relay circuit SR. These in turn control power to one or more circuits in the interconnecting cable CC which energize and make effective the various splits at the local controllers LC.

When traiiic is balanced and the balance detector is not energized to favor either direction, a fifth split favoring each direction equally may be in etfect.

Thus, the setting of each voltage divider VDl-VD4 controls the ratio at which its corresponding ratio detector RDl-RD4 will become energized.

The relay device in each ratio detector RD1-RD4 is necessarily small because it is a plate circuit relay. It is employed, therefore, to energize a slave relay in the slave relay circuit SR. One or more slave relays being energized control power to the split control conductors in the cable CC which interconnects the master controller with the local controllers.

Ofiset Selector As shown in FIGURE 3 the output of each of the itrafiic density computers EC, WC, NC, and SC is available at the open terminals of switch 27. The switch may be electrically actuated from balance detector BD into one of three positions depending upon the latters condition. When the balance detector ED is balanced, switch 27 is in the center-01f position. When uni-t ED is energized into the east-west favoring position, as when eastbound or westbound trafiic is heaviest, switch 27 is in the down position connecting the lines from the eastbound and westbound computers EC, WC to feed balance detector BD'. When unit ED is energized into the north-south favoring position, as when northbound or southbound trafiic is heaviest, switch 27 is in the up position and applies the potential from the northbound and southbound computers NC, SC to balance detector BD.

Thus the direction of traffic having the highest volume is sampled for offset selection. It is evident that switch 27 may be of the manual throw type and permanently thrown to one position if the streets in one direction are of greater importance than the intersecting streets or are better suited for traffic progression.

As shown in FIGURE 7, the output potentials from the eastbound and westbound computers EC and WC, or from the northbound or southbound trafiic density computers NC and SC are applied to the balance detector BD' through a floor generator PG. The purpose of the door generator PG is to develop a bias voltage for the electron tubes in the balance detector BD. Unit FG also reduces the potentials from the computers to a more usable value. For example, the potentials may vary with trams density from between zero and 70 volts positive. This high a voltage is not usable as a grid voltage and thus must be reduced in a proportioning network as in a potential divider.

Potentials from the floor generator FG are applied to the balance detector BD' where the higher potential may cause a tube to conduct thus energizing a relay which switches said higher potential to a plurality of voltage dividers VDl, VD2. The lower incoming potential is switched to one side of the ratio detectors RDl, RDZ.

Voltage dividers VD-l, VDZ reduce the higher potential by two different adjustable percentages. Two different percentages are provided to permit the selection of diferent offsets at diiferent ratios of trafiic density. For example, voltage divider VDl may be set at 75 percent resulting in the higher potential being reduced 25 percent. When the higher potential exceeds the lower potential by some percent slightly higher than 33, it will cause ratio detector RDT to unbalance in favor of the higher potential and make effective a first offset change. This would result when traflic in the heavier direction exceeded traffic in the lighter direction by 133/ percent or a ratio or" 4 to 3.

To continue the example, voltage divider VD2 may be set at 60 percent resulting in the higher potential being reduced 40 percent. When it exceeds the lower potential by slightly more than 67 percent it will cause ratio detector RD2 to also unbalance and make effective a second offset change. This occurs when traffic in the heavier direction exceeds traffic in the lighter direction by 167/ 100 percent or a ratio of 5 to 3.

Each ratio detector RD RD2 includes a double triode vacuum tube with the cathodes connected in common through a cathode resistor. The lower output from the traffic density computers is applied to the grid of one half of the tube through a dropping resistor. In its plate circuit is a resistor whose impedance is similar to that of the relay in the plate circuit of the other half of the tube. To the grid of the other half of the tube is applied the reduced higher voltage. When the ratio of the two voltages becomes slightly greater than the ratio preset on the bias resistors, the higher voltage permits its half of the tube to conduct sufficiently to pull in the ratio detector relay.

The ratio detector relay is necessarily small; therefore it is used to energize a relay in the offset selector OS which in turn controls power to the offset selector conductors in the interconnecting cable CC.

Thus, the balance detector is able to distinguish the higher of the two potentials from the traffic density computers and switch the higher potential through one or more voltage dividers and ratio detectors to determine the ratio of heavier to lighter traffic. When heavier traffic exceeds lighter by one preset ratio it effects one progressive offset in favor of the heavier direction of traffic. When heavier tratiic exceeds lighter traffic by a second preset ratio it effects another, more progressive offset in favor of the heavier direction of traffic.

Dashed line 30 indicates a connection between balance detector BD and offset selector OS. This connection is required to mechanically or electrically switch the offset selector output to the street having the heaviest traffic density. When east-west traffic is heaviest as determined by balance detector BD, it switches the offset selector OS output circuits to east-west control conductors EWl, EW2 in cable CC. When north-south trafiic is heaviest, unit BD switches the offset selector OS output circuits to north-south control conductors N51, N52 in cable CC. Thus, a total of four progressive offsets is available for each street. A fifth offset favoring each direction equally is in effect when traffic density in each direction is substantially balanced. Control conductors EWl, EW2, N81, and NS2 (FIG. 7) may be connected through a programming device PD and thence to the interconnecting cable CC, as indicated, for example, in FIGURE 3. The programming device controls the energization of the offset controlling lines in the manner described above in connection with the discussion of the master controller unit.

A sixth plan may be put into effect when traffic density is very high in both directions. This plan may be simultaneous operation of a large group of traffic signals along the thoroughfare. One example may be a quadruple alternate plan with groups of signals at four succeeding intersections being operated simultaneously. By lengthening the traffic cycle and by including more signals in the alternate groups, heavy traffic flows may be handled efficiently because time-consuming stops and starts are reduced. Apparatus for lengthening the traffic cycle is described in a prior section. Apparatus at the local controller for effecting the various offsets is described in the final section.

The plan for simultaneous operation of groups of signals is put into effect when both halves of the balance detector BD' are energized at once. This condition occurs when both potentials from the traffic density computers are high. When both halves of the balance detector are energized at one time they in turn cause the simultaneous operation line S0 to be energized. It operates through the offset selector OS to effect simultaneous operation plan at the local controllers by energizing one or more interconnecting conductors CC.

This application describes the preferred form of developing a group of potentials proportional to the running average of traffic volume and comparing these potentials to arrive at a pattern of signal operation and then generating a cycle length determining frequency. It is understood that the potentials need not be produced in the manner described, nor must they be compared in the manner described. One skilled in the art may make changes in the apparatus and method without departing from the spirit of the invention. It is understood that a variable current or a variable frequency could be used.

The invention takes advantage of the fact that traflic volume cannot build up instantaneously. It is assumed that change in traffic volume will be sufficiently gradual so that the computers and function selectors keep abreast of traffic conditions. However, the computers must integrate over an interval of time, and thus always lag behind current conditions. Also, a time lag is introduced at the local controllers as they adjust from. one offset to another to prevent an abrupt change from disrupting traffic needlessly. This time lag may be only approximately 6 minutes for the master controller and a maximum of 5 minutes for the local controllers, and in normal use is not detrimental.

One of the conditions which contributes to rapid traffic buildup i the quitting-time exodus of vehicles from a group of shop and factory parking areas located along or feeding into a thoroughfare or a portion of the grid. This is a predictable, recurring pattern and can be accommodated effectively with the program device built into the master controller MC, FIGURE 2. One form of such a program device is shown in Patent 2,832,071 and is well known. The device can be set to initiate a specific pattern of traffic signals at various times as for example ten minutes before the exodus is anticipated. Then when the buildup occurs the required pattern is in effect. The computing portion of the master controller takes over as time transpires and the programmer becomes of secondary importance, the program being preset to last only 15 minutes for example.

Another condition Which was taken into consideration in the design of the traffic volume computers shown in FIGURES l, 2 and 3, and in greater detail in FIGURE 4 is that a dissimilar number of detectors Dl-D20 may be connected to each computer. It is readily seen that having five detectors connected to one computer and only three detectors for example connected to another computer would give an undue advantage to the first computer. This is corrected by adjusting the pulse width W established by the RC time constant components which form a part of the monostable multivibrator MVZ. The computer having fewer than five detectors connected or operating would have its pulse width increased so that a larger charge would be applied to the instantaneous integrator I1 and subsequently to the long time integrator I2.

In the description of the invention thus far it has been assumed that traffic on the cross street is of substantially equal dignity with that on the main street. For this reason two traffic density computers and associated detectors are supplied for each direction of traffic on the cross street. There are locations where the cross streets are not as wide as the main streets and carry less traffic.

In that event the invention can be practiced by eliminating one cross street computer and by applying the outputs of the cross street detectors to the single computer. The pulse width W, FIGURE 4, would be adjusted so that a unit of traffic on the cross street would have equal weight with a unit on the main street. The function selectors would be reconnected to provide the proper cycle length, split, and offset relationships.

The local traffic signal controllers LC which put the various plans into effect will now be described.

Local Signal Contnollers :T he master controller described above is not intended to control the traflic signals directly but is designed to control the timing of a number of local controllers which in turn energize and time the trafiic signals.

Many of the well known makes of local trafic signal controllers presently installed in the field will be able to utilize at least part of the control functions of the computer type master described above. For example, many of the controllers in use today are able to time the tratfic signals from one of three timing dials each preset for a different cycle length *and/ or split. One of three offsets may be selected on any of the three dials. These changes were controlled in the past by time clocks or other preset programming devices. Some of the function changes were made by traffic actuated and trafiic counting devices none or which could control all three functions according to traffic density.

One type of local trafiic signal controller specifically designed for use with the master controller disclosed in this application i shown in United States patent application 642,469 entitled Multiple Program Traffic Control Systems. An improved version of the local controller shown in the above named application has been developed. The improved version has a number of features each of which has been described and claimed in individual patent applications. For example, the apparatus which effects the change in trafiic cycle split is shown in application Number 742,160; the device which effects the change in traffic cycle ofiset is shown in application number 768,193; and the apparatu for changing traffic cycle duration is disclosed in application number 771,256.

Inasmuch as the master controller was shown in FIG- URE 3 to energize and control interconnecting conductors which appear also in FIGURE 7 of application 642,469 it is deemed that a duplication of the figures and description found in the four above named applications would be superfluous.

Having described the invention in its one or more aspects it is understood that those skilled in the art may make changes in the device Which deviate from those shown and yet fall within the scope of the appended claims.

While the major object of this invention is to provide greater flexibility of trafiic flow by measuring trafic volume in the various directions and adjusting traflic cycle length, split, and ofiset accordingly, it will be understood that when the invention is applied under widely varying conditions in different cities where topography, rivers, hills, and railroads create unusual conditions it may be desirable to use traffic density to vary only part of these functions and to use the synchronous programming device to change one or more functions at preset time-s. Thus, it may be desirable to control tratfic cycle offset from the program device.

The direction of heaviest trafllc flow is easily predictable. The pattern of offsets should not be changed frequently during any 24 hour period because the disruption of traffic caused by the local controllers stopping fre quently in the main street green interval to wait for the new ofifset may be more of a disadvantage than an exactly following offset is an advantage. Local controllers of the type shown in patent application 642,469 mentioned above do not stop in the main street green interval but merely slow down or speed up in that interval to get in step for the new offset. Regardless of the system used frequent oiiset changes are disruptive to traflic and are to be avoided.

I claim:

1. In a traffic control system for regulating the pattern of traflic within an area of intersecting streets, trailic detectors in a plurality of east, west, north, and south streets leading into said area, a plurality of trafiic volume computers one each for east, west, north, and south streets,

trafiic signals at a plurality of intersections within said area, local intersection traffic signal controllers connected to control said signals, timing means in each said controller adapted to time the duration of a tr-affic signal cycle, cycle split means a part of each said timing means adapted to effect any one of four present splits, traffic cycle offset means a part of each said timing means adapted to efiect any one of four preset trafiic cycle offsets; a master controller having a cycle timing selector urged into one of six positions by the highest of said computer outputs, having a cycle split selector urged into one of four positions by the ratio of the higher output of either the east or west computer and the higher output of either the north or south computer, and having an offset selector urged into one of four positions by the ratio of the highest output in any one direction and the output in the opposite direction; and a plurality of circuits interconnecting said selectors in said master controller with said timing, cycle split, and offset selector mean-s, respectively, in each said local controller, the combination adapted to change the pattern of operation therein.

2. A trafiic control means for eastbound, westbound, northbound, and southbound trafiic within a system of intersecting streets including traflic detectors at least the more heavily traveled lanes in each of said four directions, a plurality of traffic volume computers at least one for each direction respectively, said computers each adapted to develop an output a potential proportional to traflic volume in that direction, master selectors for split, offset, and cycle duration; first and second voltage comparators each adapted to receive two potentials and to pass the higher potential, the output potential of said eastbound and westbound computers applied to said first voltage comparator, the output potentials of said northbound and southbound computers applied to said second voltage comparator; an add circuit adapted to receive two potentials and to supply an output potential proportional to the sum of said potentials a balance detector circuit adapted to receive two potentials and to determine the higher potential and apply the higher potential to one output connection and apply the lower potential to another output potential the output potentials of both said voltage comparators applied as inputs to said add circuit and also to said balance detector circuit; the output of said add circuit applied to said cycle duration selector and adapted to effect control thereof; the output of said balance detector circuit applied to said split selector and adapted to effect control thereof; a relay controlled by said balance detector circuit and connected to apply the output potentials of said eastbound and Westbound computers to said oifset selector when said split selector favors eastbound or westbound trafiic and connected to apply the output potentials of said northbound and southbound computers to said offset selector when said split selector favors northbound or southbound traffic said potentials adapted to effect control of said olfset selector; a plurality of local intersection controllers, an interconnection between said three master selectors and said local controllers whereby the output of said three master selectors may be transmitted to said local controllers, and trafiic signals regulated by local controllers for controlling the flow of traffic in each of said four directions of tratfic within said system of intersecting streets controlled thereby.

3. A system for controlling trafiic on a network of intersecting thoroughfares including: a master controller, a plurality of local intersection controllers, a control channel therebet'ween; a plurality of trafiic density computers one each for generally east, west, north, and south directions of traffic, a plurality of groups of traffic actuable dctectors one group of detectors for each main general direction of traffic and connected to the computer for such direction, at least two voltage detectors each adapted to receive two potentials and to pass the higher potential, one of said voltage detectors connected to receive the outputs of the east and west computers and one connected to receive the outputs of the north and south computers, a first balance detector connected to said two voltage detectors to weigh the outputs of said two voltage detectors and to apply the higher output through a first plurality of parallel voltage reducers to a first plurality of ratio detectors and to apply the lower output directly to said plurality of ratio detectors, a like plurality of split selector relays connected to be energized by said ratio detectors, a plurality of split control circuits to said local controllers connected to be energized by said relays into one of a plurality of conditions, and local split control means in each said local controller connected to be energized through said split control circuits; a multi-position relay, a second balance detector connected through said relay and in one position connected to weigh the output of said east and west computers and in another position of said relay connected to weigh the outputs of said north and south computers and to apply the higher output through a group of voltage dividers to a second group of ratio detectors and to apply the lower output directly to said second group of ratio detectors, a like group of offset selector relays connected to be energized into one of a plurality of positions by said second group of ratio detectors, at least one offset control circuit for each major direction of traffic connected to said local controllers and adapted to be energized by said offset selector relays intoa like plurality of conditions, and local offset control means in each said local controller energized through said offset control circuits; an add circuit connected to receive and to add the outputs of both said voltage detectors, a plurality of voltage level detectors only one of which is energized at a time and corresponding to the output of said add circuit, a like plurality of signal generators only one of which is connected and made effective at a time by the energized one of said level detectors, an amplifier connected to amplify the output of only the effective signal generator, a cycle duration control circuit to each said local controller, synchronous traffic cycle timing means energized through said cycle duration control circuit to thereby control the traffic cycle duration; said local controllers adapted to receive the split, offset, and cycle duration determining signals over said interconnecting circuits and to effect traffic control pattern changes.

4. A traffic adjusted tratfic control system, comprising in combination, at least two pairs of traffic sampling locations within a network of intersecting streets, traffic sampling and computing means at each location adapted to develop an electrical output substantially proportional to the density of traffic sampled, circuit means connected between each of said computing means and a master controller, said master controller including at least two voltage detector devices connected to said circuit means one associated with one of said pairs or" traffic sampling means and another associated with another of said pairs of traffic sampling means, a third voltage detector device connected across the outputs of said two voltage detector devices and adapted to pass the higher voltage, a traffic cycle length selector device connected to receive the output of said third voltage detector device and consisting of a plurality of level detector devices each responsive to a particular electrical input level, said voltage detector devices adapted to apply the highest output from any one of the traffic sampling means to said traffic cycle length selector device, a plurality of tone generators one for each said level detector, a preamplifier connected to receive the output of each of said tone generators, an amplifier fed by said preamplifiers, a conductor connected to said amplifier and adapted to apply said amplified output to a plurality of local controllers connected to said conductor, traffic cycle timing means in each said local controller whose speed is determined by said amplified output received over said conductor; a traffic cycle split selector comprised of a balance detector device connected to receive the outputs of said first two voltage detector devices and to weigh said voltages and determine the higher and apply the higher to one output connection and the lower to another output connection, a ratio detector device comprised of a plurality of ratio detectors connected to receive the outputs of said balance detector device and to be energized when the higher of said outputs exceeds the lower by a preset ratio, a plurality of split selector devices each one connected to one of said ratio detectors and energized therefrom, at least two circuits over which the outputs of said split selector devices are fed, a traffic cycle split control mechanism in each said local controller connected to said conductors and controlled therefrom to allot various ratios of the traffic cycle to intersecting streets in proportion to tramc volume thereon; a traffic cycle offset selector consisting of a second balance detector device connected to receive the output of said first pair of traffic sampling devices when said output contains the highest voltage and to receive the output of said second pair of traffic sampling devices when said output contains the highest voltage, said second balance detector device adapted to receive and to weigh said voltage and determine the highest and apply the highest to one output connection and the other to another output connection, a second plurality of ratio detectors connected to receive the outputs of said second balance detetcor device, a plurality of offset selector devices each connected to one of said second plurality of ratio detectors and energized therefrom, at least one circuit over which the outputs of said offset selector devices are fed, a traffic cycle offset control mechanism in each said local controller connected to said circuit and controlled therefrom to award the heaviest direction of traffic at least one preferential offset; and traffic signals at each intersection controlled by each said local controller for controlling the flow of traffic in said network of intersecting streets.

5. A vehicular traffic control system for parallel and intersecting arteries in which local controllers which change the traffic signals are adapted to effect changes in the pattern of signals including traffic cycle length, split, and offset; comprising, a master controller having eastbound, Westbound, northbound, and southbound traffic volume computers, traffic actuated detectors in said parallel and intersecting arteries connected to corresponding computers; the output potentials of the eastbound and westbound computers fed through rectifiers to a first common line, the output potentials of the northbound and southbound computers fed through rectifiers to a second common line; a cycle split selector including a first balance detector connected to both said common lines to receive the higher output potential from the east and west bound computers and higher output potential from north and south bound computers and to determine the higher, a plurality of ratio detectors connected to said first balance detector to receive and weigh the higher and lower computer output potentials and determine the ratio therebetween, a group of split selector relays, each responsive to a particular range of ratios, and corresponding split control circuits to said local controllers; a cycle length selector including an add circuit connected to receive the output potentials of both said common lines and to add the same, a plurality of level detectors connected to said add circuit to receive the sum of said output potentials and energize one level detector corresponding to the value of the input potential, a like number of tone generators, an amplifier, the output of the single tone generator corresponding to the energized level detector applied to said amplifier by said energized one of said level detectors, a circuit connecting the output of said amplifier to each of said local controllers, cycle timing means in each of said local controllers connected to said last named circuit and energized therefrom; an offset selector including a second balance detector, a transfer device controlled by said first balance detector adapted to transfer the output potentials of said eastbound and westbound computers or said northbound and southbound computers whichever is higher to said second balance detector, a group of ratio detectors connected to weigh the highest and lower computer outputs and determine the ratio therebetween, a group of offset selector relays and circuits for east and west bound streets and circuits for north and south bound streets, and oifset selector means in each said local controller connected to said circuits, and trafiic control signals at each intersection controlled by one of said local controllers, for controlling the flow of traffic.

6. Apparatus for effecting a plurality of traffic signaling plans at a plurality of local intersection controllers having cycle timing means, cycle split control means, and oifset control means; a master controller comprising in combination, at least three traflic volume computers and at least three groups of trafiic sampling means at diverse locations connected thereto respectively, said computers adapted to develop an output potential proportional to traflic volume in an inbound, an outbound, and a cross direction respectively, a first balance detector, the outputs of said inbound and outbound computers applied to said balance detector to determine the higher, a plurality of level detectors and a like number of cycle generators and preamplifiers, the higher output of said balance detector circuit applied to said level detectors, one of said level detectors energized by said output depending on its value, a corresponding preamplifier energized by the one said energized level detector, an ampl fier connected to receive the output of any of said preamplifiers, a conductor connecting the output of said amplifier to said cycle timing means in each of said local intersection controllers to thereby control the traffic cycle duration; a second balance detector connected to receive the outputs of said first balance detector and said cross direct-ion computer, a group of ratio detectors each having an input reducing circuit, said second balance detector adapted to switch the higher of said outputs to each said input reducing circuits and thence to said group of ratio detectors and to switch the lower of said outputs directly to said group of ratio detectors, a group of split selector devices each connected to be energized by one of said ratio detectors respectively, a plurality of control conductors connected to energize said split control means in each of said local controllers into a like plurality of corresponding conditions; a second group of ratio detectors each having an input reducing circuit, said first balance detector adapted to switch the higher of said inbound or outbound computer outputs to each said input reducing circuit and thence to said second group of ratio detectors and to switch the lower of said outputs directly to said second group of ratio detectors, a group of offset selector relays each connected to be energized by one of said ratio detectors respectively, at least one control conductor connected to said offset control means in each of said local controllers, and trafiic signals regulated by said cal intersection controllers as to cycle length, split, and offset as determined by said master controller.

7. A trafiic control system for a grid of intersecting arteries, including in combination, traffic actuable detectors in a plurality of arteries leading into said grid, at least four traffic volume computers one for each of four such opposing direct-ions of traffic, said computers connected to receive signals from said detectors, said computers adapted to generate an output proportional to the volume of traffic detected, a first comparison circuit connected to receive the outputs of two of said computers, a second comparison circuit connected to receive the outputs of the other two of said computers; a cycle length generator consisting of an adding circuit connected to receive and to add the outputs of said first and second comparison circuits and to generate a control frequency proportional thereto, an amplifier connected to amplify the output of said cycle length generator, a first conductor of an interconnecting cable connected to receive the output of said amplifier; a plurality of local trafiic signal controllers having synchronous timing means connected to receive the output of said amplifier over said first conductor and to time a cycle of trafiic signal change; a traffic cycle split selector consisting ot a balance detector connected to receive the outputs of said first and second comparison circuits, a plurality of ratio detectors connected to receive the higher of said outputs passed by said first and second comparison circuits, said balance detector adapted to apply the highest output to one portion of each of said ratio detectors and the higher output to another portion of each of said ratio detectors, each of said ratio detectors having two portions and having a relay energized when said one portion is overbalanced and conducting, second and third conductors in said interconnecting cable energized by said relays, local traffic cycle split control means at each local controller adjusted therefrom; an offset selector consisting of a double throw relay controlled by said balance detector, a second balance detector to which are applied the outputs of said two computers connected to said first comparison circuit or of said two computers connected to said second comparison circuit, a second plurality ot' ratio detectors having two portions and connected to receive said outputs applied by said first balance detector, said second balance detector adapted to apply the highest output to one portion of each of said ratio detectors and the other output to another portion of each of said ratio detectors, each of said ratio detectors having a relay energized when one said portion is over-balanced and conducting, fourth and fifth conductors in said interconnecting cable energized by said relays, local traffic cycle offset means in each said local controller adjusted thereby; and traflic signals at each local intersection controlled by said local controllers.

8. A system for sampling and controlling traflic entering a grid of intersecting arteries comprising, trailic actuable detectors in the incoming lanes within a plurality ott arteries in each of four directions, each of the detectors connected to a corresponding one of four traffic volume computers, a computer for each direction of entry, easterly, westerly, northerly, and southerly, each computer adapted to develop an output potential proportional to traffic volume in that direction, a first voltage detector connected to receive the outputs of the east and west computers, a second voltage detector connected to receive the outputs of the north and south computers, an averaging circuit connected to receive the higher voltage from each said voltage detector, a level detector connected to receive the output of said averaging circuit and determine its voltage level, a group of frequency generators each one connected to one of said level detectors and energized through the highest energized level detector, a plurality of local controllers, trafiic cycle timing means in each said local controller energized from said energized frequency generator to thereby control the traffic cycle duration; a first balance detector connected to receive the outputs of said first and second voltage detectors and to determine the higher, one or more voltage dividers connected to receive and to reduce s aid higher output, a group of ratio detectors connected to receive said reduced higher output and to compare it with the lower output and to select a trafiic cycle split relative to the ratio thereof; a multi-pole relay connected to receive the outputs from all four computers and to apply either the east and west or the north and south computer outputs to a second balance detector, said second balance detector connected to receive said outputs and to determine the higher, one or more potential dividers connected to receive and to reduce said higher output, a second group of ratio detectors connected to receive said reduced higher output and to compare it with the lower output and to select a traffic cycle offset relative thereto; the change in traflic cycle length, split, and otfset at a number of local controllers adjusted thereby.

9. A traffic control system for use in an area having a first plurality of parallel streets intersecting a second plurality of parallel streets, forming a plurality of inter- 23 sections to be controlled by traffic signals, including, in combination: a local trafiic signal controller at each of said plurality of intersections connected to energize said signals to permit traffic to flow alternately in intersecting directions; a master traffic controller interconnected with each of said local controllers and adapted to control the traffic cycle length, split, and offset forming the pattern of operation at said local controllers; four groups of traffic detectors placed along at least some of said intersecting pluralities of parallel streets and arranged to detect traffic approaching in each of four directions and to transmit pulses in response to the traffic detected; a like number of traffic density computers, each one connected to receive pulses from one of said group of detectors, each of said computers adapted to measure a running average of traffic density in one of said four directions on said plurality of streets, and to develop an output potential proportional thereto; and means forming a part of said master controller adapted to establish the pattern of operation at each of said local controllers as a func tion of said output potentials proportional to said running average of trafi'ic density determined by said computers.

10. In a traffic control system as in claim 9, wherein said master controller includes means adapted to determine the traffic cycle duration to be imposed on said local controllers, said means including a first voltage comparison circuit connected to receive the outputs of two of said computers and pass only the higher output, a second voltage comparison circuit connected to receive the outputs of the other two of said computers and pass only the higher output, an add circuit connected to receive the outputs of said first and second comparison circuits and to develop an output potential proportional thereto, a voltage level detection circuit connected to receive the output of said add circuit, said level detection circuit including a plurality of voltage level detectors, only one of which is energized depending on the value of the input voltage, a plurality of signal frequency generators each adapted to develop a different output frequency when energized, each one of said signal generators paired with one of said level detectors and energized therethrough, one signal frequency amplifier connected to receive the output of all of said signal generators and adapted to amplify the signal frequency developed by the single energized signal generator, and a control circuit connected to receive the output of said amplifier and apply it to cycle duration determining means in each of said local controllers.

11. In a traffic control system as in claim 10, wherein said master controller includes means adapted to determine the split of the trafiic signal cycle between said first and second pluralities of parallel streets based upon the ratio of the higher traffic densities on each of the two pluralities of parallel streets, said means including a first balance detector circuit connected to receive the outputs of said first and second voltage comparison circuits and to compare the two, a plurality of voltage dividers, and a plurality of voltage ratio detectors, said balance detector connected to apply the higher of the outputs of said voltage comparison circuits through said plurality of voltage dividers to said plurality of ratio detectors and connected to apply the lower of the outputs of said voltage comparison circuits directly to said plurality of ratio detectors, each of said ratio detectors connected to compare said higher output reduced through said voltage divider with said lower output, a plurality of control circuits connected to be energized by said ratio detectors when said reduced higher output is greater than said lower output, and traffic cycle split control means in each said local controller energized through said plurality of control circuits.

12. In a traffic control system as in claim 11, wherein said master controller includes means adapted to determine traffic cycle offsets on the plurality of parallel streets having the highest traffic density based on a ratio of said highest density to the density in the opposing direction of traffic flow, said means including a second balance detector and a selector device connected to be controlled by said first balance detector and connected to apply to said balance detector the output of the trafiic density computer found to have the highest voltage and the output of the computer connected to the same voltage comparison circuit, a second plurality of voltage dividers and a second plurality of voltage ratio detectors, said second balance detector connected to apply the highest of said outputs of said computers through said second plurality of voltage dividers to said second plurality of ratio detectors, and connected to apply the output of said computer connected to the same voltage comparison circuit directly to said second plurality of ratio detectors, each of said second plurality of ratio detectors connected to compare said highest output reduced through said voltage divider with said directly connected output, a second plurality of control circuits connected to be energized by said second plurality of ratio detectors when said reduced highest output is greater than said directly connected output, and traffic cycle offset control means in each said local controller energized through said second p.urality of control circuits.

13. In a traffic control system for controlling traffic based on traffic flow in opposing directions along a selected thoroughfare and on a roadway intersecting said thoroughfare, comprising: a master traffic controller; a plurality of local traffic signal controllers; and a plurality of function control circuits connected therebetween, said control circuits including, one cycle length control circuit, two cycle split control circuits, and two cycle offset control circuits; said master controller including means for counting traffic per unit time individually in each of the opposing directions of said selected thoroughfare and in each of the opposing directions along said roadway intersecting said thoroughfare; means for energizing a cycle length control circuit with a signal frequency inversely proportional to the highest rate of traffic flow as determined by said means in said master for any of said directions; means for energizing the split control circuits in response to measurement of a higher rate of trafiic flow in one direction compared with the rate of trafiic flow in the intersecting direction; and means for energizing the offset control circuits preferential to the direction of traffic having the highest rate of flow in proportion to the ratio of the highest rate of flow to the rate of flow in the opposing direction; and within each said local controller, cycle duration determining means connected to said cycle length control circuit, cycle split control means connected to said two cycle split control circuits and cycle offset control means connected to said two cycle offset control circuits.

14. In a traffic control system utilizing traflic information from each of four directions based on the traffic fiow on two opposing directions of a first thoroughfare and two opposing directions of a second thoroughfare intersecting said first thoroughfare, comprising: a master controller; a plurality of local controllers; and interconnecting control circuits therebetween, said control circuits including: offset control circuits for each of said two opposing directions, split control circuits for the two opposing directions of said first and second intersecting thoroughfares; a cycle length control circuit for the entire system; said master controller including means for computing trafiic volume in each of said four directions; means for determining the higher traffic volume for the two opposing parallel directions of a first thoroughfare, and means for determining the higher traffic volume for the two opposing directions of the second thoroughfare; means for determining the ratio between said two higher volumes, and means responsive to said ratio for actuating at least one of said split control circuits; means for determining the highest traffic volume in any of the four directions, and for energizing the cycle length control circuit with a 25 signal frequency inversely proportional to said highest volume; and means for determining the ratio between said highest volume and the volume in the opposite direction of said thoroughfare having said highest volume and for actuating ofiset control circuits preferential to that direc- 5 tion having the highest volume.

References Cited in the file of this patent UNITED STATES PATENTS 2,126,431 Van Opel Aug. 9, 1938 10 26 Barker July 7, 1942 Olafson Aug. 31, 1948 Pearson Jan. 6, 1953 Paul Oct. 27, 1953 Hendricks et a1 Mar. 11, 1958 Masten Feb. 23, 1960 Barker Apr. 5, 1960 FOREIGN PATENTS Great Britain Oct. 21, 1935

Claims (1)

1. IN A TRAFFIC CONTROL SYSTEM FOR REGULATING THE PATTERN OF TRAFFIC WITHIN AN AREA OF INTERSECTING STREETS, TRAFFIC DETECTORS IN A PLURALITY OF EAST, WEST, NORTH, AND SOUTH STREETS LEADING INTO SAID AREA, A PLURALITY OF TRAFFIC VOLUME COMPUTERS ONE EACH FOR EAST, WEST, NORTH, AND SOUTH STREETS, TRAFFIC SIGNALS AT A PLURALITY OF INTERSECTIONS WITHIN SAID AREA, LOCAL INTERSECTION TRAFFIC SIGNAL CONTROLLERS CONNECTED TO CONTROL SAID SIGNALS, TIMING MEANS IN EACH SAID CONTROLLER ADAPTED TO TIME THE DURATION OF A TRAFFIC SIGNAL CYCLE, CYCLE SPLIT MEANS A PART OF EACH SAID TIMING MEANS ADAPTED TO EFFECT ANY ONE OF FOUR PRESENT SPLITS, TRAFFIC CYCLE OFFSET MEANS A PART OF EACH SAID TIMING MEANS ADAPTED TO EFFECT ANY ONE OF FOUR PRESENT TRAFFIC CYCLE OFFSETS; A MASTER CONTROLLER HAVING A CYCLE TIMING SELECTOR URGED INTO ONE OF SIX POSITIONS BY THE HIGHEST OF SAID COMPUTER OUTPUTS, HAVING A CYCLE SPLIT SELECTOR URGED INTO ONE OF FOUR POSITIONS BY THE RATIO OF THE HIGHER OUTPUT OF EITHER THE EAST OR WEST COMPUTER AND THE HIGHER OUTPUT OF EITHER THE NORTH OR SOUTH COMPUTER, AND HAVING AN OFFSET SELECTOR URGED INTO ONE OF FOUR POSITIONS BY THE RATIO OF THE HIGHEST OUTPUT IN ANY ONE DIRECTION AND THE OUTPUT IN THE OPPOSITE DIRECTION; AND A PLURALITY OF CIRCUITS INTERCONNECTING SAID SELECTORS IN SAID MASTER CONTROLLER WITH SAID TIMING, CYCLE SPLIT, AND OFFSET SELECTOR MEANS, RESPECTIVELY, IN EACH SAID LOCAL CONTROLLER, THE COMBINATION ADAPTED TO CHANGE THE PATTERN OF OPERATION THEREIN.

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