US3052757A - Frequency normalization in speech sound waves - Google Patents

Description

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United States Patent 3,052,757 FREQUENCY N ORMALIZATION IN SPEECH SOUND WAVES Meguer V. Kalfaian, 962 Hyperion Ave., Los Angeles, Calif. Filed Dec. 17, 1958, Ser. No. 781,103 1 Claim. (Cl. 179-1) This invention relates to normalization of basic resonances in speech sound waves, and is particularly an improvement over the systems disclosed in my US. Patents No. 2,705,260 March 29, 1955; No. 2,708,688 May 17, 1955; and patent application Serial No. 723,510 March 24, 1958 now Patent 2,921,133, Ian. 12, 1960. Its main object is to provide improved methods and means for standardizing the frequency positions of the basic resonances of the propagated speech sound waves, prior to analysis, for final translation into visible intelligible indicia, for example, by electric typing devices.

In order that a machine, or the like, may be devised to simulate the interpretive mechanism of human intelligence, in printing spoken words, as spoken" by all qualities and ranges of voices, without environmental control adjustments, or pre-adjustments to any particular voice, it is necessary that all environmental variables are first standardized during propagation of the sound Waves, so that standard sets of parameters may be derived to collectively define different phonetic sounds of the spoken words. To accomplish such standardization, advantage is taken of the fact that all phonetic sounds are composed of definite sets of resonances whose ratios in frequency positions with respect to a fundamental remain constant, no matter what band of the voice spectrum they are produced in; this theoretical concept is disclosed in my above mentioned patents and applications. Accordingly, the object of the present invention is to select the varying fundamental frequencies during propagation of the sound waves, and shift all frequency components to regions where their frequency ratios become constant with respect to a pre-assigned fundamental frequency. The said sets of parameters may then be derived, without variables, to collectively define each phonetic sound of the spoken words in speech.

Frequency standardizing methods and systems had been disclosed in my patent No. 2,708,688 May 17, 1955; and patent application Serial No. 723,510 March 24, 1958. The systems utilized in both of these disclosures provide two storage tubes of the cathode ray type, in a manner that, the wave pattern containing in one cycle portion of the selected fundamental (during propagation of the sound waves) is recorded in one storage tube, and the wave pattern containing in the following one cycle portion of the selected'fundamental is recorded in the other storage tube. While the first recording is processed, its time length (from inception to termination of the wave pattern) is measured and stored in the form of a first signal quantity.

Then, while the second recording is processed, the first recorded wave pattern is reproduced under control of the first quantity, so adjusted that, the first recorded Wave pattern is reproduced in a predetermined standard time base period. The same process is repeated with the second recorded wave pattern, so that the end result is a cyclic reproduction of the wave patterns of the propagated sound wave at a standard time base period. In order to allow time for reproduction of the recorded wave patterns prior to the arrival of successive wave patterns, the standard time base period is adjusted to be several times shorter than the shortest time base period occurring in ordinary speech sound waves. Thus, the number of reproduced wave patterns will be many more (randomly varying) than the actual recorded wave patterns, which condition is found advantageous for more accurate analysis of the ice wave patterns. The storage tubes presently available, however, are not ideally suitable for the present purpose, as far as performance is concerned, and accordingly, improved systems are disclosed herein to provide the necessary functional performance. These systems will be described in the following specification, with reference to the drawings, wherein:

FIG. 1 is a block diagram of the frequency transposing system.

FIG. 2 is a schematic diagram of the scanning system for frequency transposition according to the invention; and FIG. 3 are waveforms involved in describing the arrangement of FIG. 2.

FIG. 4 is a schematic diagram of a sample-storage distribution system, in conjunction with the scanning system of FIG. 2, utilizing beam switching tubes.

FIG. 5 is a detailed schematic diagram of the storage system in connection with the circuitry of FIG. 4.

FIG. 6 is a modification of FIG. 4, utilizing transistors.

In describing first the broader aspects of the invention, the block diagram of FIG. 1 shows how the complex frequency components of the original propagated sound Waves are transposed to standard frequency locations utilizing memory tubes of conventional types. The speech sound waves originating in block 1 are first applied to the block of fundamental frequency selector 2 and the memory tubes, as represented by the blocks 3 and 4. The function of the fundamental frequency selector 2 is to produce at its output pulse-signals coincident with the arrivals of wave trains from block 1; a wave train is one cycle portion of the fundamental frequency of the speech sound waves. These pulse-signals are applied to an alternate switch, as represented by block 5, which alternates its state of operation at each arriving signal-pulse, and imparts the operation of a two section scanning system consisting of blocks scan-write 6, scan-read 7; and scan-read 8, scan-write 9, alternately in corresponding time periods with the arriving wave patterns from block 1 (the expressions of write and read will hereinafter be referred to as recording and reproducing a wave signal, respectively). Each section of the scanning system is arranged to operate an associate memory tube, for example, the section consisting of blocks 6, 8 operates the memory tube in block 3, and the section consisting of blocks 7, 9 operates the memory tube in block 4. The operational sequency of memory tubes 3 and 4 is such that, during active period of scan-write block 6 the speech sound wave from block 1 is recorded in the memory tube of block 3, while during this same time period the scanread block 7 becomes active and a previously recorded wave pattern in memory tube of block 4 is reproduced and amplified in the amplifier block 10. This particular performance is alternated when a succeeding signal-pulse from block 2 alternates the state of operation of switch block 5, e.g., scan-write block 6 and scan-read block 7 become idle, and scan-read block 8 and scan-write block 9 become active; effecting reproduction of the recorded wave pattern in memory tube of block 3, and recording of a new wave pattern in memory tube of block 4.

During recording periods of either one of the memory tubes 3 or 4, the associated scan-write blocks, for example, block 6 or block 9, produces a scanning time base wave (saw tooth wave) of first constant time period. Thus, the recording proceeds at a normal time base period. During reproduction time periods, however, the scan- read blocks 7 and 8 produce scanning time base waves (saw tooth waves) of second constant time periods having much shorter time than the first. The amplitude of the second scanning time base waves is varied stepwise in accordance with the amplitude of the recording time base waves, so that each recorded wave in any one of the memory tubes of blocks 3 and 4 is reproduced in full scale. Thus, each recorded wave pattern is reproduced at a constant time period, no matter what its original recording time had been. Due to the very short time chosen as a standard reproduction time base, each recorded wave pattern may be reproduced several times, (the number of reproduction depending variably upon the ratio of recording and reproducing periods) before reproducing the succeeding wave pattern. With such standardized time base reproduction of the original wave patterns of the sound waves from block 1, all basic resonances collectively representative of phonetic sounds are shifted to regions where their frequency ratios remain constant with respect to a standard fundamental frequency, a onecycle period of which is represented by said second time base period. The common output wave of memory tubes in blocks 3 and 4 is then amplified by the block 10, for analyzing and deriving therefrom sets of resonances which collectively define the phonetic characters of the spoken words in speech.

The memory tubes of blocks 3 and 4, as described in my above mentioned patents and patent applications, had been mentioned to be of the existing storage tube types. These storage tubes vary in types, and each type has its disadvantage functionally adaptable to the particular purpose involved herein. The requirements for a satisfactory functional operation are, first, sufiicient number of storage elements for recording a wave pattern during a line scan; reproducing the recorded wave pattern several times without deteriorating its original waveform; elimination of write to read switching pulses entering the reproduced signal; and elimination of a sequence of erasing and priming function prior to recording action. The storage systems described in the following specification are, accordingly, contemplated to provide these requirements.

Instead of utilizing elemental areas of a storage surface for recording a signal wave, such as used in storage tubes of the cathode ray type, it is contemplated herein to use a large number of capacitors which are charged sequentially, during recording time period, in sampled quantities proportional to the varying amplitudes of a wave pattern to be recorded. These stored quantities are then resampled sequentially during reproduction time period, so as to reconstruct the original wave pattern. Due to the large values that may be chosen for said capacitors, resampling of the stored quantities may be made several times without affecting their original storage. The values of these capacitors, however, are small enough to be discharged without appreciable loss of time for storage of new signal quantities.

To simulate the elemental sampling function of a cathode ray storage tube during a scanning line period, a pulse generator is first rendered to produce sampling pulses at a normal frequency rate, during write scanning time base period, and its frequency is shifted abruptly during read scanning time base period to a position where the same number of sampling pulses are produced during a standard time base period.

Production Write and Read Sampling Pulses The frequency of an oscillator may be varied by an applied modulating voltage, for example, by varying the grid bias of a multivibrator. Such oscillators, however, are also sensitive to plate voltage supply variations, and accordingly, require severe automatic control adjustments. The circuit arrangements disclosed herein are intended to operate satisfactorily with less severe adjustments.

The schematic arrangement of FIG. 2 will provide production of pulses at widely varying frequencies, at the outputs of two independent branches, designated as OP-I and OP-Ia. The arrangement will also provide production of pulses at standard time base intervals, at the two independent outputs OP-II and OP-IIa. The two branches operate alternately, in a manner that, during one selected wave-pattern of the speech sound wave the output OP-I will produce pulses at a normal frequency rate for sampling and storing said wave-pattern, and the output of OP-II will remain idle, while simultaneously, the output OP-Ia will produce pulses at a shifted frequency rate for resampling and reproducing previously stored samples, between the standard intervals of pulses produced at output OP-IIa. Since the operation of both of these branches is identical, with the exception of their operating time sequence, reference will mostly be made to the branch shown in the upper section of the drawing.

The variable frequency oscillator consists of a saw-tooth wave generator comprising capacitor C1 charging in series with resistor R1 to the potential of battery B1, and a discharger VI of capacitor C1. The RC time constant of capacitor C1 and resistor R1 is adjusted to a normal frequency for sample-storage during recording time periods. In operation, the capacitor C1 starts charging in series with resistor R1 to the potential of B1, at a charging rate depending upon said RC time constant. A flyback trigger time is determined by a fixed potential developed across the cathode circuit resistor R2 of conducting tube V2. As the voltage across charging capacitor C1 equals the potential across R2, current starts flowing through resistor R3 in series with diode D1. The negative voltage developed at anode terminal of diode D1 is applied upon the control grid of amplifier tube V3, through coupling capacitor C2, and further applied upon the control grid of normally inoperative discharger tube V1, in positive polarity by way of phase inversion across plate circuit resistor R4 and coupling capacitor C3. When the discharger tube V1 approaches its threshold of conduction by the arriving positive voltage upon its control grid, the capacitor C1 starts discharging, the action of which feeds back a regenerative positive voltage upon the control grid of discharger tube V1. As this regeneration increases, the current passing through V1 increases with an increase in discharge speed of the capacitor C1. High speed discharge of capacitor C1 is also achieved by the fact that the anode current of V1 passes through high voltage battery B2; rendering V1 highly conductive during the entire discharge period of capacitor C1. Due to the plate supply potential of B2, the current passing through V1 will start charging capacitor C1 in reverse polarity immediately, after discharge of C1 is completed. To avoid recharge of C1, a diode D2 is included, which offers low impedance and assume all the current that would normally pass through C1 during its recharge period; thus effecting fast discharge of C1, but avoiding recharge of same. In order to hasten recovery of the non-conductive state of discharger tube V1 immediately after discharge of C1 has been completed, the coupling capacitor C2 must be chosen of small value, and accordingly the value of load resistor R5 must be chosen low enough to complete the discharge of coupling capacitor C2 in a negligible time period, right after the discharge of C1 has been completed. The value of coupling capacitor C2 must also be much smaller than the value of capacitor C1, so as to avoid loading upon the latter. Thus, it is seen that a saw-tooth wave generation is achieved across capacitor C1 with very fast retrace time periods. By adjusting the values of resistor R1 and capacitor C1 to have a fixed RC time constant, the frequency of saw-tooth wave oscillation may then be changed substantially linearly by varying the potential across R2.

As mentioned in the foregoing, a normal frequency of sampling pulses are required to be produced during recording time of an incoming wave pattern of the speech sound waves in bits of storage samples. These pulses may be derived from the flyback voltages of the saw-tooth waves from across capacitor C1, by a small dilferentiating capacitor 04 at the cathode terminal of cathode follower tube V4. This tube is used as a bufier stage, so as to avoid loading effect upon the charging capacitor C1; and it may be eliminated, if so desired. The output may also be taken from the plate circuit resistor R6, instead of the cathode circuit resistor R7. During reproduction period of above said stored samples, the frequency of saw-tooth wave oscillation is shifted for resampling the stored samples in a standard time period. As stated in the foregoing, the frequency of saw-tooth wave oscillation is shifted by shifting the voltage across R2. Also, this frequency shift must be abrupt at the end of recording time period, and remain in steady state during reproduction period. These two different voltages may be isolated from each other, as in the following:

During recording of a wave pattern in bits of samples, the frequency adjusting voltage is derived from across resistor R2 by way of the steady state current passing through it in series with tube V2. During reproduction period, however, this frequency-shifting voltage is derived from across resistor R8 in series with diode D3. In order to isolate the voltages across R2 and R8 acting simultaneously, for frequency adjustment of the oscillator, the voltage across R8 is raised above the voltage across R2, during recording time period, by conduction of tube V5. By raising the voltage across R8 above the voltage across R2, flyback triggering occurs at the peak of voltage across R2, and thereby the voltage across R8 becomes isolated from the voltage across R2. The on-and-oif conduction of this tube is controlled by V6, which draws current through resistor R9 during reproduction period, causing a high current-cut-off negative potential upon the control grid of tube V5, and release this cut-off potential during recording time period by non-conduction of tube V6, according to switching voltages applied upon the control grid of tube V6. These switching voltages are graphically illustrated adjacent to tube V6, as indicated by their proper polarities during write and read time periods. These switching voltages are also shown graphically in FIG. 3, in conjunction with various other switching voltages at diiferent phases, and reference to their application will hereinafter be made by the designated letters, for example, the wave at B in FIG. 3 is applied upon the control grid of tube V6 at terminal (B) in FIG. 2.

During production of saw-tooth waves at normal frequency, the control grid of tube V7 receives at terminal (A) a positive voltage (the switching voltage A in FIG. 3), which drives it to conduction and draws current through resistor R10. The negative voltage developed across R10 drives tube V8 to non-conduction, which in turn releases a positive potential that it had previously developed across resistor R11 by conduction therethrough. The cathode terminal of diode D4 now sees negative potential, and allows current to flow through resistor H11 in series with capacitor C5, to the fixed potential developed across R12. While this latter potential may be obtained from a fixed division across power supply source B1, it has been shown developed across R12 by the current passing in series with cathode follower tube V9, the control grid of which receives a fixed potential from across B1 by the voltage dividing resistors R13 and R14. The purpose of V9 is to act as a voltage control tube, and keep the voltage across R12 constant during the charging of capacitor 05, which evidently will load the supply voltage. The bypass capacitor C6 will help to keep the supply potential across R12 constant, if the control tube V9 alone is not sutficient for the purpose. Of course, this fixed potential may be obtained otherwise, if so desired.

Unlike linear saw-tooth wave generation, the RC time constant of capacitor C5 and resistor R11 is adjusted to render the non-linear charging curvature useful, e.g., the capacitor C5 is allowed to charge near the maximum of potential across R12, during the longest time period occurring in a wave pattern of the speech sound waves. This is because saw-tooth wave generation by capacitor C1 in series with resistor R1 will change substantially linearly by linear voltage variation of the voltage across resistor R8; and square-root variation is required for frequency multiplication during reproduction time base periods. Thus the voltage change across capacitor C5 must follow a square-law curvature with time, so that the voltage reduction across R8 may correspondingly follow a square-root curvature. In operation, the capacity C5 starts charging at the instant the tube V8 becomes non-conductive, until the latter tube becomes conductive again by a negative switching voltage applied at terminal (A). At this point, a large positive potential is developed across resistor R11, and the capacitor C5 retains its terminated potential thereon. Simultaneously, a positive potential is applied upon the control grid of tube V6, at terminal (B); rendering V5 non-conductive. The negative potential across capacitor C5 is applied upon the control grid of tube V10 with proportional voltage reduction across cathode circuit resistor R8. Since now the voltage across R8 is lower than the voltage across R2, the triggering action takes place by the trigger current passing through R3 and diode D3. Since also, this triggering action takes place sooner than the charging voltage across capacitor C1 reaching its normally designated level, the frequency of saw-tooth generation increases. Ideal accuracy of frequency multiplication is not achieved by this system, but approximation will suflice; as the high ratio between sampling frequencies and time base frequencies will reduce the percentage of objectional errors. These errors, however, will be substantially stabilized, and associated circuitry may be devised accordingly. Stabilization is obtained due to the fact that, voltage variation of the supply battery B1 will effect proportional variations at all points of sensitivity, as long as the RC time constants of C1, R1, and C5, R11 remain constant. For example, the critical adjustments are to keep the sensitivity responses of tubes V2 and V10 constant with variation of supply voltage source B1. Since however, no amplification is involved, stabilization of cathode followers are simpler to retain under severe variations of supply voltage.

Generation of Pulses at Standard Time Base Intervals When the charging of capacitor C5 stops by conduction of tube V8, the saw-tooth wave generation across C1 is shifted in frequency according to the voltage stored in capacitor C5. At this instant, reproduction of pulses at standard time base intervals commences. This is achieved by a second saw-tooth wave oscillator comprising capacifor C7, which charges in series with diode D5 and resistor R15. The discharge of capacitor C5 is accomplished by normally inoperative discharger tube V11. Also, the onand-off switching of these oscillations is accomplished by tube V12, which under conduction draws current through resistor R15, and stops charging of the capacitor C7 by a high negative voltage developed across resistor R15.

At the beginning of standard time base wave production, it is desirable that the capacitor C7 is completely discharged. This is done by applying a positive pulse upon the control grid of discharger tube V11, which becomes conductive and draws current through capacitor C7 and battery B2; discharging C7. As described previously, a hold-back diode D6 is included; preventing recharge of C7 in reverse direction. The positive pulse upon the control grid of discharger tube V11 is applied at terminal (C), in series with resistor R16, by the pulses at C in FIG. 3. Also, the switching on-and-off voltage upon the control grid of tube V12 is applied at terminal (A), by the square waves at A in FIG. 3.

When the control grid of tube V12 is driven highly negative, and V12 becomes inoperative, the capacitor C7 starts charging in series with diode D5 and resistor R15, across battery B1. As the voltage across C7 reaches the voltage level at the junction terminal between voltage dividing resistors R17 and R18, current passes through resistor R19 and diode D7, and consequently a negative voltage drop across resistor R19 is transmitted to the control grid of amplified tube V13 through coupling capacitor C8. This negative voltage is amplified across plate circuit resistor R20 of the tube V13, in positive polarity, and further applied upon the control grid of discharger tube V11 from across load resistor R21. As the applied positive voltage upon the control grid of tube V11 reaches a threshold of anode conduction, the capacitor C7 starts discharging; the action of which circulates a regenerative positive voltage upon the control grid of discharger tube V11 with highly speeded discharge of capacitor C7. After discharge of capacitor C7 is completed, the discharger tube V11 becomes non-conductive, as described in the foregoing, and recharge of the capacitor C7 repeats; for continuous generation of saw-tooth waves at standard time base periods. The required pulses are derived from the flyback voltages by differentiating output capacitor C10, at the cathode circuit of V14. The output OP-II may be taken either from the anode circuit resistor R22, or the cathode circuit resistor R23. The frequency of these time base waves is determined by the RC time constant of capacitor C7 and resistor R15, and also the voltage at the junction point of voltage dividing resistors R17 and R18. As the voltage ratio at the junction point of resistors R17 and R18 remains constant, regardless of voltage variations of B1, the frequency of these standard time base waves can be kept constant by keeping the values of capacitor C7 and resistor R15 constant.

When generation of time base waves across capacitor C7 is ended, by conduction of V12, a highly negative pulse voltage is applied upon the control grid of tube V15, at terminal (D), by the waves at D in FIG. 3. As tube V15 becomes non-conductive by said negative pulse, the normal plate current passing through resistor R24 is released, and tube V16 becomes conductive (from normal non-conductive state) to discharge capacitor C; for a new start. The diode D8 is used to avoid reverse charge of the capacitor C5, as described in the foregoing. It will be noted that a large current will pass through R12 during conduction of tube V16, which would disturb the steady state voltage across this resistor, were it not for the regulation by control tube V9. Of course, closer regulation may be obtained by more intricate circuitry, as practiced conventionally, and may be utilized if so desired.

As explained in the foregoing, pulse generation by the arrangement in FIG. 2 is performed in two separate replica branches in alternate sequence of the incoming wave patterns of the speech sound waves. In order to show the sequence of these operations, the input switching waves, as shown graphically in FIG. 3, are designated by the proper letters, as applied to the proper terminations in both branches of FIG. 2. Also, due to the similarity in circuitry of both branches, numeral designations to component parts are included only in one branch, as shown.

Pulse Distributor Utilizing Beam Switching Tubes FIG. 4 is an arrangement of sample storage distribution system, responsive to the output pulses at OPI and OP- II in FIG. 2. Only one branch of storage distribution arrangement is shown in FIG. 4, as the alternate branch would be identical, and operated by the output pulses at OPIa and OPIIa in FIG. 2. The circuit arrangement utilizes magnetron beam switching tubes BST-l to BST-S, which in combination provide 360 switching operations for independent storage of signal samples. Each one of these tubes contains ten switching targets, the first four of which make use of only nine targets in each tube, and the fifth one makes use of all ten targets contained therein.

Beam switching tubes are used in the practice of electroncs, for example, the type 6700 as manufactured by Burroughs Corp. For a detailed specification of magnetron beam switching tubes, reference may be made to an article, entitled New Applications for Beam Switching Tubes Electronics, pp. 122-126, April 1956. As a brief reminder of its function, however, each beam switching tube, for example, BST-l in FIG. 4, contains ten targets (only three targets are shown in the drawing, in horizontal lines), and ten spades (only three spades are shown in the drawing, in 30 angles). There are also included ten odd and ten even grids for controlling the position of the beam. All odd and even grids are internally connected in parallel, respectively. In some tubes, a separate terminal from one of the even grids is brought out of the vacuum envelope for zero positioning of the beam. This singular terminal is designated as G1; the parallel-connected even grids is designated as G2; and the parallel-connected odd grids is designated as G3. In operation, the beam projection may be formed upon any one of the targets by first lowering the potential of its associate spade. For example, referring to BST-l, the beam may be initially formed upon target number one, by lowering the spade potential across spade circuit reistor R25. Once the beam is formed on any target, it will flow in steady state, and may be shifted sequentially from one target to another by alternate negative pulses applied upon the odd and even grids. With reference to the example of BST-l, alternate negative pulses upon the odd and even grids (G2 and G3) will not shift the beam from target number one to the adjacent target, until a negative pulse is applied to the separated even-grid G1. By this brief description of the function of magnetron beam switching tubes, operation of the circuit arrangement in -FIG. 4 may be described as follows:

The output pulses at OP-I in FIG. 1 are applied to the input of a flip-flop trigger circuit 11 (shown in block diagram), so as to produce at its output alternate negative pulses, to be applied upon the odd and even control grids of EST-1 through EST-4 in parallel, from across load resistors R26 and R27. Diodes D9 and D10 are connected in parallel with resistors R26 and R27, respectively, and so polarized that, they suppress any positive potentials developed across said resistors. The output negative pulses at OPII, in FIG. 2, are applied upon the control grid of norm-ally conducting tube V17 (in FIG. 4), which becomes non-conductive momentarily and releases the currents passing through plate circuit resistors R28 to R31. The release of forward current passing through resistor R28 from base to emitter elements of transistor Q11 drives it to non-conductive state, and cuts off the plate supply potential directly from spade electrodes of EST-1 to EST-5, and also the plate supply potential from target electrodes of BST-l to BST- 5 in series with transistors Q1 to Q10. During this sh rt pulse period of plate supply potential isolation, the switching tubes BST-l to EST-5 are cleared from their operating states. Simultaneously, a positive pulse from the anode circuit terminal of V17 is applied upon the control grid of normally inoperative tube V18, through coupling capacitor C11 and from across load resistor R32. The load resistor R32 is bypassed by a small capacitor C12, so that the positive pulse applied upon the control grid of tube V18 subsides slightly later than the applied pulse upon control grid of V17. Thus when BST-l to BST-S are cleared from their operating states, the delayed conduction of tube V18 passes current through spade circuit resistors: R25 of BST-l; R33 of EST-2; R34 of EST-3; R35 of BST-4; and R36 of BST5; in series with isolating diodes D11 to D15, respectively, and by lowering the voltages upon these spades, the beams of these switching tubes are reset upon these spades, and consequently upon their associate targets, for example, target number one of BST-l; targets number zero of BST-2 to EST-4; and target number one of BST-S. Also simultaneously, a positive pulse from the anode circuit terminal of V17 is transmitted to the flip-flop block 12, through coupling capacitor C13, for resetting the flip-flop circuit of block 12 to a position as to produce a first output negative pulse across load resistor R37 when an operating pulse arrives at its input terminal 13; for exciting the even grids of BST-S. If the flip-flop circuit of block 12 is designed to respond to a negative pulse for resetting, then the positive pulse arriving from anode circuit of tube V17 is first phase inverted by a conventional mode.

With the above referenced initial settings of BST-l 9 to BST- (beam position on targets one of BST-1 and BST-5; and beam position on targets Zero of BST-2 to BST-4), the gate transistor Q1 starts conducting by the forward current between base and emitter elements across resistor R38, through target electrode number one of the switching tube BST-5. This current passes in series with the main gate-transistor Q11 and resistor R39, the reverse current through the latter of which cuts off conduction of the gate transistors Q2 to Q10. The arrival of input pulses at flip-flop trigger circuit in block 11 alternates its state of conduction, and shifts the beam of BST-1 from target one to target nine sequentially. At the end of target nine when a following negative pulse arrives upon the even grids of BST-1, the beam shifts upon target zero, and remains locked in this position without further shifting; until a negative pulse is impressed upon the grid G1. During transition per od from target nine to target zero of BST-1, a positive pulse is transmitted to the control grid of amplifier tube V19, through coupling capacitor C14. This positive pulse is amplified and phase inverted in the anode circuit resistor R40 of V19, and applied upon the control grid G1 of BST-2, through coupling capacitor C15 from across load resistor R41. The beam of BST-2 shifts from target zero to target one, and thereon to target nine by the alternate negative pulses upon control grids G2 and G3. At the end of target nine, the following negative pulse upon even grids G2 shifts the beam upon target zero, and is locked in this position. During this transition, a positive pulse is applied upon the control grid of amplifier tube V20, through coupling capacitor C16. This negative pulse is amplified and phase inverted across plate circuit resistor R42, of V20, and applied upon the control grid G1 of BST3, through coupling capacitor C17, and from across load resistor R43; shifting the beam of BST-3 from target zero to target one. The following negative pulses upon control grids G2 and G3 shift the beam sequentially to target nine, and to target zero to get locked thereat. The positive pulse from target nine is applied upon the control grid of amplifier tube V21 through coupling capacitor C18. This positive pulse is amplified and phase inverted across plate circuit resistor R44, and applied upon the control grid G1 of BST-4, through coupling capacitor C19 and from load resistor R45; shifting the beam from zero target to one target. The following alternate negative pulses upon control grids G2 and G3 shift the beam sequentially to target nine, and to target zero in a stationary position. During transition period from target nine to target zero, a positive pulse is transmitted to the control grid of tube V22, through coupling capacitor C20. This positive pulse is amplified and phase inverted across plate circuit resistor R46, and applied upon the control grid G1 of BST-1, through coupling capacitor C21 and from across load resistor R47; shifting the beam of BST- 1 from zero target to number one target. In this position of beam projections in BST1 to BST-4, the counting process continues in a cyclic mode. At this starting point, however, a pulse voltage is transmitted to the input of flip-flop circuit in block 12, via coupling capacitor C22 and input terminal lead 13. The flip-flop in block 12 alternates its state of conduction, and produces a negative pulse across load resistor R37. This latter pulse voltage is applied upon the even control grids of BST-5, shifting the "beam from target number one to target number two. At this point, the forward current through R38 is released, and a forward current is passed through resistor R48 by the number two target of BST-5. 'Ihus, gate transistor Q1 is cut off from conduction, and current supply to the BST switching tubes is now supplied in series with gate transistor Q2 and the main gate-transistor Q11. As the cyclic operation of BST-1 to BST-4 continues, the beam of BST-5 keeps on shifting sequentially (once at each said cycle) to the 10 tenth target, which in turn controls the on-and-oif operations of gate transistors Q1 to Q10.

Within one cyclic operation of beam switching tubes BST-1 to BST-4, 36 useful operations are obtained, as one of the ten targets of these tubes is used as a holding position of the beam. The fifth beam switching tube BST-5, is used as a gate control for each cyclic operation of BST-1 to BST-4. Accordingly, all ten targets of BST-5 are made useful, which renders 360 useful opera-tions. Each useful target of the BST-1 to BST-4 draws current through ten gated resistors, in series with isolating diodes, and in series with separate gate-transistors. For example, the target number one of BST-1 draws current through resistor R1, in series with isolating diode D16, when gate-transistor Q1 is conducting. Also, this target one draws current through resistor R2, in series with isolating diode D17, when gate-transistor Q2 is conducting. Only two resistors and two diodes.

are shown associated with each target; but actually ten resistors and ten isolating diodes are used in conjunction with the transistors Q1 to Q10. Of course, any number of these parts may be utilized, according to a particular number of sample distribution desired.

The particular arrangement of resistors, for example, the resistors R28 to R30, is used as one Way of dividing the forward current from base to emitter of transistors Q1 to Q11; as the high current imposed by V17 and the targets of BST-5 might damage these transistors. 0f course, such circuitry can be modified, if so desired. Also, these transistors may be replaced by vacuum tubes, if so desired. Further, the vacuum tubes V19 to V22 may be replaced by transistors, if so desired. The diodes D9, D10, and D18 to D23 across load resistors R26, R27, R41, R43, R45, R47, R37 and R49, respectively, are used to suppress the positive pulse voltages developed across said resistors; in application upon the control grids of beam switching tubes BST-1 to BST-5. The beam switching tubes BST-1 to BST-5 are shown having a common cathode bias circuit comprising resistor R45 and bypass capacitor =C23. Due to characteristic variation of these tubes in manufacture, however, separate cathode bias circuits may be used, if so desired. For the same reason, separate bias sources may be used for the control grids of these beam switching tubes, instead of obtaining said bias from the common junction point of voltage dividing resistors R46 and R47 the latter being bypassed by capacitor C24.

Sample Storage System In reference to the arrangement of FIG. 4, the useful sampling operations were referred to the pulse voltages developed across plurality of resistors connected to each target of the beam switching tubes BST-1 to BST-4, in series with isolating diodes. The outputs of these plurality of resistors are used as distribution signals for storage samples of the sound wave. The circuitry of this storage system is shown in detail in the arrangement of FIG. 5, wherein, the beam switching tube BST may represent any one of the tubes BST-1 to BST-4 in FIG. 4. Accordingly, the tube BST in FIG. 5 will be referenced as a typical example of the operating conditions of any one of said beam switching tubes.

Assume initially that a forward current is made to pass from base to emitter of transistor Q12, by a switching current from terminal (B). Assume also that the beam of BST (in FIG. 5) impinges upon target number one, and current flows through resistor R48 in series with isolating diode D24. The negative voltage drop across this resistor is transferred and stored in storage capacitor C25, through coupling capacitor C26 and isolating diode D25, and also in series with the secondary coil of transformer T1, transistor Q12, and bias battery B3. The bias battery B3 is polarized in opposition to the voltage developed across R48, but is less in magnitude than the latter voltage, so that the storage in capacitor C25 is equal to the voltage developed across R48 minus the bias voltage of battery B3. During this storage period, a voltage (representative of the sound wave) of unpredictable polarity exists across the secondary coil of transformer T1, which further determines the quantity to be stored in capacitor C25. For maximum operational conditions, the bias voltage of battery B3 would be adjusted to equal half the voltage amplitude as developed across R48, and the peak amplitude of voltage developed across secondary coil of transformer T1 equal the voltage of B3. With such adjustments, maximum modulation of the sample storage in capacitor C25, by the sound wave, will result. Thus When the beam of BST is projected upon target number one, and target current passes through resistor R48 in series with isolating diode D24, a sampled signal-quantity is stored in capacitor C25. Whereas, when said target current passes through resistor R49 in series with isolating diode D26, the pulse-voltage across R49 is transferred to storage capacitor C27, through coupling capacitor C28; at a modulated magnitude. In a similar mode, when the beam of BST is projected upon target number nine, and target current passes through resistor R50, in series with isolating diode D27 the pulse-voltage developed across this resistor is transferred to the storage capacitor C29, through coupling capacitor C30; at a modulated magnitude. Also, when last said current passes through resistor R51 in series with isolating diode D28, the pulse-voltage developed across this resistor is transferred to the storage capacitor C31, through coupling capacitor C32; at a modulated magnitude. Thus it is seen that, as the beam of switching tube BST shifts from one target to another sequentially, modulated sample-voltages are stored in capacitors C25, C27, C29, C31, et cetera, sequentially. In order to avoid cross modulation, the bias voltage by B3, and the peak modulating voltage should be less than the maximum allowed. The diodes D32 to D33 are used as load impedances at the open ends of coupling capacitors C26, C28, C30, C32, etc.; and they may be replaced by resistors, instead. The advantage of diodes, however, is to offer high impedance during charging periods of the storage capacitors, and low impedance during quiescent periods, so as to recharge the coupling capacitors at faster speeds.

When the forward current from base to emitter of transistor Q12 is switched off from across resistor R52, at terminal (B), this transistor stops conducting, and the only electrical path is represented by resistor R53. As the beam of switching tube BST continues shifting from one target to another, the storage capacitors are discharged in series with R53. But this resistor is chosen of high value, so that any discharge during a transient period is negligible. Accordingly, the resistor R53 is coupled to the control grid of cathode follower tube V23, so that the stored potentials across said storage capacitors are resampled and reproduced during the reproduction period for said frequency transposition. The original waveform of the sound is shown graphically at a, and the reproduced waveform is shown by the pulses at b, in proportional amplitudes. These output pulses may be obtained either from the anode circuit resistor R54 and coupling capacitor C33, or cathode circuit resistor R55 and coupling capacitor C34, of output tube V23.

During rewrite period, the storage capacitors C25, C27, C29, C31, etc.; must be discharged quickly from their charged states, so that new samples may be stored. The discharge of these capacitors is accomplished through isolating diodes D34 to D37, in series with normally inoperative transistor Q13. At the beginning of rewrite period, a forward current pulse is applied to the base of transistor Q13, at terminal (D), which renders it conductive and discharges said storage capacitors in series with last said diodes. Thus, write and read conditions 12 are effected by the circuit arrangement in FIG. 5, in sampled bits.

Due to characteristic variation of beam switching tubes in manufacturing process, it may be necessary that the voltage developed at the targets of said tubes be clamped. This condition may be easily secured by adding diodes D38, D39, etc., at these target terminals and connected in parallel to a reference voltage source. Since voltage isolation is required during clearance of beam switching tubes, however, this reference voltage source must also be switched on and off at the proper moments. One way to secure this switching action is to produce the reference voltage in series with a grid controlled vacuum tube, so that it may be switched on and off. As shown in the drawing, the reference voltage is produced across cathode circuit resistor R56 of cathode follower tube V24, the control grid of which is normally biased to onposition from across resistor R57 in series with normally operating transistor Q14. The base of this transistor is connected in parallel with the base of transistor Q11 in FIG. 4, so that during reset period Q14 is also rendered non-conductive, the condition of which impresses a large negative voltage upon the control grid of V24, in series with B4, and thereby rendering V24 non-conductive during said reset pulse period.

Sample Distribution System, Utilizing Transistors FIG. 6 is another arrangement for sample distribution, wherein, transistor flip-flops are used, instead of beam switching tubes. The circuitry, however, is different than conventional flip-flop counting systems, and it provides sequential distribution of control pulses. The arrangement provides pairs of cross-controlled flip-flop circuits, each having first and second outputs and driving inputs, the first and second inputs of which are connected in parallel, respectively, and excited in alternate time periods.

The first of the first pair of flip-flop circuits comprises transistors Q15, Q16, having collector circuit resistors R58, R59, and voltage dividing and coupling resistors R60, R61, and R62, R63. The second of the first pair of flip-flop circuits comprises transistors Q17, Q18, having collector circuit resistors R64, R65, and voltage dividing and coupling resistors R66, R67, and R68, R69. The first of the second pair of flip-flop circuits comprises transistors Q19, Q20, having collector circuit resistors R70, R71, and voltage dividing and coupling resistor R72, R73, and R74, R75. The second of the second pair of flip-flop circuits comprises transistors Q21, Q22, having collector circuit resistors R76, R77, and voltage dividing and coupling resistors R78, R79, and R80. Transistors Q15 to Q22 are chosen of the tetrode type, so that collector current through any one of these transistors may be made to depend upon simultaneous forward currents of the two independent base elements contained therein, thereby providing two separate inputs for each of said first and second driving inputs. These pairs of flip-flops are arranged in sequential order, in a manner that, the said second outputs of succeeding flip-flops are directly coupled to one of said two separate inputs of said first inputs, and the first outputs of return-order flip-flops are directly coupled to one of the two separate inputs of said second inputs. By such an arrangement, it is possible to shift the on-and-off operating states of succeeding flip-flops sequentially, by alternate driving signals, either in forward or backward direction.

In operation, assume that transistors Q15, Q17, Q19, Q21 are initially conducting, and transistors Q16, Q18, Q20, Q22 are non-conducting. When a negative pulse from flip-flop in block 14 is impressed upon resistor R82, backward current is imposed from base to emitter of Q15 and Q19; rendering these transistors non-conductive. Transistor Q16 of the first flip-flop becomes conductive in a stabilized state. On the home return of the pulse across R82, however, transistor Q19 becomes conductive again, due to the fact that, a forward current from one of its base elements to emitter is constantly supplied by direct coupling from the output of conducting Q18, and a backward current from one of the base elements to emitter of Q20 is constantly supplied by direct coupling from the output of non-conducting transistor Q21. Thus when a driving pulse appears across R82, only the first flip-flop changes its state of operation. When the following negative pulse appears across resistor R83, forward current is imposed from one of the base elements to emitter elements of transistors Q17 and Q21; rendering these transistors non-conductive. When the input pulse across R83 subsides, the second flip-flop, comprising Q17 and Q18, remains stabilized in the changed state, whereas, the fourth flip-flop, comprising Q21 and Q22, returns to its original operating state, by reason of said direct intercouplings, as described by way of the first flip-flop. As these alternate negative pulses continue across R82 and R83, the flip-flops change their states of conductions sequentially, until transistors Q15, Q17, Q19, Q21 are nonconducting, and transistors Q16, Q18, Q20, Q22 are conducting. In this condition, the direct intercouplings are in the reverse direction, and accordingly, backward sequence (fourth flip-flop toward first flip-flop) of flip-flop operation may be effected by applying alternate input negative pulses upon resistors R84 and R85, from the output of flip-flop circuit in block 15. For example, by applying a negative pulse across R85, Q22 becomes non-conductive, and Q21 conductive. During the following pulse across R84, Q20 becomes non-conductive, and Q19 conductive; etc. Thus it is seen that the circuit arrangement of FIG. 6 provides forward and backward counting, to increase the capacity of counting with lesser number of component parts.

The input driving pulses are received from block 16, through alternate gate in block 17. This gate admits the pulses from block 16 to either block 14 or block 15, according to its state of operation, which is determined and controlled by the output pulses of reset pulse producing block 18.

The distributed signal pulses are stored in individual capacitors, as described by way of the arrangement of FIG. 5, and only one typical example of storage is shown in the drawing. For example, the negative pulse produced across R58 is stored in storage capacitor C35, in series with diode D40, through coupling capacitor C36, and from across load resistor R86. The output load resistor R87, and parallel connected diode D41, represent the same component parts R53 and D29, in FIG. 5. The modulating parts are not shown in FIG. 6, as these are already explained previously. The diode D42 is shown to indicate that the storage capacitor C35 is to be discharged through said diode, during re-write period, as described previously, by way of FIG. 5. It will be well worth to mention here that the value of coupling capacitors C36 should be arranged to cause least cross-modulation, for example, when conducting transistor Q19 is rendered nonconductive momentarily and on again; the discharge period of said coupling capacitors not being fast enough to cause erroneous storage.

With the exemplary arrangements, as shown, it will be obvious to the skilled in the art that, various modifications, adaptations, and substitutions of parts may be made without departing from the spirit and scope of the invention.

What I claim is:

In speech sound waves containing a plurality of wave components in integral harmonic relation to a fundamental component, but wherein the frequency of said fundamental varies randomly, the system of shifting the resonances of said plurality of wave components to regions where their integral harmonic relations remain constant with respect to a reference fundamental component, the system comprising means for producing speech sound waves having varying fundamental frequency components; means for selecting and forming alternate switching waves at the varying fundamental frequencies from said produced waves; an onand off-gating means having input and output; means for applying the produced sound waves to the input of said gating means, and means for operating the gating means in on-and-off positions by said switching waves, thereby producing the sound waves in on-and-off states at the output of said gating means at said selected frequencies; a frequency-controlled pulse wave generator normally adjusted for producing pulse waves at a sampling frequency of the produced sound waves; a pulsed sample storage means; means for sampling the output waves of said gating means by said pulse waves, and means for storing these samples in said storage means; a reproducing means for reproducing said stored samples under control of pulse waves; a counting means for recording the number of said samples stored in the storage means; a normally inoperative first coupling means between the counting means and said generator; a normally inoperative second coupling means between said reproducing means and said generator; and means for applying said alternate switching waves simultaneously to said first and second coupling means in a phase as to operate them in on-states when the produced complex waves appear at the output of said gating means, whereby first, to impart reproduction of the stored samples by said reproducing means under control of pulse waves from said generator, and second, said counted record to shift the pulse fre quency of said generator by an amount as to produce approximately the same number of pulses as said count during a prefixed reproducing time period equal to one wavelength period of the reference fundamental frequency aforementioned, thereby effecting the desired frequency conversion of the original speech sound waves.

References Cited in the file of this patent UNITED STATES PATENTS 2,705,742 Miller Apr. 5, 1955 2,708,688 Kalfaian May 17, 1955 2,921,133 Kalfaian Jan. 12, 1960

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