US2848161A - Analogue multiplication device - Google Patents

Description

Aug. 19, 1958 H` J. WOLL AANALOGUF.: MULTIPLICATION DEVICE Filed 0G13. 5l, 1952 J' Z A el (was) INVENTOR.

TTORNE I.

United States Patent O i AN ALOGUE MULTIPLICATION DEVICE Harry J. Woll, Audubon, N. J., assignor to Radio Corporation of America, a corporation of Delaware Application October 31, 1952, Serial No. 317,991

16 Claims. (Cl. 23S-61) This invention relates to electronic analogue computingl devices and more particularly to an improvement in `an electronic analogue multiplication circuit.

The problem of obtaining the product of two voltages is one-which occurs in analogue electrical systems which perform computations aimed at solving mathematical problems. The prior art is replete with a plurality of devices all intended to provide a product of two or more voltages. These devices are more or less accurate, depending upon What definition real accuracy is given.l It will be seen, however, that the higher the degree of acouracy required, and the greater the speed required for the multiplication operation, the more complex the circuitry to provide such multiplication.

A single multigrid tube of the type wherein one grid controls the current in theelectron stream while a second grid contro-ls the portion' of the total electron stream that Hows into the plate circuit, 4is admirably suited as a simple and rapid multiplication device and has long been so recognized.

A brief description of a circuit of this type is found on page 152 of a book by Seely, entitled Electron Tube Circuits, published by McGraw-Hill Book Company. The accuracy of such a multigrid tube, when used as a multiplier is not too good, but it has been used despite this defect, in view of the simplicity of the circuit.

It is an object of the present invention to provide an improved multiplication circuit using a single tube for the multiplying process. A

It is a further object of the present invention to provide a'novel and simple multiplication circuit.

Still a further object of the present invention' is to provide a multiplication circuit using a single tube which provides more accurate results than heretofore obtainable with such circuits.

These and other objects of theinvention are achieved by providing circuitry wherein at least two voltages to be multiplied 4are applied to two grids of a single multigrid electron tube. The first of these two grids controls the cathode current of the tube and the second of these two grids controls the ratio of plate current to cathode current. Output from the tube Vis appliedl across a voltage divider which has an output tap thereon. Negative potential is applied to one end of the voltage divider and its other end is connected to the anode of the tube. Undesirable current components which ilow in the voltage divider from the plate of the tube are cancelled by means of resistors which are connected between the two concerned control grids and the voltage tap. Thereby, when signals are applied, the cancellation current Hows through these resistors. The tube is biased to operate on the most linear portion of its characteristic curve. In a further embodiment of the invention, still better linearization is provided by supplementing the above structure with feedback from the plate and screen of the tube to the grid which controls the gain of the tube.

The novel features of the invention as well as the invention itself, both as to its organization `and method of Patented Aug. 19, 1958 ICC 2 operation, will best' be understood from the following description when read in connection with the drawings, wherein Figure l is a drawing of the basic element used in presently known single tube multiplication circuits,

Figure 2 is a drawing of the circuit of an embodiment of the invention,

Figures 3 and 4 are curves, respectively, of output voltage vs. the voltage applied to the irst control grid and the voltage applied to the second control grid.

Figures 5', 6` and 7 are circuit diagrams of further enibodiments of the invention.

Reference is now made to Figure 1 wherein there' is shown a multigrid tube 10 of the type employed for multiplying two voltages. A preferred tubeV is commercially sold as an RCA 6SA7. Two' voltages to be multiplied, designated as Ael and Aeg are respectively applied'to first and second inputterrminals 14, 16 respectively connected tother's't control' grid 18 and the secondA control grid 29 ofthe tube l0. The anode 22 of the tube is connected to B'-}-. The cathode 24 of the tube is connected to ground. The screen grid 26' is connected to ascreen 'g'ridv'oltage supply. The suppressor grid 2S of the tube l-.glritinbl is the transconductanceifrorngridiif` tothe with both grid voltages at reference, i. e., Ae1='Ae2=0.

It is easy to obtain a current,

=obolboaiAer+aob1`Ae2` v If-r this is subtracted from ip, the remainder ip l'cll'libfAlAegl is propor'tio'nal.tol the product of the instantaneous grid voltages. l

One ty'p'e f`pent'agrid converter tube that may beusd for analogue multiplication,l as ,previously indicated, is the commercially available 6SA7. Froml the'plate characte'ristics of theV tube it may be seentha't thelinearityof the tube is improved as the amplitude of'grid'voltage deviations isreduced. Accordingly, if e1 is allowed to vary from-2.8 to' 5.5 volts and e2 is allowed to vary from Oto -8 volts, the resultant plateV c'urrent'ip, is essentially One way of referencing the grids and thus placing thel tube on the most linear portion of its characteristic curve 1s to bias the tube grids in the manner shown in Fig. l by insertlng a biasing battery in the grid lead. Another way is the Well known one of applying a bias to one end of a grid leak resistor (not shown here).

Referring now to Figure 2, there is shown an embodiment of the invention wherein there is shown a means to provide a current to cancel the undesired plate current terms Two terminals, 14, 16 to which the Ael and Aeg voltages are respectively applied, are shown. The amplitude ranges of Ael and Aeg fall within the limitations prevrously indicated. This is not to be construed as any limitation upon the invention, since scale factors may be easily worked out by anyone skilled in this art. Voltages to be multiplied can be attenuated by a factor to fall within the operating range of the device shown. The product output of the circuit may then be multiplied by the attenuation factor applied to the input voltages. The first and second terminals are respectively connected through isolating resistors 15, 17, to the rst and second control grids 18, 20 of the tube. An anode load resistor 30 is connected to the anode 22 of the tube. Operating potential is applied to the tube through this resistor and also, directly to the screen 26 of tbe tube. The two control grids are biased through their respective grid return resistors 32, 34 so that the tube operates over the most linear portion of its operating characteristics. The tube cathode 24 is grounded.

A voltage divider 36 is provided with an output tap 38 thereon. This voltage divider has one end connected to the anode of the tube and the other end to a source of negative potential. Resistors 40, 42 are connected between the input terminals 14, 16 and the output tap 38.

A voltage, kelez, representative of the product of the two voltages is obtainable at the output tap 38. The values of the resistors 40, 42 connected between the two input terminals and the output tap as well as the position of the output tap are selected so that a current ows to the output tap from the input terminals which has an amplitude sullicient to cancel the undesirable terms in the current which flows in the voltage divider from the plate of the tube. Thus the output obtainable from the output tap is a term 0.136 times the product of the two voltages applied to the input terminals. Values of the resistors used to illustrate an embodiment of the invention which was built are shown on the drawing. Considering scale factors again, the maximum voltage applied to each of the input terminals should be considered as units. Accordingly, the product obtainable at the output tap should be considered as a number less than one. In other words, if the voltages applied to be multiplied are on the order of 0.6 and 0.7 referenced to unity, the output product is .l36 0.6 0.7=.057l2.

The solid curve of Fig. 3 is a plot of the voltage applied to the rst control grid against the output at tap 38 which is obtained with the circuit shown in Fig. 2. Three separate curves for three conditions for the second control grid voltages are shown `(l) wherein the applied voltage is zero, (2) wherein the applied voltage equals 4 volts, and (3) wherein the applied voltage is equal to 8 volts. Ideal multiplication is shown as a dotted line.

Figure 4 shows the results obtained with the circuit shown in Fig. 2 by varying the voltage applied to the second grid from zero to 8 volts where the voltage applied to the rst grid is fixed at volts, 1.5 volts and 2.7 volts. The variation from the ideal multiplication may be seen by comparing the dotted lines representing such ideal condition with the solid curve. The linearity of the circuit can be considerably improved and a closer realization to the ideal condition obtained if inverse feedback is applied to the first control grid.

Figures 5, 6 and 7 show circuit diagrams of embodiments of the invention wherein inverse feedback is applied to the first control grid. This can be applied in a manner to improve linearity without reducing the range of operation. Since the voltage applied to the second control grid has little effect on the cathode current, either an unbiased cathode resistor as shown in Fig. 5, or feed- 'back from the sum of the plate and screen current to grid #l as shown in Figs. 6 and 7, can be used to linearize these curves.

Referring to Fig. 5, the basic multiplication circuit is shown with similar functioning parts having the same reference numerals as are used in Fig. 2. The circuit linearity is improved by using a cathode resistor 44, connected between cathode 24 and ground of the pentagrid converter tube 1t). Care must be taken, however, that the voltage applied to the second control grid is applied from that grid to cathode and not from that grid to ground. This is done by feeding back the cathode voltage to be added to the voltage applied to the second control grid.

Accordingly, a buffer and a phase inverter circuit are used consisting of a double triode 50 having a common cathode resistor S2 and a plate load resistor 54 connected to one of the anodes 56 in the tube. The voltage from the cathode 24 is applied to the grid 58 of the buffer portion of the double triode which, acting as a cathode follower, applies a signal to the phase inverter portion of the double triode. Voltage equal to the cathode voltage is applied through a summing resistor 60 to the second input terminal. Operational level setting bias is applied through the resistor 34 connected between the junction of the two resistors 60, 17 coupled to the second control grid. Similarly, bias is applied to the rst control grid through another resistor 32.

Referring to Figure 6, there may be seen a second method of using feedback to correct for linearity irregularities. The tube 10 is biased and connected as previously shown. As in Figure 5, similarly functioning components have the same reference numerals applied. Feedback between the plate 22 and screen grid 26 and the first control Agrid 18 is obtained by means of a first and a second feedback resistor 64, 66 respectively connected between the plate and screen and the first control grid.

Figure 7 shows a preferred embodiment of the invention having a refinement which corrects for some of the diiculties occasioned by use of the feedback resistors from the plate and screen. In order to obtain sufcient feedback voltage to correct for the non-linearities in the transfer characteristic between the rst control grid and the cathode of the tube, the resistors 30, 68 in the plate and screen circuits in some cases have to be made rather large. This may result in a voltage appearing, from the screen 26 to cathode 24, which is large enough to have undesirable eiects on the accuracy of multiplication. This occurs because an A.C. voltage appearing on the screen generates higher order products of Ael and Aeg in the plate current. This diiculty is overcome by inserting a means to isolate these alternating currents from the screen. This consists of a vacuum tube 70 having a plate 72, cathode 76, and control grid electrode 74. This vacuum tube is connected with its plate 72 in series with the screen load resistor 68 and with its cathode in series with the screen grid 26. The control grid 74 of the tube 70 has applied thereto a fixed potential. The feedbackresistor 66 to control grid No. l is connected from the anode of this isolation tube 70. Output from the output tap 38 is applied to a variable potentiometer 80 which is connected to the control grid 82 of a following amplifier tube 84. This following tube 84 has resistors 86, 8S respectively connected to anode 90 and cathode 92 to provide a push-pull output. The potentiometer in the output sets the operating level for the subsequent tube 84 in the event that the characteristics of this tube change or the tube is changed altogether.

It is desirable to apply the voltages to be multiplied to the first and second input terminals from low impedance sources so that these voltage:` are not affected by any currents flowing through these sources. The values.y forY the various resistors used, as well as operating potentials applied, are shown in the circuit diagram in order to show an operative embodiment. This, however, is notto be construed as a limitation upon the invention, since other values may be used, as well as other tubes, and the inventive concept described herein will Still apply.. The suppressor grid may be coupled to receive a voltage equal to e2 instead of being returned to the cathode. This may improve the linearity of operationof some tube types.

There has been described and shown above a simple, efficient and novel analogue multiplication circuit, employing a single tube as a multiplier.

What is claimed is:

1. An analogue multiplication circuit for obtainingthe product of a plurality of voltages comprising an electron discharge tube having an anode, a cathode, and a plurality of control electrodes, means applied to the electrodes of said tube to bias it on the linear portion. of its operating characteristic, means to apply each of said plurality of voltages to a different one of said control grids, an output terminal, means coupling said output terminal to said tube anode, means coupled from said output terminal to each of the control electrodes to which said plurality of voltages are applied to supply currents to said output terminal to be added in opposition to undesirable linear anode current components to provide an output at saidl output terminal representative of theproduct of said plurality of voltages.

2. An analogue multiplication circuit for obtainingthe product of a first and a second voltageV comprising an electron discharge tube having a cathode, an anode, and aplurality of control electrodes, an anode load connected to said anode, an output voltage divider having; a tapk and being connected at one end to said anode, means toapply ay bias to said tube to cause it to operate: on. the linear portion of its characteristics, a first and a secondinput terminal to which said first and secondv voltages are' applied, means to couple said first and second'inpuLterminals to a first and second one of said control electrodes, and means coupling said first and second input terminals to said tap to supply currents thereto in linearproportion to said rst and second voltagesv to be added in opposition to undesirable portions of anode signal present `at said tap whereby to obtain anvoutput from saidvoltage divider tap representative of the product ofsaid two voltages.

3. A circuit for obtaining the analogue product of first and' second voltages comprising an electron discharge tube having -a cathode, an anode -and at least a first and second control grid electrode, an'anode load resistor connected to said anode, a voltage divider resistor having an output tap, said voltage divider resistor having one end connected to said anode, means to apply a negative bias to the other end of said Voltage divider resistor, first and second input terminals to which said first and 4second voltages are applied, means respectively coupling said first and second input terminals to a first and secondA one of said plurality of control electrodes, means tobias said tube electrodes to cause said tube to operate overa linear portion of its characteristics, and first and second resistors respectively coupling said first and second input terminals to said output tap to supply to said output tap currents proportional to said first and Second voltages, said currents to be added in opposition to undesirable linear anode current components present at said output whereby the output at said outputtap is'representative of the product of said first and second .,voltages.

4. An analogue multiplication circuit for obtaining' the product of two voltages comprising an electron discharge tube having an anode, a cathode and at least two control grid electrodes, an anode load resistor connected to said anode, a cathode resistor connected tosaid cathode, a voltage divider having an output tap and having one end connected to said anode, means t'ofapply a negative` potential to the other end of said voltage divider, first and second input terminals to which a different one of said'- two voltages to be multiplied are applied, means to couple Said first and second input terminals to a differentone of said two control grids, means-to apply adopera-tion level setting bias to said first terminal, means to addsaidcathode voltage to said voltage applied to said second terminal, and resistance means coupled from eachof said input terminals to said output tap to supply currents in opposition to undesirable plate current components to provide an output at said tap representativeof the' product of said two voltages.

5. An analogue multiplication circuit as recited in claim 4 wherein said means toadd` said cathode voltage to said voltage applied to said' secondternrinaly includes-a buffer connected to receive said -cathodef voltage,.a-phase inverter connected to receive output from' said buffer, and means coupling output from saidphase inverterv to said second terminal.

6. An analogue multiplication circuit for obtaining. the product of a first and a second voltage comprising-an'electron discharge tube having an anode, a cathode, first, second and screen grid electrodes, an anode-load resistor connected to said anode, a screen resistor, meansk coupling said screen resistor to said screengrid, firstland second input terminals to which said first.` and second voltages are respectively applied, connections between saidl first and second input terminals and said first andvsecond grid electrodes, means to bias said electrodesto position said tube in its linear operating'region, avoltage divider having an output tap, one end of said divider beingl connected to said anode, means to apply a` negative potential to the other end of said divider, firstand second resistorsk respectively connected between saidY firstand second input terminals and said output tap,said resistors having their values selected to permit current flow to said output tap in proportion to said input voltages and to oppose undesirable plate current componentsv flowing; in said voltage divider, and Separate feedback resistors: r'espectively connected between said screen resistor and Asaid anode resistor and said first grid electrode, the val-uesof said feedback resistors being selected to reduceerrorsv in multiplicationV due to any non-linearity in the transfer characteristic between said first grid electrode andl the cathode current of said tube.

7. An analogue multiplication circuit for obtaining the product of a first and a second voltage com'prisinglan electron discharge tube having an anode,l a cathode, first, second and screen grid electrodes, an anode loadresistor connected to said anode, a screen resistor, means coupling said screen resistor to said screen grid, first andnsecond input terminals to which said first and second' voltages are respectively applied, connections betweenY said first and second input terminals and said first `andsecond grid electrodes, means to bias said electrodes to positionsaid tube in its linear operating region, a voltage divider having an output tap, one end of said divider being 'connected to said anode, means to apply a negative potential tothe other end of said divider, first and Vsecond resistors respectively connected between said first and second input terminals and said output tap, said resistors having their values selected to permit current flow to said output tap to oppose undesirable plate current components flowing in said voltage divider, and separate feedback resistors respectively connected between said screen and said anode and said first grid electrode, the values of said feedback resistors being selected to reduce errors in multiplication due to any non-linearity in the transfer characteristic between said first grid electrode and the cathode current of said tube, said means coupling said screen resistor to said screen includes means to prevent undesirable voltages developed across said screen resistor from `being applied to said screen.

8. An analogue multiplication circuit for obtaining the product of a lirst and a second voltage comprising an electron discharge tube having an anode, a cathode, irst, second and screen grid electrodes, an anode load resistor connected to said anode, a screen resistor, means coupling said screen resistor to said screen grid, iirst and second input terminals to which said rst and second voltages are respectively applied, connections between said iirst and second input terminals and said rst and second grid electrodes, means to bias said electrodes to position said vtube in its linear operating region, a voltage divider having an output tap, one end of said divider being connected to said anode, means to apply a negative potential to the other end of said divider, rst and second resistors respectively connected between said irst and second input terminals and said output tap, said resistors having their values selected to permit current ow to said output tap to oppose undesirable plate current components owing in said voltage divider, and separate feedback resistors respectively connected between said screen and said anode and said rst grid electrode, the values of said feedback resistors being selected to reduce errors in multiplication due to any non-linearity in the transfer characteristic between said iirst grid electrode and the cathode current of said tube, said means coupling said screen resistor to said screen includes a second electron discharge tube having anode, control grid and cathode electrodes, said second tube cathode being connected to said screen grid, said second tube anode being connected to said screen resistor, said rst feedback resistor having one end connected to said second tube anode, and means to apply a fixed potential to said control grid.

9. A multiplication circuit comprising an electron discharge tube having anode, cathode, and a plurality of control electrodes, separate input means to apply each of a plurality of input signals to a diiierent one of said control electrodes, output means coupled to said anode, and separate impedance means coupled from said separate input means to said output means to supply linear portions of said input signals to said output means in opposition to undesirable anode signal components, said multiplication circuit being coupled throughout for direct current paths.

10. A circuit for obtaining the product of a plurality of input signals comprising an electron discharge tube having anode, cathode and a plurality of control electrodes, separate input means to apply each of saidplurality of input signals to a dierent one of said control electrodes, an output terminal, means coupling said output terminal to said anode electrode, and means for eliminating at said output terminal certain anode signal components linearly proportional to said input signals, said eliminating means including separate means cou-pling said separate input means to said output terminal.

ll. A circuit for obtaining the product of a plurality of input signals comprising an electron ldischarge tube having anode, cathode and a plurality of control electrodes, separate input means to apply each of said plurality of input signals to a diierent one of said control electrodes, an output terminal, means coupling said output terminal to said anode electrode, means for eliminating at said output terminal certain anode signal components linearly proportional to said input signals, said eliminating means including separate means coupling said separate input means to said output terminal, and inverse feedback means coupled to one of said tube electrodes for improving the linearity of product signals produced at said output terminal.

12. A circuit for obtaining the product of a plurality of input signals comprising an electron discharge tube having anode, cathode and a plurality of control electrodes, separate input means to apply each of said plurality of input signals to a different one of said control electrodes, an output terminal, means coupling said output terminal to said anode electrode, means for eliminating at said output terminal certain anode signal components linearly proportional to said input signals, said eliminating means including separate means coupling said separate input means to said output terminal, and inverse feedback means coupled to one of said tube electrodes for improving the linearity of product signals produced at said output terminal, wherein said electron discharge tube has two anode electrodes, and said inverse feedback means includes separate resistors connecting said anode electrodes to one of said control electrodes.

13. An electronic circuit comprising a tirstelectron discharge tube having anode, cathode, screen and a plurality of control electrodes, a resistor connected to said anode electrode, a screen resistor, a second electron discharge tube having anode, cathode and control electrodes, said second tube anode electrode being connected to said screen resistor, said second tube cathode electrode being connected to said screen electrode, means for applying a xed bias potential to said second tube control electrode, and rst and second feedback resistorsrespectively connected between one of said rst tube control electrodes and said rst tube and said second tube anode electrodes.

14. A multiplication circuit comprising an electron control device having anode, cathode, and a plurality of control electrodes, separate input means for supplying a plurality of input signals to dilerent ones of said control electrodes, output means coupled to said anode electrode, and separate impedance means, one` for each said input means, respectively coupled from said input means to said output means to add linear portions of said input signals to signals at said output means in a sense opposite to undesirable anode signal components to obtain an output signal proportional to the product of said input signals.

15. A multiplication circuit comprising an electron control device having anode, cathode, and a plurality of control electrodes, separate input means for supplying a plurality of input signals to diderent ones of said control electrodes, different paths corresponding in number to said plurality, and output means coupled to said anode electrode and respectively along said paths to said vinput means for adding said input signals in a certain proportion to and in opposition to signals produced at said anode electrode to obtain an output signal proportional to the product of said input signals.

.16. A multiplication circuit as recited in claim 15 wherein said paths each includes a separate resistor coupled to said anode electrode and to said separate input means and a common resistor connected to said separate resistors for receiving currents therein.

References Cited in the file of this patent UNITED STATES PATENTS 2,248,804 Black et al July 8, 1941 2,456,029 Snyder Dec. 14, 1948 2,508,416 Murakami May 23, 1950 2,566,508 Zeidler Sept. 4, 1951 2,598,259 Hogue May 27, 1952 OTHER REFERENCES

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