US2425549A - Calculation checking device - Google Patents
Calculation checking device Download PDFInfo
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- US2425549A US2425549A US552118A US55211844A US2425549A US 2425549 A US2425549 A US 2425549A US 552118 A US552118 A US 552118A US 55211844 A US55211844 A US 55211844A US 2425549 A US2425549 A US 2425549A
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- 238000007792 addition Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
- G06F11/104—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error using arithmetic codes, i.e. codes which are preserved during operation, e.g. modulo 9 or 11 check
Definitions
- aXb aXb In devising a structure embodying the above principles, for checking a multiplying computation there is provided a relay chain which obtains the remainder of the sum of the digits of a product divided by 3, a second relay chain which obtains the remainder of the sum of the digits of the multiplier divided by 3 and a third relay chain which obtains the remainder of the sum oi the digits of the multiplicand divided by 3.
- Magnets R2 shift contacts RZa to direct the circuit from wires 30 to wires 3
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Description
H. P. LUHN CALCULATION CHECKING DEVICE Aug. 12, 1947.v
Filed Aug. 51, 1944 2 sheets-sheet 1 FIG.
ATTORNEY A118- 12, 1947. H. P. LUHN CALGULATION CHECKING DEVICE Filed Aug. 31, 1944 2 Sheets-Sheet 2 FZG. 2
INVENTOR HAMS P. UH/v ATTORNEY Patented Aug. 12, 1947 UNITED STATES PATENT OFFICE CALCULATION CHECKING DEVICE Hans P. Luhn, Armonk, N. Y., assignor to International Business Machines Corporation, New York, N. Y., a corporation of New York Application August 31, 1944, Serial No. 552,118
(Cl. 23S- 61) 3 if theyleave the same remainder on division byl 3. Thus, 1, 4, 7, 10, 13, 16, 19, etc., are all congruent modulo 3 since they leave the remainder 1. Also 2, 5, 8, 11, 14, 17, 20, etc., are congruent modulo 3 since they leave the remainder 2 and 3, 6, 9, 12, 15, 18, etc., are congruent modulo 3since they leave the remainder 0.
It is also known that a number is congruent modulo 3 if the sum of its digits is likewise congruent to the same modulus. Thus, 785 is divisible by 3 with a remainder 2 and the sum of the remainders (1 for 7, 2 for 8 and 2 for 5) which is is divisible by 3 with the same remainder 2.
In multiplying or adding congruences with respect to a fixed modulus 3 comparison for checking purposes may be carried out by handling the remainder of a digit instead of the digit itself and by following such procedure the numbers involved remain small i. e. for modulus 3 only the digits 1, 2 and 0 become involved.
By always replacing any number a by the number from the set 0, 1, 2 to which it is congruent, we need only use the following addition and multiplication tables:
aXb aXb In devising a structure embodying the above principles, for checking a multiplying computation there is provided a relay chain which obtains the remainder of the sum of the digits of a product divided by 3, a second relay chain which obtains the remainder of the sum of the digits of the multiplier divided by 3 and a third relay chain which obtains the remainder of the sum oi the digits of the multiplicand divided by 3.
A relay multiplying device simplied to multiply only the digits 1 and 2 is controlled by the two-factor chains and the product is compared with the result of the addition of the digits of the initial product. Thus, where it is desired to check the multiplication 74 265=19610, the apparatus performs the additions to restate the problem as and then multiplies 2 by 1 to obtain 2:2. Com-4 parison of the opposite sides of the equation indi-l cate correctness or incorrectness.
For checking division, for example,
the quotient is handled as the multiplicand and the dividend is handled as the product. For addition a multiplier of 1 is used. Thus, to compare a sum 265 with another sum 265, the operationsl performed are as though the problem were resulting in 1 1=1 or 1=1.
Other objects of the invention will be pointed' out in the following description and claims and. illustrated in the accompanying drawings, which disclose, by way of example, the principle of the invention and the best mode, which has been contemplated, of applying that principle.
In the drawings:
Figs. 1 and 2 taken together constitute a wiring` diagram of the apparatus.
In the drawings, magnets designated PR represent relay magnets that may be energized from some suitable source such as keys or record cards, in accordance with the value of a product. Each denominationally ordered digit is represented by combinational energization of four magnets PR having the values 1, 2, 4 and 5, so that for a product such as 19610, magnets PR will be energized as emphasized by crosshatching in the left hand vertical column of magnets.
Each magnet PR controls a set of three contact arms of contacts generally designated PRa, and these are interconnected to form an adding chain extending through three wires 20 to three magnets Rl. The wiring arrangement of this chain is such that it transmits to the wires 20 (valued 0, 1 and 2) the sum of the digits represented on magnets PR, less the greatest multiple of 3 in such sum. In other words, the chain obtains the remainder resulting from the sum of the digits divided by 3. Viewed in another manner, it may be said that the chain adds the digits represented on magnets PR and in adding them casts out or ignores 3s.
The operation may perhaps best be understood by tracing the circuits for a specific problem. In the left hand chain for magnets PR the circuit emphasized by heavy lines represents the current path involved in the summation of the digits of the product 19610 with 3s cast out. The sum of these digits is 1'7 and this divided by 3 leaves a remainder of 2', in accordance with which the 2 magnet RI is energized through the 2 wire 2D.
Tracing the circuit in detail, when key contacts K are closed wire 22 is grounded to complete a circuit to wire 23 having a zero value, which circuit continues through the normally closed right hand contacts PRa of the 5, 4 and 2 magnets PR in the tens of thousands order. Since the 1 magnet PR is energized and its contacts PRa shifted, the circuit switches over to the 1 valued wire of a group of three designated 24. From here it continues through the shifted contacts of the 5 and 4 magnets PR and the normal'contacts of the 2 and 1 magnets PR in the thousands order to the 1 valued wire of the group designated 25. This 1 represents the remainder of the sum of 1 and 9 divided by 3.
From the 1 wire 25 the circuit continues through the contacts of the hundreds order to the 1 wire of a group 26, representing the remainder of 1-|-9|6 divided by 3. The circuit then continues through the tens order contacts PRa where the setting of a 1 directs the circuit to the 2 wire of a group designated 21 and since there is no signiicant setting in the units order the circuit extends to the 2 wire 20 and the 2 magnet Rl, and wire 28 to positive side of a suitable current source.
In an exactly similar manner, the vertical column of magnets MP is energized in accordance with the value of a multiplier and in this case a setting of 14 is indicated with the circuit through its contacts emphasized from wire 22 to the 2 wire 29. The remainder of 7|4 divided by 3 is 2 and therefore, through the 2 wire 29 there is an energization of the 2 magnet R2.
The third column of magnets MC is energized in accordance with a multiplicand amount 265 and the contacts MCa direct a circuit from wire 22 through the emphasized path to the 1 wire 30 representing the remainder of 2|6|5 divided by 3. It follows, therefore, that with a product (or a dividend), a multiplier (or a divisor) and a multiplicand (or a quotient) set on the magnets PR, MP and MC, the closure of contacts K will cause concurrent completion of circuits to wires 20, 29 and 30, in accordance with the related remainders.
Magnets R2 shift contacts RZa to direct the circuit from wires 30 to wires 3| in accordance with the remainder of the product of the digits represented on wires 29 and 30, divided by 3. For the example chosen, these digits are 2 and 1 and therefore their product 2 is represented by continuation of the circuit through the 2 wire 3|. Inspection will show that through the simple set of nine contacts R211 all possible combinations of 0, 1 and 2 are taken care of. The following table will indicate the several possible conditions.
wire so 'Magnet R2 Wire 31 tomen-wooo XXXXXXXXX :avaler-Groe Il ll Il Il Il l| Il Molar-occa magnet RI (normal), through the right hand contacts Ria of the 2 magnet Rl (shifted), lamp L3 to positive wire 28.
From the foregoing it is seen that upon setting of magnets PR, MP and MC and closure of key contacts K, there is a practically instantaneous checking of the computation and an indication given of the correctness or incorrectness by lamp L2 and L3. It will be particularly noted that the right hand circuit chain carries out three distinct functions at one and the same time, namely, l-summation of the digits of the multiplicand through contacts MCa, 2-multiplication of the MC and MP digits through contacts R2a, and S-comparison of the PR and MCXMP digits through contacts Rla.
While there have been shown and described and pointed out the :fundamental novel features of the invention as applied to a single modification, it will be understood that various omissions and substitutions and changes in the form and details of the device illustrated and in its operation may be made by those skilled in the art without departing from the spirit of the invention. It is the intention, therefore, to be limited only as indicated by the scope of the following claims:
What is claimed is:
1. In an apparatus of the class described, a set of product relay contacts and connections therethrough, a set of multiplier relay contacts and connections therethrough, a set of multiplicand relay contacts and connections therethrough, each set being adjustable to represent a term of a computation to be checked and the connections therethrough being in accordance .with the table of addition with 3s cast out, a set of product summation magnets operated by the product relay contacts in accordance with the remainder of the sum of the digits set therein, divided by 3, a set of multiplier summation magnets operated by the multiplier relay contacts in accordance with the remainder of the sum of the digits set therein, divided by 3, contacts adjusted by each set of magnets, multiplying circuit connections interconnecting the contacts related to the multiplier summation magnets and the multiplicand relay contacts in accord- Iance with the table of multiplication with 3s cast out, comparison connections between said multiplying connections and the contacts related to the product summation magnets in accordance with the conditions of comparison, and current responsive devices included in said circuit connections to indicate the result of the comparison.
2. Apparatus for checking the approximate correctness of a multiplying calculation coinprising a set of relay contacts for each of the multiplier, multiplicand and product terms, circuit connections for each set of contacts controlled. thereby to establish a current path representative of the remainder of the sum of the digits of the related term divided by 3, a set of magnets in each of the multiplier and product circuit connections for signifying such remainders, means controlled by the multiplier magnets and through the multiplicand current paths for establishing a current path representative of the remainder of the sum of the digits of the said multiplier times the remainder of the sum of the digits of the multiplicand divided by 3, and
means controlled lby the product magnets and through the last named current path for indicating agreement between the product remainder and the remainder of the product of the multiplicand and multiplier remainders.
3. In an apparatus of the class described, a set of contacts settable to represent the remainder of the sum of the digits of a product, divided by 3, a second set of contacts settable to represent the remainder of the sum of the digits of a multiplier, divided by 3, a set of contacts settable to represent the digits of a multiplicand, circuits serially interconnecting the contacts of the last set in accordance with the table of addition with 3s cast out, said circuits continuing in series through the contacts of the second set in accordance `with the table of multiplication with 3s cast out, and further continuing serially through the contacts of the rst set so as to establish a continuous current path through all of said sets of contacts when the set product representation equals the product of the set multiplier representation times the sum of the set multiplicand digits with 3s cast out.
4. In an apparatus of the class described, a set of contacts settable to represent the remainder of the sum of the digits of a product divided by a predetermined digit, a second set of contacts settable to represent the remainder of the sum of the digits of a multiplier, divided by said predetermined digit, a set of contacts settable to represent the digits of a multiplicand, circuits serially interconnecting the contacts of the last set in accordance with the table of addition with said predetermined digit and multiples thereof cast out. said circuits continuing in series through the contacts of the second set in accordance with the table of multiplication with said predetermined digit and multiples thereof cast out, and further continuing serially through the contacts of the iirst set so as to establish a continuous current path through all of the said sets of contacts when the set product representation equals the product of the set multiplier representation times the sum of the set multiplcand with said predetermined digit and multiples thereof cast out.
5. In an apparatus of the class described, a set of contacts settable to represent the remainder of the sum of the digits of a product, divided by 3, a second set of contacts settable to represent the remainder of the sum of the digits of a multiplier, divided by 3, a set of contacts settable to represent the digits of a multiplicand, circuits serially interconnecting the contacts of the last set in accordance with the table of addition with 3s cast out, said circuits continuing in series through the contacts of the second set in accordance with the table` of multiplication with 3s cast out, and further continuing serially through the contacts of the first set so as to establish a continuous current path through all of said sets of contacts when the set product representation fails to equal the product of the set multiplier representation times the sum of the set multiplicand digits with 3s cast out.
HANS P. LUI-IN.
REFERENCES CITED The following references are of record in the le of this patent:
UNITED STATES PATENTS Number Name Date 719,734 Brown Feb. 3, 1903 1,283,293 Poole Oct. 29, 1918 2,241,591 Gates May 13, 1941 2,350,499 Dickinson June 6, 1944 2,364,540 Luhn Dec. 5, 1944 Certificate of Correction Patent No. 2,425,549. August 12, 1947.
HANS P. LUHN It is hereby eertied that error appears in the printed specification of the above numbered patent requiring correction as follows: Column 1, line 38, in the table, for the heading aXb rst occurrence, read a|-b; and that the said Letters Patent should be read with this correction therein that the same may conform to the record of the oase in the Patent Office.
Signed and sealed this 11th day of November, A. D. 1947.
THOMAS F. MURPHY,
Assistant Commissioner of Patents.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US552118A US2425549A (en) | 1944-08-31 | 1944-08-31 | Calculation checking device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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US552118A US2425549A (en) | 1944-08-31 | 1944-08-31 | Calculation checking device |
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US2425549A true US2425549A (en) | 1947-08-12 |
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US552118A Expired - Lifetime US2425549A (en) | 1944-08-31 | 1944-08-31 | Calculation checking device |
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2634052A (en) * | 1949-04-27 | 1953-04-07 | Raytheon Mfg Co | Diagnostic information monitoring system |
US2731196A (en) * | 1951-11-14 | 1956-01-17 | Ibm | Self-checking number punch |
US2910234A (en) * | 1954-11-18 | 1959-10-27 | Ibm | Bit count checking circuit |
US2977048A (en) * | 1946-12-17 | 1961-03-28 | Bell Telephone Labor Inc | Automatic calculator |
US3098994A (en) * | 1956-10-26 | 1963-07-23 | Itt | Self checking digital computer system |
US3166243A (en) * | 1961-12-22 | 1965-01-19 | Rca Corp | Check number computing and printing apparatus |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US719734A (en) * | 1902-06-23 | 1903-02-03 | Hugh Ernest Brown | Addition-tester. |
US1283293A (en) * | 1916-09-05 | 1918-10-29 | Wahl Co | Calculating-machine. |
US2241591A (en) * | 1939-05-24 | 1941-05-13 | Western Electric Co | Calculating machine |
US2350499A (en) * | 1940-12-24 | 1944-06-06 | Ibm | Multiplying machine |
US2364540A (en) * | 1942-10-10 | 1944-12-05 | Ibm | Calculating machine |
-
1944
- 1944-08-31 US US552118A patent/US2425549A/en not_active Expired - Lifetime
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US719734A (en) * | 1902-06-23 | 1903-02-03 | Hugh Ernest Brown | Addition-tester. |
US1283293A (en) * | 1916-09-05 | 1918-10-29 | Wahl Co | Calculating-machine. |
US2241591A (en) * | 1939-05-24 | 1941-05-13 | Western Electric Co | Calculating machine |
US2350499A (en) * | 1940-12-24 | 1944-06-06 | Ibm | Multiplying machine |
US2364540A (en) * | 1942-10-10 | 1944-12-05 | Ibm | Calculating machine |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2977048A (en) * | 1946-12-17 | 1961-03-28 | Bell Telephone Labor Inc | Automatic calculator |
US2634052A (en) * | 1949-04-27 | 1953-04-07 | Raytheon Mfg Co | Diagnostic information monitoring system |
US2731196A (en) * | 1951-11-14 | 1956-01-17 | Ibm | Self-checking number punch |
US2910234A (en) * | 1954-11-18 | 1959-10-27 | Ibm | Bit count checking circuit |
US3098994A (en) * | 1956-10-26 | 1963-07-23 | Itt | Self checking digital computer system |
US3166243A (en) * | 1961-12-22 | 1965-01-19 | Rca Corp | Check number computing and printing apparatus |
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