US20230413467A1 - Power conversion module - Google Patents
Power conversion module Download PDFInfo
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- US20230413467A1 US20230413467A1 US18/459,419 US202318459419A US2023413467A1 US 20230413467 A1 US20230413467 A1 US 20230413467A1 US 202318459419 A US202318459419 A US 202318459419A US 2023413467 A1 US2023413467 A1 US 2023413467A1
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- side transistor
- conversion module
- power conversion
- daughterboard
- motherboard
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Images
Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0048—Circuits or arrangements for reducing losses
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/14—Mounting supporting structure in casing or on frame or rack
- H05K7/1422—Printed circuit boards receptacles, e.g. stacked structures, electronic circuit modules or box like frames
- H05K7/1427—Housings
- H05K7/1432—Housings specially adapted for power drive units or power converters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02K—DYNAMO-ELECTRIC MACHINES
- H02K7/00—Arrangements for handling mechanical energy structurally associated with dynamo-electric machines, e.g. structural association with mechanical driving motors or auxiliary dynamo-electric machines
- H02K7/14—Structural association with mechanical loads, e.g. with hand-held machine tools or fans
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/003—Constructional details, e.g. physical layout, assembly, wiring or busbar connections
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/144—Stacked arrangements of planar printed circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/14—Mounting supporting structure in casing or on frame or rack
- H05K7/1422—Printed circuit boards receptacles, e.g. stacked structures, electronic circuit modules or box like frames
- H05K7/1427—Housings
- H05K7/1432—Housings specially adapted for power drive units or power converters
- H05K7/14322—Housings specially adapted for power drive units or power converters wherein the control and power circuits of a power converter are arranged within the same casing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/20—Modifications to facilitate cooling, ventilating, or heating
- H05K7/2089—Modifications to facilitate cooling, ventilating, or heating for power electronics, e.g. for inverters for controlling motor
- H05K7/209—Heat transfer by conduction from internal heat source to heat radiating structure
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Definitions
- This disclosure relates to power conversion modules.
- a power conversion module is an electrical device that includes a power converter that can convert electrical energy.
- Some power converters convert direct current (DC) into alternating current (AC). Such power converters are sometimes referred to as a DC-to-AC power converter, or more simply as a power inverter.
- Some power converters convert AC into DC, such power converters are referred to as AC-to-DC power converters.
- Still other power converters, namely a DC-to-DC power converter converts a source of DC from one voltage level to another voltage level.
- Gallium Nitride has a relatively high electron mobility and saturation velocity that enables the employment of GaN for high-power and high-temperature microwave applications.
- High-power/high-frequency devices based on GaN include microwave radio-frequency power amplifiers (such as those used in high-speed wireless data transmission) and high-voltage switching devices for power grids.
- GaN is employable to fabricate GaN field effect transistors (FETs).
- FETs GaN field effect transistors
- the GaN FET has a lower drain to source resistance when the GaN FET is on (R DS(ON) ).
- a GaN FET has lower input capacitance than a MOSFET, such that the GaN FET has a faster on/off switching rate.
- a first example relates to a power conversion module.
- the power conversion module includes a motherboard having a first surface and a second surface that opposes the first surface.
- the motherboard includes a first trace that electrically couples a decoupling capacitor mounted on the motherboard to a first pad on the first surface of the motherboard.
- the motherboard also includes an output node of a power conversion module.
- the motherboard further includes a via extending through the motherboard that electrically couples a second pad on the first surface of the motherboard and a third pad on the second surface of the motherboard coupled to the output node.
- the motherboard still further includes a second trace that electrically couples a fourth pad on the second surface of the motherboard and the decoupling capacitor.
- the power conversion module also includes a first daughterboard mounted on the first surface of the motherboard and coupled to the first pad and the second pad of the motherboard, the first daughterboard including a high side transistor for the power conversion module.
- the power conversion module further includes a second daughterboard mounted on the second surface of the motherboard and coupled to the third pad and the fourth pad of the motherboard, the second daughterboard including a low side transistor for the power conversion module.
- a second example relates to a power conversion module.
- the power conversion module includes a motherboard having a first surface and a second surface that opposes the first surface.
- the motherboard includes a first trace that electrically couples a decoupling capacitor mounted on the motherboard to a first pad on the first surface of the motherboard and an output node of a power conversion module.
- the motherboard also includes a via extending through the motherboard that electrically couples a second pad on the first surface of the motherboard and a third pad on the second surface of the motherboard to the output node.
- the motherboard further includes a second trace that electrically couples a fourth pad on the second surface of the motherboard and the decoupling capacitor.
- the power conversion module also includes a high side transistor electrically coupled to the first pad and the second pad of the first surface of the motherboard and a low side transistor for the power conversion module electrically coupled to the third pad and the fourth pad on the second surface of the motherboard.
- the power conversion module further includes a first thermal substrate thermally coupled to the high side transistor and a second thermal substrate thermally coupled to the low side transistor.
- a third example relates to a method for forming a power conversion module.
- the method includes mounting a first daughterboard to a first surface of a motherboard such that a first trace of the motherboard electrically couples a decoupling capacitor mounted on the motherboard to a high side transistor of a power conversion module on the first daughterboard and the high side transistor is coupled to an output port of the power conversion module, the output node being situated on the motherboard.
- the method also includes mounting a second daughterboard to a second surface of the motherboard, such that the output node is electrically coupled to a low side transistor of the power conversion module and the low side transistor is electrically coupled to the decoupling capacitor.
- FIG. 1 illustrates a cross-section diagram of an example of a power conversion module formed with three-dimensional (3D) integration.
- FIG. 2 illustrates an exploded view of a power conversion module formed with 3D integration.
- FIG. 3 illustrates a partially assembled view of a power conversion module formed with 3D integration.
- FIG. 4 illustrates a fully-assembled view of a power conversion module formed with 3D integration.
- FIG. 5 illustrates a cross-section diagram of another example of a power conversion module formed with 3D integration.
- FIG. 6 illustrates a circuit diagram of a power conversion module that implements a direct current (DC) to alternating current (AC) converter.
- DC direct current
- AC alternating current
- FIG. 7 illustrates a flowchart of an example method for forming a power conversion module.
- This disclosure relates to a power conversion module that employs printed circuit board (PCB) and thermal substrate packing techniques to enable three-dimensional (3D) integration of power transistors to curtail a parasitic inductance such that the power transistors are able to switch on (e.g., operate in the linear mode or saturation mode) and off (e.g., operate in the cut-off mode) at or near a upper limit frequency of the power transistors.
- the power transistors are implemented as gallium nitride (GaN) field effect transistors (FETs), but in other examples, other type of transistors, such as gallium oxide (GaO) or silicon carbide (SiC) transistors are also employable.
- the power module is formed as a stack-up configuration to provide a half-bridge configuration wherein high side transistors are mounted on a first daughterboard that is, in turn, mounted on a first surface of a motherboard (e.g., a top surface) and low side transistors are mounted on a second daughterboard that is, in turn, mounted on a second surface (e.g., a bottom surface) of the motherboard that opposes the first surface of the motherboard.
- this arrangement results in the stack-up configuration wherein the motherboard is sandwiched between the first daughterboard and the second daughterboard.
- some or all power FETs of the power module can be mounted on the motherboard.
- this stack-up configuration provides adequate traces and spacing needed for the power FETs, such as GaN FETs.
- two thermal substrates sandwich the entire stack-up for dual-side cooling. More particularly, one of the two thermal substrates contact the high side transistors, and the other thermal substrate contacts the low side transistors to ensure efficient heat transfer during operation of the power conversion module.
- the total size of the stack-up (the motherboard, plus the first and second daughterboards, if employed) is adjustable to accommodate spacing constraints (e.g., vertical spacing in one frame of reference). Additionally, the combination of the first daughterboard, the motherboard and the second daughterboard forms a power loop through bumps, making direct contact to an active side of the first and second daughterboards so that the area of the power loop can be diminished.
- the combination of the motherboard, the first daughterboard and the second daughterboard more generally represent a routable multi-layer substrate.
- routable multi-layer substrate can be implemented as an insulated metal substrate (IMS) that is thermally enhanced to facilitate heat spreading of dies that include the high side transistors and the low side transistors.
- IMS insulated metal substrate
- FIG. 1 illustrates a cross-section diagram of an example of a power conversion module 100 formed with three-dimensional (3D) integration.
- the power conversion module 100 is a DC-to-AC converter (inverter), such as a half-bridge power converter or a full bridge power converter.
- the power conversion module 100 is a DC-to-DC converter, such as a buck converter (a step-down converter) or a boost converter (a step-up converter).
- the power conversion module 100 is an AC-to-DC converter.
- the power conversion module 100 is a DC-to-AC converter.
- the power conversion module 100 is fabricated with a plurality of printed circuit boards (PCBs) and/or other substrates to form a three-dimensional (3D) power conversion module that operates at high power, such as up to about 700 volts (V) and up to about 150 amperes (A). More particularly, the power conversion module 100 includes a motherboard 104 that forms a first (main) PCB. In some examples, the motherboard 104 is a laminate formed of a non-conductive material, such as a polycarbonate substrate. The motherboard 104 includes a first surface 108 and a second surface 112 . The first surface 108 opposes the second surface 112 .
- PCBs printed circuit boards
- A amperes
- a first daughterboard 116 is mounted on the first surface 108 of the motherboard 104 with solder bumps
- a second daughterboard 120 is mounted on the second surface 112 of the motherboard 104 with solder bumps.
- the first daughterboard 116 and the second daughterboard 120 are laminates formed of a non-conductive material, such as a polycarbonate substrate. Accordingly, the first daughterboard 116 , the motherboard 104 and the second daughterboard 120 form a stack-up configuration with wireless bonding.
- the total size of the stack-up (the motherboard 104 , plus the first daughterboard 116 and the second daughterboard 120 is selected to accommodate spacing constraints (e.g., vertical spacing in one frame of reference).
- circuit components are mountable on the first surface 108 and/or the second surface 112 of the motherboard 104 .
- circuit components 122 , 124 , 128 and 132 are included.
- the circuit components 122 , 124 , 128 and 132 can represent a voltage regulator, a controller a resistor, a capacitor, an inductor, etc.
- the power conversion module 100 includes a decoupling capacitor 136 that is mounted on the first surface 108 of the motherboard 104 .
- the power conversion module 100 includes power transistors. More particularly, the power conversion module 100 includes a high side transistor 140 mounted on or embedded in the first daughterboard 116 , and a low side transistor 144 that is mounted on or embedded in the second daughterboard 120 .
- the high side transistor 140 and the low side transistor 144 are representative of multiple transistors arranged in parallel or multiple transistors arranged back-to-back.
- the combination of the motherboard 104 , the first daughterboard 116 , the second daughterboard 120 can be referred to as a as routable multi-layer substrate.
- the motherboard 104 , the first daughterboard 116 , the second daughterboard 120 can be implemented as an insulated metal substrate (IMS) that is thermally enhanced to facilitate heat spreading of dies that include the high side transistor 140 and the low side transistor.
- IMS insulated metal substrate
- the high side transistor 140 and the low side transistor 144 are power transistors, such as high power field effect transistors (FETs). More particularly, in some examples, the high side transistor 140 and the low side transistor 144 are implemented as N channel GaN FETs. In other examples, transistors such as silicon carbide (SiC) FETs or gallium oxide (GaO) FETs are employable as the high side transistor 140 and the low side transistor 144 . In still other examples, the high side transistor 140 and the low side transistor 144 are implemented as metal oxide semiconductor field effect transistors (MOSFETs). In still other examples, the high side transistor 140 and the low side transistor 144 are implemented as bi-polar junction transistors (BJTs).
- FETs high power field effect transistors
- a die that includes the high side transistor 140 and a die that includes the low side transistor 144 are fabricated such that a drain, a source and a gate of the high side transistor 140 and the low side transistor 144 are located on one side (e.g., a topside or bottom side) of the first daughterboard 116 and the second daughterboard 120 , respectively.
- the first daughterboard 116 and the second daughterboard 120 have the same footprint (e.g., size) and traverse the same region (in 3D space) of the motherboard 104 . Accordingly, in the example illustrated, a region 148 of the motherboard 104 is overlaid or underlaid (depending on the perspective) by the first daughterboard 116 and the second daughterboard 120 , such that the first daughterboard 116 and the second daughterboard 120 are coextensive from some perspectives (e.g., overhead view). Additionally, a plane 152 that extends perpendicular to the first surface 108 and the second surface of the motherboard 104 passes through the high side transistor 140 and the low side transistor 144 . That is, the plane 152 intersects the high side transistor 140 , the low side transistor 144 and the motherboard 104 .
- the high side transistor 140 and the low side transistor 144 each include a control node, an input node and an output node.
- the control node represents a gate
- the input node represents a drain
- the output node represents a source.
- the control node represents a base
- the input node represents a collector
- the output node represents an emitter.
- the motherboard 104 includes an output terminal 164 configured to be coupled to a load 172 .
- the load 172 includes a motor (e.g., an AC motor).
- the load 172 is representative of an inductive load that includes an inductor coupled to resistive and/or capacitive components. Additionally, in some examples, the load 172 is external to the power conversion module 100 .
- the motherboard 104 , the first daughterboard 116 and the second daughterboard 120 include features (e.g., traces, vias and pads) to electrically couple the decoupling capacitor 136 , the high side transistor 140 , the low side transistor 144 and the load 172 . That is, the motherboard 104 , the first daughterboard 116 and the second daughterboard 120 are coupled with wireless bonding techniques. More particularly, a first node of the decoupling capacitor 136 is coupled to a first pad 176 on the first surface 108 of the motherboard 104 . In some examples, such as examples where the power conversion module 100 is a DC-to-AC converter, the first pad 176 can also be conductively coupled to a positive power terminal (e.g., DC+) of the power conversion module.
- a positive power terminal e.g., DC+
- a first trace 180 extends between the first pad 176 and a second pad 184 on the first surface 108 of the motherboard 104 .
- the first daughterboard 116 includes a first via 188 and a second via 192 that extends through the first daughterboard 116 .
- the second daughterboard 120 includes a first via 196 and a second via 200 .
- the high side transistor 140 and the low side transistor 144 are surface mounted IC chips, such as quad flat no-leads (QFN) IC chips.
- QFN quad flat no-leads
- the first via 188 and the second via 192 of the first daughterboard 116 and the first via 196 and the second via 200 of the second daughterboard 120 are implemented as through vias.
- the high side transistor 140 and the low side transistor 144 are embedded as dies in the first daughterboard 116 and the second daughterboard 120 , respectively.
- the first daughterboard 116 and the second daughterboard 120 include connection assemblies (e.g., lead frames) for electrically coupling nodes of the high side transistor 140 and the low side transistor 144 with other components.
- the first via 188 and the second via 192 of the first daughterboard 116 and the first via 196 and the second via 200 of the second daughterboard 120 are implemented as blind vias that extend partially through the first daughterboard 116 and the second daughterboard 120 , respectively.
- the first via 188 of the first daughterboard 116 electrically couples the second pad 184 of the motherboard 104 with an input node (e.g., a drain or a collector) of the high side transistor 140 .
- the second via 192 electrically couples an output node (e.g., a source or an emitter) of the high side transistor 140 to a third pad 204 of the motherboard 104 .
- the third pad 204 is also electrically coupled to a second trace 208 of the motherboard, wherein the second trace 208 is electrically coupled to an output terminal 164 of the power conversion module 100 .
- the third pad 204 is also referrable to as an output node of the power conversion module 100 .
- the output terminal 164 is an AC output terminal that is configured to be coupled to the load 172 .
- the third pad 204 is coupled to a first via 216 of the motherboard 104 .
- the first via 216 extends between the third pad 204 and a fourth pad 220 that is situated on the second surface 112 of the motherboard 104 .
- the fourth pad 220 is coupled to the second via 200 of the second daughterboard 120 .
- the second via 200 of the second daughterboard 120 is coupled to the input node (e.g., a drain or a collector) of the low side transistor 144 . In this manner, the input node of the low side transistor 144 is electrically coupled to the output terminal 164 of the power conversion module 100 and the output node of the high side transistor 140 .
- the output node (e.g., a source or emitter) of the low side transistor 144 is coupled to the first via 196 of the second daughterboard 120 .
- the second via 200 electrically couples the output node of the low side transistor 144 with a fifth pad 224 situated on the second surface 112 of the motherboard 104 .
- a third trace 228 situated on the second surface 112 of the motherboard 104 electrically couples the fifth pad 224 with a second via 232 of the motherboard 104 .
- the second via 232 of the motherboard 104 electrically couples the third trace 228 and a sixth pad 236 .
- the decoupling capacitor 136 is coupled to the sixth pad 236 .
- the sixth pad 236 is also coupled to a negative terminal of a power source (e.g., DC ⁇ ).
- the power conversion module 100 includes a controller that is hidden from view for purposes of simplification of explanation.
- the controller provides a control signal to the control node (e.g., a gate or base) of the high side transistor 140 and the low side transistor 144 .
- the control signals control an operational state of the high side transistor 140 and the low side transistor 144 .
- the control signals turn the high side transistor 140 and the low side transistor 144 on (e.g., operate in the linear or saturation region) or off (e.g., operate in the cut-off region).
- current flows along a current path between the decoupling capacitor 136 and the load 172 .
- the output terminal 164 is configured to be coupled to the load 172 and an area circumscribed by a current loop for current flowing through the decoupling capacitor 136 , the high side transistor 140 and the low side transistor 144 defines a loop area the power conversion module 100 .
- a portion of the current path is marked as a current path 240 .
- the current path 240 includes a loop traversing the decoupling capacitor 136 , the high side transistor 140 , the low side transistor 144 and back to the decoupling capacitor 136 .
- Current flow in the current path 240 is marked with arrows. As is illustrated, opposing legs of the current path 240 flow in opposite directions.
- a first leg of the current loop flowing through the first daughterboard 116 flows in a first direction
- a second leg of the current loop flowing through the second daughterboard 120 flows in a second direction, opposite the first direction.
- the area circumscribed by the current path 240 is curtailed (e.g., reduced) relative to approaches where transistors are mounted on the same board (e.g., on the same daughterboard or on a single board power conversion module). Curtailment of the area circumscribed by the current path 240 reduces parasitic inductance of the power conversion module 100 .
- heat sinks such as a first thermal substrate 244 is applied to the high side transistor 140 and a second thermal substrate 248 is applied to the low side transistor 144 .
- the first thermal substrate and the second thermal substrate are implemented as ceramic substrates, such as respective first and second direct bonded copper (DBC) substrates.
- the first thermal substrate 244 and the second thermal substrate 248 extract heat from the power conversion module 100 during operation. This extraction of heat increases the available frequency of operation of the power conversion module 100 . Additionally or alternatively, the extraction of heat increases a lifetime and/or reliability of the power conversion module 100 .
- the power conversion module 100 is operatable at speeds up to about 10 megahertz (MHz), which corresponds to a maximum operational frequency of such GaN FETs.
- MHz megahertz
- a die that includes the high side transistor 140 and a die that includes the low side transistor 144 are fabricated such that a drain, a source and a gate of the high side transistor 140 and the low side transistor 144 directly contact the first thermal substrate 244 and the second thermal substrate 248 , respectively. This arrangement improves transfer of thermal energy, such that the power conversion module 100 operates efficiently.
- FIGS. 2 - 4 illustrate different views of a power conversion module 300 formed with three-dimensional (3D) integration.
- the power conversion module 300 is employable to implement the power conversion module 100 of FIG. 1 . More particularly, FIG. 2 illustrates an exploded view diagram of the power conversion module 300 .
- FIG. 3 illustrates a partially assembled view diagram of the power conversion module 300 .
- FIG. 4 illustrates a fully assembled view diagram of the power conversion module 300 .
- the power conversion module 300 illustrated in FIGS. 2 - 4 implements a half-bridge DC-to-AC converter (e.g., an inverter). However, in other examples, the power conversion module 300 is modified to implement a DC-to-DC converter or an AC-to-DC converter.
- the power conversion module 300 includes a motherboard 304 , a first daughterboard 308 and a second daughterboard 312 .
- the power conversion module 300 also includes a positive DC input terminal 316 (DC+), a negative DC input terminal 320 (DC ⁇ ) and an AC output terminal 324 (AC).
- the first daughterboard 308 and the second daughterboard 312 include power transistors for the power conversion module 300 . More specifically, in the example illustrated, the first daughterboard 308 includes a first high side transistor 328 and a second high side transistor 332 .
- the second daughterboard 312 includes a first low side transistor and a second low side transistor that are hidden from view.
- the first high side transistor 328 and a second high side transistor 332 are employable to implement instances of the high side transistor 140 of FIG. 1 .
- the first low side transistor and the second low side transistor are employable to implement instances of the low side transistor 144 of FIG. 1 .
- the first high side transistor 328 , the second high side transistor 332 , the first low side transistor and the second low side transistor are implemented as GaN FETs, such as N-channel GaN FETs.
- transistors such as SiC FETs or GaO FETs are employable as the first high side transistor 328 , the second high side transistor 332 , the first low side transistor and the second low side transistor.
- the first high side transistor 328 , the second high side transistor 332 , the first low side transistor and the second low side transistor are implemented as MOSFETS.
- the first high side transistor 328 , the second high side transistor 332 , the first low side transistor and the second low side transistor are implemented as BJTs.
- the first high side transistor 328 , the second high side transistor 332 , the first low side transistor and the second low side transistor are implemented as GaN FETs
- dies that includes the first high side transistor 328 the second high side transistor 332 the first low side transistor and the second low side transistor are fabricated such that a drain, a source and a gate of these GaN FETs are located on one side (e.g., active side) of the first daughterboard 308 and the second daughterboard 312 .
- the motherboard 304 include components, such as a controller, resistors, capacitors, inductors, etc. for controlling operations on the power conversion module 300 .
- the controller is employable to provide control signals to input nodes (e.g., gates or bases) of the first high side transistor 328 , the second high side transistor 332 , the first low side transistor and the second low side transistor to control an operational state of each such transistor. More particularly, the control signals cause the first high side transistor 328 , the second high side transistor 332 , the first low side transistor and the second low side transistor to turn off and on (e.g., transition between a cut-off and linear mode or saturation mode).
- the motherboard 304 has a first surface 340 and a second surface 344 .
- the first surface 340 includes a first patterned region 348 for mounting the first daughterboard 308 . More particularly, the first patterned region 348 exposes pads to mount and electrically couple a matched patterned region of the first daughterboard 308 (hidden from view) to the first surface 340 of the motherboard 304 with bump soldering.
- the second surface 344 includes a similar (e.g., mirror image of the first patterned region 348 ) patterned region that is hidden from view.
- the pattern region of the second surface 344 of the motherboard 304 matches a patterned region 352 of the second daughterboard 312 for bump soldering.
- the motherboard 304 includes decoupling capacitors 356 mounted thereon.
- the decoupling capacitors 356 are each employable to implement an instance of the decoupling capacitor 136 of FIG. 1 .
- the first daughterboard 308 and the second daughterboard 312 are mountable on the motherboard 304 with solder bumps in a stack-up configuration with wireless bonding. Accordingly, the power conversion module 300 forms a half-bridge configuration.
- high side power transistors namely the first high side transistor 328 , the second high side transistor 332 , the first low side transistor and the second low side transistor on the first surface 340 and the second surface 344 of the motherboard 304 , respectively, provides adequate area for traces and spacing needed for the power transistors.
- the power conversion module 300 includes auxiliary pins 360 that are employable to receive power supply signals and control signal for components, such as the controller and/or other logic in the power conversion module 300 . More particularly, the auxiliary pins 360 enable the power conversion module 300 to be controlled by an external source.
- the power conversion module 300 includes a first housing component 364 and a second housing component 368 .
- the first housing component 364 and the second housing component 368 are formed of molded plastic (or other polymer).
- the first housing component 364 includes through holes to receive the auxiliary pins 360 and the AC output terminal 324 .
- the second housing component 368 includes through holes to receive the positive DC input terminal 316 and the negative DC input terminal 320 .
- FIG. 3 illustrates the power conversion module 300 in a partially assembled state.
- the first daughterboard 308 and the second daughterboard 312 are mounted on the motherboard 304 .
- the first housing component 364 and the second housing component 368 circumscribe a perimeter of the motherboard 304 .
- the power conversion module 300 includes a first thermal substrate 372 and a second thermal substrate 376 .
- the first thermal substrate 372 and the second thermal substrate 376 include a ceramic layer 380 sandwiched between a DBC patterned layer 384 and a DBC plate 388 .
- the DBC patterned layer 384 of the first thermal substrate 372 and the second thermal substrate 376 are overlaying a first surface of the respective ceramic layer 380 .
- the DBC plate 388 is overlaying a second surface of the respective ceramic layer 380 .
- the DBC plate 388 of the first thermal substrate 372 is in view, and the DBC plate of the second thermal substrate 376 is hidden from view.
- the DBC patterned layer 384 of the second thermal substrate 376 is in view and the DBC patterned layer of the first thermal substrate 372 is hidden from view. Accordingly, the first thermal substrate 372 and the second thermal substrate 376 sandwich the stack-up of the first daughterboard 308 , the motherboard 304 and the second daughterboard 312 to enable dual-side cooling.
- the DBC patterned layer 384 of the second thermal substrate 376 includes a first conductive pad 390 and a second conductive pad 392 .
- the first conductive pad 390 is configured to be in thermal communication with the first low side transistor of the second daughterboard 312 .
- the second conductive pad 392 is configured to be in thermal communication with the second low side transistor.
- the first conductive pad 390 and the second conductive pad 392 are electrically isolated from other regions of the DBC patterned layer 384 .
- the DBC patterned layer 384 of the first thermal substrate 372 includes a first pad and a second pad (hidden from view) configured to be in thermal contact with the first high side transistor 328 and the second high side transistor 332 in a similar manner.
- the ceramic layer 380 of the first thermal substrate 372 and the second thermal substrate 376 are thermally conductive, and electrically isolating.
- the ceramic layer 380 of the first thermal substrate 372 and the second thermal substrate 376 are formed from aluminum oxide (Al 2 O 3 ), aluminum nitride (AlN) or diamond.
- the DBC plate 388 is formed of a continuous layer of copper that thermally dissipates heat to an external source (e.g., air or a heat sink).
- FIG. 4 illustrates a fully assembled view of the power conversion module 300 .
- the first thermal substrate 372 and the second thermal substrate 376 (hidden from view) are mounted to fully enclose the power conversion module 300 .
- the internal components of the power conversion module 300 are electrically isolated.
- the positive DC input terminal 316 , the negative DC input terminal 320 , the AC output terminal 324 and the auxiliary pins 360 are still accessible to external systems.
- the first housing component 364 and the second housing component 368 form a housing that circumscribing edges of the first thermal substrate 372 and the second thermal substrate 376 .
- current flows along a current path between the decoupling capacitors 356 and a load (e.g., the load 172 of FIG. 1 ) coupled to the AC output terminal 324 .
- a portion of the current path flows in a loop traversing the decoupling capacitors 356 , the first high side transistor 328 and the second high side transistor 332 , the first low side transistor and the second low side transistor and back to the decoupling capacitors 356 .
- An area circumscribed by a current loop for current flowing through the decoupling capacitor 356 , the first high side transistor 328 and the second high side transistor 332 to the first low side transistor and the second low side transistor defines a loop area of the power conversion module 300 .
- the first high side transistor 328 and the second high side transistor 332 overlay the first low side transistor and the second low side transistor such that the resultant loop area is curtailed (e.g., reduced) relative to approaches where transistors are mounted on the same board (e.g., on the same daughterboard or on a single board power conversion module).
- Such a reduction of this loop area reduces a parasitic inductance of the power conversion module 300 .
- heat sinks are in thermal communication with the first thermal substrate 372 and/or the second thermal substrate 376 . Accordingly, the first thermal substrate 372 and/or the second thermal substrate 376 extract heat from the power conversion module 300 during operation. This extraction of heat increases the available frequency of operation of the power conversion module 300 . Additionally or alternatively, the extraction of heat increases a lifetime and/or reliability of the power conversion module 300 .
- the power conversion module 300 is operatable at speed up to about 10 MHz, which corresponds to a maximum operational frequency of such GaN FETs.
- the power conversion module employs a hybrid package solution came up using PCBs, namely, the first daughterboard 308 , the motherboard 304 and the second daughterboard 312 in a stack-up configuration, sandwiched between the first thermal substrate 372 and the second thermal substrate 376 .
- This stack-up configuration enables 3D integration of the power transistors (e.g., GaN FETs) mounted on or integrated with the first daughterboard 308 and the second daughterboard 312 .
- the power transistors e.g., GaN FETs
- this arrangement curtails a parasitic inductance so that the power transistors, namely the first high side transistor 328 , the second high side transistor 332 , the first low side transistor and the second low side transistor are operable at or near highest rated switching speed without overheating.
- the first high side transistor 328 , the second high side transistor 332 , the first low side transistor and the second low side transistor are implemented as GaN FETs
- dies that includes these GaN FETs are fabricated such that a drain, a source and a gate of the high side transistor 140 and the low side transistor 144 are located on one side (e.g., an active side) of the first daughterboard 308 and the second daughterboard 312 .
- the first thermal substrate 372 directly contacts an active side of the first daughterboard 308 and the second high side transistor 332
- the second thermal substrate 376 directly contacts an active side of the second daughterboard 312 to further improve heat dissipation efficiency during operation of the power conversion module 300 .
- FIG. 5 illustrates a cross-section diagram of an example of a power conversion module 400 formed with 3D integration.
- the power conversion module 400 is a DC-to-AC converter (inverter), such as a half-bridge power converter or a full bridge power converter.
- the power conversion module 100 is a DC-to-DC converter, such as a buck converter (a step-down converter) or a boost converter (a step-up converter).
- the power conversion module 400 is an AC-to-DC converter.
- it is presumed that the power conversion module 400 is a DC-to-AC converter.
- the power conversion module 400 is fabricated with a PCB and/or other substrates to form a 3D power conversion module that operates at high power, such as up to about 700 volts (V) and up to about 150 amperes (A). More particularly, the power conversion module 400 includes a motherboard 404 (e.g., a PCB). In some examples, the motherboard 404 is a laminate formed of a non-conductive material, such as a polycarbonate substrate. The motherboard 404 includes a first surface 408 and a second surface 412 . The first surface 408 opposes the second surface 412 .
- circuit components are mountable on the first surface 408 and/or the second surface 412 of the motherboard 404 .
- circuit components 422 , 424 , 428 and 432 are included.
- the circuit components 422 , 424 , 428 and 432 can represent a voltage regulator, a controller a resistor, a capacitor, an inductor, etc.
- the power conversion module 400 includes a decoupling capacitor 436 that is mounted on the first surface 408 of the motherboard 404 .
- the power conversion module 400 includes power transistors. More particularly, the power conversion module 400 includes a high side transistor 440 mounted on the first surface 408 of the motherboard 404 , and a low side transistor 444 that is mounted on the second side of the motherboard 404 .
- the high side transistor 440 and the low side transistor 444 are representative of multiple transistors arranged in parallel or multiple transistors arranged back-to-back. Accordingly, the high side transistor 440 , the motherboard 404 and the low side transistor 444 form a stack-up configuration with wireless bonding.
- the high side transistor 440 and the low side transistor 444 are power transistors, such as high power FETs. More particularly, in some examples, the high side transistor 440 and the low side transistor 444 are implemented as N channel GaN FETs. In other examples, transistors such as SiC FETs or GaO FETs are employable as the high side transistor 440 and the low side transistor 444 . In still other examples, the high side transistor 440 and the low side transistor 444 are implemented as MOSFETs. In still other examples, the high side transistor 440 and the low side transistor 444 are implemented as BJTs.
- a die that includes the high side transistor 440 and a die that includes the low side transistor 444 are fabricated such that a drain, a source and a gate of the high side transistor 440 and the low side transistor 444 are located on one side (e.g., a topside or bottom side) of the respective die.
- dies that include the high side transistor 440 and the low side transistor 444 have the same footprint (e.g., size) and traverse the same region (in 3D space) of the motherboard 404 . Accordingly, in the example illustrated, a region 448 of the motherboard 404 is overlaid or underlaid (depending on the perspective) by the high side transistor 440 and the low side transistor 444 , such that the high side transistor 440 and the low side transistor 444 are coextensive from some perspectives (e.g., overhead view). Additionally, a plane 452 that extends perpendicular to the first surface 408 and the second surface of the motherboard 404 passes through the high side transistor 440 and the low side transistor 444 . That is, the plane 452 intersects the high side transistor 440 , the low side transistor 444 and the motherboard 404 .
- the high side transistor 440 and the low side transistor 444 each include a control node, an input node and an output node.
- the control node represents a gate
- the input node represents a drain
- the output node represents a source.
- the control node represents a base
- the input node represents a collector
- the output node represents an emitter.
- the motherboard 404 includes an output terminal 464 configured to be coupled to a load 472 .
- the load 472 includes a motor (e.g., an AC motor).
- the load 472 is representative of an inductive load that includes an inductor coupled to resistive and/or capacitive components. Additionally, in some examples, the load 472 is external to the power conversion module 400 .
- the motherboard 404 includes features (e.g., traces, vias and pads) to electrically couple the decoupling capacitor 436 , the high side transistor 440 , the low side transistor 444 and the load 472 . More particularly, a first node of the decoupling capacitor 436 is coupled to a first pad 476 on the first surface 408 of the motherboard 404 . In some examples, such as examples where the power conversion module 400 is a DC-to-AC converter, the first pad 476 can also be conductively coupled to a positive power terminal (e.g., DC+) of the power conversion module. Additionally, a first trace 480 extends between the first pad 476 and a second pad 484 on the first surface 408 of the motherboard 404 . In some examples, the high side transistor 440 and the low side transistor 444 are surface mounted IC chips, such as quad flat no-leads (QFN) IC chips.
- QFN quad flat no-leads
- the second pad 484 of the motherboard 404 is electrically coupled to the input node (e.g., a drain or a collector) of the high side transistor 440 .
- a third pad 504 of the motherboard 404 is electrically coupled to the output node (e.g., a source or an emitter) of the high side transistor 440 .
- the third pad 504 is also electrically coupled to a second trace 508 of the motherboard 404 , wherein the second trace 508 is electrically coupled to an output terminal 464 of the power conversion module 400 .
- the third pad 504 is also referrable to as an output node of the power conversion module 400 .
- the output terminal 464 is an AC output terminal that is configured to be coupled to the load 472 .
- the third pad 504 is coupled to a first via 516 of the motherboard 404 .
- the first via 516 extends between the third pad 504 and a fourth pad 520 that is situated on the second surface 412 of the motherboard 404 .
- the fourth pad 520 is coupled to the input node (e.g., a drain or a collector) of the low side transistor 444 .
- the input node of the low side transistor 444 is electrically coupled to the output terminal 464 of the power conversion module 400 and the output node of the high side transistor 440 .
- the output node (e.g., a source or emitter) of the low side transistor 444 is electrically coupled to a fifth pad 524 situated on the second surface 412 of the motherboard 404 .
- a third trace 528 situated on the second surface 412 of the motherboard 404 electrically couples the fifth pad 524 with a second via 532 of the motherboard 404 .
- the second via 532 of the motherboard 404 electrically couples the third trace 528 and a sixth pad 536 .
- the decoupling capacitor 436 is coupled to the sixth pad 536 .
- the sixth pad 536 is also coupled to a negative terminal of a power source (e.g., DC ⁇ ).
- the power conversion module 400 includes a controller that is hidden from view for purposes of simplification of explanation.
- the controller provides a control signal to the control node (e.g., a gate or base) of the high side transistor 440 and the low side transistor 444 .
- the control signals control an operational state of the high side transistor 440 and the low side transistor 444 .
- the control signals turn the high side transistor 440 and the low side transistor 444 on (e.g., operate in the linear or saturation region) or off (e.g., operate in the cut-off region).
- the current path 540 includes a loop traversing the decoupling capacitor 436 , the high side transistor 440 , the low side transistor 444 and back to the decoupling capacitor 436 .
- the output terminal 464 is configured to be coupled to the load 472 and an area circumscribed by a current loop for current flowing through the decoupling capacitor 436 , the high side transistor 440 and the low side transistor 444 defines a loop area the power conversion module 400 .
- Current flow in the current path 540 is marked with arrows. As is illustrated, opposing legs of the current path 540 flow in opposite directions.
- a first leg of the current loop flowing the high side transistor 440 flows in a first direction
- a second leg of the current loop flowing through the low side transistor 444 flows in a second direction, opposite the first direction.
- the loop area (a portion of the area circumscribed by the current path 540 ) is curtailed (e.g., reduced) relative to approaches where transistors are mounted on a same side of the same board (e.g., on the same side of the motherboard 404 ). Curtailment of the area circumscribed by the current path 540 reduces parasitic inductance of the power conversion module 400 .
- heat sinks such as a first thermal substrate 544 is applied to the high side transistor 440 and a second thermal substrate 548 is applied to the low side transistor 444 .
- the first thermal substrate and the second thermal substrate are implemented as ceramic substrates, such as respective first and second DBC substrates.
- the first thermal substrate 544 and the second thermal substrate 548 extract heat from the power conversion module 400 during operation. This extraction of heat increases the available frequency of operation of the power conversion module 400 . Additionally or alternatively, the extraction of heat increases a lifetime and/or reliability of the power conversion module 400 .
- the power conversion module 400 is operatable at speeds up to about 40 MHz, which corresponds to a maximum operational frequency of such GaN FETs.
- a die that includes the high side transistor 440 and a die that includes the low side transistor 444 are fabricated such that a drain, a source and a gate of the high side transistor 440 and the low side transistor 444 directly contact the first thermal substrate 544 and the second thermal substrate 548 , respectively. This arrangement improves transfer of thermal energy, such that the power conversion module 400 operates efficiently.
- the power conversion module 400 omits daughterboards (e.g., the first daughterboard 116 and the second daughterboard 120 ).
- daughterboards e.g., the first daughterboard 116 and the second daughterboard 120 .
- components sizes such as the circuit components 422 , 424 , 428 and 432 (a voltage regulator, a controller a resistor, a capacitor, an inductor, etc.) are constrained.
- the performance characteristics of the power conversion module 400 are adjusted and/or the cost of the circuit components 422 , 424 , 428 and 432 is increased.
- one daughterboard (the first daughterboard 116 or the second daughterboard 120 ) is mounted on one side of the motherboard 404 . In these examples, some of the components 422 , 424 , 428 and 432 have increased sizes.
- FIG. 6 illustrates a simplified circuit diagram of a power conversion module 600 .
- the power conversion module 600 is illustrated as a DC-to-AC power converter. Moreover, the power conversion module 600 is employable to implement the the power conversion module 100 of FIG. 1 , power conversion module 300 of FIGS. 2 - 4 and/or the power conversion module 400 of FIG. 5 .
- the power conversion module 600 includes a first high side transistor 604 and a second high side transistor 608 .
- the first high side transistor 604 and the second high side transistor 608 correspond to the first high side transistor 328 and the second high side transistor 332 of FIGS. 2 - 4 .
- the first high side transistor 604 and the second high side transistor 608 are mounted on a first daughterboard, such as the first daughterboard 308 of FIGS. 2 - 4 .
- the power conversion module 600 also includes a first low side transistor 612 and a second low side transistor 616 .
- the first low side transistor 612 and the second low side transistor correspond to the first low side transistor and the second low side transistor of FIGS. 2 - 4 .
- the power conversion module 600 includes a decoupling capacitor 620 that corresponds to one or more of the decoupling capacitors 356 of FIGS. 2 - 4 .
- the decoupling capacitor 620 is mounted on a motherboard, such as the motherboard 304 of FIGS. 2 - 4 .
- the first high side transistor 604 and the second high side transistor 608 overlay the first low side transistor 612 and the second low side transistor 616 in a 3D space.
- the first high side transistor 604 , the second high side transistor 608 , the first low side transistor 612 and the second low side transistor 616 are GaN FETs.
- other types of transistors such as SiC FETs and GaO FETs, MOSFETS or BJTs are employable.
- the first high side transistor 604 and the second high side transistor 608 include a control node 622 (e.g., a gate or a base) that receives a control signal from a controller 628 .
- the control signal provided to the control node 622 of the first high side transistor 604 and the control node 622 of the second high side transistor 608 are synchronous.
- the first low side transistor 612 and the second low side transistor include a control node 632 (e.g., a gate or a base) that receives a control signal from the controller 628 .
- the control signal provided to the control node 632 of the first low side transistor 612 and the second low side transistor 616 are synchronous.
- control signal provided to the control node 622 of the first high side transistor 604 and the second high side transistor 608 are complements of the control signal provided to the control node 632 of the first low side transistor 612 and the second low side transistor 616 .
- the controller 628 is mounted on the motherboard. In other examples, the controller 628 is external to the power conversion module 600 and provides control signals through auxiliary pins, such as the auxiliary pins 360 of FIGS. 2 - 4 .
- the power conversion module 600 includes a positive DC input terminal 636 that corresponds to the positive DC input terminal 316 of FIGS. 2 - 4 and a negative DC input terminal 640 that corresponds to the negative DC input terminal 320 of FIGS. 2 - 4 .
- the power conversion module 600 also includes an AC output terminal 644 that corresponds to the AC output terminal 324 of FIGS. 2 - 4 .
- the AC output terminal 644 is configured to be coupled to a load 648 that is external to the power conversion module 600 .
- the positive DC input terminal 636 is coupled to a first input node 652 of the power conversion module 600 .
- a negative DC input terminal 640 is coupled to a second input node 656 of the power conversion module 600 .
- the AC output terminal 644 is coupled to an output node 660 of the power conversion module 600 .
- a first node of the decoupling capacitor 620 is coupled to the first input node 652 of the power conversion module 600 and a second node of the decoupling capacitor 620 is coupled to the second input node 656 .
- the first high side transistor 604 and the second high side transistor 608 include an input node 664 (e.g., a drain or collector) that is coupled to the first input node 652 .
- the first high side transistor 604 and the second high side transistor 608 include an output node 668 (e.g., a source or emitter) that is coupled to the output node 660 .
- the first low side transistor 612 and the second low side transistor 616 include an input node 672 (e.g., a drain or collector) that is coupled to the output node 660 of the power conversion module 600 .
- the first low side transistor 612 and the second low side transistor 616 include an output node 676 (e.g., a source or emitter) that is coupled to the negative DC input terminal 640 .
- current flows in a current path 680 that traverses the decoupling capacitor 620 , the first high side transistor 604 , the second high side transistor 608 , the first low side transistor 612 and the second low side transistor 616 .
- the current path 680 forms a loop. Curtailing the area circumscribed by the current path 680 reduces parasitic inductance. Thus, by leveraging 3D space (as illustrated in FIGS. 2 - 4 ) to overlay the first high side transistor 604 and the second high side transistor 608 , the area circumscribed by the current path 680 can be curtailed.
- FIG. 7 illustrates a flowchart of an example method 700 fabricating a power conversion module, such as the power conversion module 100 of FIG. 1 , the power conversion module 300 of FIGS. 2 - 4 and/or the power conversion module 400 of FIG. 4 .
- a first daughterboard e.g., the first daughterboard 116 of FIG. 1
- the first daughterboard is mounted such that a first trace (e.g., the first trace 180 of FIG. 1 ) of the motherboard electrically couples a decoupling capacitor (e.g., the decoupling capacitor 136 of FIG.
- the motherboard mounted on the motherboard to a high side transistor (e.g., the high side transistor 140 of FIG. 1 ) of the power conversion module that is situated on the first daughterboard.
- the first daughterboard is mounted such that the high side transistor is electrically coupled to an output terminal (e.g., the output terminal 164 of FIG. 1 ) of the power conversion module, with the output terminal being situated on the motherboard.
- a second daughterboard (e.g., the second daughterboard 120 of FIG. 1 ) is mounted to a second surface (e.g., the second surface 112 of FIG. 1 ) of the motherboard.
- the second daughterboard is mounted such that the output terminal of the power conversion module is electrically coupled to a low side transistor (e.g., the low side transistor 144 of FIG. 1 ) of the power conversion module and the low side transistor is electrically coupled to a second trace situated on the motherboard (e.g., the third trace 228 of FIG. 1 ), to electrically couple the decoupling capacitor with the low side transistor.
- the high side transistor and the low side transistor are GaN FETs.
- other types of transistors such as SiC FETs and GaO FET, MOSFETS or BJTs are employable.
- a first thermal substrate (e.g., the first thermal substrate 372 ) is mounted on the first daughterboard (e.g., the first daughterboard 308 of FIG. 2 ).
- a second thermal substrate (e.g., the second thermal substrate 376 of FIG. 2 ) is mounted on the second daughterboard (e.g., the second daughterboard 312 of FIG. 2 ).
- a housing e.g., the first housing component 364 and the second housing component 368 of FIG. 2 ) is secured on the power conversion module.
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Abstract
A power conversion module and method of forming the same includes a motherboard having a first surface and a second surface that opposes the first surface. The motherboard includes a first trace that electrically couples a decoupling capacitor mounted on the motherboard to a first pad on the first surface of the motherboard and an output node of a power conversion module. The motherboard includes a via extending through the motherboard that electrically couples a second pad on the first surface of the motherboard and a third pad on the second surface of the motherboard to the output node and a second trace that electrically couples a fourth pad on the second surface of the motherboard and the decoupling capacitor. The power module includes a first daughterboard mounted on the first surface of the motherboard and a second daughterboard mounted on the second surface of the motherboard.
Description
- This application is a continuation of patent application Ser. No. 17/318,276, filed May 12, 2021, now U.S. patent Ser. No. 11/751,353 which claims the benefit of priority to U.S. Provisional Application No. 63/056,271 filed on 24 Jul. 2020, the entirety of which is incorporated herein by reference.
- This disclosure relates to power conversion modules.
- In electrical engineering, power conversion is the process of converting electric energy from one form to another. A power conversion module is an electrical device that includes a power converter that can convert electrical energy. Some power converters convert direct current (DC) into alternating current (AC). Such power converters are sometimes referred to as a DC-to-AC power converter, or more simply as a power inverter. Some power converters convert AC into DC, such power converters are referred to as AC-to-DC power converters. Still other power converters, namely a DC-to-DC power converter converts a source of DC from one voltage level to another voltage level.
- Gallium Nitride (GaN) has a relatively high electron mobility and saturation velocity that enables the employment of GaN for high-power and high-temperature microwave applications. High-power/high-frequency devices based on GaN include microwave radio-frequency power amplifiers (such as those used in high-speed wireless data transmission) and high-voltage switching devices for power grids. More particularly, GaN is employable to fabricate GaN field effect transistors (FETs). As compared with a metal-oxide semiconductor field effect transistor (MOSFET), the GaN FET has a lower drain to source resistance when the GaN FET is on (RDS(ON)). Also, a GaN FET has lower input capacitance than a MOSFET, such that the GaN FET has a faster on/off switching rate.
- A first example relates to a power conversion module. The power conversion module includes a motherboard having a first surface and a second surface that opposes the first surface. The motherboard includes a first trace that electrically couples a decoupling capacitor mounted on the motherboard to a first pad on the first surface of the motherboard. The motherboard also includes an output node of a power conversion module. The motherboard further includes a via extending through the motherboard that electrically couples a second pad on the first surface of the motherboard and a third pad on the second surface of the motherboard coupled to the output node. The motherboard still further includes a second trace that electrically couples a fourth pad on the second surface of the motherboard and the decoupling capacitor. The power conversion module also includes a first daughterboard mounted on the first surface of the motherboard and coupled to the first pad and the second pad of the motherboard, the first daughterboard including a high side transistor for the power conversion module. The power conversion module further includes a second daughterboard mounted on the second surface of the motherboard and coupled to the third pad and the fourth pad of the motherboard, the second daughterboard including a low side transistor for the power conversion module.
- A second example relates to a power conversion module. The power conversion module includes a motherboard having a first surface and a second surface that opposes the first surface. The motherboard includes a first trace that electrically couples a decoupling capacitor mounted on the motherboard to a first pad on the first surface of the motherboard and an output node of a power conversion module. The motherboard also includes a via extending through the motherboard that electrically couples a second pad on the first surface of the motherboard and a third pad on the second surface of the motherboard to the output node. The motherboard further includes a second trace that electrically couples a fourth pad on the second surface of the motherboard and the decoupling capacitor. The power conversion module also includes a high side transistor electrically coupled to the first pad and the second pad of the first surface of the motherboard and a low side transistor for the power conversion module electrically coupled to the third pad and the fourth pad on the second surface of the motherboard. The power conversion module further includes a first thermal substrate thermally coupled to the high side transistor and a second thermal substrate thermally coupled to the low side transistor.
- A third example relates to a method for forming a power conversion module. The method includes mounting a first daughterboard to a first surface of a motherboard such that a first trace of the motherboard electrically couples a decoupling capacitor mounted on the motherboard to a high side transistor of a power conversion module on the first daughterboard and the high side transistor is coupled to an output port of the power conversion module, the output node being situated on the motherboard. The method also includes mounting a second daughterboard to a second surface of the motherboard, such that the output node is electrically coupled to a low side transistor of the power conversion module and the low side transistor is electrically coupled to the decoupling capacitor.
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FIG. 1 illustrates a cross-section diagram of an example of a power conversion module formed with three-dimensional (3D) integration. -
FIG. 2 illustrates an exploded view of a power conversion module formed with 3D integration. -
FIG. 3 illustrates a partially assembled view of a power conversion module formed with 3D integration. -
FIG. 4 illustrates a fully-assembled view of a power conversion module formed with 3D integration. -
FIG. 5 illustrates a cross-section diagram of another example of a power conversion module formed with 3D integration. -
FIG. 6 illustrates a circuit diagram of a power conversion module that implements a direct current (DC) to alternating current (AC) converter. -
FIG. 7 illustrates a flowchart of an example method for forming a power conversion module. - This disclosure relates to a power conversion module that employs printed circuit board (PCB) and thermal substrate packing techniques to enable three-dimensional (3D) integration of power transistors to curtail a parasitic inductance such that the power transistors are able to switch on (e.g., operate in the linear mode or saturation mode) and off (e.g., operate in the cut-off mode) at or near a upper limit frequency of the power transistors. In some examples, the power transistors are implemented as gallium nitride (GaN) field effect transistors (FETs), but in other examples, other type of transistors, such as gallium oxide (GaO) or silicon carbide (SiC) transistors are also employable.
- In some examples, the power module is formed as a stack-up configuration to provide a half-bridge configuration wherein high side transistors are mounted on a first daughterboard that is, in turn, mounted on a first surface of a motherboard (e.g., a top surface) and low side transistors are mounted on a second daughterboard that is, in turn, mounted on a second surface (e.g., a bottom surface) of the motherboard that opposes the first surface of the motherboard. In some examples, this arrangement results in the stack-up configuration wherein the motherboard is sandwiched between the first daughterboard and the second daughterboard. In other examples of the stack-up configuration, some or all power FETs of the power module can be mounted on the motherboard. In any such example, this stack-up configuration provides adequate traces and spacing needed for the power FETs, such as GaN FETs. Additionally, two thermal substrates sandwich the entire stack-up for dual-side cooling. More particularly, one of the two thermal substrates contact the high side transistors, and the other thermal substrate contacts the low side transistors to ensure efficient heat transfer during operation of the power conversion module. The total size of the stack-up (the motherboard, plus the first and second daughterboards, if employed) is adjustable to accommodate spacing constraints (e.g., vertical spacing in one frame of reference). Additionally, the combination of the first daughterboard, the motherboard and the second daughterboard forms a power loop through bumps, making direct contact to an active side of the first and second daughterboards so that the area of the power loop can be diminished.
- In some examples, the combination of the motherboard, the first daughterboard and the second daughterboard more generally represent a routable multi-layer substrate. In such a situation, routable multi-layer substrate can be implemented as an insulated metal substrate (IMS) that is thermally enhanced to facilitate heat spreading of dies that include the high side transistors and the low side transistors.
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FIG. 1 illustrates a cross-section diagram of an example of apower conversion module 100 formed with three-dimensional (3D) integration. As one example, thepower conversion module 100 is a DC-to-AC converter (inverter), such as a half-bridge power converter or a full bridge power converter. As another example, thepower conversion module 100 is a DC-to-DC converter, such as a buck converter (a step-down converter) or a boost converter (a step-up converter). In still other examples, thepower conversion module 100 is an AC-to-DC converter. For the examples illustrated, it is presumed that thepower conversion module 100 is a DC-to-AC converter. - The
power conversion module 100 is fabricated with a plurality of printed circuit boards (PCBs) and/or other substrates to form a three-dimensional (3D) power conversion module that operates at high power, such as up to about 700 volts (V) and up to about 150 amperes (A). More particularly, thepower conversion module 100 includes amotherboard 104 that forms a first (main) PCB. In some examples, themotherboard 104 is a laminate formed of a non-conductive material, such as a polycarbonate substrate. Themotherboard 104 includes afirst surface 108 and asecond surface 112. Thefirst surface 108 opposes thesecond surface 112. - A
first daughterboard 116 is mounted on thefirst surface 108 of themotherboard 104 with solder bumps, and asecond daughterboard 120 is mounted on thesecond surface 112 of themotherboard 104 with solder bumps. In some examples, thefirst daughterboard 116 and thesecond daughterboard 120 are laminates formed of a non-conductive material, such as a polycarbonate substrate. Accordingly, thefirst daughterboard 116, themotherboard 104 and thesecond daughterboard 120 form a stack-up configuration with wireless bonding. In some examples, the total size of the stack-up (themotherboard 104, plus thefirst daughterboard 116 and thesecond daughterboard 120 is selected to accommodate spacing constraints (e.g., vertical spacing in one frame of reference). - In various examples, circuit components are mountable on the
first surface 108 and/or thesecond surface 112 of themotherboard 104. In the example illustrated,circuit components circuit components power conversion module 100 includes adecoupling capacitor 136 that is mounted on thefirst surface 108 of themotherboard 104. Additionally, thepower conversion module 100 includes power transistors. More particularly, thepower conversion module 100 includes ahigh side transistor 140 mounted on or embedded in thefirst daughterboard 116, and alow side transistor 144 that is mounted on or embedded in thesecond daughterboard 120. In some examples, thehigh side transistor 140 and thelow side transistor 144 are representative of multiple transistors arranged in parallel or multiple transistors arranged back-to-back. The combination of themotherboard 104, thefirst daughterboard 116, thesecond daughterboard 120 can be referred to as a as routable multi-layer substrate. For example, themotherboard 104, thefirst daughterboard 116, thesecond daughterboard 120 can be implemented as an insulated metal substrate (IMS) that is thermally enhanced to facilitate heat spreading of dies that include thehigh side transistor 140 and the low side transistor. - In some examples, the
high side transistor 140 and thelow side transistor 144 are power transistors, such as high power field effect transistors (FETs). More particularly, in some examples, thehigh side transistor 140 and thelow side transistor 144 are implemented as N channel GaN FETs. In other examples, transistors such as silicon carbide (SiC) FETs or gallium oxide (GaO) FETs are employable as thehigh side transistor 140 and thelow side transistor 144. In still other examples, thehigh side transistor 140 and thelow side transistor 144 are implemented as metal oxide semiconductor field effect transistors (MOSFETs). In still other examples, thehigh side transistor 140 and thelow side transistor 144 are implemented as bi-polar junction transistors (BJTs). Moreover, in examples where thehigh side transistor 140 and thelow side transistor 144 are implemented as GaN FETs, a die that includes thehigh side transistor 140 and a die that includes thelow side transistor 144 are fabricated such that a drain, a source and a gate of thehigh side transistor 140 and thelow side transistor 144 are located on one side (e.g., a topside or bottom side) of thefirst daughterboard 116 and thesecond daughterboard 120, respectively. - The
first daughterboard 116 and thesecond daughterboard 120 have the same footprint (e.g., size) and traverse the same region (in 3D space) of themotherboard 104. Accordingly, in the example illustrated, aregion 148 of themotherboard 104 is overlaid or underlaid (depending on the perspective) by thefirst daughterboard 116 and thesecond daughterboard 120, such that thefirst daughterboard 116 and thesecond daughterboard 120 are coextensive from some perspectives (e.g., overhead view). Additionally, aplane 152 that extends perpendicular to thefirst surface 108 and the second surface of themotherboard 104 passes through thehigh side transistor 140 and thelow side transistor 144. That is, theplane 152 intersects thehigh side transistor 140, thelow side transistor 144 and themotherboard 104. - The
high side transistor 140 and thelow side transistor 144 each include a control node, an input node and an output node. In examples where thehigh side transistor 140 and the low side transistor are implemented as a type of FET, the control node represents a gate, the input node represents a drain and the output node represents a source. In examples where thehigh side transistor 140 and thelow side transistor 144 are implemented as BJTs, the control node represents a base, the input node represents a collector and the output node represents an emitter. - The
motherboard 104 includes anoutput terminal 164 configured to be coupled to aload 172. In some examples, theload 172 includes a motor (e.g., an AC motor). Moreover, in some examples, theload 172 is representative of an inductive load that includes an inductor coupled to resistive and/or capacitive components. Additionally, in some examples, theload 172 is external to thepower conversion module 100. - The
motherboard 104, thefirst daughterboard 116 and thesecond daughterboard 120 include features (e.g., traces, vias and pads) to electrically couple thedecoupling capacitor 136, thehigh side transistor 140, thelow side transistor 144 and theload 172. That is, themotherboard 104, thefirst daughterboard 116 and thesecond daughterboard 120 are coupled with wireless bonding techniques. More particularly, a first node of thedecoupling capacitor 136 is coupled to afirst pad 176 on thefirst surface 108 of themotherboard 104. In some examples, such as examples where thepower conversion module 100 is a DC-to-AC converter, thefirst pad 176 can also be conductively coupled to a positive power terminal (e.g., DC+) of the power conversion module. Additionally, afirst trace 180 extends between thefirst pad 176 and asecond pad 184 on thefirst surface 108 of themotherboard 104. Thefirst daughterboard 116 includes a first via 188 and a second via 192 that extends through thefirst daughterboard 116. Similarly, thesecond daughterboard 120 includes a first via 196 and a second via 200. In some examples, thehigh side transistor 140 and thelow side transistor 144 are surface mounted IC chips, such as quad flat no-leads (QFN) IC chips. In such examples, the first via 188 and the second via 192 of thefirst daughterboard 116 and the first via 196 and the second via 200 of thesecond daughterboard 120 are implemented as through vias. - In other examples, the
high side transistor 140 and thelow side transistor 144 are embedded as dies in thefirst daughterboard 116 and thesecond daughterboard 120, respectively. In these situations, thefirst daughterboard 116 and thesecond daughterboard 120 include connection assemblies (e.g., lead frames) for electrically coupling nodes of thehigh side transistor 140 and thelow side transistor 144 with other components. Additionally, in these examples, the first via 188 and the second via 192 of thefirst daughterboard 116 and the first via 196 and the second via 200 of thesecond daughterboard 120 are implemented as blind vias that extend partially through thefirst daughterboard 116 and thesecond daughterboard 120, respectively. - The first via 188 of the
first daughterboard 116 electrically couples thesecond pad 184 of themotherboard 104 with an input node (e.g., a drain or a collector) of thehigh side transistor 140. Additionally, the second via 192 electrically couples an output node (e.g., a source or an emitter) of thehigh side transistor 140 to athird pad 204 of themotherboard 104. Thethird pad 204 is also electrically coupled to asecond trace 208 of the motherboard, wherein thesecond trace 208 is electrically coupled to anoutput terminal 164 of thepower conversion module 100. Thethird pad 204 is also referrable to as an output node of thepower conversion module 100. In examples where thepower conversion module 100 is implemented as a DC-to-AC power conversion module, theoutput terminal 164 is an AC output terminal that is configured to be coupled to theload 172. - Further, the
third pad 204 is coupled to a first via 216 of themotherboard 104. The first via 216 extends between thethird pad 204 and afourth pad 220 that is situated on thesecond surface 112 of themotherboard 104. Thefourth pad 220 is coupled to the second via 200 of thesecond daughterboard 120. Moreover, the second via 200 of thesecond daughterboard 120 is coupled to the input node (e.g., a drain or a collector) of thelow side transistor 144. In this manner, the input node of thelow side transistor 144 is electrically coupled to theoutput terminal 164 of thepower conversion module 100 and the output node of thehigh side transistor 140. - The output node (e.g., a source or emitter) of the
low side transistor 144 is coupled to the first via 196 of thesecond daughterboard 120. The second via 200 electrically couples the output node of thelow side transistor 144 with afifth pad 224 situated on thesecond surface 112 of themotherboard 104. Athird trace 228 situated on thesecond surface 112 of themotherboard 104 electrically couples thefifth pad 224 with a second via 232 of themotherboard 104. The second via 232 of themotherboard 104 electrically couples thethird trace 228 and a sixth pad 236. Thedecoupling capacitor 136 is coupled to the sixth pad 236. Moreover, in some examples, such as examples where thepower conversion module 100 is implemented as a DC-to-AC power converter, the sixth pad 236 is also coupled to a negative terminal of a power source (e.g., DC−). - As noted, in some examples, the
power conversion module 100 includes a controller that is hidden from view for purposes of simplification of explanation. The controller provides a control signal to the control node (e.g., a gate or base) of thehigh side transistor 140 and thelow side transistor 144. The control signals control an operational state of thehigh side transistor 140 and thelow side transistor 144. In particular, the control signals turn thehigh side transistor 140 and thelow side transistor 144 on (e.g., operate in the linear or saturation region) or off (e.g., operate in the cut-off region). - In operation, current flows along a current path between the
decoupling capacitor 136 and theload 172. Theoutput terminal 164 is configured to be coupled to theload 172 and an area circumscribed by a current loop for current flowing through thedecoupling capacitor 136, thehigh side transistor 140 and thelow side transistor 144 defines a loop area thepower conversion module 100. Moreover, a portion of the current path is marked as acurrent path 240. Thecurrent path 240 includes a loop traversing thedecoupling capacitor 136, thehigh side transistor 140, thelow side transistor 144 and back to thedecoupling capacitor 136. Current flow in thecurrent path 240 is marked with arrows. As is illustrated, opposing legs of thecurrent path 240 flow in opposite directions. For example, as illustrated a first leg of the current loop flowing through thefirst daughterboard 116 flows in a first direction, and a second leg of the current loop flowing through thesecond daughterboard 120 flows in a second direction, opposite the first direction. Moreover, by utilizing 3D space to stack thehigh side transistor 140 andlow side transistor 144 such that theplane 152 extends through both thehigh side transistor 140 and thelow side transistor 144, the area circumscribed by thecurrent path 240 is curtailed (e.g., reduced) relative to approaches where transistors are mounted on the same board (e.g., on the same daughterboard or on a single board power conversion module). Curtailment of the area circumscribed by thecurrent path 240 reduces parasitic inductance of thepower conversion module 100. - Moreover, in some examples, heat sinks, such as a first thermal substrate 244 is applied to the
high side transistor 140 and a secondthermal substrate 248 is applied to thelow side transistor 144. In some examples, the first thermal substrate and the second thermal substrate are implemented as ceramic substrates, such as respective first and second direct bonded copper (DBC) substrates. The first thermal substrate 244 and the secondthermal substrate 248 extract heat from thepower conversion module 100 during operation. This extraction of heat increases the available frequency of operation of thepower conversion module 100. Additionally or alternatively, the extraction of heat increases a lifetime and/or reliability of thepower conversion module 100. For example, if thehigh side transistor 140 and thelow side transistor 144 are implemented as GaN FETs, thepower conversion module 100 is operatable at speeds up to about 10 megahertz (MHz), which corresponds to a maximum operational frequency of such GaN FETs. Moreover, in examples where thehigh side transistor 140 and thelow side transistor 144 are implemented as GaN FETs, a die that includes thehigh side transistor 140 and a die that includes thelow side transistor 144 are fabricated such that a drain, a source and a gate of thehigh side transistor 140 and thelow side transistor 144 directly contact the first thermal substrate 244 and the secondthermal substrate 248, respectively. This arrangement improves transfer of thermal energy, such that thepower conversion module 100 operates efficiently. -
FIGS. 2-4 illustrate different views of apower conversion module 300 formed with three-dimensional (3D) integration. Thepower conversion module 300 is employable to implement thepower conversion module 100 ofFIG. 1 . More particularly,FIG. 2 illustrates an exploded view diagram of thepower conversion module 300.FIG. 3 illustrates a partially assembled view diagram of thepower conversion module 300.FIG. 4 illustrates a fully assembled view diagram of thepower conversion module 300. For purposes of simplification of explanation, the same reference numbers are employed inFIGS. 2-4 to denote the same structure. Thepower conversion module 300 illustrated inFIGS. 2-4 implements a half-bridge DC-to-AC converter (e.g., an inverter). However, in other examples, thepower conversion module 300 is modified to implement a DC-to-DC converter or an AC-to-DC converter. - The
power conversion module 300 includes amotherboard 304, afirst daughterboard 308 and asecond daughterboard 312. Thepower conversion module 300 also includes a positive DC input terminal 316 (DC+), a negative DC input terminal 320 (DC−) and an AC output terminal 324 (AC). Thefirst daughterboard 308 and thesecond daughterboard 312 include power transistors for thepower conversion module 300. More specifically, in the example illustrated, thefirst daughterboard 308 includes a firsthigh side transistor 328 and a secondhigh side transistor 332. Thesecond daughterboard 312 includes a first low side transistor and a second low side transistor that are hidden from view. The firsthigh side transistor 328 and a secondhigh side transistor 332 are employable to implement instances of thehigh side transistor 140 ofFIG. 1 . The first low side transistor and the second low side transistor are employable to implement instances of thelow side transistor 144 ofFIG. 1 . Moreover, in other examples, there could be more or less high side transistors and low side transistors. - In some examples, the first
high side transistor 328, the secondhigh side transistor 332, the first low side transistor and the second low side transistor are implemented as GaN FETs, such as N-channel GaN FETs. In other examples, transistors such as SiC FETs or GaO FETs are employable as the firsthigh side transistor 328, the secondhigh side transistor 332, the first low side transistor and the second low side transistor. In still other examples, the firsthigh side transistor 328, the secondhigh side transistor 332, the first low side transistor and the second low side transistor are implemented as MOSFETS. In still other examples, the firsthigh side transistor 328, the secondhigh side transistor 332, the first low side transistor and the second low side transistor are implemented as BJTs. Moreover, in examples where the firsthigh side transistor 328, the secondhigh side transistor 332, the first low side transistor and the second low side transistor are implemented as GaN FETs, dies that includes the firsthigh side transistor 328 the secondhigh side transistor 332 the first low side transistor and the second low side transistor are fabricated such that a drain, a source and a gate of these GaN FETs are located on one side (e.g., active side) of thefirst daughterboard 308 and thesecond daughterboard 312. - The
motherboard 304 include components, such as a controller, resistors, capacitors, inductors, etc. for controlling operations on thepower conversion module 300. In particular, the controller is employable to provide control signals to input nodes (e.g., gates or bases) of the firsthigh side transistor 328, the secondhigh side transistor 332, the first low side transistor and the second low side transistor to control an operational state of each such transistor. More particularly, the control signals cause the firsthigh side transistor 328, the secondhigh side transistor 332, the first low side transistor and the second low side transistor to turn off and on (e.g., transition between a cut-off and linear mode or saturation mode). - The
motherboard 304 has afirst surface 340 and asecond surface 344. Thefirst surface 340 includes a firstpatterned region 348 for mounting thefirst daughterboard 308. More particularly, the firstpatterned region 348 exposes pads to mount and electrically couple a matched patterned region of the first daughterboard 308 (hidden from view) to thefirst surface 340 of themotherboard 304 with bump soldering. Similarly, thesecond surface 344 includes a similar (e.g., mirror image of the first patterned region 348) patterned region that is hidden from view. The pattern region of thesecond surface 344 of themotherboard 304 matches a patternedregion 352 of thesecond daughterboard 312 for bump soldering. Themotherboard 304 includesdecoupling capacitors 356 mounted thereon. Thedecoupling capacitors 356 are each employable to implement an instance of thedecoupling capacitor 136 ofFIG. 1 . Thefirst daughterboard 308 and thesecond daughterboard 312 are mountable on themotherboard 304 with solder bumps in a stack-up configuration with wireless bonding. Accordingly, thepower conversion module 300 forms a half-bridge configuration. Moreover, by mounting high side power transistors, namely the firsthigh side transistor 328, the secondhigh side transistor 332, the first low side transistor and the second low side transistor on thefirst surface 340 and thesecond surface 344 of themotherboard 304, respectively, provides adequate area for traces and spacing needed for the power transistors. - The
power conversion module 300 includesauxiliary pins 360 that are employable to receive power supply signals and control signal for components, such as the controller and/or other logic in thepower conversion module 300. More particularly, theauxiliary pins 360 enable thepower conversion module 300 to be controlled by an external source. - The
power conversion module 300 includes afirst housing component 364 and asecond housing component 368. In some examples, thefirst housing component 364 and thesecond housing component 368 are formed of molded plastic (or other polymer). Thefirst housing component 364 includes through holes to receive theauxiliary pins 360 and theAC output terminal 324. Thesecond housing component 368 includes through holes to receive the positiveDC input terminal 316 and the negativeDC input terminal 320. -
FIG. 3 illustrates thepower conversion module 300 in a partially assembled state. InFIG. 3 , thefirst daughterboard 308 and the second daughterboard 312 (hidden from view) are mounted on themotherboard 304. Moreover, thefirst housing component 364 and thesecond housing component 368 circumscribe a perimeter of themotherboard 304. - Referring back to
FIG. 2 , thepower conversion module 300 includes a firstthermal substrate 372 and a secondthermal substrate 376. In the example illustrated, the firstthermal substrate 372 and the secondthermal substrate 376 include aceramic layer 380 sandwiched between a DBC patternedlayer 384 and aDBC plate 388. In at least one perspective the DBC patternedlayer 384 of the firstthermal substrate 372 and the secondthermal substrate 376 are overlaying a first surface of the respectiveceramic layer 380. Additionally, in the at least one perspective, theDBC plate 388 is overlaying a second surface of the respectiveceramic layer 380. InFIGS. 2-4 , theDBC plate 388 of the firstthermal substrate 372 is in view, and the DBC plate of the secondthermal substrate 376 is hidden from view. Similarly, inFIGS. 2-4 the DBC patternedlayer 384 of the secondthermal substrate 376 is in view and the DBC patterned layer of the firstthermal substrate 372 is hidden from view. Accordingly, the firstthermal substrate 372 and the secondthermal substrate 376 sandwich the stack-up of thefirst daughterboard 308, themotherboard 304 and thesecond daughterboard 312 to enable dual-side cooling. - More particularly, the DBC patterned
layer 384 of the secondthermal substrate 376 includes a firstconductive pad 390 and a secondconductive pad 392. The firstconductive pad 390 is configured to be in thermal communication with the first low side transistor of thesecond daughterboard 312. The secondconductive pad 392 is configured to be in thermal communication with the second low side transistor. Additionally, the firstconductive pad 390 and the secondconductive pad 392 are electrically isolated from other regions of the DBC patternedlayer 384. The DBC patternedlayer 384 of the firstthermal substrate 372 includes a first pad and a second pad (hidden from view) configured to be in thermal contact with the firsthigh side transistor 328 and the secondhigh side transistor 332 in a similar manner. Patterning the firstthermal substrate 372 and the secondthermal substrate 376 in this manner reduces parasitic capacitance induced by the firstthermal substrate 372 and the secondthermal substrate 376. Theceramic layer 380 of the firstthermal substrate 372 and the secondthermal substrate 376 are thermally conductive, and electrically isolating. In some examples, theceramic layer 380 of the firstthermal substrate 372 and the secondthermal substrate 376 are formed from aluminum oxide (Al2O3), aluminum nitride (AlN) or diamond. TheDBC plate 388 is formed of a continuous layer of copper that thermally dissipates heat to an external source (e.g., air or a heat sink). In this manner, during operation, heat is extracted from the firsthigh side transistor 328, the secondhigh side transistor 332, the first low side transistor and the second low side transistor and dissipated through theDBC plate 388 of the firstthermal substrate 372 and the secondthermal substrate 376. -
FIG. 4 illustrates a fully assembled view of thepower conversion module 300. InFIG. 4 , the firstthermal substrate 372 and the second thermal substrate 376 (hidden from view) are mounted to fully enclose thepower conversion module 300. In this manner, the internal components of thepower conversion module 300 are electrically isolated. Additionally, as is illustrated, the positiveDC input terminal 316, the negativeDC input terminal 320, theAC output terminal 324 and theauxiliary pins 360 are still accessible to external systems. In the fully assembled state, in combination, thefirst housing component 364 and thesecond housing component 368 form a housing that circumscribing edges of the firstthermal substrate 372 and the secondthermal substrate 376. - In operation, current flows along a current path between the
decoupling capacitors 356 and a load (e.g., theload 172 ofFIG. 1 ) coupled to theAC output terminal 324. Moreover, a portion of the current path flows in a loop traversing thedecoupling capacitors 356, the firsthigh side transistor 328 and the secondhigh side transistor 332, the first low side transistor and the second low side transistor and back to thedecoupling capacitors 356. An area circumscribed by a current loop for current flowing through thedecoupling capacitor 356, the firsthigh side transistor 328 and the secondhigh side transistor 332 to the first low side transistor and the second low side transistor defines a loop area of thepower conversion module 300. By utilizing 3D space to form the stack-up configuration, the firsthigh side transistor 328 and the secondhigh side transistor 332 overlay the first low side transistor and the second low side transistor such that the resultant loop area is curtailed (e.g., reduced) relative to approaches where transistors are mounted on the same board (e.g., on the same daughterboard or on a single board power conversion module). Such a reduction of this loop area reduces a parasitic inductance of thepower conversion module 300. - Moreover, in some examples, heat sinks are in thermal communication with the first
thermal substrate 372 and/or the secondthermal substrate 376. Accordingly, the firstthermal substrate 372 and/or the secondthermal substrate 376 extract heat from thepower conversion module 300 during operation. This extraction of heat increases the available frequency of operation of thepower conversion module 300. Additionally or alternatively, the extraction of heat increases a lifetime and/or reliability of thepower conversion module 300. For example, if the firsthigh side transistor 328, the secondhigh side transistor 332, the first low side transistor and the second low side transistor are implemented as GaN FETs, thepower conversion module 300 is operatable at speed up to about 10 MHz, which corresponds to a maximum operational frequency of such GaN FETs. - More generally, the power conversion module employs a hybrid package solution came up using PCBs, namely, the
first daughterboard 308, themotherboard 304 and thesecond daughterboard 312 in a stack-up configuration, sandwiched between the firstthermal substrate 372 and the secondthermal substrate 376. This stack-up configuration enables 3D integration of the power transistors (e.g., GaN FETs) mounted on or integrated with thefirst daughterboard 308 and thesecond daughterboard 312. Thus, as noted, this arrangement curtails a parasitic inductance so that the power transistors, namely the firsthigh side transistor 328, the secondhigh side transistor 332, the first low side transistor and the second low side transistor are operable at or near highest rated switching speed without overheating. - Moreover, as noted, in examples where the first
high side transistor 328, the secondhigh side transistor 332, the first low side transistor and the second low side transistor are implemented as GaN FETs, dies that includes these GaN FETs are fabricated such that a drain, a source and a gate of thehigh side transistor 140 and thelow side transistor 144 are located on one side (e.g., an active side) of thefirst daughterboard 308 and thesecond daughterboard 312. In these examples, the firstthermal substrate 372 directly contacts an active side of thefirst daughterboard 308 and the secondhigh side transistor 332, and the secondthermal substrate 376 directly contacts an active side of thesecond daughterboard 312 to further improve heat dissipation efficiency during operation of thepower conversion module 300. -
FIG. 5 illustrates a cross-section diagram of an example of apower conversion module 400 formed with 3D integration. As one example, thepower conversion module 400 is a DC-to-AC converter (inverter), such as a half-bridge power converter or a full bridge power converter. As another example, thepower conversion module 100 is a DC-to-DC converter, such as a buck converter (a step-down converter) or a boost converter (a step-up converter). In still other examples, thepower conversion module 400 is an AC-to-DC converter. For the examples illustrated, it is presumed that thepower conversion module 400 is a DC-to-AC converter. - The
power conversion module 400 is fabricated with a PCB and/or other substrates to form a 3D power conversion module that operates at high power, such as up to about 700 volts (V) and up to about 150 amperes (A). More particularly, thepower conversion module 400 includes a motherboard 404 (e.g., a PCB). In some examples, themotherboard 404 is a laminate formed of a non-conductive material, such as a polycarbonate substrate. Themotherboard 404 includes afirst surface 408 and asecond surface 412. Thefirst surface 408 opposes thesecond surface 412. - In various examples, circuit components are mountable on the
first surface 408 and/or thesecond surface 412 of themotherboard 404. In the example illustrated,circuit components circuit components power conversion module 400 includes adecoupling capacitor 436 that is mounted on thefirst surface 408 of themotherboard 404. Additionally, thepower conversion module 400 includes power transistors. More particularly, thepower conversion module 400 includes ahigh side transistor 440 mounted on thefirst surface 408 of themotherboard 404, and alow side transistor 444 that is mounted on the second side of themotherboard 404. In some examples, thehigh side transistor 440 and thelow side transistor 444 are representative of multiple transistors arranged in parallel or multiple transistors arranged back-to-back. Accordingly, thehigh side transistor 440, themotherboard 404 and thelow side transistor 444 form a stack-up configuration with wireless bonding. - In some examples, the
high side transistor 440 and thelow side transistor 444 are power transistors, such as high power FETs. More particularly, in some examples, thehigh side transistor 440 and thelow side transistor 444 are implemented as N channel GaN FETs. In other examples, transistors such as SiC FETs or GaO FETs are employable as thehigh side transistor 440 and thelow side transistor 444. In still other examples, thehigh side transistor 440 and thelow side transistor 444 are implemented as MOSFETs. In still other examples, thehigh side transistor 440 and thelow side transistor 444 are implemented as BJTs. Moreover, in examples where thehigh side transistor 440 and thelow side transistor 444 are implemented as GaN FETs, a die that includes thehigh side transistor 440 and a die that includes thelow side transistor 444 are fabricated such that a drain, a source and a gate of thehigh side transistor 440 and thelow side transistor 444 are located on one side (e.g., a topside or bottom side) of the respective die. - In some examples, dies that include the
high side transistor 440 and thelow side transistor 444 have the same footprint (e.g., size) and traverse the same region (in 3D space) of themotherboard 404. Accordingly, in the example illustrated, aregion 448 of themotherboard 404 is overlaid or underlaid (depending on the perspective) by thehigh side transistor 440 and thelow side transistor 444, such that thehigh side transistor 440 and thelow side transistor 444 are coextensive from some perspectives (e.g., overhead view). Additionally, aplane 452 that extends perpendicular to thefirst surface 408 and the second surface of themotherboard 404 passes through thehigh side transistor 440 and thelow side transistor 444. That is, theplane 452 intersects thehigh side transistor 440, thelow side transistor 444 and themotherboard 404. - The
high side transistor 440 and thelow side transistor 444 each include a control node, an input node and an output node. In examples where thehigh side transistor 440 and the low side transistor are implemented as a type of FET, the control node represents a gate, the input node represents a drain and the output node represents a source. In examples where thehigh side transistor 440 and thelow side transistor 444 are implemented as BJTs, the control node represents a base, the input node represents a collector and the output node represents an emitter. - The
motherboard 404 includes anoutput terminal 464 configured to be coupled to aload 472. In some examples, theload 472 includes a motor (e.g., an AC motor). Moreover, in some examples, theload 472 is representative of an inductive load that includes an inductor coupled to resistive and/or capacitive components. Additionally, in some examples, theload 472 is external to thepower conversion module 400. - The
motherboard 404, includes features (e.g., traces, vias and pads) to electrically couple thedecoupling capacitor 436, thehigh side transistor 440, thelow side transistor 444 and theload 472. More particularly, a first node of thedecoupling capacitor 436 is coupled to afirst pad 476 on thefirst surface 408 of themotherboard 404. In some examples, such as examples where thepower conversion module 400 is a DC-to-AC converter, thefirst pad 476 can also be conductively coupled to a positive power terminal (e.g., DC+) of the power conversion module. Additionally, afirst trace 480 extends between thefirst pad 476 and asecond pad 484 on thefirst surface 408 of themotherboard 404. In some examples, thehigh side transistor 440 and thelow side transistor 444 are surface mounted IC chips, such as quad flat no-leads (QFN) IC chips. - The
second pad 484 of themotherboard 404 is electrically coupled to the input node (e.g., a drain or a collector) of thehigh side transistor 440. Additionally, athird pad 504 of themotherboard 404 is electrically coupled to the output node (e.g., a source or an emitter) of thehigh side transistor 440. Thethird pad 504 is also electrically coupled to asecond trace 508 of themotherboard 404, wherein thesecond trace 508 is electrically coupled to anoutput terminal 464 of thepower conversion module 400. Thethird pad 504 is also referrable to as an output node of thepower conversion module 400. In examples where thepower conversion module 400 is implemented as a DC-to-AC power conversion module, theoutput terminal 464 is an AC output terminal that is configured to be coupled to theload 472. - Further, the
third pad 504 is coupled to a first via 516 of themotherboard 404. The first via 516 extends between thethird pad 504 and afourth pad 520 that is situated on thesecond surface 412 of themotherboard 404. Thefourth pad 520 is coupled to the input node (e.g., a drain or a collector) of thelow side transistor 444. In this manner, the input node of thelow side transistor 444 is electrically coupled to theoutput terminal 464 of thepower conversion module 400 and the output node of thehigh side transistor 440. - The output node (e.g., a source or emitter) of the
low side transistor 444 is electrically coupled to afifth pad 524 situated on thesecond surface 412 of themotherboard 404. Athird trace 528 situated on thesecond surface 412 of themotherboard 404 electrically couples thefifth pad 524 with a second via 532 of themotherboard 404. The second via 532 of themotherboard 404 electrically couples thethird trace 528 and asixth pad 536. Thedecoupling capacitor 436 is coupled to thesixth pad 536. Moreover, in some examples, such as examples where thepower conversion module 400 is implemented as a DC-to-AC power converter, thesixth pad 536 is also coupled to a negative terminal of a power source (e.g., DC−). - As noted, in some examples, the
power conversion module 400 includes a controller that is hidden from view for purposes of simplification of explanation. The controller provides a control signal to the control node (e.g., a gate or base) of thehigh side transistor 440 and thelow side transistor 444. The control signals control an operational state of thehigh side transistor 440 and thelow side transistor 444. In particular, the control signals turn thehigh side transistor 440 and thelow side transistor 444 on (e.g., operate in the linear or saturation region) or off (e.g., operate in the cut-off region). - In operation, current flows along a current path between the
decoupling capacitor 436 and theload 472. Moreover, a portion of the current path is marked as acurrent path 540. Thecurrent path 540 includes a loop traversing thedecoupling capacitor 436, thehigh side transistor 440, thelow side transistor 444 and back to thedecoupling capacitor 436. Theoutput terminal 464 is configured to be coupled to theload 472 and an area circumscribed by a current loop for current flowing through thedecoupling capacitor 436, thehigh side transistor 440 and thelow side transistor 444 defines a loop area thepower conversion module 400. Current flow in thecurrent path 540 is marked with arrows. As is illustrated, opposing legs of thecurrent path 540 flow in opposite directions. For example, as illustrated, a first leg of the current loop flowing thehigh side transistor 440 flows in a first direction, and a second leg of the current loop flowing through thelow side transistor 444 flows in a second direction, opposite the first direction. Moreover, by utilizing 3D space to stack thehigh side transistor 440 andlow side transistor 444 such that theplane 452 extends through both thehigh side transistor 440 and thelow side transistor 444, the loop area (a portion of the area circumscribed by the current path 540) is curtailed (e.g., reduced) relative to approaches where transistors are mounted on a same side of the same board (e.g., on the same side of the motherboard 404). Curtailment of the area circumscribed by thecurrent path 540 reduces parasitic inductance of thepower conversion module 400. - Moreover, in some examples, heat sinks, such as a first
thermal substrate 544 is applied to thehigh side transistor 440 and a secondthermal substrate 548 is applied to thelow side transistor 444. In some examples, the first thermal substrate and the second thermal substrate are implemented as ceramic substrates, such as respective first and second DBC substrates. The firstthermal substrate 544 and the secondthermal substrate 548 extract heat from thepower conversion module 400 during operation. This extraction of heat increases the available frequency of operation of thepower conversion module 400. Additionally or alternatively, the extraction of heat increases a lifetime and/or reliability of thepower conversion module 400. For example, if thehigh side transistor 440 and thelow side transistor 444 are implemented as GaN FETs, thepower conversion module 400 is operatable at speeds up to about 40 MHz, which corresponds to a maximum operational frequency of such GaN FETs. Moreover, in examples where thehigh side transistor 440 and thelow side transistor 444 are implemented as GaN FETs, a die that includes thehigh side transistor 440 and a die that includes thelow side transistor 444 are fabricated such that a drain, a source and a gate of thehigh side transistor 440 and thelow side transistor 444 directly contact the firstthermal substrate 544 and the secondthermal substrate 548, respectively. This arrangement improves transfer of thermal energy, such that thepower conversion module 400 operates efficiently. - As compared to the
power conversion module 100 ofFIG. 1 , thepower conversion module 400 omits daughterboards (e.g., thefirst daughterboard 116 and the second daughterboard 120). To accommodate removal of such daughterboards, components sizes, such as thecircuit components smaller circuit components power conversion module 400 are adjusted and/or the cost of thecircuit components first daughterboard 116 or the second daughterboard 120) is mounted on one side of themotherboard 404. In these examples, some of thecomponents -
FIG. 6 illustrates a simplified circuit diagram of apower conversion module 600. Thepower conversion module 600 is illustrated as a DC-to-AC power converter. Moreover, thepower conversion module 600 is employable to implement the thepower conversion module 100 ofFIG. 1 ,power conversion module 300 ofFIGS. 2-4 and/or thepower conversion module 400 ofFIG. 5 . - The
power conversion module 600 includes a firsthigh side transistor 604 and a secondhigh side transistor 608. The firsthigh side transistor 604 and the secondhigh side transistor 608 correspond to the firsthigh side transistor 328 and the secondhigh side transistor 332 ofFIGS. 2-4 . Thus, the firsthigh side transistor 604 and the secondhigh side transistor 608 are mounted on a first daughterboard, such as thefirst daughterboard 308 ofFIGS. 2-4 . Thepower conversion module 600 also includes a firstlow side transistor 612 and a secondlow side transistor 616. The firstlow side transistor 612 and the second low side transistor correspond to the first low side transistor and the second low side transistor ofFIGS. 2-4 . Thus, the firstlow side transistor 612 and the secondlow side transistor 616 are mounted on a second daughterboard, such as thesecond daughterboard 312 ofFIGS. 2-4 . Thepower conversion module 600 includes adecoupling capacitor 620 that corresponds to one or more of thedecoupling capacitors 356 ofFIGS. 2-4 . Thedecoupling capacitor 620 is mounted on a motherboard, such as themotherboard 304 ofFIGS. 2-4 . As illustrated inFIGS. 2-4 , the firsthigh side transistor 604 and the secondhigh side transistor 608 overlay the firstlow side transistor 612 and the secondlow side transistor 616 in a 3D space. In the example illustrated, it is presumed that the firsthigh side transistor 604, the secondhigh side transistor 608, the firstlow side transistor 612 and the secondlow side transistor 616 are GaN FETs. However, in other examples, other types of transistors, such as SiC FETs and GaO FETs, MOSFETS or BJTs are employable. - The first
high side transistor 604 and the secondhigh side transistor 608 include a control node 622 (e.g., a gate or a base) that receives a control signal from acontroller 628. In some examples, the control signal provided to thecontrol node 622 of the firsthigh side transistor 604 and thecontrol node 622 of the secondhigh side transistor 608 are synchronous. Similarly, the firstlow side transistor 612 and the second low side transistor include a control node 632 (e.g., a gate or a base) that receives a control signal from thecontroller 628. In some examples, the control signal provided to thecontrol node 632 of the firstlow side transistor 612 and the secondlow side transistor 616 are synchronous. Moreover, in some such examples, the control signal provided to thecontrol node 622 of the firsthigh side transistor 604 and the secondhigh side transistor 608 are complements of the control signal provided to thecontrol node 632 of the firstlow side transistor 612 and the secondlow side transistor 616. - In some examples, the
controller 628 is mounted on the motherboard. In other examples, thecontroller 628 is external to thepower conversion module 600 and provides control signals through auxiliary pins, such as theauxiliary pins 360 ofFIGS. 2-4 . - The
power conversion module 600 includes a positiveDC input terminal 636 that corresponds to the positiveDC input terminal 316 ofFIGS. 2-4 and a negativeDC input terminal 640 that corresponds to the negativeDC input terminal 320 ofFIGS. 2-4 . Thepower conversion module 600 also includes anAC output terminal 644 that corresponds to theAC output terminal 324 ofFIGS. 2-4 . Thus, theAC output terminal 644 is configured to be coupled to aload 648 that is external to thepower conversion module 600. - The positive
DC input terminal 636 is coupled to afirst input node 652 of thepower conversion module 600. A negativeDC input terminal 640 is coupled to asecond input node 656 of thepower conversion module 600. Additionally, theAC output terminal 644 is coupled to anoutput node 660 of thepower conversion module 600. - A first node of the
decoupling capacitor 620 is coupled to thefirst input node 652 of thepower conversion module 600 and a second node of thedecoupling capacitor 620 is coupled to thesecond input node 656. The firsthigh side transistor 604 and the secondhigh side transistor 608 include an input node 664 (e.g., a drain or collector) that is coupled to thefirst input node 652. The firsthigh side transistor 604 and the secondhigh side transistor 608 include an output node 668 (e.g., a source or emitter) that is coupled to theoutput node 660. - The first
low side transistor 612 and the secondlow side transistor 616 include an input node 672 (e.g., a drain or collector) that is coupled to theoutput node 660 of thepower conversion module 600. The firstlow side transistor 612 and the secondlow side transistor 616 include an output node 676 (e.g., a source or emitter) that is coupled to the negativeDC input terminal 640. - In operation, current flows in a current path 680 that traverses the
decoupling capacitor 620, the firsthigh side transistor 604, the secondhigh side transistor 608, the firstlow side transistor 612 and the secondlow side transistor 616. The current path 680 forms a loop. Curtailing the area circumscribed by the current path 680 reduces parasitic inductance. Thus, by leveraging 3D space (as illustrated inFIGS. 2-4 ) to overlay the firsthigh side transistor 604 and the secondhigh side transistor 608, the area circumscribed by the current path 680 can be curtailed. -
FIG. 7 illustrates a flowchart of anexample method 700 fabricating a power conversion module, such as thepower conversion module 100 ofFIG. 1 , thepower conversion module 300 ofFIGS. 2-4 and/or thepower conversion module 400 ofFIG. 4 . At 710, a first daughterboard (e.g., thefirst daughterboard 116 ofFIG. 1 ) is mounted on a first surface of a motherboard (e.g., thefirst surface 108 of themotherboard 104 ofFIG. 1 ). The first daughterboard is mounted such that a first trace (e.g., thefirst trace 180 ofFIG. 1 ) of the motherboard electrically couples a decoupling capacitor (e.g., thedecoupling capacitor 136 ofFIG. 1 ) mounted on the motherboard to a high side transistor (e.g., thehigh side transistor 140 ofFIG. 1 ) of the power conversion module that is situated on the first daughterboard. Additionally, the first daughterboard is mounted such that the high side transistor is electrically coupled to an output terminal (e.g., theoutput terminal 164 ofFIG. 1 ) of the power conversion module, with the output terminal being situated on the motherboard. - At 720, a second daughterboard (e.g., the
second daughterboard 120 ofFIG. 1 ) is mounted to a second surface (e.g., thesecond surface 112 ofFIG. 1 ) of the motherboard. The second daughterboard is mounted such that the output terminal of the power conversion module is electrically coupled to a low side transistor (e.g., thelow side transistor 144 ofFIG. 1 ) of the power conversion module and the low side transistor is electrically coupled to a second trace situated on the motherboard (e.g., thethird trace 228 ofFIG. 1 ), to electrically couple the decoupling capacitor with the low side transistor. In some examples, the high side transistor and the low side transistor are GaN FETs. In other examples, other types of transistors, such as SiC FETs and GaO FET, MOSFETS or BJTs are employable. - At 730, a first thermal substrate (e.g., the first thermal substrate 372) is mounted on the first daughterboard (e.g., the
first daughterboard 308 ofFIG. 2 ). At 740, a second thermal substrate (e.g., the secondthermal substrate 376 ofFIG. 2 ) is mounted on the second daughterboard (e.g., thesecond daughterboard 312 ofFIG. 2 ). At 750, a housing (e.g., thefirst housing component 364 and thesecond housing component 368 ofFIG. 2 ) is secured on the power conversion module. - What have been described above are examples. It is, of course, not possible to describe every conceivable combination of components or methodologies, but one of ordinary skill in the art will recognize that many further combinations and permutations are possible. Accordingly, the disclosure is intended to embrace all such alterations, modifications, and variations that fall within the scope of this application, including the appended claims.
Claims (24)
1-10. (canceled)
21. A power conversion module comprising:
a first daughterboard coupled to a first pad and a second pad on a motherboard, the first daughterboard comprising a high side transistor for the power conversion module; and
a second daughterboard coupled to a third pad and a fourth pad on the mother board, the second daughterboard comprising a low side transistor for the power conversion module.
22. The power conversion module of claim 21 , wherein the first daughterboard and the second daughter board are mounted on the mother board.
23. The power conversion module of claim 22 , where the first daughterboard is mounted on a first side of the motherboard and the second daughterboard is mounted on a second side of the mother board.
24. The power conversion module of claim 21 , wherein the first daughterboard and the second daughterboard have the same footprint.
25. The power conversion module of claim 24 , wherein a plane perpendicular to the first surface and the second surface of the motherboard intersects the high side transistor and the low side transistor.
26. The power conversion module of claim 21 , wherein the high side transistor and the low side transistor are gallium nitride (GaN) field effect transistors (FETs).
27. The power conversion module of claim 26 , wherein the high side transistor is a component of an integrated circuit (IC) chip mounted on the first daughterboard and the low side transistor is a component of an IC chip mounted on the second daughterboard.
28. The power conversion module of claim 26 , wherein the high side transistor is formed on a first die integrated with the first daughterboard and the low side transistor is formed on a second die integrated with the second daughterboard.
29. The power conversion module of claim 21 , wherein an output node on the motherboard is configured to be coupled to a load and an area circumscribed by a current loop for current flowing through a decoupling capacitor.
30. The power conversion module of claim 29 , wherein the high side transistor and the low side transistor define a loop area of the power conversion module.
31. The power conversion module of claim 29 , wherein a first leg of the current loop flows in a first direction through the first daughterboard, and a second leg of the current loop flows in a second direction through the second daughterboard, the second direction being opposite of the first direction.
32. The power conversion module of claim 21 , further comprising:
a first thermal substrate thermally coupled to the first daughterboard; and
a second thermal substrate thermally coupled to the second daughterboard.
33. The power conversion module of claim 32 , wherein the first thermal substrate comprises:
a direct bonded copper (DBC) patterned layer overlaying a first surface of a ceramic substrate, the DBC patterned layer being in contact with the first daughterboard; and
a DBC plate overlaying a second surface of the ceramic layer, the DBC plate being electrically isolated from the first daughterboard and in thermal communication with the first daughterboard.
34. The power conversion module of claim 33 , further comprising a housing circumscribing edges of the first thermal substrate and the second thermal substrate.
35. The power conversion module of claim 33 , wherein the power conversion module is a direct current (DC) to alternating current (AC) power conversion module or a DC-to-DC power conversion module.
36. A power conversion module comprising:
a high side transistor electrically coupled to a first pad and a second pad on a motherboard;
a low side transistor electrically coupled to a third pad and a fourth pad on the motherboard;
a first thermal substrate thermally coupled to the high side transistor; and
a second thermal substrate thermally coupled to the low side transistor.
37. The power conversion module of claim 36 , wherein a plane perpendicular to the first surface and the second surface of the motherboard intersects the high side transistor and the low side transistor.
38. The power conversion module of claim 36 , wherein the high side transistor and the low side transistor are gallium nitride (GaN) field effect transistors (FETs).
39. A method for forming a power conversion module, the method comprising:
coupling a decoupling capacitor on a motherboard to a high side transistor on a first daughterboard and coupling the high side transistor to an output node of the power conversion module, the output node being situated on the motherboard; and
coupling a low side transistor on a second daughterboard such that the output node is electrically coupled to a low side transistor of the power conversion module and the low side transistor is electrically coupled to the decoupling capacitor.
40. The method of claim 39 , further comprising:
mounting a first thermal substrate on the power conversion module to contact the first daughterboard; and
mounting a second thermal substrate on the power conversion module to contact the second daughterboard.
41. The method of claim 40 , wherein the first daughterboard and the second daughterboard have the same footprint.
42. The method of claim 41 , wherein a plane perpendicular to the first surface and the second surface of the motherboard intersects the high side transistor and the low side transistor.
43. The method of claim 42 , wherein the high side transistor and the low side transistor are gallium nitride (GaN) field effect transistors (FETs).
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US6366467B1 (en) * | 2000-03-31 | 2002-04-02 | Intel Corporation | Dual-socket interposer and method of fabrication therefor |
US6700795B1 (en) * | 2002-01-23 | 2004-03-02 | Yazaki North America | Scalable, modular architecture for automotive power distribution and body control functions |
US8345433B2 (en) | 2004-07-08 | 2013-01-01 | Avx Corporation | Heterogeneous organic laminate stack ups for high frequency applications |
US7336490B2 (en) | 2004-11-24 | 2008-02-26 | Hewlett-Packard Development Company, L.P. | Multi-chip module with power system |
US7327569B2 (en) | 2004-12-13 | 2008-02-05 | Hewlett-Packard Development Company, L.P. | Processor module with thermal dissipation device |
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US7800222B2 (en) * | 2007-11-29 | 2010-09-21 | Infineon Technologies Ag | Semiconductor module with switching components and driver electronics |
KR101343140B1 (en) | 2010-12-24 | 2013-12-19 | 삼성전기주식회사 | 3D power module package |
US20150365003A1 (en) | 2014-06-12 | 2015-12-17 | Laurence P. Sadwick | Power Conversion System |
FR3044184B1 (en) * | 2015-11-23 | 2018-03-23 | IFP Energies Nouvelles | MODULAR SYSTEM FOR CONVERTING CONTINUOUS ELECTRIC POWER IN THREE-PHASE ELECTRIC POWER |
US20190206810A1 (en) * | 2016-08-22 | 2019-07-04 | Neturen Co., Ltd. | Power semiconductor module, snubber circuit, and induction heating power supply apparatus |
US10672663B2 (en) | 2016-10-07 | 2020-06-02 | Xcelsis Corporation | 3D chip sharing power circuit |
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US10212838B2 (en) | 2017-01-13 | 2019-02-19 | Cree Fayetteville, Inc. | High power multilayer module having low inductance and fast switching for paralleling power devices |
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