US20220217363A1

US20220217363A1 - Interaction between pairwise average merging candidates and ibc

Info

Publication number: US20220217363A1
Application number: US17/700,086
Authority: US
Inventors: Kai Zhang; Li Zhang; Hongbin Liu; Yue Wang
Original assignee: Beijing ByteDance Network Technology Co Ltd; ByteDance Inc
Current assignee: Beijing ByteDance Network Technology Co Ltd; ByteDance Inc
Priority date: 2018-06-05
Filing date: 2022-03-21
Publication date: 2022-07-07
Also published as: US20200404260A1; CN110572647A; CN110572646A; US11523123B2; WO2019234606A1; US20200413048A1; US20210392341A1; CN110572670B; CN110572658B; JP7104186B2; WO2019234607A1; WO2019234600A1; GB202018447D0; CN110572671B; EP3788787A1; GB2588023A; CN110572658A; GB202018465D0; TW202002644A; GB2588003A

Abstract

A method of decoding visual information from a coded representation of the visual information includes determining that a block being decoded representing a portion of an encoded picture of visual information is coded using a motion candidate associated with a motion vector, wherein the motion vector is derived as a weighted average of a plurality of motion vectors, wherein all of the plurality of motion vectors refer to a same picture type, and wherein a first picture type represents a current picture and a second picture type represents a reference pictures different from the current picture and decoding the block being decoded by using the motion candidate.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of U.S. application Ser. No. 17/031,451, filed on Sep. 24, 2020, which is a continuation of International Application No. PCT/IB2019/054604, filed on Jun. 4, 2019, which claims the priority to and benefits of International Patent Application No. PCT/CN2018/089920, filed on Jun. 5, 2018. All the patent application is hereby incorporated by reference in their entireties.

TECHNICAL FIELD

This patent document is directed generally to video coding technologies.

BACKGROUND

Motion compensation is a technique in video processing to predict a frame in a video, given the previous and/or future frames by accounting for motion of the camera and/or objects in the video. Motion compensation can be used in the encoding and decoding of video data for video compression.

SUMMARY

Devices, systems and methods related to intra-block copy for motion compensation are described.
In one representative aspect, the disclosed technology may be used to provide a method for video encoding using intra-block copy. This method includes determining whether a current block of the current picture is to be encoded using a motion compensation algorithm, and encoding, based on the determining, the current block by selectively applying an intra-block copy to the current block.
In another representative aspect, the disclosed technology may be used to provide another method for video encoding using intra-block copy. This method includes determining whether a current block of the current picture is to be encoded using an intra-block copy, and encoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block.
In yet another representative aspect, the disclosed technology may be used to provide a method for video decoding using intra-block copy. This method includes determining whether a current block of the current picture is to be decoded using a motion compensation algorithm, and decoding, based on the determining, the current block by selectively applying an intra-block copy to the current block.
In yet another representative aspect, the disclosed technology may be used to provide another method for video decoding using intra-block copy. This method includes determining whether a current block of the current picture is to be decoded using an intra-block copy, and decoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block.
In yet another representative aspect, a visual information decoding method is disclosed. The method includes determining that a block being decoded representing a portion of an encoded picture of visual information is coded using a motion candidate associated with a motion vector, wherein the motion vector is derived as a weighted average of a plurality of motion vectors, wherein all of the plurality of motion vectors refer to a same picture type, and wherein a first picture type represents a current picture and a second picture type represents a reference pictures different from the current picture; and decoding the block being decoded by using the motion candidate.
In yet another representative aspect, a visual information encoding method is disclosed. The method includes obtaining a block to encode representing a portion of a picture of visual information; encoding the block to encode using a motion candidate associated with a motion vector, wherein the motion vector is derived as a weighted average of a plurality of motion vectors, wherein all of the plurality of motion vectors refer to same picture type, and wherein a first picture type represents a current picture and a second picture type represents a reference picture different from the current picture
In yet another representative aspect, the above-described method is embodied in the form of processor-executable code and stored in a computer-readable program medium.
In yet another representative aspect, a device that is configured or operable to perform the above-described method is disclosed. The device may include a processor that is programmed to implement this method.
In yet another representative aspect, a video decoder apparatus may implement a method as described herein.
The above and other aspects and features of the disclosed technology are described in greater detail in the drawings, the description and the claims.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows an example of an intra-block copy technique.

FIG. 2 shows an example of a coding unit (CU) with sub-blocks and neighboring blocks used by the spatial-temporal motion vector prediction (STMVP) algorithm.

FIG. 3 shows a flowchart of an example method for video encoding using intra-block copy in accordance with the disclosed technology.

FIG. 4 shows a flowchart of another example method for video encoding using intra-block copy in accordance with the disclosed technology.

FIG. 5 shows a flowchart of an example method for video decoding using intra-block copy in accordance with the disclosed technology.

FIG. 6 shows a flowchart of another example method for video decoding using intra-block copy in accordance with the disclosed technology.

FIG. 7 is a block diagram illustrating an example of the architecture for a computer system or other control device that can be utilized to implement various portions of the presently disclosed technology.

FIG. 8 shows a block diagram of an example embodiment of a mobile device that can be utilized to implement various portions of the presently disclosed technology.

FIG. 9 shows a flowchart of an example method for video decoding in accordance with the disclosed technology.

FIG. 10 shows a flowchart of an example method for video encoding in accordance with the disclosed technology.

DETAILED DESCRIPTION

Section headings are used in the present document for the ease of understanding and do not limit scope of the technologies and embodiments discussed in each section to just that section.
Due to the increasing demand of higher resolution visual information, such as video, images, three-dimensional scenes, etc., video coding methods and techniques are ubiquitous in modern technology. The techniques described in this application can apply to various visual information including video, images, three-dimensional scenes, etc. A picture of the visual information can be a frame in a video, a portion of an image, an object in a three-dimensional scene, a portion of the three-dimensional scene, etc. A block can be portion of the picture of the visual information such as a coding unit (CU), a largest coding unit (LCU), a sample, a prediction unit (PU) etc. as described in this application. A sub-block of the visual information can be a PU such as a sub-CU, a sample, etc. The PU can be a pixel, a voxel, or a smallest quantum of resolution of the visual information. Video codecs typically include an electronic circuit or software that compresses or decompresses digital video, and are continually being improved to provide higher coding efficiency. A video codec converts uncompressed video to a compressed format or vice versa. There are complex relationships between the video quality, the amount of data used to represent the video (determined by the bit rate), the complexity of the encoding and decoding algorithms, sensitivity to data losses and errors, ease of editing, random access, and end-to-end delay (latency). The compressed format usually conforms to a standard video compression specification, e.g., the High Efficiency Video Coding (HEVC) standard (also known as H.265 or MPEG-H Part 2), the Versatile Video Coding standard to be finalized, or other current and/or future video coding standards.
Embodiments of the disclosed technology may be applied to existing video coding standards (e.g., HEVC, H.265) and future standards to improve runtime performance. Section headings are used in the present document to improve readability of the description and do not in any way limit the discussion or the embodiments (and/or implementations) to the respective sections only.

1. Examples of Reference Pictures and Reference Picture Lists

In HEVC, there are two types of reference pictures, short-term and long-term. A reference picture may be marked as “unused for reference” when it becomes no longer needed for prediction reference. A completely new approach for reference picture management, referred to as reference picture set (RPS) or buffer description has been introduced by HEVC.
The process of marking pictures as “used for short-term reference”, “used for long-term reference”, or “unused for reference” is done using the RPS concept. An RPS is a set of picture indicators that is signaled in each slice header and consists of one set of short-term pictures and one set of long-term pictures. After the first slice header of a picture has been decoded, the pictures in the DPB are marked as specified by the RPS. The pictures in the DPB that are indicated in the short-term picture part of the RPS are kept as short-term pictures. The short-term or long-term pictures in the DPB that are indicated in the long-term picture part in the RPS are converted to or kept as long-term pictures. And finally, pictures in the DPB for which there is no indicator in the RPS are marked as unused for reference. Thus, all pictures that have been decoded that may be used as references for prediction of any subsequent pictures in decoding order must be included in the RPS.
An RPS consists of a set of picture order count (POC) values that are used for identifying the pictures in the DPB. Besides signaling POC information, the RPS also signals one flag for each picture. Each flag indicates whether the corresponding picture is available or unavailable for reference for the current picture. Note that even though a reference picture is signaled as unavailable for the current picture, it is still kept in the DPB and may be made available for reference later on and used for decoding future pictures.
From the POC information and the availability flag, five lists of reference pictures as shown in Table 1 can be created. The list RefPicSetStCurrBefore consists of short-term pictures that are available for reference for the current picture and have POC values that are lower than the POC value of the current picture. RefPicSetStCurrAfter consist of available short-term pictures with a POC value that is higher than the POC value of the current picture. RefPicSetStFoll is a list that contains all short-term pictures that are made unavailable for the current picture but may be used as reference pictures for decoding subsequent pictures in decoding order. Finally, the lists RefPicSetLtCurr and RefPicSetLtFoll contain long-term pictures that are available and unavailable for reference for the current picture, respectively.

TABLE 1

List of Reference Picture lists

	Long-term or	Availability
List name	short-term	flag	POC

RefPicSetStCurrBefore	Short-term	Available	Lower
RefPicSetStCurrAfter	Short-tem	Available	Higher
RefPicSetStFoll	Short-term	Unavailable	—
RefFicSetLtCurr	Long-term	Available	—
ReiPicSetLtFoll	Long-term	Unavailable	—

1.1 Examples of Short-Term and Long-Term Reference Pictures

The syntax for the general sequence parameter set is shown below:


	Descriptor

seq_pammeter_set_rbsp( ) {
sps_video_parameter_set_id	u(4)
sps_max_sub_layers_minus1	u(3)
sps_temporal_id_nesting_flag	u(1)
profile_tier_level( 1,sps_max_sub_layers_minus1 )
sps_seq_parameter_set_id	ue(v)
chroma_format_idc	ue(v)
if( chroma_format_idc == 3 )
. . .
}
. . .
amp_enabled_flag	u(1)
sample_adaptive_offset_enabled_flag	u(1)
pcm_enabled_flag	u(1)
if( pcm_enabled_flag ) {
. . .
}
num_short_term_ref_pic_sets	ue(v)
for( i = 0; i < num_short_term_ref_pic_sets; i++)
st_ref_pic_set(i)
long_tenn_ref_pics_present_flag	u(1)
if( long_term_ref_pics_present_flag) {
num_long_term_ref_pics_sps	ue(v)
for( i = 0; i < num_long_term_ref_pics_sps; i++) {
lt_ref_pic_poc_lsb_sps[i]	u(v)
used_by_curr_pic_lt_sps_flag[i]	u(1)
}
}
sps_temporal_mvp_enabled_flag	u(1)
. . .
}

The syntax for the general slice segment header is shown below:


	Descriptor

slice_segment_header( ) {	u(1)
first_slice_segment_in_pic_flag
if( nal_unit_type >= BLA_W_LP && nal_unit_type <=
RSV_IRAP_VCL23 )
no_output_of_prior_pics_flag	u(1)
slice_pic_parameter_set_id	ue(v)
if( !first_slice_segment_in_pic_flag) {
if( dependent_slice_segments_enabled_flag)
dependent_slice_segment_flag	u(1)
slice_segment_address	u(v)
}
if( !dependent_slice_segment_flag) {
for( i = 0; i < num_extra_slice_header_bits; i++)
slice_reserved_flag[i]	u(1)
slice_type	ue(v)
if( output_flag_present_flag)
pic_output_flag	u(1)
if( separate_colour_plane_flag == 1)
colour_plane_id	u(2)
if( nal_unit_type != IDR_W_RADL && nal_unit_type !=
IDR_N_LP ) {
slice_pic_order_cnt_lsb	u(v)
short_term_ref_pic_set_sps_flag	u(1)
if( !short_term_ref_pic_set_sps_flag)
st_ref_pic_set(num_short_term_ref_pic_sets)
else if( num_short_term_ref_pic_sets > 1)
short_term_ref_pic_set_idx	u(v)
if( long_term_ref_pics_present_flag) {
if( num_long_term_ref_pics_sps > 0)
num_long_term_sps	ue(v)
num_long_term_pics	ue(v)
for( i = 0; i < num_long_term_sps + num_long_teim_pics; i++) {
if( i < num_long_term_sps ) {
if( num_long_term_ref_pics_sps > 1)
lt_idx_sps[i]	u(v)
} else {
poc_lsb_lt[i]	u(v)
used_by_curr_pic_lt_flag[i]	u(1)
}
delta_poc_msb_present_flag[i]	u(1)
if( delta_poc_msb_present_flag[i] )
delta_poc_msb_cycle_lt[i]	ue(v)
}
}
. . .

The semantics used in the syntax tables above are defined as:
num_short_term_ref_pic_sets specifies the number of st_ref_pic_set( ) syntax structures included in the SPS. The value of num_short_term_ref_pic_sets shall be in the range of 0 to 64, inclusive.
In some embodiments, a decoder may allocate memory for a total number of num_short_term_ref_pic_sets+1 st_ref_pic_set( ) syntax structures since there may be a st_ref_pic_set( ) syntax structure directly signaled in the slice headers of a current picture. A st_ref_pic_set( ) syntax structure directly signaled in the slice headers of a current picture has an index equal to num_short_term_ref_pic_sets.
long_term_ref_pics_present_flag equal to 0 specifies that no long-term reference picture is used for inter prediction of any coded picture in the CVS. long_term_ref_pics_present_flag equal to 1 specifies that long-term reference pictures may be used for inter prediction of one or more coded pictures in the CVS.
num_long_term_ref_pics_sps specifies the number of candidate long-term reference pictures that are specified in the SPS. The value of num_long_term_ref_pics_sps shall be in the range of 0 to 32, inclusive.
lt_ref_pic_poc_lsb_sps[i] specifies the picture order count modulo MaxPicOrderCntLsb of the i-th candidate long-term reference picture specified in the SPS. The number of bits used to represent lt_ref_pic_poc_lsb_sps[i] is equal to log 2_max_pic_order_cnt_lsb_minus4+4.
used_by_curr_pic_lt_sps_flag[i] equal to 0 specifies that the i-th candidate long-term reference picture specified in the SPS is not used for reference by a picture that includes in its long-term reference picture set (RPS) the i-th candidate long-term reference picture specified in the SPS.
short_term_ref_pic_set_sps_flag equal to 1 specifies that the short-term RPS of the current picture is derived based on one of the st_ref_pic_set( ) syntax structures in the active SPS that is identified by the syntax element short_term_ref_pic_set_idx in the slice header. short_term_ref_pic_set_sps_flag equal to 0 specifies that the short-term RPS of the current picture is derived based on the st_ref_pic_set( ) syntax structure that is directly included in the slice headers of the current picture. When num_short_term_ref_pic_sets is equal to 0, the value of short_term_ref_pic_set_sps_flag shall be equal to 0.
short_term_ref_pic_set_idx specifies the index, into the list of the st_ref_pic_set( ) syntax structures included in the active SPS, of the st_ref_pic_set( ) syntax structure that is used for derivation of the short-term RPS of the current picture. The syntax element short_term_ref_pic_set_idx is represented by Ceil(Log 2(num_short_term_ref_pic_sets)) bits. When not present, the value of short_term_ref_pic_set_idx is inferred to be equal to 0. The value of short_term_ref_pic_set_idx shall be in the range of 0 to num_short_term_ref_pic_sets−1, inclusive.
In some embodiments, the variable CurrRpsIdx is derived as follows:

- If short_term_ref_pic_set_sps_flag is equal to 1, CurrRpsIdx is set equal to short_term_ref_pic_set_idx.
- Otherwise, CurrRpsIdx is set equal to num_short_term_ref_pic_sets.

num_long_term_sps specifies the number of entries in the long-term RPS of the current picture that are derived based on the candidate long-term reference pictures specified in the active SPS. The value of num_long_term_sps shall be in the range of 0 to num_long_term_ref_pics_sps, inclusive. When not present, the value of num_long_term_sps is inferred to be equal to 0.
num_long_term_pics specifies the number of entries in the long-term RPS of the current picture that are directly signaled in the slice header. When not present, the value of num_long_term_pics is inferred to be equal to 0.
In some embodiments, when nuh_layer_id is equal to 0, the value of num_long_term_pics shall be less than or equal to sps_max_dec_pic_buffering_minus1[TemporalId]−NumNegativePics[CurrRpsIdx]−NumPositivePics[CurrRpsIdx]−num_long_term_sps−Two Version sOfCurrDecPicFlag.
lt_idx_sps[i] specifies an index, into the list of candidate long-term reference pictures specified in the active SPS, of the i-th entry in the long-term RPS of the current picture. The number of bits used to represent lt_idx_sps[i] is equal to Ceil(Log 2(num_long_term_ref_pics_sps)). When not present, the value of lt_idx_sps[i] is inferred to be equal to 0. The value of lt_idx_sps[i] shall be in the range of 0 to num_long_term_ref_pics_sps−1, inclusive.
poc_lsb_lt[i] specifies the value of the picture order count modulo MaxPicOrderCntLsb of the i-th entry in the long-term RPS of the current picture. The length of the poc_lsb_lt[i] syntax element is log 2_max_pic_order_cnt_lsb_minus4+4 bits.
used_by_curr_pic_lt_flag[i] equal to 0 specifies that the i-th entry in the long-term RPS of the current picture is not used for reference by the current picture.
In some embodiments, the variables PocLsbLt[i] and UsedByCurrPicLt[i] are derived as follows:

- If i is less than num_long_term_sps, PocLsbLt[i] is set equal to lt_ref_pic_poc_lsb_sps[lt_idx_sps[i]] and UsedByCurrPicLt[i] is set equal to used_by_currpic_lt_sps_flag[lt_idx_sps[i]].
- Otherwise, PocLsbLt[i] is set equal to poc_lsb_lt[i] and UsedByCurrPicLt[i] is set equal to used_by_curr_pic_lt_flag[i].

delta_poc_msb_present_flag[i] equal to 1 specifies that delta_poc_msb_cyde_lt[i] is present. delta_poc_msb_present_flag[i] equal to 0 specifies that delta_poc_msb_cycle_lt[i] is not present.
In some embodiments, let prevTid0Pic be the previous picture in decoding order that has TemporalId equal to 0 and is not a RASL, RADL or SLNR picture. Let setOfPrevPocVals be a set consisting of the following:

- the PicOrderCntVal of prevTid0Pic,
- the PicOrderCntVal of each picture in the RPS of prevTid0Pic,
- the PicOrderCntVal of each picture that follows prevTid0Pic in decoding order and precedes the current picture in decoding order.

In some embodiments, when there is more than one value in setOfPrevPocVals for which the value modulo MaxPicOrderCntLsb is equal to PocLsbLt[i], delta_poc_msb_present_flag[i] shall be equal to 1.
delta_poc_msb_cycle_lt[i] is used to determine the value of the most significant bits of the picture order count value of the i-th entry in the long-term RPS of the current picture. When delta_poc_msb_cycle_lt[i] is not present, it is inferred to be equal to 0.
In some embodiments, the variable DeltaPocMsbCycleLt[i] is derived as follows:
if (i==0∥i==num_long_term_sps)DeltaPocMsbCycleLt[i]=delta_poc_msb_cycle_lt[i]else DeltaPocMsbCycleLt[i]=delta_poc_msb_cycle_lt[i]+DeltaPocMsbCycleLt[i−1]

1.2 Examples of Motion Vector Prediction (MVP) Between Short-Term and Long-Term Reference Pictures

In some embodiments, the motion vector prediction is only allowed if the target reference picture type and the predicted reference picture type is the same. In other words, when the types are different, motion vector prediction is disallowed.
Advanced Motion Vector Prediction (AMVP) is an example of motion vector prediction that includes an existing implementation. The relevant portion of the existing AMVP implementation is detailed below.
The motion vector mvLXA and the availability flag availableFlagLXA are derived in the following ordered steps:

- (1) The sample location (xNbA0, yNbA0) is set equal to (xPb−1, yPb+nPbH) and the sample location (xNbA1, yNbA1) is set equal to (xNbA0, yNbA0−1).
- (7) When availableFlagLXA is equal to 0, the following applies for (xNbAk, yNbAk) from (xNbA0, yNbA0) to (xNbA1, yNbA1) or until availableFlagLXA is equal to 1:
  - When availableAk is equal to TRUE and availableFlagLXA is equal to 0, the following applies:

If PredFlagLX[xNbAk][yNbAk] is equal to 1 and LongTermRefPic(currPic, currPb, refIdxLX, RefPicListX) is equal to LongTermRefPic(currPic, currPb, RefIdxLX[xNbAk][yNbAk], RefPicListX), availableFlagLXA is set equal to 1 and the following assignments are made:
mvLXA=MvLX[xNbAk][yNbAk]
refIdxA=RefIdxLX[xNbAk][yNbAk]
refPicListA=RefPicListX
Otherwise, when PredFlagLY[xNbAk][yNbAk] (with Y=!X) is equal to 1 and LongTermRefPic(currPic, currPb, refIdxLX, RefPicListX) is equal to LongTermRefPic(currPic, currPb, RefIdxLY[xNbAk][yNbAk], RefPicListY), availableFlagLXA is set to 1.
The motion vector mvLXB and the availability flag availableFlagLXB are derived in the following ordered steps:

- (1) The sample locations (xNbB0, yNbB0), (xNbB1, yNbB1) and (xNbB2, yNbB2) are set equal to (xPb+nPbW, yPb−1), (xPb+nPbW−1, yPb−1) and (xPb−1, yPb−1), respectively.
- (5) When isScaledFlagLX is equal to 0, availableFlagLXB is set equal to 0 and the following applies for (xNbBk, yNbBk) from (xNbB0, yNbB0) to (xNbB2, yNbB2) or until availableFlagLXB is equal to 1:
  - The availability derivation process for a prediction block as specified in clause 6.4.2 is invoked with the luma location (xCb, yCb), the current luma coding block size nCbS, the luma location (xPb, yPb), the luma prediction block width nPbW, the luma prediction block height nPbH, the luma location (xNbY, yNbY) set equal to (xNbBk, yNbBk) and the partition index partIdx as inputs, and the output is assigned to the prediction block availability flag availableBk.
  - When availableBk is equal to TRUE and availableFlagLXB is equal to 0, the following applies:

If PredFlagLX[xNbBk][yNbBk] is equal to 1 and LongTermRefPic(currPic, currPb, refIdxLX, RefPicListX) is equal to LongTermRefPic(currPic, currPb, RefIdxLX[xNbBk][yNbBk], RefPicListX), availableFlagLXB is set equal to 1 and the following assignments are made:
mvLXB=MvLX[xNbBk][yNbBk]
refIdxB=RefIdxLX[xNbBk][yNbBk]
refPicListB=RefPicListX
Otherwise, when PredFlagLY[xNbBk][yNbBk] (with Y=!X) is equal to 1 and LongTermRefPic(currPic, currPb, refIdxLX, RefPicListX) is equal to LongTermRefPic(currPic, currPb, RefIdxLY[xNbBk][yNbBk], RefPicListY), availableFlagLXB is set equal to 1 and the following assignments are made:
mvLXB=MvLY[xNbBk][yNbBk].
Temporal Motion Vector Prediction (TMVP) is another example of motion vector prediction that includes an existing implementation. The relevant portion of the existing TMVP implementation is detailed below.
The variables mvLXCol and availableFlagLXCol are derived as follows:
If LongTermRefPic(currPic, currPb, refIdxLX, LX) is not equal to LongTermRefPic(ColPic, colPb, refIdxCol, listCol), both components of mvLXCol are set equal to 0 and availableFlagLXCol is set equal to 0.
Otherwise, the variable availableFlagLXCol is set equal to 1, refPicListCol[refIdxCol] is set to be the picture with reference index refIdxCol in the reference picture list listCol of the slice containing prediction block colPb in the collocated picture specified by ColPic.

2. Example Embodiments of Intra-Block Copy (IBC)

Intra-block copy (IBC) has been extends the concept of motion compensation from inter-frame coding to intra-frame coding. As shown in FIG. 1, the current block is predicted by a reference block in the same picture when IBC is applied. The samples in the reference block must have been already reconstructed before the current block is coded or decoded. Although IBC is not so efficient for most camera-captured sequences, it shows significant coding gains for screen content. The reason is that there are lots of reduplicated patterns, such as icons and text characters in a screen content picture. IBC can remove the redundancy between these reduplicated patterns effectively.
In HEVC-SCC, an inter-coded coding unit (CU) can apply IBC if it chooses the current picture as its reference picture. The MV is renamed as block vector (BV) in this case, and a BV always has an integer-pixel precision. To be compatible with main profile HEVC, the current picture is marked as a “long-term” reference picture in the Decoded Picture Buffer (DPB). It should be noted that similarly, in multiple view/3D video coding standards, the inter-view reference picture is also marked as a “long-term” reference picture.
2.1 Embodiments of picture marking when IBC is enabled
Semantics related to IBC in PPS. pps_curr_pic_ref_enabled_flag equal to 1 specifies that a picture referring to the PPS may be included in a reference picture list of a slice of the picture itself. pps_curr_pic_ref_enabled_flag equal to 0 specifies that a picture referring to the PPS is never included in a reference picture list of a slice of the picture itself. When not present, the value of pps_curr_pic_ref_enabled_flag is inferred to be equal to 0.
It is a requirement of bitstream conformance that when sps_curr_pic_ref_enabled_flag is equal to 0, the value of pps_curr_pic_ref_enabled_flag shall be equal to 0.
The variable TwoVersionsOfCurrDecPicFlag is derived as follows:
TwoVersionsOfCurrDecPicFlag=pps_curr_pic_ref_enabled_flag && (sample_adaptive_offset_enabled_flag∥!pps_deblocking_filter_disabled_flag∥deblocking_filter_override_enabled_flag)
When sps_max_dec_pie_buffering_minus1[TemporalId] is equal to 0, the value of TwoVersionsOfCurrDecPicFlag shall be equal to 0.
Decoding process. The current decoded picture after the invocation of the in-loop filter process is stored in the DPB in an empty picture storage buffer, the DPB fullness is incremented by one and this picture is marked as “used for short-term reference”.
When TwoVersionsOfCurrDecPicFlag is equal to 1, the current decoded picture before the invocation of the in-loop filter process as specified in clause F.8.7 [1] is stored in the DPB in an empty picture storage buffer, the DPB fullness is incremented by one, and this picture is marked as “used for long-term reference”.

3. Examples of the Joint Exploration Model (JEM)

In some embodiments, future video coding technologies are explored using a reference software known as the Joint Exploration Model (JEM). In JEM, sub-block based prediction is adopted in several coding tools, such as affine prediction, alternative temporal motion vector prediction (ATMVP), spatial-temporal motion vector prediction (STMVP), bi-directional optical flow (BIO), Frame-Rate Up Conversion (FRUC), Locally Adaptive Motion Vector Resolution (LAMVR), Overlapped Block Motion Compensation (OBMC), Local Illumination Compensation (LIC), and Decoder-side Motion Vector Refinement (DMVR).

3.1 Examples of Spatial-Temporal Motion Vector Prediction (STMVP)

In the STMVP method, the motion vectors of the sub-CUs are derived recursively, following raster scan order. FIG. 2 shows an example of one CU with four sub-blocks and neighboring blocks. Consider an 8×8 CU 700 that includes four 4×4 sub-CUs A (701), B (702), C (703), and D (704). The neighboring 4×4 blocks in the current frame are labelled as a (711), b (712), c (713), and d (714).
The motion derivation for sub-CU A starts by identifying its two spatial neighbors. The first neighbor is the N×N block above sub-CU A 701 (block c 713). If this block c (713) is not available or is intra coded the other N×N blocks above sub-CU A (701) are checked (from left to right, starting at block c 713). The second neighbor is a block to the left of the sub-CU A 701 (block b 712). If block b (712) is not available or is intra coded other blocks to the left of sub-CU A 701 are checked (from top to bottom, staring at block b 712). The motion information obtained from the neighboring blocks for each list is scaled to the first reference frame for a given list. Next, temporal motion vector predictor (TMVP) of sub-block A 701 is derived by following the same procedure of TMVP derivation as specified in HEVC. The motion information of the collocated block at block D 704 is fetched and scaled accordingly. Finally, after retrieving and scaling the motion information, all available motion vectors are averaged separately for each reference list. The averaged motion vector is assigned as the motion vector of the current sub-CU.

4. Exemplary Methods for IBC in Video Coding

FIG. 3 shows a flowchart of an exemplary method for video encoding using intra-block copy. The method 1600 includes, at step 1610, determining whether a current block of the current picture is to be encoded using a motion compensation algorithm. The method 1600 includes, in step 1620, encoding, based on the determining, the current block by selectively applying an intra-block copy to the current block. More generally, whether or not to apply the intra-block copy to the current block is based on whether the current block is to be encoded using a specific motion compensation algorithm.
FIG. 4 shows a flowchart of another exemplary method video encoding using intra-block copy. The method 1700 includes, at step 1710, determining whether a current block of the current picture is to be encoded using an intra-block copy. The method 1700 includes, in step 1720, encoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block. More generally, whether or not to encode the current block using the motion compensation algorithm is based on whether the current block is to be encoded using the intra-block copy.
FIG. 5 shows a flowchart of an exemplary method for video decoding using intra-block copy. The method 1800 includes, at step 1810, determining whether a current block of the current picture is to be decoded using a motion compensation algorithm. The method 1800 includes, in step 1820, decoding, based on the determining, the current block by selectively applying an intra-block copy to the current block. More generally, whether or not to apply the intra-block copy to the current block is based on whether the current block is to be decoded using a specific motion compensation algorithm.
FIG. 6 shows a flowchart of another exemplary method video decoding using intra-block copy. The method 1900 includes, at step 1910, determining whether a current block of the current picture is to be decoded using an intra-block copy. The method 1900 includes, in step 1920, decoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block. More generally, whether or not to decode the current block using the motion compensation algorithm is based on whether the current block is to be decoded using the intra-block copy.
The methods 900, 1000, 1600, 1700, 1800, 1900, described in the context of FIGS. 3-6, 9 and 10 may further include are further the step of determining whether the motion compensation algorithm is compatible with the intra-block copy. The compatibility of the intra-block copy and the motion compensation algorithms are elucidated in the following examples described for different specific motion compensation algorithms.
Listed below are some examples of the technology described in this application listed in a clause format. A block, as used in this application, can be a contiguous or a noncontiguous collection of pixels, voxels, sub-pixels, and/or sub-voxels. For example, a block can be rectilinear, such as a 4×4 square, 6×4 rectangle, or curvilinear, such as an ellipse.
A portion of the visual information, as used in this application, can be a subset of visual information. A coded representation, as used in this application, can be a bitstream representing the visual information that has been encoded using one of the techniques described in this application. An indicator, as used in this application, can be a flag or a field in the coded representation or can be multiple separate flags or fields.
A decoding technique, as used in this application can be applied by a decoder and can be implemented in hardware or software. The decoding technique can undo in reverse sequence everything a coder does. When an appropriate decoding technique is applied to an encoded representation, a visual information can be obtained as a result.
1. A visual information decoding method (e.g., method 900 in FIG. 9), comprising determining (902) that a block being decoded representing a portion of an encoded picture of visual information is coded using a motion candidate associated with a motion vector, wherein the motion vector is derived as a weighted average of a plurality of motion vectors, wherein all of the plurality of motion vectors refer to a same picture type, and wherein a first picture type represents a current picture and a second picture type represents a reference pictures different from the current picture; and decoding (904) the block being decoded by using the motion candidate.
2. The method of clause 1, comprising applying equal weights to all the plurality of motion vectors.
3. The method of clause 1, comprising applying un-equal weights to the plurality of motion vectors.
4. The method of clause 1, further comprising decoding a first block using the Intra-block copy (IBC) mode based on a first motion vector associated with the first picture type.
5. The method of clause 1, further comprising decoding a first block not using the Intra-block copy (IBC) based on a first motion vector associated with the second picture type.
6. In the method of clause 1, wherein the motion vector comprises a motion vector of a pair-wise merge candidate.
7. The method of clause 6, further comprising generating the motion vector of the pair-wise merge candidate by averaging a first motion vector of a first merge candidate and a second motion vector of a second merge candidate.
8. The method of clause 1, wherein the motion vector comprises a motion vector of a sub-block in a block coded with the spatial-temporal motion vector prediction (STMVP) encoding technique.
9. The method of clause 8, further comprising decoding a second encoded block using the STMVP decoding technique by: obtaining a first plurality of encoded blocks representing the second encoded picture including an encoded block being decoded; obtaining a first plurality of encoded sub-blocks representing the encoded block being decoded; obtaining a plurality of spatial neighbors of an encoded sub-block in the first plurality of encoded sub-blocks, and a motion vector of the encoded sub-block; and decoding the encoded sub-block based on the motion vector and the plurality of spatial neighbors.
10. The method of clause 1, further comprising: obtaining one or more pictures in the visual information and one or more motion vectors associated with the one or more pictures in the visual information, wherein each picture in the one or more pictures comprises a picture being decoded, or each picture in the one or more pictures comprises a picture different from the picture being decoded.
11. A visual information encoding method (e.g., method 1000 in FIG. 10), comprising obtaining (1002) a block to encode representing a portion of a picture of visual information; encoding (1004) the block to encode using a motion candidate associated with a motion vector, wherein the motion vector is derived as a weighted average of a plurality of motion vectors, wherein all of the plurality of motion vectors refer to same picture type, and wherein a first picture type represents a current picture and a second picture type represents a reference picture different from the current picture.
12. The method of clause 11, further comprising applying equal weights to all the plurality of motion vectors.
13. The method of clause 11, further comprising applying un-equal weights to the plurality of motion vectors.
14. The method of clause 11, further comprising encoding a first block using the Intra-block copy (IBC) mode based on a first motion vector associated with the first picture type.
15. The method of clause 11, further comprising encoding a first block not using the Intra-block copy (IBC) based on a first motion vector associated with the second picture type.
16. The method of clause 11, the motion vector comprising a motion vector of a pair-wise merge candidate.
17. The method of clause 16, further comprising generating the motion vector of the pair-wise merge candidate by averaging a first motion vector of a first merge candidate and a second motion vector of a second merge candidate.
18. The method of clause 11, the motion vector comprising a motion vector of a sub-block in a block coded with an STMVP encoding technique.
19. The method of clause 11, further comprising encoding the first block using the IBC technique by: dividing the first picture into a first plurality of blocks; encoding an initial block in the first plurality of blocks; and upon encoding the initial block, encoding a first block in the first plurality of blocks based on the initial block.
20. The method of clause 11, further comprising encoding the second block using the STMVP technique by: dividing the second picture into a second plurality of blocks including a block being encoded; dividing the block being encoded into a plurality of sub-blocks; identifying a plurality of spatial neighbors of a sub-block in the plurality of sub-blocks, wherein a plurality of indicators associated with the plurality of spatial neighbors indicate that the plurality of spatial neighbors is available for use in the STMVP technique; obtaining a motion information associated with the plurality of spatial neighbors; and encoding a motion vector of the sub-block based on the motion information associated with the plurality of spatial neighbors.
21. The method of clause 11, further comprising: obtaining one or more motion vectors associated with one or more pictures in the visual information, wherein the one or more pictures consist of a picture being encoded, or the one or more pictures consist of a picture different from the picture being encoded; and deriving a motion vector of the sub-block based on the one or more motion vectors associated with one or more pictures in the visual information.
22. The method of clause 21, said deriving the motion vector comprising: calculating an average of the one or more motion vectors; and assigning the average to the motion vector.
23. The method of clause 21, said deriving the motion vector comprising: calculating a weighted average of the one or more motion vectors, the weighting based on proximity to the sub-block; and assigning the weighted average to the motion vector.
24. A video processing apparatus comprising a processor configured to implement a method recited in any one or more of clauses 1 to 23.
25. A computer readable medium having processor-executable code stored thereon, the code, upon execution, causing a processor to implement a method recited in any one or more of clauses 1 to 23.
Further embodiments and variations of the methods and apparatus described in clauses 1 to 25 are discussed in the following examples.
Example 1. It is proposed that the averaged (or other kinds of derivation function, like weighted average) motion vector can only be derived from MVs all referring to the current picture or all referring to a reference picture not identical to the current picture.

5. Exemplary Methods for Pairwise Merge Candidate in Video Coding

In Versatile Video Coding (VVC), a pairwise merge candidate is adopted. The MV of a pairwise merge candidate is derive as the average of the MV of a first merge candidate and the MV of a second merge candidate.

6. Exemplary Implementation Platforms of the Disclosed Technology

FIG. 7 is a block diagram illustrating an example of the architecture for a computer system or other control device 2000 that can be utilized to implement various portions of the presently disclosed technology, including (but not limited to) methods 1600, 1700, 1800 and 1900. In FIG. 7, the computer system 2000 includes one or more processors 2005 and memory 2010 connected via an interconnect 2025. The interconnect 2025 may represent any one or more separate physical buses, point to point connections, or both, connected by appropriate bridges, adapters, or controllers. The interconnect 2025, therefore, may include, for example, a system bus, a Peripheral Component Interconnect (PCI) bus, a HyperTransport or industry standard architecture (ISA) bus, a small computer system interface (SCSI) bus, a universal serial bus (USB), IIC (I2C) bus, or an Institute of Electrical and Electronics Engineers (IEEE) standard 674 bus, sometimes referred to as “Firewire.”
The processor(s) 2005 may include central processing units (CPUs) to control the overall operation of, for example, the host computer. In certain embodiments, the processor(s) 2005 accomplish this by executing software or firmware stored in memory 2010. The processor(s) 2005 may be, or may include, one or more programmable general-purpose or special-purpose microprocessors, digital signal processors (DSPs), programmable controllers, application specific integrated circuits (ASICs), programmable logic devices (PLDs), or the like, or a combination of such devices.
The memory 2010 can be or include the main memory of the computer system. The memory 2010 represents any suitable form of random access memory (RAM), read-only memory (ROM), flash memory, or the like, or a combination of such devices. In use, the memory 2010 may contain, among other things, a set of machine instructions which, when executed by processor 2005, causes the processor 2005 to perform operations to implement embodiments of the presently disclosed technology.
Also connected to the processor(s) 2005 through the interconnect 2025 is a (optional) network adapter 2015. The network adapter 2015 provides the computer system 2000 with the ability to communicate with remote devices, such as the storage clients, and/or other storage servers, and may be, for example, an Ethernet adapter or Fiber Channel adapter.
FIG. 8 shows a block diagram of an example embodiment of a mobile device 2100 that can be utilized to implement various portions of the presently disclosed technology, including (but not limited to) methods 1600, 1700, 1800 and 1900. The mobile device 2100 can be a laptop, a smartphone, a tablet, a camcorder, or other types of devices that are capable of processing videos. The mobile device 2100 includes a processor or controller 2101 to process data, and memory 2102 in communication with the processor 2101 to store and/or buffer data. For example, the processor 2101 can include a central processing unit (CPU) or a microcontroller unit (MCU). In some implementations, the processor 2101 can include a field-programmable gate-array (FPGA). In some implementations, the mobile device 2100 includes or is in communication with a graphics processing unit (GPU), video processing unit (VPU) and/or wireless communications unit for various visual and/or communications data processing functions of the smartphone device. For example, the memory 2102 can include and store processor-executable code, which when executed by the processor 2101, configures the mobile device 2100 to perform various operations, e.g., such as receiving information, commands, and/or data, processing information and data, and transmitting or providing processed information/data to another device, such as an actuator or external display.
To support various functions of the mobile device 2100, the memory 2102 can store information and data, such as instructions, software, values, images, and other data processed or referenced by the processor 2101. For example, various types of Random Access Memory (RAM) devices, Read Only Memory (ROM) devices, Flash Memory devices, and other suitable storage media can be used to implement storage functions of the memory 2102. In some implementations, the mobile device 2100 includes an input/output (I/O) unit 2103 to interface the processor 2101 and/or memory 2102 to other modules, units or devices. For example, the I/O unit 2103 can interface the processor 2101 and memory 2102 with to utilize various types of wireless interfaces compatible with typical data communication standards, e.g., such as between the one or more computers in the cloud and the user device. In some implementations, the mobile device 2100 can interface with other devices using a wired connection via the I/O unit 2103. The mobile device 2100 can also interface with other external interfaces, such as data storage, and/or visual or audio display devices 2104, to retrieve and transfer data and information that can be processed by the processor, stored in the memory, or exhibited on an output unit of a display device 2104 or an external device. For example, the display device 2104 can display a video frame that includes a block (a CU, PU or TU) that applies the intra-block copy based on whether the block is encoded using a motion compensation algorithm, and in accordance with the disclosed technology.
In some embodiments, a video decoder apparatus may implement a method of video decoding in which the intra-block copy as described herein is used for video decoding. The method may be similar to the above-described methods 900, 1000, 1600, 1700, 1800 and 1900.
In some embodiments, a decoder-side method of video decoding may use the intra-block copy for improving video quality by determining whether a current block of the current picture is to be decoded using a motion compensation algorithm, and decoding, based on the determining, the current block by selectively applying an intra-block copy to the current block.
In other embodiments, a decoder-side method of video decoding may use the intra-block copy for improving video quality by determining whether a current block of the current picture is to be decoded using an intra-block copy, and decoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block.
In some embodiments, the video decoding methods may be implemented using a decoding apparatus that is implemented on a hardware platform as described with respect to FIG. 7 and FIG. 8.
Below are improvements measured by incorporating IBC into VTM-1.0, which is a reference software for the video coding standard named Versatile Video Coding (VVC). VTM stands for VVC Test Model.


	Over VTM-1.0

	Y	U	V	EncT	DecT

Class Al	−0.33%	−0.50%	−0.49%	162%	100%
Class A2	−0.96%	−1.17%	−0.77%	159%	98%
Class B	−0.94%	−1.14%	−1.34%	162%	102%
Class C	−1.03%	−1.58%	−1.92%	160%	101%
Class E	−1.48%	−1.46%	−1.80%	160%	104%
Overall	−0.95%	−1.19%	−1.31%	161%	101%
Class D	−0.57%	−0.73%	−0.91%	161%	100%
Class F (optional)	−20.25%	−20.15%	−20.93%	194%	95%
Class SCC 1080p	−52.94%	−53.26%	−53.37%	217%	74%

In the above table, “Y”, “U”, “V” represent colors in the YUV color encoding system which encodes a color image or video taking human perception into account. The EncT and DecT represent a ratio of the encoding and decoding time using the IBC compared to the encoding and decoding time without the IBC, respectively. Specifically,
EncT=TestEncodingTime/anchorEncodingTime
DecT=TestEncodingTime/anchorEncodingTime.
The various classes, such as Class A1, Class A2, etc., represent a grouping of standard video sequences used in testing performance of various video coding techniques. The negative percentages under the “Y”, “U”, “V” columns represent bit-rate savings when IBC is added to VTM-1.0. The percentages under the EncT and DecT columns that are over 100% show how much the encoding/decoding with IBC is slower than encoding/decoding without IBC. For example, a percentage of 150% means that the encoding/decoding with IBC is 50% slower than the encoding/decoding without the IBC. The percentage below 100% shows how much the encoding/decoding with IBC is faster than encoding/decoding without the IBC. Two classes, class F and class SCC, highlighted in green in the table above, show that bit-rate savings exceed 3%.
From the foregoing, it will be appreciated that specific embodiments of the presently disclosed technology have been described herein for purposes of illustration, but that various modifications may be made without deviating from the scope of the invention. Accordingly, the presently disclosed technology is not limited except as by the appended claims.
Implementations of the subject matter and the functional operations described in this patent document can be implemented in various systems, digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. Implementations of the subject matter described in this specification can be implemented as one or more computer program products, i.e., one or more modules of computer program instructions encoded on a tangible and non-transitory computer readable medium for execution by, or to control the operation of, data processing apparatus. The computer readable medium can be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of matter effecting a machine-readable propagated signal, or a combination of one or more of them. The term “data processing unit” or “data processing apparatus” encompasses all apparatus, devices, and machines for processing data, including by way of example a programmable processor, a computer, or multiple processors or computers. The apparatus can include, in addition to hardware, code that creates an execution environment for the computer program in question, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them.
A computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub programs, or portions of code). A computer program can be deployed to be executed on one computer or on multiple computers that are located at one site or distributed across multiple sites and interconnected by a communication network.
The processes and logic flows described in this specification can be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows can also be performed by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit).
Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer. Generally, a processor will receive instructions and data from a read only memory or a random access memory or both. The essential elements of a computer are a processor for performing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto optical disks, or optical disks. However, a computer need not have such devices. Computer readable media suitable for storing computer program instructions and data include all forms of nonvolatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.
It is intended that the specification, together with the drawings, be considered exemplary only, where exemplary means an example. As used herein, the singular forms“a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. Additionally, the use of “or” is intended to include “and/or”, unless the context clearly indicates otherwise.
While this patent document contains many specifics, these should not be construed as limitations on the scope of any invention or of what may be claimed, but rather as descriptions of features that may be specific to particular embodiments of particular inventions. Certain features that are described in this patent document in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a sub combination or variation of a sub combination.
Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. Moreover, the separation of various system components in the embodiments described in this patent document should not be understood as requiring such separation in all embodiments.
Only a few implementations and examples are described and other implementations, enhancements and variations can be made based on what is described and illustrated in this patent document.

Claims

What is claimed is:

1. A method of coding video data, comprising:

constructing, for a first conversion between a first video block of a video and a bitstream of the video, a motion vector candidate list comprising at least one motion vector candidate; and

performing the first conversion based on the motion vector candidate list,

wherein the motion vector candidate list is constructed by applying a pair-wise averaging operation, and a pair-wise average merge candidate associated with a motion vector derived from the pair-wise averaging operation is added to the motion vector candidate list,

wherein the motion vector is derived based on a weighted average of a plurality of motion vectors, wherein all the plurality of motion vectors refer to a reference picture not identical to a first picture which includes the first video block, and

wherein the plurality of motion vectors are derived based on the first two candidates in a merge candidate list of the first video block.

2. The method of claim 1, further comprising:

constructing, for a second conversion between a second video block of the video and a bitstream of the video, a block vector candidate list comprising at least one block vector candidate; and

performing the second conversion based on the block vector candidate list,

wherein the block vector candidate list is constructed by excluding the pair-wise averaging operation, and

wherein a prediction of the second video block is derived from blocks of sample values of the same picture which includes the second video block, wherein the same picture is not a picture type which is indicated as a long-term reference picture.

3. The method of claim 1, further comprising applying equal weights to all the plurality of motion vectors.

4. The method of claim 1, wherein the pair-wise average merge candidate is a motion vector of a pair-wise average merge candidate in inter prediction mode.

5. The method of claim 4, wherein the pair-wise average merge candidate is derived based on a weighted average of a first motion vector of a first merge candidate and a second motion vector of a second merge candidate.

6. The method of claim 1, wherein instead of plurality of motion vectors referring to a reference picture not identical to the first picture, all the plurality of motion vectors refer to the reference picture identical to the first picture.

7. The method of claim 1, wherein the at least one motion vector candidate is a motion vector of a sub-block in a block coded with the spatial-temporal motion vector prediction (STMVP) mode.

8. The method of claim 1, wherein the reference picture used in the first conversion is marked as a short-term reference picture or a long-term reference picture.

9. The method of claim 1, further comprising:

determining, for a third conversion between a third video block of a video and a bitstream of the video, that the third video block is coded with a subblock-based temporal motion vector prediction mode; and

performing the third conversion based on the determining,

in response to a spatial neighboring block of the third video block is coded with the IBC mode, determining that motion information of the spatial neighboring block is unavailable, and identifying at least one corresponding video region in a collocated picture of the third video block without using the motion information of the spatial neighboring block.

10. The method of claim 9, wherein the reference picture of the third video block and a reference picture of the corresponding video region in the collocated picture are marked as a same picture type.

11. The method of claim 10, wherein the same picture type is indicated as a short-term reference picture or a long-term reference picture.

12. The method of claim 1, wherein the first conversion includes encoding the first video block into the bitstream.

13. The method of claim 1, wherein the first conversion includes decoding the first video block from the bitstream.

14. An apparatus for coding video data comprising a processor and a non-transitory memory with instructions thereon, wherein the instructions upon execution by the processor, cause the processor to:

construct, for a first conversion between a first video block of a video and a bitstream of the video, a motion vector candidate list comprising at least one motion vector candidate; and

perform the first conversion based on the motion vector candidate list,

15. The apparatus of claim 14, the instructions further cause the processor to:

construct, fora second conversion between a second video block of the video and a bitstream of the video, a block vector candidate list comprising at least one block vector candidate; and

perform the second conversion based on the block vector candidate list,

16. The apparatus of claim 14, the instructions further cause the processor to apply equal weights to all the plurality of motion vectors.

17. The apparatus of claim 14, wherein the pair-wise average merge candidate is a motion vector of a pair-wise average merge candidate in inter prediction mode.

18. The apparatus of claim 17, wherein the pair-wise average merge candidate is derived based on a weighted average of a first motion vector of a first merge candidate and a second motion vector of a second merge candidate.

19. A non-transitory computer-readable storage medium storing instructions that cause a processor to:

perform the first conversion based on the motion vector candidate list,

20. A non-transitory computer-readable recording medium storing a bitstream which is generated by a method performed by a video processing apparatus, wherein the method comprises:

constructing, for a first video block of a video, a motion vector candidate list comprising at least one motion vector candidate; and

generating the bitstream based on the motion vector candidate list,