US20200323080A1 - Circuit board - Google Patents
Circuit board Download PDFInfo
- Publication number
- US20200323080A1 US20200323080A1 US16/405,348 US201916405348A US2020323080A1 US 20200323080 A1 US20200323080 A1 US 20200323080A1 US 201916405348 A US201916405348 A US 201916405348A US 2020323080 A1 US2020323080 A1 US 2020323080A1
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- US
- United States
- Prior art keywords
- sub
- boards
- board
- layer
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229910000679 solder Inorganic materials 0.000 claims description 2
- 238000000926 separation method Methods 0.000 claims 3
- 238000000034 method Methods 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/144—Stacked arrangements of planar printed circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/142—Arrangements of planar printed circuit boards in the same plane, e.g. auxiliary printed circuit insert mounted in a main printed circuit
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/145—Arrangements wherein electric components are disposed between and simultaneously connected to two planar printed circuit boards, e.g. Cordwood modules
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/147—Structural association of two or more printed circuits at least one of the printed circuits being bent or folded, e.g. by using a flexible printed circuit
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/04—Assemblies of printed circuits
- H05K2201/041—Stacked PCBs, i.e. having neither an empty space nor mounted components in between
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/04—Assemblies of printed circuits
- H05K2201/042—Stacked spaced PCBs; Planar parts of folded flexible circuits having mounted components in between or spaced from each other
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/04—Assemblies of printed circuits
- H05K2201/045—Hierarchy auxiliary PCB, i.e. more than two levels of hierarchy for daughter PCBs are important
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/04—Assemblies of printed circuits
- H05K2201/049—PCB for one component, e.g. for mounting onto mother PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09036—Recesses or grooves in insulating substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09381—Shape of non-curved single flat metallic pad, land or exposed part thereof; Shape of electrode of leadless component
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10159—Memory
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10507—Involving several components
- H05K2201/10545—Related components mounted on both sides of the PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
Definitions
- the subject matter herein generally relates to a circuit board.
- the electronic components on the computer motherboard can communicate via multiple signal transmission lines.
- a computer motherboard can be set as a multilayer device to meet the wiring requirements of these signal transmission lines.
- such a setting of the motherboard may increase the cost of the product, and space on the main board are limited.
- FIG. 1 is a cross sectional view of a circuit board according to an embodiment.
- FIG. 2 is a cross sectional view of a circuit board according to another embodiment.
- FIG. 3 is a cross sectional view of a pad and a conductive via of the circuit board according to an embodiment.
- FIG. 4 to FIG. 7 show plan views of an opening of the pad in different embodiments.
- FIG. 8 shows a vertical cross section of a groove of the pad according to an embodiment.
- FIG. 1 shows a circuit board 100 optimized for a denser component population within a standard size of footprint of an embodiment.
- the circuit board 100 includes a mother board 10 and a plurality of sub-board layers 30 .
- the plurality of sub-board layers 30 are stacked on the mother board 10 .
- the sub-board layers 30 are composed of a first sub-board layer 32 and a second sub-board layer 34 .
- Each of the sub-board layers 30 includes a plurality of daughter boards.
- the daughter boards 321 of the first sub-board layer 32 are arranged side by side on a side of the mother board 10 but are spaced.
- the daughter boards 341 of the second sub-board layer 34 are arranged, also spaced, on the daughter boards 321 of the first sub-board layer 32 .
- Each of the daughter boards 321 of the first sub-board layer 32 has a first end 3212 and a second end 3214 .
- the first end 3212 and the second end 3214 of each daughter board 321 are connected to the mother board 10 .
- Each of the daughter boards 341 of the second sub-board layer 34 has a first end 3412 and a second end 3414 .
- the first end 3412 and the second end 3414 of each daughter board 341 are connected to adjacent daughter boards 321 of the first sub-board layer 32 .
- the circuit board 100 further includes at least one component 50 .
- the components 50 may be arranged on the mother board 10 and on an open area between the daughter boards 321 of the first sub-board layer 32 .
- the components 50 may be arranged on at least one of the daughter boards 321 of the first sub-board layer 32 and on an open area between the daughter boards 341 of the second sub-board layer 34 .
- the components 50 may be arranged on at least one of the daughter boards 341 of the second sub-board layer 34 and face away from the mother board 10 .
- the components 50 may be arranged on at least one of the daughter boards 341 of the second sub-board layer 34 , face the mother board 10 , and be located on an open area between the daughter boards 321 of the first sub-board layer 32 .
- the component 50 may be a central processing unit (CPU) or a memory device, but not being limited thereto.
- CPU central processing unit
- memory device but not being limited thereto.
- FIG. 2 shows a circuit board 100 of another embodiment.
- the mother board 10 includes a first surface 101 and a second surface 102 opposite to the first surface 101 .
- the sub-board layers 30 further have a third sub-board layer 36 .
- the daughter boards 321 of the first sub-board layer 32 are arranged on the first surface 101
- the daughter boards 361 of the third sub-board layer 36 are arranged side by side on the second surface 102 but spaced.
- the daughter boards 361 of the third sub-board layer 36 are flexible printed circuit boards (FPCs).
- adjacent daughter boards 361 of the third sub-board layer 36 are electrically connected with each other.
- the sub-board layers 30 may further include fourth and greater than fourth sub-board layers.
- the fourth and greater than fourth sub-board layers are disposed on the second sub-board layer 34 and/or the third sub-board layer 36 and are stacked in sequence.
- FIG. 3 shows a pad 71 and a conductive via 72 of the circuit board 100 .
- the mother board 10 and/or at least one of the daughter boards have at least one pad 71 and at least one conductive via 72 .
- the pad 71 enables components or wires to be connected with solder.
- the conductive via 72 is configured for a connection with wires.
- the mother board 10 and the daughter board, or the daughter board and a more distant daughter board, are electrically connected via connection between pads 71 , between pads 71 and conductive vias 72 , or between conductive vias 72 .
- the pad 71 is provided with an opening 710 , as shown in FIGS. 4-7 .
- the opening 710 increases a contact area available for soldering between the pad and the pad, thereby improving connection strength.
- the opening 710 may be designed in various shapes.
- FIGS. 4-7 show plan views of the pads 71 and the openings 710 for better soldering.
- the edge of the daughter board is provided with a groove 81 to facilitate cutting and splitting.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Structure Of Printed Boards (AREA)
- Combinations Of Printed Boards (AREA)
Abstract
Description
- The subject matter herein generally relates to a circuit board.
- The electronic components on the computer motherboard can communicate via multiple signal transmission lines. In the prior art, a computer motherboard can be set as a multilayer device to meet the wiring requirements of these signal transmission lines. However, such a setting of the motherboard may increase the cost of the product, and space on the main board are limited.
- Therefore, there is room for improvement within the art.
- Implementations of the present technology will now be described, by way of embodiments, with reference to the attached figures.
-
FIG. 1 is a cross sectional view of a circuit board according to an embodiment. -
FIG. 2 is a cross sectional view of a circuit board according to another embodiment. -
FIG. 3 is a cross sectional view of a pad and a conductive via of the circuit board according to an embodiment. -
FIG. 4 toFIG. 7 show plan views of an opening of the pad in different embodiments. -
FIG. 8 shows a vertical cross section of a groove of the pad according to an embodiment. - It will be appreciated that for simplicity and clarity of illustration, where appropriate, reference numerals have been repeated among the different figures to indicate corresponding or analogous elements. In addition, numerous specific details are set forth in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein can be practiced without these specific details. In other instances, methods, procedures, and components have not been described in detail so as not to obscure the related relevant feature being described. Also, the description is not to be considered as limiting the scope of the embodiments described herein. The drawings are not necessarily to scale and the proportions of certain parts may be exaggerated to better illustrate details and features of the present disclosure.
- The term “comprising,” when utilized, means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in the so-described combination, group, series, and the like.
-
FIG. 1 shows acircuit board 100 optimized for a denser component population within a standard size of footprint of an embodiment. Thecircuit board 100 includes amother board 10 and a plurality ofsub-board layers 30. The plurality ofsub-board layers 30 are stacked on themother board 10. Thesub-board layers 30 are composed of afirst sub-board layer 32 and asecond sub-board layer 34. Each of thesub-board layers 30 includes a plurality of daughter boards. Thedaughter boards 321 of thefirst sub-board layer 32 are arranged side by side on a side of themother board 10 but are spaced. Thedaughter boards 341 of thesecond sub-board layer 34 are arranged, also spaced, on thedaughter boards 321 of thefirst sub-board layer 32. - Each of the
daughter boards 321 of thefirst sub-board layer 32 has afirst end 3212 and asecond end 3214. Thefirst end 3212 and thesecond end 3214 of eachdaughter board 321 are connected to themother board 10. - Each of the
daughter boards 341 of thesecond sub-board layer 34 has afirst end 3412 and asecond end 3414. Thefirst end 3412 and thesecond end 3414 of eachdaughter board 341 are connected toadjacent daughter boards 321 of thefirst sub-board layer 32. - The
circuit board 100 further includes at least onecomponent 50. - In an embodiment, the
components 50 may be arranged on themother board 10 and on an open area between thedaughter boards 321 of thefirst sub-board layer 32. - In an embodiment, the
components 50 may be arranged on at least one of thedaughter boards 321 of thefirst sub-board layer 32 and on an open area between thedaughter boards 341 of thesecond sub-board layer 34. - In an embodiment, the
components 50 may be arranged on at least one of thedaughter boards 341 of thesecond sub-board layer 34 and face away from themother board 10. - In an embodiment, the
components 50 may be arranged on at least one of thedaughter boards 341 of thesecond sub-board layer 34, face themother board 10, and be located on an open area between thedaughter boards 321 of thefirst sub-board layer 32. - The
component 50 may be a central processing unit (CPU) or a memory device, but not being limited thereto. -
FIG. 2 shows acircuit board 100 of another embodiment. Themother board 10 includes afirst surface 101 and asecond surface 102 opposite to thefirst surface 101. In an embodiment, thesub-board layers 30 further have athird sub-board layer 36. Thedaughter boards 321 of thefirst sub-board layer 32 are arranged on thefirst surface 101, and thedaughter boards 361 of thethird sub-board layer 36 are arranged side by side on thesecond surface 102 but spaced. - In an embodiment, the
daughter boards 361 of thethird sub-board layer 36 are flexible printed circuit boards (FPCs). - In an embodiment,
adjacent daughter boards 361 of thethird sub-board layer 36 are electrically connected with each other. - In other embodiment, the
sub-board layers 30 may further include fourth and greater than fourth sub-board layers. The fourth and greater than fourth sub-board layers are disposed on thesecond sub-board layer 34 and/or thethird sub-board layer 36 and are stacked in sequence. -
FIG. 3 shows apad 71 and a conductive via 72 of thecircuit board 100. The mother board 10 and/or at least one of the daughter boards have at least onepad 71 and at least one conductive via 72. Thepad 71 enables components or wires to be connected with solder. The conductive via 72 is configured for a connection with wires. Themother board 10 and the daughter board, or the daughter board and a more distant daughter board, are electrically connected via connection betweenpads 71, betweenpads 71 andconductive vias 72, or betweenconductive vias 72. - In an embodiment, the
pad 71 is provided with anopening 710, as shown inFIGS. 4-7 . Theopening 710 increases a contact area available for soldering between the pad and the pad, thereby improving connection strength. The opening 710 may be designed in various shapes.FIGS. 4-7 show plan views of thepads 71 and theopenings 710 for better soldering. - Referring to
FIG. 8 , in an embodiment, the edge of the daughter board is provided with agroove 81 to facilitate cutting and splitting. - The embodiments shown and described above are only examples. Many such details are found in the art. Therefore, such details are neither shown nor described. Even though numerous characteristics and advantages of the present technology have been set forth in the foregoing description, together with details of the structure and function of the present disclosure, the disclosure is illustrative only, and changes may be made in the details, including in matters of shape, size, and arrangement of the parts within the principles of the present disclosure, up to and including the full extent established by the broad general meaning of the terms used in the claims. It will therefore be appreciated that the embodiments described above may be modified within the scope of the claims.
Claims (10)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910268080.1 | 2019-04-03 | ||
CN201910268080.1A CN111787690B (en) | 2019-04-03 | 2019-04-03 | circuit board |
CN201910268080 | 2019-04-03 |
Publications (2)
Publication Number | Publication Date |
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US10785873B1 US10785873B1 (en) | 2020-09-22 |
US20200323080A1 true US20200323080A1 (en) | 2020-10-08 |
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ID=72516728
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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US16/405,348 Active US10785873B1 (en) | 2019-04-03 | 2019-05-07 | Circuit board |
Country Status (2)
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US (1) | US10785873B1 (en) |
CN (1) | CN111787690B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
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JP7265443B2 (en) * | 2019-07-31 | 2023-04-26 | 日本航空電子工業株式会社 | wiring board assembly |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5201038A (en) * | 1989-12-06 | 1993-04-06 | Videologic Limited | Address bus for stackable computer board connectors |
US5280193A (en) * | 1992-05-04 | 1994-01-18 | Lin Paul T | Repairable semiconductor multi-package module having individualized package bodies on a PC board substrate |
JP2000277944A (en) * | 1999-03-24 | 2000-10-06 | Ando Electric Co Ltd | Board and method for expansion |
JP2002076561A (en) * | 2000-08-24 | 2002-03-15 | Sony Corp | Solid circuit board device and manufacturing method therefor |
JP2002158312A (en) * | 2000-11-17 | 2002-05-31 | Oki Electric Ind Co Ltd | Semiconductor package for three-dimensional mounting, its manufacturing method and semiconductor device |
JP2005079402A (en) * | 2003-09-01 | 2005-03-24 | Fujikura Ltd | Circuit board and its manufacturing method |
JP4195619B2 (en) * | 2003-01-20 | 2008-12-10 | 株式会社フジクラ | Multilayer wiring board and manufacturing method thereof |
US20040190274A1 (en) * | 2003-03-27 | 2004-09-30 | Yoshio Saito | Compact low cost plastic MCM to PCB |
CN101401114B (en) * | 2006-04-03 | 2011-03-16 | 松下电器产业株式会社 | Semiconductor memory module incorporating antenna |
US8379403B2 (en) * | 2009-04-02 | 2013-02-19 | Qualcomm, Incorporated | Spacer-connector and circuit board assembly |
US8417071B2 (en) * | 2010-05-24 | 2013-04-09 | Xyratex Technology Limited | Data storage system, a modular printed circuit board, a backplane and a backplane component |
US9040837B2 (en) * | 2011-12-14 | 2015-05-26 | Ibiden Co., Ltd. | Wiring board and method for manufacturing the same |
CN102984881B (en) * | 2012-11-21 | 2015-07-08 | 华为技术有限公司 | Circuit board connection structure |
US9519319B2 (en) * | 2014-03-14 | 2016-12-13 | Sandisk Technologies Llc | Self-supporting thermal tube structure for electronic assemblies |
CN110611990A (en) * | 2018-06-14 | 2019-12-24 | 鸿富锦精密工业(武汉)有限公司 | Printed circuit board assembly and electronic device using same |
-
2019
- 2019-04-03 CN CN201910268080.1A patent/CN111787690B/en active Active
- 2019-05-07 US US16/405,348 patent/US10785873B1/en active Active
Also Published As
Publication number | Publication date |
---|---|
US10785873B1 (en) | 2020-09-22 |
CN111787690B (en) | 2023-10-27 |
CN111787690A (en) | 2020-10-16 |
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