US20180191047A1 - Structure with integrated metallic waveguide - Google Patents
Structure with integrated metallic waveguide Download PDFInfo
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- US20180191047A1 US20180191047A1 US15/395,197 US201615395197A US2018191047A1 US 20180191047 A1 US20180191047 A1 US 20180191047A1 US 201615395197 A US201615395197 A US 201615395197A US 2018191047 A1 US2018191047 A1 US 2018191047A1
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- H01P11/00—Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type
- H01P11/001—Manufacturing waveguides or transmission lines of the waveguide type
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- H01P11/00—Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type
- H01P11/001—Manufacturing waveguides or transmission lines of the waveguide type
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- H01P5/18—Conjugate devices, i.e. devices having at least one port decoupled from one other port consisting of two coupled guides, e.g. directional couplers
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Definitions
- the field relates to structures with integrated waveguides, and in particular, to interconnects and circuit structures with integrated metallic waveguides.
- multiple integrated device dies may be mounted to a carrier and may communicate with one another in a variety of ways.
- two integrated device dies can communicate with one another by way of conductive traces or interconnects provided in an intervening package substrate such as a printed circuit board (PCB) or in a silicon interposer.
- a silicon bridge or other interconnect structure can serve to electrically connect two dies within a package or system.
- existing die-to-die interconnects may experience high losses due to conductor loss, crosstalk or other factors. Accordingly, there remains a continuing need for improved die-to-die communications.
- FIG. 1 is a schematic side sectional view of a structure that includes integrated waveguides, according to some embodiments.
- FIG. 2 is schematic perspective view of a waveguide according to various embodiments.
- FIG. 3A is a schematic perspective view of a structure with an integrated waveguide, according to various embodiments.
- FIG. 3B is a schematic side cross-sectional view of a first waveguide portion disposed between integrated device dies and a carrier.
- FIG. 3C is a schematic side cross-sectional view a second waveguide portion disposed along and under a gap between the integrated device dies.
- FIG. 4A is a schematic perspective view of a waveguide with metallic features that comprise continuous segments, prior to bonding.
- FIG. 4B is a schematic perspective view of a waveguide in which portions of conductive features are patterned with discontinuities or gaps to avoid dishing.
- FIG. 4C is a schematic perspective view of a waveguide in which both conductive features are patterned with discontinuities or gaps along their lengths to avoid dishing.
- FIG. 5 is a schematic perspective view of a structure with a waveguide embedded in a carrier comprising a semiconductor element, prior to bonding of the dies to the carrier.
- FIG. 6 is a schematic side view of a structure comprising a bridge between two dies that includes an integrated waveguide therein.
- FIG. 7A is a top plan view of a power divider that incorporates any of the waveguides described herein.
- FIG. 7B is a top plan view of a coupler that incorporates the waveguides described herein.
- FIG. 7C is a top plan view of a circulator that incorporates the waveguides described herein.
- FIG. 7D is a top plan view of a filter that incorporates the waveguides disclosed herein.
- FIG. 8 is a schematic system diagram of an electronic system incorporating one or more structures, according to various embodiments.
- Various embodiments disclosed herein relate to interconnects and structures with integrated waveguides, e.g., integrated conductive or metallic waveguides.
- integrated waveguides e.g., integrated conductive or metallic waveguides.
- existing techniques for providing die-to-die (or chip-to-chip) communications within a package or system may not provide adequate performance at high frequencies.
- some die-to-die interconnects may experience high current densities which can lead to high losses due to conductor loss, crosstalk and other factors.
- millimeter wave or sub-terahertz communications over a range of tens of gigahertz to hundreds of gigahertz (e.g., in a range of 10 GHz to 950 GHz, in a range of 20 GHz to 900 GHz) using coplanar or microstrip waveguides since such devices may be lossy at millimeter-sized wavelengths.
- the embodiments disclosed herein beneficially enable the use of lower loss metallic waveguides for die-to-die communications, including communications at wavelengths in a range of 0.1 mm to 10 mm.
- a metallic or conductive waveguide can comprise an effectively closed metallic or conductive channel as viewed from a side cross-section taken perpendicular to a propagation direction of the waveguide, and can include a low loss dielectric material within the effectively closed channel.
- the metallic or conductive waveguide can comprise a metal, including metallic compounds.
- the metallic waveguide can be defined by bonding two elements (e.g., two semiconductor elements) along an interface, with the waveguide defined at least in part by the interface. In some embodiments, the two elements can be directly bonded to one another without an intervening adhesive.
- the metallic waveguide can be at least partially (e.g., completely) embedded in an element and can include one or a plurality of ports that can receive a radiating element for coupling electromagnetic waves to the waveguide.
- the disclosed embodiments can therefore provide die-to-die communications with low loss and with little or no crosstalk, which can enable high frequency die-to-die communications.
- the resulting structure can be constructed at lower costs than other techniques, since the waveguides can be constructed using the bonding layers defined for directly bonding two elements to one another.
- the integrated waveguides disclosed herein can also advantageously reduce the number of radio frequency (RF) components provided in the package, since the waveguides described herein can be directly integrated into the dies and/or other elements.
- RF radio frequency
- FIG. 1 is a schematic side sectional view of a structure 1 that includes an integrated waveguide 10 (e.g., an integrated metallic or otherwise conductive waveguide), according to some embodiments.
- the structure 1 can include a plurality of elements 2 mounted to another element, e.g., a carrier 3 .
- the elements 2 can comprise a first integrated device die 2 a, a second integrated device die 2 b, and a third integrated device die 2 c, each of which are electrically and mechanically connected to the carrier 3 .
- the device dies 2 a - 2 c can comprise processor dies, memory dies, sensor dies, communications dies, microelectromechanical systems (MEMS) dies, or any other suitable type of device.
- MEMS microelectromechanical systems
- the carrier 3 may be any suitable type of element, such as an integrated device die, an interposer, a reconstituted die or wafer, etc.
- the elements 2 a - 2 c are shown as being mounted to the carrier 3 by way of a direct bond, but in other embodiments, the elements can be connected to the carrier in other ways.
- the elements 2 a - 2 c and the carrier 3 comprise semiconductor elements (e.g., integrated device dies 2 a - 2 c, a semiconductor interposer, etc.), but in other embodiments, the elements and/or the carrier can comprise other types of elements that may or may not comprise a semiconductor material, such as various types of optical devices (e.g., lenses, filters, etc.).
- the dies 2 a - 2 c can be laterally spaced from one another along the carrier 3 .
- one or more of the device dies 2 a - 2 c are directly bonded to the carrier 3 without an intervening adhesive.
- the direct bond between the dies 2 a - 2 c and the carrier 3 can include a direct bond between corresponding conductive features of the dies 2 a - 2 c (e.g., a processor die) and the carrier 3 (e.g., an integrated device die, an interposer, etc.) without an intervening adhesive, without being limited thereto.
- the conductive features may be surrounded by non-conductive field regions.
- respective bonding surfaces of the conductive features and the non-conductive field regions can be prepared for bonding.
- Preparation can include provision of a nonconductive layer, such as silicon oxide or silicon nitride, with exposed conductive features, such as metal bond pads or contacts.
- a nonconductive layer such as silicon oxide or silicon nitride
- exposed conductive features such as metal bond pads or contacts.
- the bonding surfaces of at least the non-conductive field regions, or both the conductive and non-conductive regions, can be polished to a very high degree of smoothness (e.g., less than 20 nm surface roughness, or more particularly, less than 5 nm surface roughness).
- the surfaces to be bonded may be terminated with a suitable species and activated prior to bonding.
- the non-conductive surfaces (e.g., field regions) of the bonding layer to be bonded may be very slightly etched for activation and exposed to a nitrogen-containing solution and terminated with a nitrogen-containing species.
- the surfaces to be bonded e.g., field regions
- DBI direct bond interconnect
- nonconductive features of the dies and the carrier can directly bond to one another, even at room temperature and without the application of external pressure, while the conductive features of the dies and the carrier layer can also directly bond to one another, without any intervening adhesive layers. Bonding by DBI forms stronger bonds than Van der Waals bonding, including significant covalent bonding between the surfaces of interest. Subsequent annealing can further strengthen bonds, particularly between conductive features of the bonding interfaces.
- the respective conductive features can be flush with the exterior surfaces (e.g., the field regions) of the dies and the carrier. In other embodiments, the conductive features may extend above the exterior surfaces. In still other embodiments, the conductive features of one or both of the dies and the carrier are recessed relative to the exterior surfaces (e.g., nonconductive field regions) of the dies and the carrier. For example, the conductive features can be recessed relative to the field regions by less than 20 nm, e.g., less than 10 nm.
- the nonconductive field regions (such as silicon oxide) of the dies 2 a - 2 c can be brought into contact with corresponding nonconductive regions of the carrier 3 .
- the interaction of the activated surfaces can cause the nonconductive regions of the dies 2 a - 2 c to directly bond with the corresponding nonconductive regions of the carrier 3 without an intervening adhesive, without application of external pressure, without application of voltage, and at room temperature.
- the bonding forces of the nonconductive regions can include covalent bonds that are greater than Van der Waals bonds and exert significant forces between the conductive features.
- the bonding energy of the dielectric-dielectric surface can be in a range from 150-300 mJ/m 2 , which can increase to 1500-4000 mJ/m 2 after a period of heat treatment.
- direct bonding of the nonconductive regions can facilitate direct metal-to-metal bonding between the conductive features.
- the dies 2 a - 2 c and the carrier 3 may be heated after bonding at least the nonconductive regions. As noted above, such heat treatment can strengthen the bonds between the nonconductive regions, between the conductive features, and/or between opposing conductive and non-conductive regions.
- the conductive features are recessed, there may be an initial gap between the conductive features of the dies 2 a - 2 c and the carrier 3 , and heating after initially bonding the nonconductive regions can expand the conductive elements to close the gap. Regardless of whether there was an initial gap, heating can generate or increase pressure between the conductive elements of the opposing parts, aid bonding of the conductive features and form a direct electrical and mechanical connection.
- Direct bonding of the dies 2 a - 2 c to the carrier 3 can result in a bond interface 6 between the elements 2 and the carrier 3 .
- the waveguide 10 can be defined along the interface 6 between the carrier 3 and the elements 2 (the dies 2 a - 2 c ).
- the waveguide 10 can comprise a first waveguide portion 10 a that is defined by features at the respective lower surfaces 12 of the elements 2 and at an upper surface 5 of the carrier 3 . As explained below in connection with FIGS.
- metallic and/or dielectric features exposed on the lower surfaces 12 of the dies 2 a - 2 c can cooperate with corresponding metallic and/or dielectric features exposed on the upper surface 5 of the carrier 3 to define the first waveguide portion 10 a of the waveguide 10 .
- the waveguide 10 can also comprise a second waveguide portion 10 b disposed along gaps 4 between the integrated device dies 2 a - 2 c.
- the second waveguide portion 10 b can be embedded in the carrier 3 and can be defined by a metallic channel at or near the upper surface 5 .
- the waveguide 10 can enable die-to-die communications between the first die 2 a and the second die 2 b, and between the second die 2 b and the third die 2 c.
- the integrated waveguide 10 disclosed herein can be used in conjunction with any suitable type of element.
- the dies 2 a - 2 c are directly bonded to the carrier 3 without an intervening adhesive in the illustrated embodiment, in other embodiments, the dies 2 a - 2 c can be bonded to the carrier 3 in other ways, such as by way of a conductive adhesive, solder, etc.
- FIG. 2 is schematic perspective view of a portion of the waveguide 10 according to various embodiments.
- the waveguide 10 shown in FIG. 2 is a metallic waveguide that has a polygonal, and particularly rectangular, cross-section.
- the waveguide 10 can comprise a channel 11 defined by a plurality of metallic walls 11 a - 11 d that cooperate to delimit an effectively closed cross-sectional profile, as viewed along a cross-section taken transverse to the propagation direction (i.e., the x-axis).
- a dielectric material 7 can be disposed within the effectively closed metallic channel 11 .
- the side section of the channel 11 is completely closed such that the walls 11 a - 11 d define a continuous, closed boundary about the dielectric material 7 .
- the effectively closed metallic channel 11 may have gaps or spaces in portions of some of the walls 11 a - 11 d.
- the metallic walls 11 a - 11 d of the channel 11 can comprise copper or other metal materials.
- the dielectric material 7 can comprise any suitable dielectric, such as silicon oxide.
- the walls 11 a - 11 d can be electrically grounded so as to provide a bounded pathway along which electromagnetic waves can propagate.
- input signals or waves W can enter at a first end of the waveguide 10 and can propagate parallel to the x-axis and can exit as an output signal at another end of the waveguide 10 .
- radiating elements 13 a, 13 b can be provided at both ends of the waveguide 10 to transmit and/or receive electromagnetic waves W along the waveguide 10 .
- the width of the waveguide 10 along the y-direction can define the cutoff frequency for the propagating mode.
- a first radiating element 13 a can radiate signals or waves W at frequencies that can propagate along the waveguide 10 .
- the radiating elements 13 a, 13 b can comprise conductive segments or probes inserted into the dielectric material 7 within the channel 11 .
- electromagnetic waves can be coupled to the waveguide 10 in other suitable ways.
- the radiating elements 13 a, 13 b can comprise a conductive loop with the plane of the loop perpendicular to the lines of magnetic force, a linear conductor or probe that is parallel to the lines of electric force, or an aperture in a side wall of the waveguide 10 disposed along the direction of the lines of magnetic force on the side wall.
- the signals or waves W can propagate along the waveguide 10 and can be received by another radiating element 13 b which can convert the waves W to an electrical current.
- the waveguide 10 can be integrated or embedded in an element (such as an interposer or integrated device die), or at the bond interface 6 between two elements (e.g., at the interface 6 between the dies 2 a - 2 c and the carrier 3 ).
- the waveguide 10 is straight or generally linear as it extends between two dies.
- any of the waveguides 10 disclosed herein may bend, curve, or otherwise change directions so as to guide the waves to any desirable location in the structure 1 .
- FIG. 3A is a schematic perspective view of a structure 1 with an integrated waveguide 10 , according to various embodiments.
- FIG. 3B is a schematic side cross-sectional view of the first waveguide portion 10 a disposed at interfaces 6 between the dies 2 a, 2 b and the carrier 3 .
- FIG. 3C is a schematic side cross-sectional view of the second waveguide portion 10 b disposed along and under the gap 4 between the dies 2 a, 2 b.
- the waveguide 10 can include the first waveguide portion 10 a defined at the interfaces 6 between the dies 2 a - 2 b and the carrier 3 , as shown in FIG. 3B .
- FIG. 3B is a schematic perspective view of a structure 1 with an integrated waveguide 10 , according to various embodiments.
- FIG. 3B is a schematic side cross-sectional view of the first waveguide portion 10 a disposed at interfaces 6 between the dies 2 a, 2 b and the carrier 3 .
- the first waveguide portion 10 a can be defined by first metallic features 14 a and first dielectric features 7 a formed in and/or on the respective integrated device dies 2 a, 2 b, and second metallic features 14 b and second dielectric features 7 b formed in and/or on the carrier 3 .
- the first waveguide portion 10 a can be formed in any suitable manner, such as by damascene processes.
- trenches or recesses can be defined in the lower surfaces 12 , which may be the active surfaces, of the dies 2 a - 2 b and in the upper surface 5 of the carrier 3 .
- a metallic layer can be deposited along the bottom and sidewalls of the trenches to define the first and second metallic feature 14 a, 14 b.
- the dielectric features 7 a, 7 b can be deposited within the trenches over the metallic features 14 a, 14 b in the dies 2 a, 2 b and the carrier 3 .
- the upper surface 5 of the carrier 3 and the lower surface 12 of the dies 2 a, 2 b can be prepared for direct bonding as explained above.
- the upper surface 5 and the lower surface 12 can be polished to a very high surface smoothness, and can be activated and terminated with a suitable species (e.g., nitrogen).
- the metallic features 14 a, 14 b may be recessed relative to the dielectric features 7 a, 7 b (e.g., recessed below the dielectric features 7 a, 7 b by less than 20 nm, or by less than 10 nm).
- the lower surfaces 12 of the dies 2 a, 2 b can be brought into contact with the upper surface 5 of the carrier 3 at room temperature to form a direct bond between at least the non-conductive field regions of the dies 2 a, 2 b and the carrier 3 (e.g., a direct bond between the dielectric features 7 a, 7 b disposed in each element).
- the non-conductive regions can be directly bonded without application of pressure or voltage in some arrangements.
- the structure 1 can be heated to increase the bond strength and/or to cause the metallic features 14 a, 14 b to form an electrical contact with one another.
- the resulting bonded structure 1 can be bonded along the interface 6 , and the waveguide 10 can be defined at least in part along the bond interface 6 .
- the first and second metallic features 14 a, 14 b and the associated dielectric features 7 a, 7 b can cooperate along the interface 6 to form the first waveguide portion 10 a of the waveguide 10 .
- the first and second metallic features 14 a, 14 b can bond to one another such that the walls 11 c, 11 d can be formed from respective side portions of the features 14 a, 14 b (e.g., the portions of the metal that line the sidewalls of the trenches in the elements).
- the walls 11 a, 11 b can be defined by the portions of the metal that line the bottoms of the trenches in the respective elements. As shown in the side sectional view of FIG. 3B , the metallic features 14 a, 14 b can cooperate to define an effectively closed metallic channel (e.g., a completely closed metallic channel in the arrangement of FIG. 3B ) disposed about the dielectric material 7 (which is defined by the respective dielectric features 7 a, 7 b ).
- an effectively closed metallic channel e.g., a completely closed metallic channel in the arrangement of FIG. 3B
- the direct bond between the metallic features 14 a, 14 b and between the dielectric features 7 a, 7 b can enable face down solutions (e.g., with each die's active surface facing the carrier 3 ) for die-to-die communications with improved electrical performance and lower losses for frequencies below 1 THz (e.g., greater than 22 GHz, or in a range of 22 GHz to 1 THz), as compared with other die-to-die interconnects.
- face down solutions e.g., with each die's active surface facing the carrier 3
- die-to-die communications with improved electrical performance and lower losses for frequencies below 1 THz (e.g., greater than 22 GHz, or in a range of 22 GHz to 1 THz), as compared with other die-to-die interconnects.
- the second waveguide portion 10 b can be defined along and underlying the gaps 4 between the dies 4 a , 4 b.
- the channel 11 can be defined by the second metallic portion 14 b formed in the carrier 3 and by a first metallic portion 14 a that can be deposited or adhered over the second metallic portion 14 b and the dielectric material 7 .
- the first and second metallic portions 14 a, 14 b may be separately defined or integrated so as to cooperate to define the waveguide portion 10 b .
- the second waveguide portion 10 b can accordingly be embedded or buried in the carrier 3 , with the upper wall 11 a defined by metal applied over the upper surface 5 of the carrier 3 .
- the height of the second waveguide portion 10 b along the z-axis can be less than the height of the first waveguide portion 10 a along the z-axis, as shown in FIGS. 3B and 3C .
- the height differential between the first and second waveguide portions 10 a, 10 b may introduce some impedance discontinuities, but the overall effect on electrical performance is negligible.
- the width of the first and second waveguide portions 10 a, 10 b along the y-axis see FIG.
- the second waveguide portion 10 b can be embedded within a carrier 3 , which can be a semiconductor element (such as an interposer, an integrated device die, a reconstituted die or wafer, etc.) in the illustrated embodiment.
- a carrier 3 can be a semiconductor element (such as an interposer, an integrated device die, a reconstituted die or wafer, etc.) in the illustrated embodiment.
- FIGS. 4A-4C are schematic perspective views of waveguides 10 with different metallic patterns for the metallic channel 11 .
- FIG. 4A is a schematic perspective view of a waveguide 10 which can be similar to the waveguide 10 shown in FIG. 2 , prior to bonding.
- first metallic features 14 a can include the wall 11 a and metallic legs that are disposed on and/or extend from the wall 11 a to at least partially define the walls 11 c, 11 d, and which can be provided on a first element (such as the dies 2 a - 2 c ).
- Second metallic features 14 b can include the wall 11 b and metallic legs that are disposed on and/or extend from the wall 11 b to at least partially define the walls 11 c, 11 d , and which can be provided on a second element (such as the carrier 3 ).
- the metallic features 14 a, 14 b can be directly bonded to one another to define the walls 11 c, 11 d .
- FIG. 1 In the embodiment of FIG. 1
- the metallic features 14 a, 14 b comprise a continuous linear metallic segments such that, when the features 14 a, 14 b are directly bonded to one another, the walls 11 a - 11 d define a channel 11 that is effectively closed (e.g., completely closed) as viewed from a cross-section taken perpendicular to the propagation direction (e.g., the x-axis).
- corresponding dielectric features 7 a, 7 b can also be directly bonded so as to define the dielectric material 7 disposed within the metallic channel 11 defined by the walls 11 a - 11 d .
- the waveguide 10 shown in FIG. 4A is straight or linear, in other embodiments, the waveguide 10 can bend, turn, or curve so as to cause the waves W to follow a curved or angled pathway.
- the metallic features 14 a, 14 b shown in FIG. 4A it may be undesirable to provide continuous linear segments, such as the metallic features 14 a, 14 b shown in FIG. 4A .
- polishing the metallic features 14 a, 14 b and dielectric features 7 a, 7 b using processes such as chemical mechanical polishing can cause dishing along the bonding surfaces of the elements to be bonded. The dishing can cause uneven surfaces along the bonding surfaces, which may be undesirable.
- the metallic features 14 a, 14 b that define the walls 11 c, 11 d of the channel 11 may instead be patterned to define smaller metallic features that are less susceptible to dishing.
- FIG. 4B is a schematic perspective view of a waveguide 10 in which portions of conductive features 14 a, 14 b are patterned with discontinuities or gaps 15 to avoid dishing.
- FIG. 4C is a schematic perspective view of a waveguide 10 in which both metallic features 14 a, 14 b are patterned with discontinuities or gaps 15 along their lengths to avoid dishing.
- the metallic features 14 a , 14 b can be patterned (e.g., using lithography or by selective deposition) to have gaps 15 between the portions of the metallic feature 14 a, 14 b along the direction of propagation (the x-axis).
- FIG. 4A is a schematic perspective view of a waveguide 10 in which portions of conductive features 14 a, 14 b are patterned with discontinuities or gaps 15 to avoid dishing.
- the metallic features 14 a , 14 b can be patterned (e.g., using lithography or by selective deposition) to have gaps 15 between the portions of the metallic feature 14 a, 14 b
- gaps 15 are provided, which may not affect the electrical performance of the waveguide 10 .
- numerous gaps 15 are provided along the length of the waveguide 10 , which may slightly affect the electrical performance.
- any degradation in electrical performance for the embodiment of FIG. 4C may be negligible or eliminated if the gaps 15 are significantly smaller than the wavelength of the waves W that are coupled to the waveguide 10 .
- the metallic features 14 a, 14 b may have gaps 15 or discontinuities, the metallic channel 11 may nevertheless be effectively closed if the gaps 15 are sufficiently small as compared with the wavelength of the waves W.
- the gaps 15 can be sized so as to be less than 20% (e.g., less than 15%, or less than 10%) of the wavelength of the waves W to be coupled to the waveguide 10 .
- the gaps 15 can be sized so as to be in a range of 0.5% to 15%, in a range of 1% to 10%, or in a range of 2% to 5% of the wavelength of the waves W to be coupled to the waveguide 10 .
- Relatively small pitches for the metallic features 14 a , 14 b and associated gaps 15 therein can be defined using lithographic techniques.
- the pitch of the gaps 15 and metallic features 14 a, 14 b can be 30 microns or less for wavelengths greater than 300 microns.
- the pitch of the gaps 15 and metallic features 14 a, 14 b can be less than 20 microns or less than 10 microns. In various embodiments, the pitch of the gaps 15 and metallic features 14 a, 14 b can be in a range of 1 micron to 40 microns, in a range of 1 micron to 30 microns, in a range of 5 microns to 30 microns, in a range of 5 microns to 20 microns, or in a range of 5 microns to 10 microns.
- the ability to create small pitch discontinuities or gaps in the metallic features 14 a, 14 b in a semiconductor element can beneficially reduce dishing while enabling little or no degradation in electrical performance.
- the pitch can be further reduced, e.g., to below 1 micron as defined by photolithographic limits.
- FIG. 5 is a schematic perspective view of a structure 1 with a waveguide 10 embedded in a carrier 3 comprising a semiconductor element, prior to bonding of the dies 2 a, 2 b to the carrier 3 .
- the waveguide 10 is at least partially embedded in the carrier 3 , which can comprise a semiconductor element such as an integrated device die, a semiconductor interposer, a reconstituted die or wafer, etc.
- the waveguide 10 is completely embedded in the carrier 3 such that the walls 11 a - 11 d of the channel 11 are buried within the carrier 3 .
- the waveguide 10 can be at least partially embedded in the carrier 3 but may have a wall 11 a that is exposed at or near the upper surface 5 of the carrier 3 .
- the waveguide 10 can comprise a metallic channel 11 that defines an effectively closed metallic or conductive profile, as viewed from a side cross section taken along the direction of wave propagation.
- the metallic channel 11 may comprise a continuous and completely closed profile, while in other embodiments, the metallic channel 11 may comprise gaps or discontinuities.
- the carrier 3 can comprise ports 17 b, 17 d, and the dies 2 a - 2 b can comprise corresponding ports 17 a, 17 c.
- the ports 17 b, 17 d can extend through the effectively closed metallic channel 11 to the upper surface 5 of the carrier 3 , and the ports 17 a, 17 c can be exposed on the lower surface 12 of the dies 2 a - 2 b.
- the ports 17 a - 17 d can be configured to couple to radiating elements 13 a, 13 b to transmit electromagnetic radiation to, or to receive electromagnetic radiation from, the waveguide 10 .
- the dies 2 a, 2 b can be aligned relative to the carrier 3 such that the port 17 a generally aligns with the port 17 b and the port 17 c aligns with the port 17 d .
- the dies 2 a, 2 b can be bonded to the carrier 3 , including along the interface between the ports 17 a and 17 b and between the ports 17 c and 17 d .
- a metallic periphery 18 a of the port 17 a can be directly bonded to a metallic periphery 18 b of the port 17 b without an intervening adhesive.
- a metallic periphery 18 c of the port 17 c can be directly bonded to a metallic periphery 18 d of the port 17 d .
- Dielectric features 7 a - 7 d within the metallic peripheries 18 a - 18 d can also be directly bonded to one another.
- the metallic peripheries 18 a - 18 d can be bonded in other ways, such as by way of a conductive adhesive or solder.
- the radiating elements 13 a, 13 b can electromagnetically couple to the waveguide 10 by way of the ports 17 b, 17 d .
- the radiating elements 13 a, 13 b can comprise probes of a conductive segment that are inserted into openings in the metallic channel 11 defined by the ports 17 b, 17 d .
- the radiating elements 13 a, 13 b can comprise other suitable structures, such as conductive loops or apertures. Accordingly, in the embodiment shown in FIG.
- the waveguide 10 can be at least partially embedded in the carrier 3 which can comprise a semiconductor element or other substrate material with a bonding layer (e.g., silicon oxide) having metallic features embedded therein. Bonding the dies 2 a, 2 b to the carrier can provide electrical communication between the dies 2 a, 2 b by electromagnetically coupling the dies 2 a, 2 b to the waveguide 10 within the carrier 3 .
- the carrier 3 can comprise a semiconductor element or other substrate material with a bonding layer (e.g., silicon oxide) having metallic features embedded therein. Bonding the dies 2 a, 2 b to the carrier can provide electrical communication between the dies 2 a, 2 b by electromagnetically coupling the dies 2 a, 2 b to the waveguide 10 within the carrier 3 .
- FIG. 6 is a schematic side view of a structure 1 comprising a bridge 19 between the dies 2 a, 2 b that includes an integrated waveguide 10 therein.
- the components of FIG. 6 may be the same as or generally similar to like numbered components of FIGS. 1-5 .
- the structure can comprise integrated device dies 2 a, 2 b bonded (e.g., directly bonded) to the carrier 3 .
- the bridge 19 can be bonded to the dies 2 a, 2 b on upper surfaces 20 , which can be the active surfaces, of the dies 2 a, 2 b, which are opposite the lower surfaces 12 and the carrier 3 .
- the waveguide 10 can be provided at least partially in the bridge 19 as shown in FIG. 6 .
- the waveguide 10 can be at least partially (e.g., completely) embedded in the bridge 19 , similar to the manner in which the waveguide 10 is embedded in the carrier 3 as shown in FIG. 5 .
- the waveguide 10 can be defined by features along both sides of an interface between the dies 2 a , 2 b and the bridge 19 , similar to the manner in which the waveguide 10 is defined in FIGS. 3A-3B .
- the waveguide 10 can comprise a metallic channel having an effectively closed profile (e.g., completely closed or including small discontinuities or gaps) and within which a dielectric material is disposed, as viewed along a cross section taken transverse to the propagation direction.
- the bridge 19 comprises a semiconductor element, such as an interposer, an integrated device die, etc.
- the bridge 19 may be the waveguide itself, such that the waveguide 10 spans the gap between the dies 2 a, 2 b.
- the waveguide can be provided directly across the dies, instead of embedding it in a bridge structure.
- FIGS. 7A-7D illustrate various devices that can be constructed utilizing the waveguides 10 disclosed herein.
- the waveguides 10 utilized in FIGS. 7A-7D can comprise effectively closed metallic channels (e.g., completely closed or with discontinuities or gaps that are small compared to the electromagnetic wavelengths to be communicated therethrough).
- the waveguides 10 utilized in FIGS. 7A-7D can be defined along an interface between two elements (such as between a die and a carrier, as in FIGS. 3A-3C ), or can be at least partially embedded in one element (similar to the embodiment of FIG. 5 ).
- FIG. 7A is a top plan view of a power divider 30 that incorporates any of the waveguide structures 10 described above.
- the power divider 30 can comprise waveguide structures 10 disposed in or on an element (such as a substrate, interposer, integrated device die, etc.).
- the waveguide 10 can comprise a primary channel 31 that splits into a plurality of divided channels 32 a, 32 b at a junction 33 .
- Divided channels 32 a, 32 b, 34 a, and 34 b can also be defined as waveguide structures similar to the waveguides 10 disclosed herein.
- the power divider based on the integrated waveguide structures disclosed herein may function in a manner similar to conventional planar power dividers based on microstrips or striplines. However, beneficially, the embodiments disclosed herein can provide lower losses and better performance at higher frequencies.
- the waveguide 10 may broaden out at the divided channels 32 a, 32 b.
- the power divider 30 can divide or split the power of the electromagnetic waves that propagate along the waveguide 10 .
- FIG. 7B is a top plan view of a coupler 40 that incorporates the waveguides 10 described herein.
- the coupler 40 can comprise one or more waveguides 10 disposed in or on an element (such as a substrate, interposer, integrated device die, etc.).
- the waveguide 10 can comprise first and second longitudinal arms 41 a, 41 b that are spaced apart from one another, e.g., by a quarter wavelength.
- the arms 41 a, 41 b can be connected by connector waveguides 42 a, 42 b.
- the connector waveguides 42 a, 42 b can be spaced apart from one another, e.g., by a quarter wavelength.
- electromagnetic waves can propagate along the longitudinal arms 41 a, 41 b of the waveguide 10 .
- the waves propagating along one of the arms 41 a, 41 b can couple to the waves propagating along the other of the arms 41 a, 41 b, by propagating along the connector waveguides 42 a, 42 b.
- the coupler based on the integrated waveguide structures may function in a manner similar to a conventional planar coupler based on microstrips or striplines.
- the embodiments disclosed herein may provide lower losses and better performance at higher frequencies.
- FIG. 7C is a top plan view of a circulator 50 that incorporates the waveguides 10 described herein.
- the circulator 50 can comprise one or more waveguides 10 disposed in or on an element (such as a substrate, interposer, integrated device die, etc.).
- the circulator 50 can include a waveguide 10 having a curved or circular pathway 51 .
- a first port 52 a can act as an input for coupling electromagnetic radiation into the circular pathway 51 .
- Second and third ports 52 b, 52 c can act as in-phase output ports for directing electromagnetic radiation out of the circular pathway 51 .
- a fourth port 52 d can comprise an isolated port.
- the circulator based on the integrated waveguide structures disclosed herein may function in a manner similar to a conventional planar circulator based on microstrips or striplines. However, beneficially, the embodiments disclosed herein may provide lower losses and better performance at higher frequencies.
- FIG. 7D is a top plan view of a filter 60 that incorporates the waveguides 10 disclosed herein.
- the filter 60 can comprise one or more waveguides 10 disposed in or on an element (such as a substrate, interposer, integrated device die, etc.).
- the waveguide 10 can comprise an input line 71 a and an output line 71 b.
- a plurality of ring-shaped elements 72 a, 72 b can be provide between the input and output lines 71 a, 71 b.
- the input line 71 a can electromagnetically couple with the ring-shaped element 72 a.
- the ring-shaped element 72 a can couple with the ring-shaped element 72 b, which can in turn electromagnetically couple with the output line 71 b.
- Selected wavelength(s) of radiation propagating along the input line 71 a can be filtered by the ring-shaped elements 72 a, 72 b , such that only the selected wavelength(s) are transmitted to the output line 71 b.
- the filter based on the integrated waveguide structures disclosed herein may function in a manner similar to a conventional planar filter based on microstrips or striplines. However, beneficially, the embodiments disclosed herein may provide lower losses and better performance at higher frequencies.
- the waveguides 10 disclosed herein in FIGS. 1-6 can be shaped in plan view in any suitable manner so as to define various components that have different electrical functionalities.
- the waveguides 10 may accordingly be bent, angled, or curved, as seen from a top view.
- the waveguides 10 can comprise multiple components that interact with one another to define various types of devices.
- FIG. 8 is a schematic system diagram of an electronic system 80 incorporating one or more structures 1 , according to various embodiments.
- the system 80 can comprise any suitable type of electronic device, such as a mobile electronic device (e.g., a smartphone, a tablet computing device, a laptop computer, etc.), a desktop computer, an automobile or components thereof, a stereo system, a medical device, a camera, or any other suitable type of system.
- the electronic system 80 can comprise a microprocessor, a graphics processor, an electronic recording device, or digital memory.
- the system 80 can include one or more device packages 82 which are mechanically and electrically connected to the system 80 , e.g., by way of one or more motherboards. Each package 82 can comprise one or more structures 1 .
- the system 80 shown in FIG. 8 can comprise any of the structures 1 shown and described herein.
- a structure in one embodiment, can include a first element and a carrier bonded to the first element along an interface.
- the structure can include a waveguide defined at least in part along the interface between the first element and the carrier.
- the waveguide can comprise an effectively closed metallic channel and a dielectric material within the effectively closed metallic channel as viewed from a side cross-section of the structure.
- a structure in another embodiment, can include a semiconductor element having a waveguide at least partially embedded therein.
- the waveguide can comprise an effectively closed metallic channel and a dielectric material within the effectively closed metallic channel as viewed from a side cross-section of the structure.
- the structure can include a first port extending through the effectively closed metallic channel to an exterior surface of the semiconductor element. The first port can be configured to couple to a radiating element to transmit electromagnetic radiation to, or to receive electromagnetic radiation from, the waveguide.
- a method of forming a structure can include providing a first element and a carrier.
- the first element can comprise first metallic features and first dielectric features exposed on an exterior surface of the first element.
- the carrier can comprise second metallic features and second dielectric features exposed on an exterior surface of the carrier.
- the method can include bonding the first element to the carrier along an interface to bond the first metallic features and the second metallic features and to bond the first dielectric features and the second dielectric features.
- the bonded first element and carrier can define a waveguide at least in part along the interface between the first element and the carrier.
- the waveguide can comprise an effectively closed metallic channel and a dielectric material within the effectively closed metallic channel as viewed from a side cross-section of the structure.
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Abstract
Description
- The field relates to structures with integrated waveguides, and in particular, to interconnects and circuit structures with integrated metallic waveguides.
- In some electronic systems, multiple integrated device dies may be mounted to a carrier and may communicate with one another in a variety of ways. For example, in some systems, two integrated device dies can communicate with one another by way of conductive traces or interconnects provided in an intervening package substrate such as a printed circuit board (PCB) or in a silicon interposer. In other systems, a silicon bridge or other interconnect structure can serve to electrically connect two dies within a package or system. However, existing die-to-die interconnects may experience high losses due to conductor loss, crosstalk or other factors. Accordingly, there remains a continuing need for improved die-to-die communications.
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FIG. 1 is a schematic side sectional view of a structure that includes integrated waveguides, according to some embodiments. -
FIG. 2 is schematic perspective view of a waveguide according to various embodiments. -
FIG. 3A is a schematic perspective view of a structure with an integrated waveguide, according to various embodiments. -
FIG. 3B is a schematic side cross-sectional view of a first waveguide portion disposed between integrated device dies and a carrier. -
FIG. 3C is a schematic side cross-sectional view a second waveguide portion disposed along and under a gap between the integrated device dies. -
FIG. 4A is a schematic perspective view of a waveguide with metallic features that comprise continuous segments, prior to bonding. -
FIG. 4B is a schematic perspective view of a waveguide in which portions of conductive features are patterned with discontinuities or gaps to avoid dishing. -
FIG. 4C is a schematic perspective view of a waveguide in which both conductive features are patterned with discontinuities or gaps along their lengths to avoid dishing. -
FIG. 5 is a schematic perspective view of a structure with a waveguide embedded in a carrier comprising a semiconductor element, prior to bonding of the dies to the carrier. -
FIG. 6 is a schematic side view of a structure comprising a bridge between two dies that includes an integrated waveguide therein. -
FIG. 7A is a top plan view of a power divider that incorporates any of the waveguides described herein. -
FIG. 7B is a top plan view of a coupler that incorporates the waveguides described herein. -
FIG. 7C is a top plan view of a circulator that incorporates the waveguides described herein. -
FIG. 7D is a top plan view of a filter that incorporates the waveguides disclosed herein. -
FIG. 8 is a schematic system diagram of an electronic system incorporating one or more structures, according to various embodiments. - Various embodiments disclosed herein relate to interconnects and structures with integrated waveguides, e.g., integrated conductive or metallic waveguides. As explained above, existing techniques for providing die-to-die (or chip-to-chip) communications within a package or system may not provide adequate performance at high frequencies. For example, some die-to-die interconnects may experience high current densities which can lead to high losses due to conductor loss, crosstalk and other factors. Moreover, in some systems, it may be difficult to provide millimeter wave or sub-terahertz communications over a range of tens of gigahertz to hundreds of gigahertz (e.g., in a range of 10 GHz to 950 GHz, in a range of 20 GHz to 900 GHz) using coplanar or microstrip waveguides since such devices may be lossy at millimeter-sized wavelengths. The embodiments disclosed herein beneficially enable the use of lower loss metallic waveguides for die-to-die communications, including communications at wavelengths in a range of 0.1 mm to 10 mm.
- A metallic or conductive waveguide can comprise an effectively closed metallic or conductive channel as viewed from a side cross-section taken perpendicular to a propagation direction of the waveguide, and can include a low loss dielectric material within the effectively closed channel. In various embodiments, the metallic or conductive waveguide can comprise a metal, including metallic compounds. In some embodiments, the metallic waveguide can be defined by bonding two elements (e.g., two semiconductor elements) along an interface, with the waveguide defined at least in part by the interface. In some embodiments, the two elements can be directly bonded to one another without an intervening adhesive. In other embodiments, the metallic waveguide can be at least partially (e.g., completely) embedded in an element and can include one or a plurality of ports that can receive a radiating element for coupling electromagnetic waves to the waveguide. The disclosed embodiments can therefore provide die-to-die communications with low loss and with little or no crosstalk, which can enable high frequency die-to-die communications. Moreover, in embodiments that utilize direct bonding, the resulting structure can be constructed at lower costs than other techniques, since the waveguides can be constructed using the bonding layers defined for directly bonding two elements to one another. The integrated waveguides disclosed herein can also advantageously reduce the number of radio frequency (RF) components provided in the package, since the waveguides described herein can be directly integrated into the dies and/or other elements.
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FIG. 1 is a schematic side sectional view of a structure 1 that includes an integrated waveguide 10 (e.g., an integrated metallic or otherwise conductive waveguide), according to some embodiments. The structure 1 can include a plurality of elements 2 mounted to another element, e.g., acarrier 3. For example, inFIG. 1 , the elements 2 can comprise a first integrated device die 2 a, a second integrated device die 2 b, and a third integrated device die 2 c, each of which are electrically and mechanically connected to thecarrier 3. In various embodiments, the device dies 2 a-2 c can comprise processor dies, memory dies, sensor dies, communications dies, microelectromechanical systems (MEMS) dies, or any other suitable type of device. Thecarrier 3 may be any suitable type of element, such as an integrated device die, an interposer, a reconstituted die or wafer, etc. As explained herein, the elements 2 a-2 c are shown as being mounted to thecarrier 3 by way of a direct bond, but in other embodiments, the elements can be connected to the carrier in other ways. In the illustrated embodiment, the elements 2 a-2 c and thecarrier 3 comprise semiconductor elements (e.g., integrated device dies 2 a-2 c, a semiconductor interposer, etc.), but in other embodiments, the elements and/or the carrier can comprise other types of elements that may or may not comprise a semiconductor material, such as various types of optical devices (e.g., lenses, filters, etc.). As shown, the dies 2 a-2 c can be laterally spaced from one another along thecarrier 3. - In the illustrated embodiment, one or more of the device dies 2 a-2 c are directly bonded to the
carrier 3 without an intervening adhesive. The direct bond between the dies 2 a-2 c and thecarrier 3 can include a direct bond between corresponding conductive features of the dies 2 a-2 c (e.g., a processor die) and the carrier 3 (e.g., an integrated device die, an interposer, etc.) without an intervening adhesive, without being limited thereto. In some embodiments, the conductive features may be surrounded by non-conductive field regions. To accomplish the direct bonding, in some embodiments, respective bonding surfaces of the conductive features and the non-conductive field regions can be prepared for bonding. Preparation can include provision of a nonconductive layer, such as silicon oxide or silicon nitride, with exposed conductive features, such as metal bond pads or contacts. The bonding surfaces of at least the non-conductive field regions, or both the conductive and non-conductive regions, can be polished to a very high degree of smoothness (e.g., less than 20 nm surface roughness, or more particularly, less than 5 nm surface roughness). In some embodiments, the surfaces to be bonded may be terminated with a suitable species and activated prior to bonding. For example, in some embodiments, the non-conductive surfaces (e.g., field regions) of the bonding layer to be bonded, such as silicon oxide material, may be very slightly etched for activation and exposed to a nitrogen-containing solution and terminated with a nitrogen-containing species. As one example, the surfaces to be bonded (e.g., field regions) may be exposed to an ammonia dip after a very slight etch, and/or a nitrogen-containing plasma (with or without a separate etch). In a direct bond interconnect (DBI) process, nonconductive features of the dies and the carrier can directly bond to one another, even at room temperature and without the application of external pressure, while the conductive features of the dies and the carrier layer can also directly bond to one another, without any intervening adhesive layers. Bonding by DBI forms stronger bonds than Van der Waals bonding, including significant covalent bonding between the surfaces of interest. Subsequent annealing can further strengthen bonds, particularly between conductive features of the bonding interfaces. - In some embodiments, the respective conductive features can be flush with the exterior surfaces (e.g., the field regions) of the dies and the carrier. In other embodiments, the conductive features may extend above the exterior surfaces. In still other embodiments, the conductive features of one or both of the dies and the carrier are recessed relative to the exterior surfaces (e.g., nonconductive field regions) of the dies and the carrier. For example, the conductive features can be recessed relative to the field regions by less than 20 nm, e.g., less than 10 nm.
- Once the respective surfaces are prepared, the nonconductive field regions (such as silicon oxide) of the dies 2 a-2 c can be brought into contact with corresponding nonconductive regions of the
carrier 3. The interaction of the activated surfaces can cause the nonconductive regions of the dies 2 a-2 c to directly bond with the corresponding nonconductive regions of thecarrier 3 without an intervening adhesive, without application of external pressure, without application of voltage, and at room temperature. In various embodiments, the bonding forces of the nonconductive regions can include covalent bonds that are greater than Van der Waals bonds and exert significant forces between the conductive features. Prior to any heat treatment, the bonding energy of the dielectric-dielectric surface can be in a range from 150-300 mJ/m2, which can increase to 1500-4000 mJ/m2 after a period of heat treatment. Regardless of whether the conductive features are flush with the nonconductive regions, recessed or protrude, direct bonding of the nonconductive regions can facilitate direct metal-to-metal bonding between the conductive features. In various embodiments, the dies 2 a-2 c and thecarrier 3 may be heated after bonding at least the nonconductive regions. As noted above, such heat treatment can strengthen the bonds between the nonconductive regions, between the conductive features, and/or between opposing conductive and non-conductive regions. In embodiments where one or both of the conductive features are recessed, there may be an initial gap between the conductive features of the dies 2 a-2 c and thecarrier 3, and heating after initially bonding the nonconductive regions can expand the conductive elements to close the gap. Regardless of whether there was an initial gap, heating can generate or increase pressure between the conductive elements of the opposing parts, aid bonding of the conductive features and form a direct electrical and mechanical connection. - Additional details of the direct bonding processes used in conjunction with each of the disclosed embodiments may be found throughout U.S. Pat. Nos. 7,126,212; 8,153,505; 7,622,324; 7,602,070; 8,163,373; 8,389,378; and 8,735,219, and throughout U.S. Patent Application Nos. 14/835,379; 62/278,354; 62/303,930; and 15/137,930, the contents of each of which are hereby incorporated by reference herein in their entirety and for all purposes.
- Direct bonding of the dies 2 a-2 c to the
carrier 3 can result in abond interface 6 between the elements 2 and thecarrier 3. Thewaveguide 10 can be defined along theinterface 6 between thecarrier 3 and the elements 2 (the dies 2 a-2 c). For example, as explained herein, thewaveguide 10 can comprise a first waveguide portion 10 a that is defined by features at the respectivelower surfaces 12 of the elements 2 and at an upper surface 5 of thecarrier 3. As explained below in connection withFIGS. 3A-4C , metallic and/or dielectric features exposed on thelower surfaces 12 of the dies 2 a-2 c (the elements 2) can cooperate with corresponding metallic and/or dielectric features exposed on the upper surface 5 of thecarrier 3 to define the first waveguide portion 10 a of thewaveguide 10. Thewaveguide 10 can also comprise asecond waveguide portion 10 b disposed alonggaps 4 between the integrated device dies 2 a-2 c. Thesecond waveguide portion 10 b can be embedded in thecarrier 3 and can be defined by a metallic channel at or near the upper surface 5. Thewaveguide 10 can enable die-to-die communications between the first die 2 a and the second die 2 b, and between the second die 2 b and the third die 2 c. Although three dies 2 a-2 c are illustrated inFIG. 1 , it should be appreciated that any suitable number of dies may be provided and may communicate with one another. Moreover, as explained above, theintegrated waveguide 10 disclosed herein can be used in conjunction with any suitable type of element. In addition, although the dies 2 a-2 c are directly bonded to thecarrier 3 without an intervening adhesive in the illustrated embodiment, in other embodiments, the dies 2 a-2 c can be bonded to thecarrier 3 in other ways, such as by way of a conductive adhesive, solder, etc. -
FIG. 2 is schematic perspective view of a portion of thewaveguide 10 according to various embodiments. Thewaveguide 10 shown inFIG. 2 is a metallic waveguide that has a polygonal, and particularly rectangular, cross-section. For example, thewaveguide 10 can comprise achannel 11 defined by a plurality ofmetallic walls 11 a-11 d that cooperate to delimit an effectively closed cross-sectional profile, as viewed along a cross-section taken transverse to the propagation direction (i.e., the x-axis). Adielectric material 7 can be disposed within the effectively closedmetallic channel 11. InFIG. 2 , the side section of thechannel 11 is completely closed such that thewalls 11 a-11 d define a continuous, closed boundary about thedielectric material 7. As explained below, however, in some embodiments, the effectively closedmetallic channel 11 may have gaps or spaces in portions of some of thewalls 11 a-11 d. In various embodiments, themetallic walls 11 a-11 d of thechannel 11 can comprise copper or other metal materials. Thedielectric material 7 can comprise any suitable dielectric, such as silicon oxide. - The
walls 11 a-11 d can be electrically grounded so as to provide a bounded pathway along which electromagnetic waves can propagate. As shown inFIG. 2 , input signals or waves W can enter at a first end of thewaveguide 10 and can propagate parallel to the x-axis and can exit as an output signal at another end of thewaveguide 10. In various embodiments, radiatingelements waveguide 10 to transmit and/or receive electromagnetic waves W along thewaveguide 10. In various embodiments the width of thewaveguide 10 along the y-direction can define the cutoff frequency for the propagating mode. During operation, afirst radiating element 13 a can radiate signals or waves W at frequencies that can propagate along thewaveguide 10. In some embodiments, the radiatingelements dielectric material 7 within thechannel 11. Skilled artisans will understand that electromagnetic waves can be coupled to thewaveguide 10 in other suitable ways. For example, in some embodiments, the radiatingelements waveguide 10 disposed along the direction of the lines of magnetic force on the side wall. The signals or waves W can propagate along thewaveguide 10 and can be received by another radiatingelement 13 b which can convert the waves W to an electrical current. Beneficially, as explained herein, thewaveguide 10 can be integrated or embedded in an element (such as an interposer or integrated device die), or at thebond interface 6 between two elements (e.g., at theinterface 6 between the dies 2 a-2 c and the carrier 3). Moreover, in the illustrated embodiment, thewaveguide 10 is straight or generally linear as it extends between two dies. However, in other embodiments, any of thewaveguides 10 disclosed herein may bend, curve, or otherwise change directions so as to guide the waves to any desirable location in the structure 1. -
FIG. 3A is a schematic perspective view of a structure 1 with anintegrated waveguide 10, according to various embodiments.FIG. 3B is a schematic side cross-sectional view of the first waveguide portion 10 a disposed atinterfaces 6 between the dies 2 a, 2 b and thecarrier 3.FIG. 3C is a schematic side cross-sectional view of thesecond waveguide portion 10 b disposed along and under thegap 4 between the dies 2 a, 2 b. As explained above, in some embodiments, thewaveguide 10 can include the first waveguide portion 10 a defined at theinterfaces 6 between the dies 2 a-2 b and thecarrier 3, as shown inFIG. 3B . InFIG. 3B , the first waveguide portion 10 a can be defined by first metallic features 14 a and first dielectric features 7 a formed in and/or on the respective integrated device dies 2 a, 2 b, and secondmetallic features 14 b and second dielectric features 7 b formed in and/or on thecarrier 3. - The first waveguide portion 10 a can be formed in any suitable manner, such as by damascene processes. In the arrangement illustrated in
FIG. 3B , for example, trenches or recesses can be defined in thelower surfaces 12, which may be the active surfaces, of the dies 2 a-2 b and in the upper surface 5 of thecarrier 3. A metallic layer can be deposited along the bottom and sidewalls of the trenches to define the first and secondmetallic feature 14 a, 14 b. The dielectric features 7 a, 7 b can be deposited within the trenches over the metallic features 14 a, 14 b in the dies 2 a, 2 b and thecarrier 3. The upper surface 5 of thecarrier 3 and thelower surface 12 of the dies 2 a, 2 b can be prepared for direct bonding as explained above. For example, the upper surface 5 and thelower surface 12 can be polished to a very high surface smoothness, and can be activated and terminated with a suitable species (e.g., nitrogen). In some embodiments, the metallic features 14 a, 14 b may be recessed relative to the dielectric features 7 a, 7 b (e.g., recessed below the dielectric features 7 a, 7 b by less than 20 nm, or by less than 10 nm). The lower surfaces 12 of the dies 2 a, 2 b can be brought into contact with the upper surface 5 of thecarrier 3 at room temperature to form a direct bond between at least the non-conductive field regions of the dies 2 a, 2 b and the carrier 3 (e.g., a direct bond between thedielectric features - The resulting bonded structure 1 can be bonded along the
interface 6, and thewaveguide 10 can be defined at least in part along thebond interface 6. For example, the first and secondmetallic features 14 a, 14 b and the associated dielectric features 7 a, 7 b can cooperate along theinterface 6 to form the first waveguide portion 10 a of thewaveguide 10. In particular, the first and secondmetallic features 14 a, 14 b can bond to one another such that thewalls features 14 a, 14 b (e.g., the portions of the metal that line the sidewalls of the trenches in the elements). Thewalls FIG. 3B , the metallic features 14 a, 14 b can cooperate to define an effectively closed metallic channel (e.g., a completely closed metallic channel in the arrangement ofFIG. 3B ) disposed about the dielectric material 7 (which is defined by the respective dielectric features 7 a, 7 b). Beneficially, the direct bond between the metallic features 14 a, 14 b and between thedielectric features - Turning to
FIG. 3C , in the illustrated embodiment, thesecond waveguide portion 10 b can be defined along and underlying thegaps 4 between the dies 4 a, 4 b. In thesecond waveguide portion 10 b, thechannel 11 can be defined by the secondmetallic portion 14 b formed in thecarrier 3 and by a first metallic portion 14 a that can be deposited or adhered over the secondmetallic portion 14 b and thedielectric material 7. As withFIG. 3B , the first and secondmetallic portions 14 a, 14 b may be separately defined or integrated so as to cooperate to define thewaveguide portion 10 b. Thesecond waveguide portion 10 b can accordingly be embedded or buried in thecarrier 3, with theupper wall 11 a defined by metal applied over the upper surface 5 of thecarrier 3. The height of thesecond waveguide portion 10 b along the z-axis (seeFIG. 2 ) can be less than the height of the first waveguide portion 10 a along the z-axis, as shown inFIGS. 3B and 3C . The height differential between the first andsecond waveguide portions 10 a, 10 b may introduce some impedance discontinuities, but the overall effect on electrical performance is negligible. The width of the first andsecond waveguide portions 10 a, 10 b along the y-axis (seeFIG. 2 ) may be substantially the same, which can ensure effective propagation along the x-axis. Beneficially, thesecond waveguide portion 10 b can be embedded within acarrier 3, which can be a semiconductor element (such as an interposer, an integrated device die, a reconstituted die or wafer, etc.) in the illustrated embodiment. -
FIGS. 4A-4C are schematic perspective views ofwaveguides 10 with different metallic patterns for themetallic channel 11. In particular,FIG. 4A is a schematic perspective view of awaveguide 10 which can be similar to thewaveguide 10 shown inFIG. 2 , prior to bonding. InFIG. 4A , for example, first metallic features 14 a can include thewall 11 a and metallic legs that are disposed on and/or extend from thewall 11 a to at least partially define thewalls metallic features 14 b can include thewall 11 b and metallic legs that are disposed on and/or extend from thewall 11 b to at least partially define thewalls walls FIG. 4A , the metallic features 14 a, 14 b comprise a continuous linear metallic segments such that, when thefeatures 14 a, 14 b are directly bonded to one another, thewalls 11 a-11 d define achannel 11 that is effectively closed (e.g., completely closed) as viewed from a cross-section taken perpendicular to the propagation direction (e.g., the x-axis). Although not illustrated inFIG. 4A , it should be appreciated that corresponding dielectric features 7 a, 7 b (seeFIG. 3B ) can also be directly bonded so as to define thedielectric material 7 disposed within themetallic channel 11 defined by thewalls 11 a-11 d. Furthermore, although thewaveguide 10 shown inFIG. 4A is straight or linear, in other embodiments, thewaveguide 10 can bend, turn, or curve so as to cause the waves W to follow a curved or angled pathway. - In some arrangements, it may be undesirable to provide continuous linear segments, such as the metallic features 14 a, 14 b shown in
FIG. 4A . For example, in some cases, polishing the metallic features 14 a, 14 b anddielectric features walls channel 11 may instead be patterned to define smaller metallic features that are less susceptible to dishing. - Accordingly,
FIG. 4B is a schematic perspective view of awaveguide 10 in which portions ofconductive features 14 a, 14 b are patterned with discontinuities orgaps 15 to avoid dishing.FIG. 4C is a schematic perspective view of awaveguide 10 in which bothmetallic features 14 a, 14 b are patterned with discontinuities orgaps 15 along their lengths to avoid dishing. UnlikeFIG. 4A , inFIGS. 4B and 4C , the metallic features 14 a, 14 b can be patterned (e.g., using lithography or by selective deposition) to havegaps 15 between the portions of themetallic feature 14 a, 14 b along the direction of propagation (the x-axis). InFIG. 4B , only a few small discontinuities orgaps 15 are provided, which may not affect the electrical performance of thewaveguide 10. InFIG. 4C ,numerous gaps 15 are provided along the length of thewaveguide 10, which may slightly affect the electrical performance. However, any degradation in electrical performance for the embodiment ofFIG. 4C may be negligible or eliminated if thegaps 15 are significantly smaller than the wavelength of the waves W that are coupled to thewaveguide 10. Thus, even though the metallic features 14 a, 14 b may havegaps 15 or discontinuities, themetallic channel 11 may nevertheless be effectively closed if thegaps 15 are sufficiently small as compared with the wavelength of the waves W. - For example, the
gaps 15 can be sized so as to be less than 20% (e.g., less than 15%, or less than 10%) of the wavelength of the waves W to be coupled to thewaveguide 10. In some embodiments, thegaps 15 can be sized so as to be in a range of 0.5% to 15%, in a range of 1% to 10%, or in a range of 2% to 5% of the wavelength of the waves W to be coupled to thewaveguide 10. Relatively small pitches for the metallic features 14 a, 14 b and associatedgaps 15 therein can be defined using lithographic techniques. In various embodiments, for example, the pitch of thegaps 15 andmetallic features 14 a, 14 b can be 30 microns or less for wavelengths greater than 300 microns. In various embodiments, the pitch of thegaps 15 andmetallic features 14 a, 14 b can be less than 20 microns or less than 10 microns. In various embodiments, the pitch of thegaps 15 andmetallic features 14 a, 14 b can be in a range of 1 micron to 40 microns, in a range of 1 micron to 30 microns, in a range of 5 microns to 30 microns, in a range of 5 microns to 20 microns, or in a range of 5 microns to 10 microns. The ability to create small pitch discontinuities or gaps in the metallic features 14 a, 14 b in a semiconductor element (such as a die or interposer) can beneficially reduce dishing while enabling little or no degradation in electrical performance. Forwaveguides 10 that are completely embedded in the semiconductor element, the pitch can be further reduced, e.g., to below 1 micron as defined by photolithographic limits. -
FIG. 5 is a schematic perspective view of a structure 1 with awaveguide 10 embedded in acarrier 3 comprising a semiconductor element, prior to bonding of the dies 2 a, 2 b to thecarrier 3. In the embodiment ofFIG. 5 , thewaveguide 10 is at least partially embedded in thecarrier 3, which can comprise a semiconductor element such as an integrated device die, a semiconductor interposer, a reconstituted die or wafer, etc. In some embodiments, thewaveguide 10 is completely embedded in thecarrier 3 such that thewalls 11 a-11 d of thechannel 11 are buried within thecarrier 3. In other embodiments, thewaveguide 10 can be at least partially embedded in thecarrier 3 but may have awall 11 a that is exposed at or near the upper surface 5 of thecarrier 3. As with the embodiments ofFIGS. 1-4C , thewaveguide 10 can comprise ametallic channel 11 that defines an effectively closed metallic or conductive profile, as viewed from a side cross section taken along the direction of wave propagation. In some embodiments, themetallic channel 11 may comprise a continuous and completely closed profile, while in other embodiments, themetallic channel 11 may comprise gaps or discontinuities. - As shown in
FIG. 5 , thecarrier 3 can compriseports corresponding ports ports metallic channel 11 to the upper surface 5 of thecarrier 3, and theports lower surface 12 of the dies 2 a-2 b. The ports 17 a-17 d can be configured to couple to radiatingelements waveguide 10. For example, the dies 2 a, 2 b can be aligned relative to thecarrier 3 such that theport 17 a generally aligns with theport 17 b and theport 17 c aligns with theport 17 d. The dies 2 a, 2 b can be bonded to thecarrier 3, including along the interface between theports ports port 17 a can be directly bonded to ametallic periphery 18 b of theport 17 b without an intervening adhesive. Similarly, ametallic periphery 18 c of theport 17 c can be directly bonded to ametallic periphery 18 d of theport 17 d.Dielectric features 7 a-7 d within the metallic peripheries 18 a-18 d can also be directly bonded to one another. In other embodiments, the metallic peripheries 18 a-18 d can be bonded in other ways, such as by way of a conductive adhesive or solder. - Upon bonding of the dies 2 a, 2 b to the
carrier 3, the radiatingelements waveguide 10 by way of theports elements metallic channel 11 defined by theports elements FIG. 5 , thewaveguide 10 can be at least partially embedded in thecarrier 3 which can comprise a semiconductor element or other substrate material with a bonding layer (e.g., silicon oxide) having metallic features embedded therein. Bonding the dies 2 a, 2 b to the carrier can provide electrical communication between the dies 2 a, 2 b by electromagnetically coupling the dies 2 a, 2 b to thewaveguide 10 within thecarrier 3. -
FIG. 6 is a schematic side view of a structure 1 comprising abridge 19 between the dies 2 a, 2 b that includes anintegrated waveguide 10 therein. Unless otherwise noted, the components ofFIG. 6 may be the same as or generally similar to like numbered components ofFIGS. 1-5 . For example, inFIG. 6 , the structure can comprise integrated device dies 2 a, 2 b bonded (e.g., directly bonded) to thecarrier 3. However, unlike the embodiments ofFIGS. 1-5 , inFIG. 6 , thebridge 19 can be bonded to the dies 2 a, 2 b onupper surfaces 20, which can be the active surfaces, of the dies 2 a, 2 b, which are opposite thelower surfaces 12 and thecarrier 3. Thewaveguide 10 can be provided at least partially in thebridge 19 as shown inFIG. 6 . In some embodiments, thewaveguide 10 can be at least partially (e.g., completely) embedded in thebridge 19, similar to the manner in which thewaveguide 10 is embedded in thecarrier 3 as shown inFIG. 5 . In other embodiments, thewaveguide 10 can be defined by features along both sides of an interface between the dies 2 a, 2 b and thebridge 19, similar to the manner in which thewaveguide 10 is defined inFIGS. 3A-3B . As with the above embodiments, thewaveguide 10 can comprise a metallic channel having an effectively closed profile (e.g., completely closed or including small discontinuities or gaps) and within which a dielectric material is disposed, as viewed along a cross section taken transverse to the propagation direction. In some embodiments, thebridge 19 comprises a semiconductor element, such as an interposer, an integrated device die, etc. In some embodiments, thebridge 19 may be the waveguide itself, such that thewaveguide 10 spans the gap between the dies 2 a, 2 b. In other embodiments, the waveguide can be provided directly across the dies, instead of embedding it in a bridge structure. -
FIGS. 7A-7D illustrate various devices that can be constructed utilizing thewaveguides 10 disclosed herein. As explained above, thewaveguides 10 utilized inFIGS. 7A-7D can comprise effectively closed metallic channels (e.g., completely closed or with discontinuities or gaps that are small compared to the electromagnetic wavelengths to be communicated therethrough). Thewaveguides 10 utilized inFIGS. 7A-7D can be defined along an interface between two elements (such as between a die and a carrier, as inFIGS. 3A-3C ), or can be at least partially embedded in one element (similar to the embodiment ofFIG. 5 ).FIG. 7A is a top plan view of apower divider 30 that incorporates any of thewaveguide structures 10 described above. Thepower divider 30 can comprisewaveguide structures 10 disposed in or on an element (such as a substrate, interposer, integrated device die, etc.). Thewaveguide 10 can comprise aprimary channel 31 that splits into a plurality of dividedchannels 32 a, 32 b at ajunction 33. Dividedchannels waveguides 10 disclosed herein. The power divider based on the integrated waveguide structures disclosed herein may function in a manner similar to conventional planar power dividers based on microstrips or striplines. However, beneficially, the embodiments disclosed herein can provide lower losses and better performance at higher frequencies. Thewaveguide 10 may broaden out at the dividedchannels 32 a, 32 b. Thepower divider 30 can divide or split the power of the electromagnetic waves that propagate along thewaveguide 10. -
FIG. 7B is a top plan view of acoupler 40 that incorporates thewaveguides 10 described herein. Thecoupler 40 can comprise one ormore waveguides 10 disposed in or on an element (such as a substrate, interposer, integrated device die, etc.). Thewaveguide 10 can comprise first and second longitudinal arms 41 a, 41 b that are spaced apart from one another, e.g., by a quarter wavelength. As shown inFIG. 7B , the arms 41 a, 41 b can be connected by connector waveguides 42 a, 42 b. The connector waveguides 42 a, 42 b can be spaced apart from one another, e.g., by a quarter wavelength. During operation, electromagnetic waves can propagate along the longitudinal arms 41 a, 41 b of thewaveguide 10. The waves propagating along one of the arms 41 a, 41 b can couple to the waves propagating along the other of the arms 41 a, 41 b, by propagating along the connector waveguides 42 a, 42 b. The coupler based on the integrated waveguide structures may function in a manner similar to a conventional planar coupler based on microstrips or striplines. However, beneficially, the embodiments disclosed herein may provide lower losses and better performance at higher frequencies. -
FIG. 7C is a top plan view of a circulator 50 that incorporates thewaveguides 10 described herein. Thecirculator 50 can comprise one ormore waveguides 10 disposed in or on an element (such as a substrate, interposer, integrated device die, etc.). Thecirculator 50 can include awaveguide 10 having a curved or circular pathway 51. A first port 52 a can act as an input for coupling electromagnetic radiation into the circular pathway 51. Second andthird ports fourth port 52 d can comprise an isolated port. The circulator based on the integrated waveguide structures disclosed herein may function in a manner similar to a conventional planar circulator based on microstrips or striplines. However, beneficially, the embodiments disclosed herein may provide lower losses and better performance at higher frequencies. -
FIG. 7D is a top plan view of afilter 60 that incorporates thewaveguides 10 disclosed herein. Thefilter 60 can comprise one ormore waveguides 10 disposed in or on an element (such as a substrate, interposer, integrated device die, etc.). Thewaveguide 10 can comprise aninput line 71 a and anoutput line 71 b. A plurality of ring-shaped elements 72 a, 72 b can be provide between the input andoutput lines input line 71 a can electromagnetically couple with the ring-shaped element 72 a. The ring-shaped element 72 a can couple with the ring-shaped element 72 b, which can in turn electromagnetically couple with theoutput line 71 b. Selected wavelength(s) of radiation propagating along theinput line 71 a can be filtered by the ring-shaped elements 72 a, 72 b, such that only the selected wavelength(s) are transmitted to theoutput line 71 b. The filter based on the integrated waveguide structures disclosed herein may function in a manner similar to a conventional planar filter based on microstrips or striplines. However, beneficially, the embodiments disclosed herein may provide lower losses and better performance at higher frequencies. - Thus, as shown in
FIGS. 7A-7D , thewaveguides 10 disclosed herein inFIGS. 1-6 can be shaped in plan view in any suitable manner so as to define various components that have different electrical functionalities. Thewaveguides 10 may accordingly be bent, angled, or curved, as seen from a top view. Moreover, thewaveguides 10 can comprise multiple components that interact with one another to define various types of devices. -
FIG. 8 is a schematic system diagram of anelectronic system 80 incorporating one or more structures 1, according to various embodiments. Thesystem 80 can comprise any suitable type of electronic device, such as a mobile electronic device (e.g., a smartphone, a tablet computing device, a laptop computer, etc.), a desktop computer, an automobile or components thereof, a stereo system, a medical device, a camera, or any other suitable type of system. In some embodiments, theelectronic system 80 can comprise a microprocessor, a graphics processor, an electronic recording device, or digital memory. Thesystem 80 can include one or more device packages 82 which are mechanically and electrically connected to thesystem 80, e.g., by way of one or more motherboards. Eachpackage 82 can comprise one or more structures 1. Thesystem 80 shown inFIG. 8 can comprise any of the structures 1 shown and described herein. - In one embodiment, a structure is disclosed. The structure can include a first element and a carrier bonded to the first element along an interface. The structure can include a waveguide defined at least in part along the interface between the first element and the carrier. The waveguide can comprise an effectively closed metallic channel and a dielectric material within the effectively closed metallic channel as viewed from a side cross-section of the structure.
- In another embodiment, a structure is disclosed. The structure can include a semiconductor element having a waveguide at least partially embedded therein. The waveguide can comprise an effectively closed metallic channel and a dielectric material within the effectively closed metallic channel as viewed from a side cross-section of the structure. The structure can include a first port extending through the effectively closed metallic channel to an exterior surface of the semiconductor element. The first port can be configured to couple to a radiating element to transmit electromagnetic radiation to, or to receive electromagnetic radiation from, the waveguide.
- In another embodiment, a method of forming a structure is disclosed. The method can include providing a first element and a carrier. The first element can comprise first metallic features and first dielectric features exposed on an exterior surface of the first element. The carrier can comprise second metallic features and second dielectric features exposed on an exterior surface of the carrier. The method can include bonding the first element to the carrier along an interface to bond the first metallic features and the second metallic features and to bond the first dielectric features and the second dielectric features. The bonded first element and carrier can define a waveguide at least in part along the interface between the first element and the carrier. The waveguide can comprise an effectively closed metallic channel and a dielectric material within the effectively closed metallic channel as viewed from a side cross-section of the structure.
- For purposes of summarizing the disclosed embodiments and the advantages achieved over the prior art, certain objects and advantages have been described herein. Of course, it is to be understood that not necessarily all such objects or advantages may be achieved in accordance with any particular embodiment. Thus, for example, those skilled in the art will recognize that the disclosed implementations may be embodied or carried out in a manner that achieves or optimizes one advantage or group of advantages as taught or suggested herein without necessarily achieving other objects or advantages as may be taught or suggested herein.
- All of these embodiments are intended to be within the scope of this disclosure. These and other embodiments will become readily apparent to those skilled in the art from the following detailed description of the embodiments having reference to the attached figures, the claims not being limited to any particular embodiment(s) disclosed. Although this certain embodiments and examples have been disclosed herein, it will be understood by those skilled in the art that the disclosed implementations extend beyond the specifically disclosed embodiments to other alternative embodiments and/or uses and obvious modifications and equivalents thereof. In addition, while several variations have been shown and described in detail, other modifications will be readily apparent to those of skill in the art based upon this disclosure. It is also contemplated that various combinations or sub-combinations of the specific features and aspects of the embodiments may be made and still fall within the scope. It should be understood that various features and aspects of the disclosed embodiments can be combined with, or substituted for, one another in order to form varying modes of the disclosed implementations. Thus, it is intended that the scope of the subject matter herein disclosed should not be limited by the particular disclosed embodiments described above, but should be determined only by a fair reading of the claims that follow.
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