US20160238635A1 - Offset voltage compensation - Google Patents
Offset voltage compensation Download PDFInfo
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- US20160238635A1 US20160238635A1 US14/625,038 US201514625038A US2016238635A1 US 20160238635 A1 US20160238635 A1 US 20160238635A1 US 201514625038 A US201514625038 A US 201514625038A US 2016238635 A1 US2016238635 A1 US 2016238635A1
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- bridge
- offset voltage
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R17/00—Measuring arrangements involving comparison with a reference value, e.g. bridge
- G01R17/02—Arrangements in which the value to be measured is automatically compared with a reference value
- G01R17/06—Automatic balancing arrangements
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R33/00—Arrangements or instruments for measuring magnetic variables
- G01R33/0017—Means for compensating offset magnetic fields or the magnetic flux to be measured; Means for generating calibration magnetic fields
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R17/00—Measuring arrangements involving comparison with a reference value, e.g. bridge
- G01R17/10—AC or DC measuring bridges
- G01R17/105—AC or DC measuring bridges for measuring impedance or resistance
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R33/00—Arrangements or instruments for measuring magnetic variables
- G01R33/0023—Electronic aspects, e.g. circuits for stimulation, evaluation, control; Treating the measured signals; calibration
- G01R33/0029—Treating the measured signals, e.g. removing offset or noise
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R33/00—Arrangements or instruments for measuring magnetic variables
- G01R33/02—Measuring direction or magnitude of magnetic fields or magnetic flux
- G01R33/06—Measuring direction or magnitude of magnetic fields or magnetic flux using galvano-magnetic devices
- G01R33/09—Magnetoresistive devices
- G01R33/098—Magnetoresistive devices comprising tunnel junctions, e.g. tunnel magnetoresistance sensors
Definitions
- a Wheatstone bridge is an electrical circuit used to measure an unknown electrical resistance by balancing two branches of the bridge, one branch of which includes the unknown resistance.
- the bridge offset voltage needs to be calibrated on the chip.
- the bridge offset voltage exhibits a temperature coefficient which might lead to significant offsets at temperatures different from the temperature at which the bridge offset voltage was calibrated.
- FIG. 1A illustrates a tunnel magnetoresistance (TMR) stack.
- FIG. 1B illustrates a TMR resistor
- FIG. 1C illustrates a bottom electrode resistor
- FIG. 2A illustrates a circuit for compensating for a bridge offset voltage in a full bridge using laser fuses.
- FIG. 2B illustrates a circuit for compensating for a bridge offset voltage in a half bridge using laser fuses.
- FIG. 3 illustrates a circuit for compensating for a bridge offset voltage and a temperature coefficient.
- FIG. 4 illustrates a circuit, showing a full bridge circuit, for compensating for a bridge offset voltage, or for a bridge offset voltage and a temperature coefficient.
- FIG. 5 illustrates a circuit for compensating for a bridge offset voltage using contact pads.
- FIG. 6A illustrates a flowchart of a method for compensating for a bridge offset voltage in a full bridge.
- FIG. 6B illustrates a flowchart of a method for compensating for a bridge offset voltage in a half bridge.
- the present disclosure is directed to a TMR resistor cascade used to compensate for a bridge offset voltage.
- a resistance adjustment of the TMR resistor cascade may be accomplished using laser fuses, or alternatively, by switches or by shorting individual TMR resistors of the cascade. Additionally, a combination of the TMR resistor cascade and a bottom electrode resistor cascade having opposing temperature coefficients may be used to result in an offset voltage compensation having a temperature coefficient of zero or substantially close to zero.
- FIGS. 1A-1C illustrate basic components used to compensate for bridge offset voltage as disclosed herein.
- FIG. 1A illustrates a tunnel magnetoresistance (TMR) stack 100 A.
- the TMR stack 100 A comprises a bottom electrode 110 A with ferromagnetic properties and a top electrode 130 A with ferromagnetic properties, between which is a tunneling barrier 120 A.
- the conductance of the tunneling barrier 120 A varies depending on whether the top and bottom electrodes 110 A, 130 A are in parallel or anti-parallel with respect to their magnetic properties.
- FIG. 1B illustrates a TMR resistor 100 B. Similar to the TMR stack 100 A, the TMR resistor 100 B comprises a ferromagnetic bottom electrode 110 B and a ferromagnetic top electrode 130 B, between which is a tunneling barrier 120 B. For the TMR resistor 100 B, though, the top electrode 130 B is etched using a standard TMR etch process to define a magnetically active area.
- the TMR resistor 100 B has a negative temperature coefficient nTk, which means that that with increasing temperature its tunneling resistance decreases. The temperature coefficient may be approximately ⁇ 0.1%/K.
- FIG. 1C illustrates a bottom electrode resistor 100 C.
- the bottom electrode resistor 100 C comprises a ferromagnetic bottom electrode 110 C and a tunneling barrier 120 C. Contrary to the TMR resistor 100 B, the bottom electrode resistor 100 C has a positive temperature coefficient pTk, which means that with increasing temperature its resistance increases.
- the positive temperature coefficient pTk may be approximately +0.1%/K.
- the bridge offset voltage compensation of this disclosure takes advantage of the usual structuring method of the TMR stack 100 A that is performed in two steps.
- the top electrode 130 is etched down to the tunneling barrier 120 to define sensor layer geometry.
- the ferromagnetic bottom electrode 110 is structured in a further etch process.
- the etch process of the first step stops below the tunneling barrier 120 in or within the ferromagnetic bottom electrode 110 as shown in FIG. 1C .
- FIG. 2A illustrates a circuit 200 A for compensating for the bridge offset voltage in a full bridge, but without compensating for temperature coefficient Tk.
- the bridge offset voltage compensation circuit 200 A comprises a Wheatstone bridge, a TMR resistor cascade 220 A, and a laser fuse circuit 230 A.
- the Wheatstone bridge comprises a first branch circuit 210 and a second branch circuit (not shown) coupled in parallel.
- the first branch circuit 210 may include a first TMR resistor 211 and a second TMR resistor 212 coupled in series, between which is an output voltage point V out1 . Only the first branch circuit 210 of the Wheatstone bridge is shown for the sake of simplicity.
- the second branch circuit includes two TMR resistors coupled in series with an output voltage point between, as is shown in FIG. 4 and described below.
- the TMR resistor cascade 220 A is coupled in series with the first branch circuit 210 , and is configured to provide a resistance to compensate for the bridge offset voltage.
- the TMR resistor cascade 220 A in this example comprises eight TMR resistors, represented with references A, 2 A, 4 A, 8 A, 16 A, 32 A, 64 A, and 128 A having resistances R, R/2, R/4, R/8, R/16, R/32, R/64, and R/128, respectively, where R represents a resistance value.
- the TMR resistor cascade 220 A is configured to have a doubling of the area size, that is, a halfening of the resistance from resistor to resistor.
- the resistance is defined by the size of the top electrode 130 , with the larger the size, the larger the current, and the lower the resistance.
- the thickness of the tunneling barrier 120 of the resistors of the TMR resistor cascade 220 A is the same as that of the first and second TMR resistors 211 , 212 .
- the TMR resistor cascade 220 A having eight TMR resistors is not meant to be limiting. There may be any number of TMR resistors as suitable for the intended purpose. Also, a halfening of the resistance from resistor to resistor is also not required.
- the second branch circuit similarly has coupled in series a second cascade of TMR resistors, and is also configured to provide a resistance offset to compensate for the bridge offset voltage.
- the laser fuse circuit 230 A is coupled in parallel to the TMR resistor cascade 220 A.
- the laser fuse circuit 230 A comprises a low ohmic metal line 239 , which is coupled to a voltage source VDD, and a plurality of laser fuses 231 - 238 .
- the laser fuses 231 - 238 correspond with the TMR resistors 128 A, 64 A, 32 A, 16 A, 8 A, 4 A, 2 A, and A, respectively, and are configured to adjust the resistance of the TMR resistor cascade 220 A.
- individual laser fuses 231 - 238 are configured to break the low ohmic metal line 239 at predetermined locations to force current through a defined current flow path through the TMR resistor cascade 220 A.
- any resistance between zero and 2R ⁇ R/128 can be realized with a resolution of R/128.
- the laser fuse circuit 230 A may alternatively be replaced with a low ohmic switch circuit.
- the low ohmic switch circuit comprises the low ohmic metal line 239 and a plurality of switches as monolithically integrated semiconductor switches in place of the plurality of laser fuses 231 - 238 .
- FIG. 2B illustrates a circuit 200 B for compensating for a bridge offset voltage in a half bridge using laser fuses.
- Circuit 200 B is similar to circuit 200 A of FIG. 2A , with the addition that a further TMR resistor cascade 220 B, with corresponding laser fuse circuit 230 B, is coupled in series between the GND terminal and the TMR resistor 212 .
- this circuit 200 B an offset compensation of a Wheatstone half-bridge configuration is enabled.
- the laser fuse circuit 230 B may alternatively be replaced with a low ohmic switch circuit.
- FIG. 3 illustrates a circuit 300 for compensating for the bridge offset voltage, with an additional compensation for temperature coefficient Tk.
- the bridge offset voltage compensation circuit 300 comprises a Wheatstone bridge and a TMR resistor cascade 220 A, as described above with respect to FIG. 2A , but now additionally includes a bottom electrode resistor cascade 340 .
- the bottom electrode resistor cascade 340 is coupled in series with the TMR resistor cascade 220 A.
- the bottom electrode resistor cascade 340 in this example comprises eight bottom electrode resistors having resistances R, R/2, R/4, R/8, R/16, R/32, R/64, and R/128, where R represents a resistance value.
- the bottom electrode resistor cascade 340 is configured to have a doubling of the width at a certain length, that is, a halfening of the resistance from resistor to resistor.
- the disclosure is not limited to the bottom electrode resistor cascade 340 having eight resistors and/or a halfening of the resistance from resistor to resistor, but may be configured as suitable for the intended purpose.
- the laser fuse circuit 330 includes the laser fuses 231 - 238 of FIG. 2A , and additionally includes laser fuses 331 - 338 to correspond with the bottom electrode resistors of the bottom electrode resistor cascade 340 .
- the TMR resistor cascade 220 A has a negative temperature coefficient nTk, and the bottom electrode resistor cascade 340 has a positive temperature coefficient pTk, as described above.
- the resistance values of the cascades 220 A, 340 to be adjusted to compensate for the bridge offset voltage can be calculated by first calculating a variable ⁇ in accordance with the following Equation 1:
- Tk_Offset target is the measured temperature coefficient Tk of the offset voltage which is to be compensated.
- Tk_R TMR and Tk_R Bottom denote the temperature coefficient of resistance of the TMR resistor cascade 220 A and bottom electrode resistor cascade 340 , respectively.
- R Bottom and R TMR denote the resistances to be adjusted by laser fusing for the TMR resistor cascade 220 A and bottom electrode resistor cascade 340 , respectively.
- R Corr is a resistance needed to compensate for the offset voltage of the bridge circuit.
- Any compensation resistance between zero and 2R ⁇ R/128 may be realized with any temperature coefficient offset Tk_Offset between Tk_R TMR and Tk_R Bottom to achieve a bridge offset voltage compensation having a temperature coefficient Tk of zero or substantially close to zero.
- the magnitudes of the resistances of the TMR resistor cascade 220 A and the bottom electrode resistor cascade 340 are substantially equal.
- the opposing temperature coefficients Tk of the TMR resistor cascade 220 A and the bottom electrode resistor cascade 340 results in a bridge offset voltage compensation with a temperature coefficient Tk of zero or substantially close to zero.
- the second branch circuit similarly has coupled in series a second cascade of TMR resistors and a second cascade of bottom electrode resistors, and is also configured to provide a resistance offset to compensate for the bridge offset voltage with an additional compensation for temperature coefficient Tk.
- circuit 300 is described as compensating for the bridge offset voltage and with an additional compensation for temperature coefficient Tk with respect to a full bridge.
- the concepts of circuit 300 are also applicable to a half bridge by the addition of a further TMR resistor cascade and a further bottom electrode resistor cascade coupled in series between the GND terminal and the TMR resistor 212 , in a similar manner as described above with respect to the half bridge of the circuit 200 B of FIG. 2B .
- FIG. 4 illustrates a circuit 400 for compensating for a bridge offset voltage, or for a bridge offset voltage and a temperature coefficient.
- Circuit 400 shows a full Wheatstone bridge 420 , as opposed to only the half shown in FIGS. 2 and 3 .
- the Wheatstone bridge 420 comprises a first branch circuit 210 and a second branch circuit 410 coupled in parallel.
- the first branch circuit 210 comprises TMR resistor 211 coupled to TMR resistor 212 , between which is output voltage point V OUT1 .
- the second branch circuit 410 comprises TMR resistor 413 coupled to TMR resistor 414 , between which is output voltage point V OUT2 .
- a voltage difference between output voltage points V OUT1 and V OUT2 represents the bridge offset voltage.
- a first cascade of resistors 430 is coupled in series with the first branch circuit 210 .
- This first cascade of resistors 430 may include the TMR resistor cascade 220 A, or alternatively, a combination of the TMR resistor cascade 220 A and the bottom electrode resistor cascade 340 , as described above with respect to FIGS. 2A and 3 , respectively.
- the second cascade of resistors 440 is coupled in series with the second branch circuit 410 , and is configured similarly as the first cascade of resistors 430 .
- the bridge offset voltage can be reduced by increasing the resistance of the second cascade 440 , which is serially coupled to the TMR resistor 413 .
- the bridge offset voltage can be reduced by increasing the resistance of the first cascade 430 , which is serially coupled to the TMR resistor 211 .
- each of the first and second cascades 430 , 440 includes the combination of the TMR resistor cascade 220 A and the bottom electrode resistor cascade 340 , then the temperature coefficient Tk can also be reduced to zero or substantially close to zero.
- FIG. 5 illustrates a circuit 500 for compensating for a bridge offset voltage using contact pads.
- This offset voltage compensation circuit 500 is similar to the offset voltage compensation circuit 200 A of FIG. 2A , except that in place of the laser fuse circuit 230 , there are a plurality of contact pads 530 ( 531 - 539 ) coupled between the respective TMR resistors of the TMR resistor cascade 220 A.
- a TMR resistor can be shorted by applying a voltage above a breakdown voltage V BD across its top and bottom electrodes 130 B, 1106 .
- the tunneling barrier 120 B is destroyed and shorted permanently, resulting in the TMR resistor having a low resistance.
- the contact pads 531 - 539 may be used to short any of the TMR resistors of the TMR resistor cascade 220 A, thereby adjusting the resistance of the TMR resistor cascade 220 A in an electrical manner. For example, when a voltage greater than the breakdown voltage V BD is applied to contact pads 538 and 539 , the first TMR resistor R is shorted, thereby reducing the resistance of the TMR resistor cascade 220 A by R. Using this method, it is possible to compensate for the bridge offset voltage in an electrical manner without the use of a laser or switch.
- the second branch circuit similarly has coupled in series a second cascade of TMR resistors, and is also configured to provide a resistance offset to compensate for the bridge offset voltage.
- circuit 500 is described as compensating for the bridge offset voltage with respect to a full bridge.
- the concepts of circuit 500 are also applicable to a half bridge by the addition of a further TMR resistor cascade coupled in series between the GND terminal and the TMR resistor 212 , in a similar manner as described above with respect to the half bridge of the circuit 200 B of FIG. 2B .
- FIG. 6A illustrates a flowchart 600 A of a method for compensating for a bridge offset voltage in a full bridge.
- a Wheatstone bridge 420 having a first branch circuit 210 and a second branch circuit 410 coupled in parallel is provided.
- a first resistor cascade 430 is coupled in series with the first branch circuit 210 .
- a second resistor cascade 440 is coupled in series with the second branch circuit 410 .
- Step 640 A a bridge offset voltage of the Wheatstone bridge 420 is measured.
- This measuring step 640 A may be performed using the calculations described above with respect to FIG. 3 .
- the resistance of at least one of the first and second resistor cascades 430 , 440 is configured, based on the measured bridge offset voltage, to provide a resistance to compensate for the bridge offset voltage.
- the bridge circuit is shown as a Wheatstone bridge, though the disclosure is not limited in this respect.
- the disclosure is applicable to any circuit where the resistance needs to be adjusted to a high accuracy.
- the bridge circuit may be comprised within a sensor, such as a sensor found in an automobile, though the disclosure is not limited in this respect.
- FIG. 6B illustrates a flowchart 600 B of a method for compensating for a bridge offset voltage in a half bridge.
- Step 610 B a half bridge circuit having a branch circuit 210 is provided.
- a TMR resistor cascade 220 B is coupled in series with the branch circuit 210 .
- Step 640 B a bridge offset voltage of the branch circuit 210 is measured. This measuring step 640 B may be performed using the calculations described above with respect to FIG. 3 .
- the resistance of the TMR resistor cascade 220 B is configured, based on the measured bridge offset voltage, to provide a resistance to compensate for the bridge offset voltage.
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Abstract
A bridge offset voltage compensation method and circuit having a bridge circuit and a tunnel magnetoresistance (TMR) resistor cascade. The bridge circuit includes a branch circuit. The TMR resistor cascade is coupled in series with the branch circuit, and is configured to provide a resistance to compensate for a bridge offset voltage of the bridge circuit.
Description
- A Wheatstone bridge is an electrical circuit used to measure an unknown electrical resistance by balancing two branches of the bridge, one branch of which includes the unknown resistance. In order to obtain an optimum performance when the Wheatstone bridge is used in a sensor, such as an angle sensor, the bridge offset voltage needs to be calibrated on the chip. Usually the bridge offset voltage exhibits a temperature coefficient which might lead to significant offsets at temperatures different from the temperature at which the bridge offset voltage was calibrated.
-
FIG. 1A illustrates a tunnel magnetoresistance (TMR) stack. -
FIG. 1B illustrates a TMR resistor. -
FIG. 1C illustrates a bottom electrode resistor. -
FIG. 2A illustrates a circuit for compensating for a bridge offset voltage in a full bridge using laser fuses. -
FIG. 2B illustrates a circuit for compensating for a bridge offset voltage in a half bridge using laser fuses. -
FIG. 3 illustrates a circuit for compensating for a bridge offset voltage and a temperature coefficient. -
FIG. 4 illustrates a circuit, showing a full bridge circuit, for compensating for a bridge offset voltage, or for a bridge offset voltage and a temperature coefficient. -
FIG. 5 illustrates a circuit for compensating for a bridge offset voltage using contact pads. -
FIG. 6A illustrates a flowchart of a method for compensating for a bridge offset voltage in a full bridge. -
FIG. 6B illustrates a flowchart of a method for compensating for a bridge offset voltage in a half bridge. - The present disclosure is directed to a TMR resistor cascade used to compensate for a bridge offset voltage. A resistance adjustment of the TMR resistor cascade may be accomplished using laser fuses, or alternatively, by switches or by shorting individual TMR resistors of the cascade. Additionally, a combination of the TMR resistor cascade and a bottom electrode resistor cascade having opposing temperature coefficients may be used to result in an offset voltage compensation having a temperature coefficient of zero or substantially close to zero.
-
FIGS. 1A-1C illustrate basic components used to compensate for bridge offset voltage as disclosed herein. -
FIG. 1A illustrates a tunnel magnetoresistance (TMR)stack 100A. TheTMR stack 100A comprises a bottom electrode 110A with ferromagnetic properties and atop electrode 130A with ferromagnetic properties, between which is atunneling barrier 120A. As is known, the conductance of thetunneling barrier 120A varies depending on whether the top andbottom electrodes 110A, 130A are in parallel or anti-parallel with respect to their magnetic properties. -
FIG. 1B illustrates aTMR resistor 100B. Similar to theTMR stack 100A, theTMR resistor 100B comprises a ferromagnetic bottom electrode 110B and aferromagnetic top electrode 130B, between which is atunneling barrier 120B. For theTMR resistor 100B, though, thetop electrode 130B is etched using a standard TMR etch process to define a magnetically active area. TheTMR resistor 100B has a negative temperature coefficient nTk, which means that that with increasing temperature its tunneling resistance decreases. The temperature coefficient may be approximately −0.1%/K. -
FIG. 1C illustrates abottom electrode resistor 100C. Thebottom electrode resistor 100C comprises a ferromagnetic bottom electrode 110C and atunneling barrier 120C. Contrary to theTMR resistor 100B, thebottom electrode resistor 100C has a positive temperature coefficient pTk, which means that with increasing temperature its resistance increases. The positive temperature coefficient pTk may be approximately +0.1%/K. - The bridge offset voltage compensation of this disclosure takes advantage of the usual structuring method of the
TMR stack 100A that is performed in two steps. In the first step, the top electrode 130 is etched down to the tunneling barrier 120 to define sensor layer geometry. In the second step, the ferromagnetic bottom electrode 110 is structured in a further etch process. In a single deposition structuring process it is therefore possible to define both theTMR resistor 100B, as shown inFIG. 1B , and the ferromagneticbottom electrode resistor 100C, as shown inFIG. 1C . In another embodiment, the etch process of the first step stops below the tunneling barrier 120 in or within the ferromagnetic bottom electrode 110 as shown inFIG. 1C . -
FIG. 2A illustrates acircuit 200A for compensating for the bridge offset voltage in a full bridge, but without compensating for temperature coefficient Tk. - The bridge offset
voltage compensation circuit 200A comprises a Wheatstone bridge, aTMR resistor cascade 220A, and alaser fuse circuit 230A. - The Wheatstone bridge comprises a
first branch circuit 210 and a second branch circuit (not shown) coupled in parallel. Thefirst branch circuit 210 may include afirst TMR resistor 211 and asecond TMR resistor 212 coupled in series, between which is an output voltage point Vout1. Only thefirst branch circuit 210 of the Wheatstone bridge is shown for the sake of simplicity. Like thefirst branch circuit 210, the second branch circuit includes two TMR resistors coupled in series with an output voltage point between, as is shown inFIG. 4 and described below. - The
TMR resistor cascade 220A is coupled in series with thefirst branch circuit 210, and is configured to provide a resistance to compensate for the bridge offset voltage. TheTMR resistor cascade 220A in this example comprises eight TMR resistors, represented with references A, 2A, 4A, 8A, 16A, 32A, 64A, and 128A having resistances R, R/2, R/4, R/8, R/16, R/32, R/64, and R/128, respectively, where R represents a resistance value. TheTMR resistor cascade 220A is configured to have a doubling of the area size, that is, a halfening of the resistance from resistor to resistor. The resistance is defined by the size of the top electrode 130, with the larger the size, the larger the current, and the lower the resistance. The thickness of the tunneling barrier 120 of the resistors of theTMR resistor cascade 220A is the same as that of the first andsecond TMR resistors - The
TMR resistor cascade 220A having eight TMR resistors is not meant to be limiting. There may be any number of TMR resistors as suitable for the intended purpose. Also, a halfening of the resistance from resistor to resistor is also not required. - While not shown, the second branch circuit similarly has coupled in series a second cascade of TMR resistors, and is also configured to provide a resistance offset to compensate for the bridge offset voltage.
- The
laser fuse circuit 230A is coupled in parallel to theTMR resistor cascade 220A. Thelaser fuse circuit 230A comprises a lowohmic metal line 239, which is coupled to a voltage source VDD, and a plurality of laser fuses 231-238. The laser fuses 231-238 correspond with theTMR resistors TMR resistor cascade 220A. More specifically, if additional resistance is required to compensate for the bridge offset voltage, individual laser fuses 231-238 are configured to break the lowohmic metal line 239 at predetermined locations to force current through a defined current flow path through theTMR resistor cascade 220A. In this example, any resistance between zero and 2R−R/128 can be realized with a resolution of R/128. - The
laser fuse circuit 230A may alternatively be replaced with a low ohmic switch circuit. The low ohmic switch circuit comprises the lowohmic metal line 239 and a plurality of switches as monolithically integrated semiconductor switches in place of the plurality of laser fuses 231-238. -
FIG. 2B illustrates acircuit 200B for compensating for a bridge offset voltage in a half bridge using laser fuses.Circuit 200B is similar tocircuit 200A ofFIG. 2A , with the addition that a furtherTMR resistor cascade 220B, with correspondinglaser fuse circuit 230B, is coupled in series between the GND terminal and theTMR resistor 212. In thiscircuit 200B, an offset compensation of a Wheatstone half-bridge configuration is enabled. Similar to thecircuit 200A ofFIG. 2A , thelaser fuse circuit 230B may alternatively be replaced with a low ohmic switch circuit. -
FIG. 3 illustrates acircuit 300 for compensating for the bridge offset voltage, with an additional compensation for temperature coefficient Tk. - The bridge offset
voltage compensation circuit 300 comprises a Wheatstone bridge and aTMR resistor cascade 220A, as described above with respect toFIG. 2A , but now additionally includes a bottomelectrode resistor cascade 340. - The bottom
electrode resistor cascade 340 is coupled in series with theTMR resistor cascade 220A. The bottomelectrode resistor cascade 340 in this example comprises eight bottom electrode resistors having resistances R, R/2, R/4, R/8, R/16, R/32, R/64, and R/128, where R represents a resistance value. Similar to theTMR resistor cascade 220A, the bottomelectrode resistor cascade 340 is configured to have a doubling of the width at a certain length, that is, a halfening of the resistance from resistor to resistor. The disclosure is not limited to the bottomelectrode resistor cascade 340 having eight resistors and/or a halfening of the resistance from resistor to resistor, but may be configured as suitable for the intended purpose. - The
laser fuse circuit 330 includes the laser fuses 231-238 ofFIG. 2A , and additionally includes laser fuses 331-338 to correspond with the bottom electrode resistors of the bottomelectrode resistor cascade 340. - The
TMR resistor cascade 220A has a negative temperature coefficient nTk, and the bottomelectrode resistor cascade 340 has a positive temperature coefficient pTk, as described above. The resistance values of thecascades -
- where Tk_Offsettarget is the measured temperature coefficient Tk of the offset voltage which is to be compensated. Further, Tk_RTMR and Tk_RBottom denote the temperature coefficient of resistance of the
TMR resistor cascade 220A and bottomelectrode resistor cascade 340, respectively. - If the sign of the coefficient α is negative, then
-
R Bottom =α·R corr -
R TMR=(1−α)·R Corr (Equations 2A and 2B) - where RBottom and RTMR denote the resistances to be adjusted by laser fusing for the
TMR resistor cascade 220A and bottomelectrode resistor cascade 340, respectively. RCorr is a resistance needed to compensate for the offset voltage of the bridge circuit. - Alternatively, if the sign of the coefficient α is positive, then
-
R TMR =α·R corr -
R Bottom=(1−α)·R Corr (Equations 3A and 3B) - Any compensation resistance between zero and 2R−R/128 may be realized with any temperature coefficient offset Tk_Offset between Tk_RTMR and Tk_RBottom to achieve a bridge offset voltage compensation having a temperature coefficient Tk of zero or substantially close to zero.
- It is advantageous if the magnitudes of the resistances of the
TMR resistor cascade 220A and the bottomelectrode resistor cascade 340 are substantially equal. In such a case, the opposing temperature coefficients Tk of theTMR resistor cascade 220A and the bottomelectrode resistor cascade 340 results in a bridge offset voltage compensation with a temperature coefficient Tk of zero or substantially close to zero. - While not shown, the second branch circuit similarly has coupled in series a second cascade of TMR resistors and a second cascade of bottom electrode resistors, and is also configured to provide a resistance offset to compensate for the bridge offset voltage with an additional compensation for temperature coefficient Tk.
- Further, the
circuit 300 is described as compensating for the bridge offset voltage and with an additional compensation for temperature coefficient Tk with respect to a full bridge. The concepts ofcircuit 300 are also applicable to a half bridge by the addition of a further TMR resistor cascade and a further bottom electrode resistor cascade coupled in series between the GND terminal and theTMR resistor 212, in a similar manner as described above with respect to the half bridge of thecircuit 200B ofFIG. 2B . -
FIG. 4 illustrates acircuit 400 for compensating for a bridge offset voltage, or for a bridge offset voltage and a temperature coefficient.Circuit 400 shows afull Wheatstone bridge 420, as opposed to only the half shown inFIGS. 2 and 3 . - The
Wheatstone bridge 420 comprises afirst branch circuit 210 and asecond branch circuit 410 coupled in parallel. Thefirst branch circuit 210 comprisesTMR resistor 211 coupled toTMR resistor 212, between which is output voltage point VOUT1. Thesecond branch circuit 410 comprisesTMR resistor 413 coupled toTMR resistor 414, between which is output voltage point VOUT2. As is known, a voltage difference between output voltage points VOUT1 and VOUT2 represents the bridge offset voltage. - A first cascade of
resistors 430 is coupled in series with thefirst branch circuit 210. This first cascade ofresistors 430 may include theTMR resistor cascade 220A, or alternatively, a combination of theTMR resistor cascade 220A and the bottomelectrode resistor cascade 340, as described above with respect toFIGS. 2A and 3 , respectively. Similarly, the second cascade ofresistors 440 is coupled in series with thesecond branch circuit 410, and is configured similarly as the first cascade ofresistors 430. - If, by way of example, a bridge offset voltage is caused by the resistance of the
TMR resistor 414 being too high, then the bridge offset voltage can be reduced by increasing the resistance of thesecond cascade 440, which is serially coupled to theTMR resistor 413. And if, for example, the bridge offset voltage is caused by a resistance of theTMR resistor 212 being too high, then the bridge offset voltage can be reduced by increasing the resistance of thefirst cascade 430, which is serially coupled to theTMR resistor 211. If each of the first andsecond cascades TMR resistor cascade 220A and the bottomelectrode resistor cascade 340, then the temperature coefficient Tk can also be reduced to zero or substantially close to zero. -
FIG. 5 illustrates acircuit 500 for compensating for a bridge offset voltage using contact pads. - This offset
voltage compensation circuit 500 is similar to the offsetvoltage compensation circuit 200A ofFIG. 2A , except that in place of the laser fuse circuit 230, there are a plurality of contact pads 530 (531-539) coupled between the respective TMR resistors of theTMR resistor cascade 220A. - A TMR resistor can be shorted by applying a voltage above a breakdown voltage VBD across its top and
bottom electrodes 130B, 1106. Thetunneling barrier 120B is destroyed and shorted permanently, resulting in the TMR resistor having a low resistance. - The contact pads 531-539 may be used to short any of the TMR resistors of the
TMR resistor cascade 220A, thereby adjusting the resistance of theTMR resistor cascade 220A in an electrical manner. For example, when a voltage greater than the breakdown voltage VBD is applied to contactpads TMR resistor cascade 220A by R. Using this method, it is possible to compensate for the bridge offset voltage in an electrical manner without the use of a laser or switch. - While not shown, the second branch circuit similarly has coupled in series a second cascade of TMR resistors, and is also configured to provide a resistance offset to compensate for the bridge offset voltage.
- Further, the
circuit 500 is described as compensating for the bridge offset voltage with respect to a full bridge. The concepts ofcircuit 500 are also applicable to a half bridge by the addition of a further TMR resistor cascade coupled in series between the GND terminal and theTMR resistor 212, in a similar manner as described above with respect to the half bridge of thecircuit 200B ofFIG. 2B . -
FIG. 6A illustrates aflowchart 600A of a method for compensating for a bridge offset voltage in a full bridge. - At
Step 610A, aWheatstone bridge 420 having afirst branch circuit 210 and asecond branch circuit 410 coupled in parallel is provided. - At
Step 620A, afirst resistor cascade 430 is coupled in series with thefirst branch circuit 210. - At
Step 630A, asecond resistor cascade 440 is coupled in series with thesecond branch circuit 410. - At
Step 640A, a bridge offset voltage of theWheatstone bridge 420 is measured. This measuringstep 640A may be performed using the calculations described above with respect toFIG. 3 . - At
Step 650A, the resistance of at least one of the first and second resistor cascades 430, 440, is configured, based on the measured bridge offset voltage, to provide a resistance to compensate for the bridge offset voltage. - The bridge circuit is shown as a Wheatstone bridge, though the disclosure is not limited in this respect. The disclosure is applicable to any circuit where the resistance needs to be adjusted to a high accuracy. Also, the bridge circuit may be comprised within a sensor, such as a sensor found in an automobile, though the disclosure is not limited in this respect.
-
FIG. 6B illustrates aflowchart 600B of a method for compensating for a bridge offset voltage in a half bridge. - At
Step 610B, a half bridge circuit having abranch circuit 210 is provided. - At
Step 620B, aTMR resistor cascade 220B is coupled in series with thebranch circuit 210. - At
Step 640B, a bridge offset voltage of thebranch circuit 210 is measured. This measuringstep 640B may be performed using the calculations described above with respect toFIG. 3 . - At
Step 650B, the resistance of theTMR resistor cascade 220B is configured, based on the measured bridge offset voltage, to provide a resistance to compensate for the bridge offset voltage. - While the foregoing has been described in conjunction with exemplary embodiment, it is understood that the term “exemplary” is merely meant as an example, rather than the best or optimal. Accordingly, the disclosure is intended to cover alternatives, modifications and equivalents, which may be included within the scope of the disclosure.
- Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that a variety of alternate and/or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the present disclosure. This disclosure is intended to cover any adaptations or variations of the specific embodiments discussed herein.
Claims (20)
1. A bridge offset voltage compensation circuit, comprising:
a bridge circuit having a first branch circuit; and
a tunnel magnetoresistance (TMR) resistor cascade coupled in series with the first branch circuit, and configured to provide a resistance to compensate for a bridge offset voltage of the bridge circuit.
2. The bridge offset voltage compensation circuit of claim 1 , further comprising:
a low ohmic metal line coupled in parallel to the TMR resistor cascade and having fuses,
wherein the fuses are configured to adjust the resistance of the TMR resistor cascade.
3. The bridge offset voltage compensation circuit of claim 2 , wherein the fuses are configured to break the low ohmic metal line at predetermined locations to establish a defined current flow path through the TMR resistor cascade.
4. The bridge offset voltage compensation circuit of claim 1 , further comprising:
a low ohmic metal line coupled in parallel to the TMR resistor cascade and having switching elements,
wherein the switching elements are configured to adjust the resistance of the TMR resistor cascade.
5. The bridge offset voltage compensation circuit of claim 1 , wherein
the TMR resistor cascade is coupled in series between the first branch circuit and a voltage source, and
the bridge offset voltage compensation circuit further comprises a further TMR resistor cascade coupled in series between the first branch circuit and a ground terminal.
6. The bridge offset voltage compensation circuit of claim 1 , wherein the resistance values of respective TMR resistors of the TMR resistor cascade increase by a factor of two.
7. The bridge offset voltage compensation circuit of claim 1 , wherein
the bridge circuit has a second branch circuit coupled in parallel with the first branch circuit, and
bridge offset voltage compensation circuit further comprises a second TMR resistor cascade coupled in series to the second branch circuit, and configured to provide a resistance to compensate for the bridge offset voltage.
8. The bridge offset voltage compensation circuit of claim 7 , wherein the bridge circuit is a Wheatstone bridge.
9. The bridge offset voltage compensation circuit of claim 1 , further comprising:
a plurality of contact pads coupled between respective TMR resistors of the TMR resistor cascade,
wherein the plurality of contact pads are configured to provide an applied voltage that is greater than a breakdown voltage to at least one of the TMR resistors of the TMR resistor cascade to short the at least one of the TMR resistors and lower the resistance of the TMR resistor cascade.
10. The bridge offset voltage compensation circuit of claim 1 , further comprising:
a bottom electrode resistor cascade coupled in series with the TMR resistor cascade,
wherein the TMR resistor cascade has a negative temperature coefficient, and the bottom electrode resistor cascade has a positive temperature coefficient.
11. The bridge offset voltage compensation circuit of claim 10 , wherein a magnitude of the resistance of the TMR resistor cascade and a magnitude of the resistance of the bottom electrode resistor cascade are substantially equal.
12. The bridge offset voltage compensation circuit of claim 10 , wherein the bridge offset voltage has a temperature coefficient of zero or substantially close to zero.
13. A sensor comprising the offset voltage compensation circuit of claim 1 .
14. A bridge offset voltage compensation circuit, comprising:
a bridge circuit having a first branch circuit; and
a first cascade of resistors coupled in series with the first branch circuit and having a positive temperature coefficient; and
a second cascade of resistors coupled in series with the first branch circuit and the first cascade of resistors, and having a negative temperature coefficient,
wherein the first and second cascades of resistors are configured to provide a resistance to compensate for a bridge offset voltage of the bridge circuit, and the bridge offset voltage has a temperature coefficient of zero or substantially close to zero.
15. A method of compensating for a bridge offset voltage, comprising:
providing a bridge circuit having a branch circuit;
providing a tunnel magnetoresistance (TMR) resistor cascade coupled in series with the branch circuit;
measuring a bridge offset voltage of the bridge circuit; and
configuring, based on the measured bridge offset voltage, the resistance of the TMR resistor cascade to compensate for the bridge offset voltage of the bridge circuit.
16. The method of claim 15 ,
further comprising providing a low ohmic metal line coupled in parallel with the TMR resistor cascade, and having fuses,
wherein the configuring step comprises breaking, using the fuses, the low ohmic metal line at predetermined locations to establish a defined current flow path through the TMR resistor cascade.
17. The method of claim 15 ,
further comprising providing, for the TMR resistor cascade, a plurality of contact pads coupled between respective TMR resistors of the TMR resistor cascade,
wherein the configuring step comprises providing, using the plurality of contact pads, a voltage greater than a breakdown voltage to at least one of the TMR resistors to lower the resistance of the TMR resistor cascade.
18. The method of claim 15 ,
further comprising providing a bottom electrode resistor cascade coupled in series with the TMR resistor cascade,
wherein the TMR resistor cascade has a negative temperature coefficient, and the bottom electrode resistor cascade has a positive temperature coefficient.
19. The method of claim 18 ,
further comprising providing a low ohmic metal line coupled in parallel with the TMR resistor cascade and the bottom electrode resistor cascade, wherein the low ohmic metal line has fuses,
wherein the configuring step comprises breaking, using the fuses, the low ohmic metal line at predetermined locations to establish a defined current flow path through the TMR resistor cascade and the bottom electrode resister cascade.
20. The method of claim 15 , wherein the configuring step comprises:
calculating a variable α in accordance with the equation
where Tk_Offsettarget is a measured temperature coefficient of the bridge offset voltage of the bridge circuit, and
if a sign of the variable α is negative, a compensation resistance of the TMR resistor cascade is RTMR=(1−α)·RCorr, and a compensation resistance of the bottom electrode resistor cascade is Rbottom=α·RCorr, and
if the sign of the variable α is positive, the compensation resistance of the TMR resistor cascade is RTMR=α·RCorr, and the compensation resistance of the bottom electrode resistor cascade is Rbottom=(1−α)·RCorr,
where RCorr is a resistance needed to compensate for the bridge offset voltage of the bridge circuit.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
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US14/625,038 US20160238635A1 (en) | 2015-02-18 | 2015-02-18 | Offset voltage compensation |
DE102016102478.3A DE102016102478A1 (en) | 2015-02-18 | 2016-02-12 | Offset voltage compensation |
CN201610090465.XA CN105891577B (en) | 2015-02-18 | 2016-02-18 | Offset voltage compensation |
US15/836,318 US10520556B2 (en) | 2015-02-18 | 2017-12-08 | Offset voltage compensation |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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US14/625,038 US20160238635A1 (en) | 2015-02-18 | 2015-02-18 | Offset voltage compensation |
Related Child Applications (1)
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US15/836,318 Continuation US10520556B2 (en) | 2015-02-18 | 2017-12-08 | Offset voltage compensation |
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US20160238635A1 true US20160238635A1 (en) | 2016-08-18 |
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US14/625,038 Abandoned US20160238635A1 (en) | 2015-02-18 | 2015-02-18 | Offset voltage compensation |
US15/836,318 Active US10520556B2 (en) | 2015-02-18 | 2017-12-08 | Offset voltage compensation |
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US15/836,318 Active US10520556B2 (en) | 2015-02-18 | 2017-12-08 | Offset voltage compensation |
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CN (1) | CN105891577B (en) |
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US20170089940A1 (en) * | 2015-09-29 | 2017-03-30 | Honeywell International Inc. | Amr speed and direction sensor for use with magnetic targets |
US10014014B1 (en) * | 2017-06-14 | 2018-07-03 | International Business Machines Corporation | Magnetic recording apparatus having circuits with differing tunnel valve sensors and about the same resistance |
US10297275B2 (en) | 2016-12-13 | 2019-05-21 | International Business Machines Corporation | Magnetic recording module having differing tunnel valve sensors |
US20210063507A1 (en) * | 2019-08-26 | 2021-03-04 | Western Digital Technologies, Inc. | Magnetic Sensor Array with Different RA TMR Film |
CN113167846A (en) * | 2019-08-27 | 2021-07-23 | 西部数据技术公司 | Magnetic sensor with series resistor for asymmetric sensing field range |
US11385305B2 (en) | 2019-08-27 | 2022-07-12 | Western Digital Technologies, Inc. | Magnetic sensor array with dual TMR film |
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Also Published As
Publication number | Publication date |
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CN105891577A (en) | 2016-08-24 |
CN105891577B (en) | 2019-03-19 |
US10520556B2 (en) | 2019-12-31 |
US20180100900A1 (en) | 2018-04-12 |
DE102016102478A1 (en) | 2016-09-01 |
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