US20150280114A1 - Method to etch non-volatile metal materials - Google Patents
Method to etch non-volatile metal materials Download PDFInfo
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- US20150280114A1 US20150280114A1 US14/325,911 US201414325911A US2015280114A1 US 20150280114 A1 US20150280114 A1 US 20150280114A1 US 201414325911 A US201414325911 A US 201414325911A US 2015280114 A1 US2015280114 A1 US 2015280114A1
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Images
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N50/00—Galvanomagnetic devices
- H10N50/01—Manufacture or treatment
-
- H01L43/12—
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
- C23F1/00—Etching metallic material by chemical means
- C23F1/08—Apparatus, e.g. for photomechanical printing surfaces
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
- C23F1/00—Etching metallic material by chemical means
- C23F1/10—Etching compositions
- C23F1/12—Gaseous compositions
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
- C23F4/00—Processes for removing metallic material from surfaces, not provided for in group C23F1/00 or C23F3/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02551—Group 12/16 materials
- H01L21/02554—Oxides
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
- H10B61/20—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors
- H10B61/22—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors of the field-effect transistor [FET] type
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N50/00—Galvanomagnetic devices
- H10N50/80—Constructional details
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N50/00—Galvanomagnetic devices
- H10N50/80—Constructional details
- H10N50/85—Magnetic active materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/061—Shaping switching materials
- H10N70/063—Shaping switching materials by etching of pre-deposited switching material layers, e.g. lithography
Definitions
- the present invention relates to etching a layer of non volatile materials through a mask during the production of a semiconductor device. More specifically, the present invention relates to etching a metal layers.
- MRAM magnetoresistive random-access memory
- RRAM resistive random-access memory
- MRAM magnetoresistive random-access memory
- a plurality of thin metal layers or films may be sequentially etched.
- MRAM a plurality of thin metal layers may be used to form metal tunneling junction stacks.
- Ion Beam Etching has been used for MRAM patterning to clean the sidewall and maintain the material integrity.
- IBE is limited by the aspect ratio ( ⁇ 2:1) for advanced technology nodes with high pattern density.
- a method of etching a stack with at least one metal layer in one or more cycles is provided.
- An initiation step is preformed, transforming part of the at least one metal layer into metal oxide, metal halide, or lattice damaged metallic sites.
- a reactive step is performed providing one or more cycles, where each cycle comprises providing an organic solvent vapor to form a solvated metal, metal halide, or metal oxide state and providing an organic ligand solvent to form volatile organometallic compounds.
- a desorption of the volatile organometallic compounds is performed.
- a method of etching a MRAM stack with at least one metal layer disposed below a tunneling layer disposed below a mask is provided.
- the tunneling layer is etched.
- a spacer layer is formed over the etched tunneling layer. The spacer is opened.
- the at least one metal layer is etched in one or more cycles with each cycle comprising performing an initiation step, which transforms part of the at least one metal layer into metal oxide, metal halide, or lattice damaged metallic sites, performing a reactive step providing one or more cycles, where each cycle comprises providing an organic solvent vapor to form a solvated metal, metal halide, or metal oxide state and providing an organic ligand solvent to form volatile organometallic compounds, and performing a desorption of the volatile organometallic compounds.
- FIG. 1 is a high level flow chart of an embodiment of the invention.
- FIGS. 2A-H are schematic views of a stack processed according to an embodiment of the invention.
- FIG. 3 is a schematic view of an etch reactor that may be used for etching.
- FIG. 4 illustrates a computer system, which is suitable for implementing a controller used in embodiments of the present invention.
- FIG. 5 is a more detailed flow chart of the reactive step.
- FIGS. 6A-E are schematic views of a MRAM stack processed according to an embodiment of the invention.
- FIG. 1 is a high level flow chart of a process used in an embodiment of the invention.
- a substrate with a stack with at least one metal containing layer is provided (step 104 ).
- An initiation step is provided (step 108 ).
- a reactive step is provided (step 112 ).
- a desorption step is provided (step 116 ).
- FIG. 2A is a cross-sectional view of a stack 200 over a substrate 204 .
- the stack 200 comprises at least one metal layer 208 disposed below a mask 212 .
- the at least one metal layer 208 may comprise one or more metal layers with non-metal layers.
- one or more layers may be disposed between the substrate 204 and the at least one metal layer 208 .
- one or more layers may be disposed between the at least one metal layer 208 and the mask 212 .
- the at least one metal layer 208 is a tantalum as bottom electrode layer under a platinum manganese (PtMn), or CoPt/CoPd layer , which is a fixed magnetic layer in MRAM film stack.
- PtMn platinum manganese
- CoPt/CoPd layer which is a fixed magnetic layer in MRAM film stack.
- FIG. 3 is a schematic view of an etch reactor that may be used in practicing such an embodiment.
- an etch reactor 300 comprises a gas distribution plate 306 providing a gas inlet and a chuck 308 , within an etch chamber 349 , enclosed by a chamber wall 350 .
- a substrate 204 on which the stack is formed is positioned on top of the chuck 308 .
- the chuck 308 may provide a bias from the ESC source 348 as an electrostatic chuck (ESC) for holding the substrate 304 or may use another chucking force to hold the substrate 204 .
- ESC electrostatic chuck
- a heat source 310 such as heat lamps, is provided to heat the metal layer.
- An ion source 324 , a solvent vaporizer 326 , and a ligand vaporizer 328 are connected to the etch chamber 349 through the distribution plate 306 .
- a ligand source 327 is connected to the ligand vaporizer 328 .
- a solvent source 325 is connected to the solvent vaporizer 326 .
- An ESC temperature controller is connected to the chuck 308 , and provides temperature control of the chuck 308 .
- FIG. 4 is a high level block diagram showing a computer system 400 , which is suitable for implementing a controller 335 used in embodiments of the present invention.
- the computer system may have many physical forms ranging from an integrated circuit, a printed circuit board, and a small handheld device up to a huge super computer.
- the computer system 400 includes one or more processors 402 , and further can include an electronic display device 404 (for displaying graphics, text, and other data), a main memory 406 (e.g., random access memory (RAM)), storage device 408 (e.g., hard disk drive), removable storage device 410 (e.g., optical disk drive), user interface devices 412 (e.g., keyboards, touch screens, keypads, mice or other pointing devices, etc.), and a communication interface 414 (e.g., wireless network interface).
- the communication interface 414 allows software and data to be transferred between the computer system 400 and external devices via a link.
- the system may also include a communications infrastructure 416 (e.g., a communications bus, cross-over bar, or network) to which the aforementioned devices/modules are connected.
- a communications infrastructure 416 e.g., a communications bus, cross-over bar, or network
- Information transferred via communications interface 414 may be in the form of signals such as electronic, electromagnetic, optical, or other signals capable of being received by communications interface 414 , via a communication link that carries signals and may be implemented using wire or cable, fiber optics, a phone line, a cellular phone link, a radio frequency link, and/or other communication channels.
- the one or more processors 402 might receive information from a network, or might output information to the network in the course of performing the above-described method steps.
- method embodiments of the present invention may execute solely upon the processors or may execute over a network such as the Internet in conjunction with remote processors that shares a portion of the processing.
- non-transient computer readable medium is used generally to refer to media such as main memory, secondary memory, removable storage, and storage devices, such as hard disks, flash memory, disk drive memory, CD-ROM and other forms of persistent memory and shall not be construed to cover transitory subject matter, such as carrier waves or signals.
- Examples of computer code include machine code, such as produced by a compiler, and files containing higher level code that are executed by a computer using an interpreter.
- Computer readable media may also be computer code transmitted by a computer data signal embodied in a carrier wave and representing a sequence of instructions that are executable by a processor.
- An initiation step is provided (step 108 ).
- the initiation step initiates reactive sites transforming part of the at least one metal layer into metal oxide, metal halide, or lattice damaged metallic sites.
- the initiation step is provided by using an ionic flux or ion beam to covert part of the at least one metal layer 208 into a metal oxide, metal halide, or lattice damaged metallic sites.
- an oxygen plasma or ion beams through IBE can be applied to the wafer surface to oxidize the film not covered by the mask.
- a chlorine plasma or low energy inert gas plasma ion can also be applied.
- 2B is a cross-sectional view of the stack 200 after the initiation step has been provide (step 108 ).
- Unmasked surface layers of the at least one metal layer 208 are exposed to the ionic flux or ion beam and transformed into modified metallic sites 216 .
- the modified metallic sites 216 are metal transformed into metal oxide, metal halide, or lattice damaged metallic sites.
- ions are provided from the ion source 324 into the etch chamber 349 .
- FIG. 5 is a more detailed flow chart of providing a reaction step (step 112 ), which is provided in an embodiment of the invention.
- the reaction step (step 112 ) comprises a solvate modified metallic sites step (step 504 ) and a ligand complex formation step (step 508 ).
- the solvate modified metallic sites step (step 504 ) forms solvated metal at the modified metallic sites.
- the modified metallic sites are exposed to a vapor solvent.
- a solvent source 325 provides solvent to the solvent vaporizer 326 , which vaporizes the solvent and provides the solvent vapor into the etch chamber 349 .
- solvents may be alcohols, amine, or hydrocarbons.
- the ligand complex formation step (step 508 ) provides ligand vapor which transform the solvated metal into organometallic compounds.
- a ligand source 327 provides ligands to the ligand vaporizer 328 , which vaporizes the ligands and provides the ligand vapor to the etch chamber 349 .
- the ligand vapor provides organic ligands.
- the organic ligands that may be used to form ligand complexes may include acetylacetonate (acac) family (such as bis(acac)-EDIM), acetic acid, amides, amidinates (tBuNC(R)Net), allyls, ethylene, acetylene, and cyclo-pentadienyl.
- acac acetylacetonate
- the solvate modified metallic sites step (step 504 ) and a ligand complex formation step (step 508 ) are performed cyclically a plurality of times.
- the solvate modified metallic sites step and a ligand complex formation step may be performed simultaneously. Where these steps are performed simultaneously, the ligand concentration must by high.
- 2C is a cross-sectional view of the stack 200 after the reactive step has been provide (step 112 ).
- the modified metallic sites have been transformed into organometallic sites 220 .
- the ESC temperature controller 350 may be used to cool the chuck 308 .
- the heat source 310 may be off, so that the stack 200 is kept cooler to increase the deposition of the vapors.
- a desorption step is provided (step 116 ).
- the organometallic sites 220 are heated causing the desorption of organometallic material.
- the heating may be achieved by heating a chuck holding the substrate 204 or by radiation directly heating the organometallic sites 220 .
- the heat source 310 may use radiant heat to directly the organometallic sites 220 .
- the ESC temperature controller 350 may be used to heat the chuck 308 , which heats the stack 200 .
- FIG. 2D is a cross-sectional view of the stack 200 after the desorption step has been provide (step 116 ).
- the organometallic sites have been removed by desorption, leaving partially etched sites 224 .
- the desorption step can also be realized with fine controlled ion energy sputtering so the organometallic compounds are detached but the ligands are not detached from metal sites.
- FIG. 2E is a cross-sectional view of the stack 200 after the initiation step has been provide (step 108 ). Unmasked surface layers of the at least one metal layer 208 is exposed to the ionic flux or ion beam and transformed into modified metallic sites 228 .
- a reaction step is provided (step 112 ).
- the same reaction step as described above may be used or parameters may be changed.
- FIG. 2F is a cross-sectional view of the stack 200 after the reactive step has been provide (step 112 ).
- the modified metallic sites have been transformed into organometallic sites 232 .
- a desorption step is provided (step 116 ).
- the organometallic sites 232 are heated causing the desorption of organometallic material.
- the same desorption step as described above may be used or parameters may be changed.
- FIG. 2G is a cross-sectional view of the stack 200 after the desorption step has been provide (step 116 ).
- the organometallic sites have been removed by desorption, leaving partially etched sites 224 .
- FIG. 2H is a cross-sectional view of the stack 200 after the etching of the at least one metal layer 208 is completed.
- This embodiment provides a plasma free etching processes.
- Other embodiments may use a plasma during the initiation step or the desorption step.
- a plasma may be a downstream plasma provided to the etch chamber 349 from a plasma source or may be created in situ, wherein the etch chamber 349 would require a precursor gas source and a plasma excitation system.
- an ion flux of O 2 , COS, or CH 3 OH may be used to provide the initiation step.
- a vapor generated from H 2 O 2 , HClO, O 3 , SOCl 2 , NH 4 OH, HCHO, or CH 3 COOH may be used to provide the initiation step.
- a catalyst may be used during the reaction step to increase the reaction rate.
- FIG. 6A is a schematic cross-sectional view of a stack 600 used in another embodiment of the invention.
- an inter layer dielectric layer (ILD) 604 is placed over a substrate, not shown.
- a bottom electrode 608 is formed over the ILD 604 .
- the bottom electrode 608 is formed from Ta, Ti, or W. In other embodiments, other similar metals may be used for the bottom electrode 608 .
- a bottom non-volatile metal (NVM) (pinned layer) layer 612 is formed over the bottom electrode 608 .
- the bottom NVM layer is formed from MnPt, CoPt, CoPd, or CoFe. In other embodiments, other similar alloys may be used for the bottom NVM layer 612 .
- a tunneling layer 616 of magnesium oxide (MgO) is formed over the bottom NVM layer 612 .
- a top NVM layer 620 is formed over the tunneling layer 616 .
- the top NVM layer 620 is formed from CoFe, CoFeB, Ru, CoPt, or CoPd.
- the top NVM layer 620 is formed of other metals or alloys.
- the combination of the bottom NVM layer 612 , the tunneling layer 616 , and the top NVM layer 620 forms a magnetic tunnel junction (MTJ).
- a patterned hardmask 624 is formed over the top NVM layer 620 .
- the patterned hardmask 624 is Ta, TaN, TiN or W, and is used as an electrode. In other embodiments, other electrode materials may be used.
- the top NVM layer 620 and tunneling layer 616 are etched using an RIE or IBE, which in this embodiment etches 2-3 nm of the bottom NVM 612 .
- An IBE etch is able to etch the top NVM layer 620 and tunneling layer 616 without forming sidewall deposition and without damaging the tunneling layer 616 .
- FIG. 6B is a schematic cross-sectional view of the stack after the NVM layer 620 and tunneling 616 have been etched. Using IBE to only etch the top NVM layer 620 and tunneling layer 616 lowers the IBE sidewall angle/aspect ratio limitation while maintaining tunneling layer 616 integrity without deposition build up.
- FIG. 6C is a schematic cross-sectional view of the stack 600 after the spacer 628 has been formed.
- the spacer seals the tunneling layer 616 during subsequent etching.
- the spacer thickness is approximately 2 to 5 nm.
- RIE or IBE sputtering is used to open the spacer 628 .
- FIG. 6D is a schematic cross-sectional view of the stack 600 after the spacer 628 have been opened.
- the stack is then subjected to an etch process, as shown in FIG. 1 , wherein the patterned hard mask 624 , the top NVM layer 620 , the tunneling layer 616 , and the spacer 628 provide a patterned mask for etching the bottom NVM layer 612 .
- the initiation step (step 108 ) is provided by providing an oxidation by providing a pressure of 4 to 80 mTorr. 50 to 500 sccm of O 2 and 0 to 500 sccm Ar are flowed into the etch chamber 349 . 200 to 1500 TCP power at 13 MHz is provided to form the gas into a plasma. A bias voltage from 20 to 500 volts is provided.
- the oxidation process is maintained for 5 to 60 seconds.
- the initiation step may be provided by chlorination.
- a pressure of 4 to 80 mTorr is provided.
- 50 to 500 sccm of Cl 2 and 0 to 500 sccm of Ar is flowed into the etch chamber 349 .
- 200 to 1500 TCP power at 13 MHz is provided to form the gas into a plasma.
- a bias voltage from 20 to 500 volts is provided.
- the chlorination process is maintained for 5 to 60 seconds.
- the solvate modified metallic sites step (step 504 ) is provided by providing a vapor of an organic acid.
- the ligand complex formation step (step 508 ) is provided by providing a vapor of a ligand.
- a pressure of 20 mTorr to 1 Torr is provided during the slovation and ligand complex formation steps with or without a carrier gas, where these steps may be cycled multiple times to enhance the reaction.
- the desorption step (step 116 ) is provided by providing a light plasma sputtering.
- the light plasma sputtering may be accomplished by providing 4 to 80 mTorr of chamber pressure. 50 to 500 sccm Ar is flowed into the etch chamber 349 . 200 to 1500 TCP power is provided to form the gas into a plasma. A bias voltage from 0 to 100 volts is provided.
- the Ar gas may be replaced by He, Ne, or Xe.
- the gas is a pure noble gas.
- desorption may be provided by heating the chuck 308 to a temperature of between 80° C. to 300° C. The process is repeated until the etching of the NVM layer 612 is completed.
- FIG. 6E is a schematic view of the stack 600 after the NVM layer 612 has been etched.
- This embodiment uses an IBE to only etch the tunneling layer 616 and to open the spacer, so that the IBE is used for shallower and lower aspect etching. This allows an IBE that does not form sidewall depositions and does not damage the tunneling layer 616 . Partially patterning the film stack puts fewer constraints on the IBE sidewall angle/aspect ratio limitation while maintaining MgO integrity without deposition build up. The spacer is able to further protect the MgO layer while etching subsequent layers.
- This embodiment uses non-aqueous solvents to avoid potential degradation of the MgO layer.
- This embodiment uses vapors to create organometallic byproducts, which are volatile in nature and leave the wafer surface without excessive sidewall buildup. This allows the formation of high density MRAM patterning with high aspect ratio. This embodiment provides an anisotropic etch of an MRAM with small CD and high aspect ratios. By providing an atomic level etch this embodiment provides greater control of the etching process.
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Abstract
Description
- This application claims priority under 35 U.S.C. §119(e) from U.S. Provisional Patent Application No. 61/971,032, filed on Mar. 27, 2014, entitled “METHODS TO ETCH AND TO REMOVE POST ETCH METALLIC RESIDUE” which is hereby incorporated by reference for all purposes.
- The present invention relates to etching a layer of non volatile materials through a mask during the production of a semiconductor device. More specifically, the present invention relates to etching a metal layers.
- During semiconductor wafer processing, features may be etched through a metal layer. In the formation of magnetoresistive random-access memory (MRAM) or resistive random-access memory (RRAM) devices, a plurality of thin metal layers or films may be sequentially etched. For MRAM a plurality of thin metal layers may be used to form metal tunneling junction stacks.
- Patterning non-volatile metal materials such as MRAM in a traditional reactive ion etcher (RIE) is challenging due to low volatility of the etch byproducts. The non-volatile sidewall passivation could cause the device short across the magnetic tunneling junction area and degradation of electric performance. Ion Beam Etching (IBE) has been used for MRAM patterning to clean the sidewall and maintain the material integrity. However, IBE is limited by the aspect ratio (<2:1) for advanced technology nodes with high pattern density.
- To achieve the foregoing and in accordance with the purpose of the present invention, a method of etching a stack with at least one metal layer in one or more cycles is provided. An initiation step is preformed, transforming part of the at least one metal layer into metal oxide, metal halide, or lattice damaged metallic sites. A reactive step is performed providing one or more cycles, where each cycle comprises providing an organic solvent vapor to form a solvated metal, metal halide, or metal oxide state and providing an organic ligand solvent to form volatile organometallic compounds. A desorption of the volatile organometallic compounds is performed.
- In another manifestation of the invention, a method of etching a MRAM stack with at least one metal layer disposed below a tunneling layer disposed below a mask is provided. The tunneling layer is etched. A spacer layer is formed over the etched tunneling layer. The spacer is opened. The at least one metal layer is etched in one or more cycles with each cycle comprising performing an initiation step, which transforms part of the at least one metal layer into metal oxide, metal halide, or lattice damaged metallic sites, performing a reactive step providing one or more cycles, where each cycle comprises providing an organic solvent vapor to form a solvated metal, metal halide, or metal oxide state and providing an organic ligand solvent to form volatile organometallic compounds, and performing a desorption of the volatile organometallic compounds.
- These and other features of the present invention will be described in more detail below in the detailed description of the invention and in conjunction with the following figures.
- The present invention is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar elements and in which:
-
FIG. 1 is a high level flow chart of an embodiment of the invention. -
FIGS. 2A-H are schematic views of a stack processed according to an embodiment of the invention. -
FIG. 3 is a schematic view of an etch reactor that may be used for etching. -
FIG. 4 illustrates a computer system, which is suitable for implementing a controller used in embodiments of the present invention. -
FIG. 5 is a more detailed flow chart of the reactive step. -
FIGS. 6A-E are schematic views of a MRAM stack processed according to an embodiment of the invention. - The present invention will now be described in detail with reference to a few preferred embodiments thereof as illustrated in the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without some or all of these specific details. In other instances, well known process steps and/or structures have not been described in detail in order to not unnecessarily obscure the present invention.
- To facilitate understanding,
FIG. 1 is a high level flow chart of a process used in an embodiment of the invention. A substrate with a stack with at least one metal containing layer is provided (step 104). An initiation step is provided (step 108). A reactive step is provided (step 112). A desorption step is provided (step 116). - In an example of a preferred embodiment of the invention, a substrate with a stack with at least one metal layer is provided (step 104).
FIG. 2A is a cross-sectional view of astack 200 over asubstrate 204. Thestack 200 comprises at least onemetal layer 208 disposed below amask 212. The at least onemetal layer 208 may comprise one or more metal layers with non-metal layers. In addition, one or more layers may be disposed between thesubstrate 204 and the at least onemetal layer 208. In addition, one or more layers may be disposed between the at least onemetal layer 208 and themask 212. In this example the at least onemetal layer 208 is a tantalum as bottom electrode layer under a platinum manganese (PtMn), or CoPt/CoPd layer , which is a fixed magnetic layer in MRAM film stack. - In one embodiment, all processing may be performed in a single plasma etch chamber.
FIG. 3 is a schematic view of an etch reactor that may be used in practicing such an embodiment. In one or more embodiments of the invention, anetch reactor 300 comprises agas distribution plate 306 providing a gas inlet and achuck 308, within anetch chamber 349, enclosed by achamber wall 350. Within theetch chamber 349, asubstrate 204 on which the stack is formed is positioned on top of thechuck 308. Thechuck 308 may provide a bias from theESC source 348 as an electrostatic chuck (ESC) for holding the substrate 304 or may use another chucking force to hold thesubstrate 204. Aheat source 310, such as heat lamps, is provided to heat the metal layer. Anion source 324, asolvent vaporizer 326, and a ligand vaporizer 328 are connected to theetch chamber 349 through thedistribution plate 306. Aligand source 327 is connected to the ligand vaporizer 328. Asolvent source 325 is connected to thesolvent vaporizer 326. An ESC temperature controller is connected to thechuck 308, and provides temperature control of thechuck 308. -
FIG. 4 is a high level block diagram showing acomputer system 400, which is suitable for implementing acontroller 335 used in embodiments of the present invention. The computer system may have many physical forms ranging from an integrated circuit, a printed circuit board, and a small handheld device up to a huge super computer. Thecomputer system 400 includes one ormore processors 402, and further can include an electronic display device 404 (for displaying graphics, text, and other data), a main memory 406 (e.g., random access memory (RAM)), storage device 408 (e.g., hard disk drive), removable storage device 410 (e.g., optical disk drive), user interface devices 412 (e.g., keyboards, touch screens, keypads, mice or other pointing devices, etc.), and a communication interface 414 (e.g., wireless network interface). Thecommunication interface 414 allows software and data to be transferred between thecomputer system 400 and external devices via a link. The system may also include a communications infrastructure 416 (e.g., a communications bus, cross-over bar, or network) to which the aforementioned devices/modules are connected. - Information transferred via
communications interface 414 may be in the form of signals such as electronic, electromagnetic, optical, or other signals capable of being received bycommunications interface 414, via a communication link that carries signals and may be implemented using wire or cable, fiber optics, a phone line, a cellular phone link, a radio frequency link, and/or other communication channels. With such a communications interface, it is contemplated that the one ormore processors 402 might receive information from a network, or might output information to the network in the course of performing the above-described method steps. Furthermore, method embodiments of the present invention may execute solely upon the processors or may execute over a network such as the Internet in conjunction with remote processors that shares a portion of the processing. - The term “non-transient computer readable medium” is used generally to refer to media such as main memory, secondary memory, removable storage, and storage devices, such as hard disks, flash memory, disk drive memory, CD-ROM and other forms of persistent memory and shall not be construed to cover transitory subject matter, such as carrier waves or signals. Examples of computer code include machine code, such as produced by a compiler, and files containing higher level code that are executed by a computer using an interpreter. Computer readable media may also be computer code transmitted by a computer data signal embodied in a carrier wave and representing a sequence of instructions that are executable by a processor.
- An initiation step is provided (step 108). The initiation step initiates reactive sites transforming part of the at least one metal layer into metal oxide, metal halide, or lattice damaged metallic sites. In this embodiment, the initiation step is provided by using an ionic flux or ion beam to covert part of the at least one
metal layer 208 into a metal oxide, metal halide, or lattice damaged metallic sites. In this example, an oxygen plasma or ion beams through IBE can be applied to the wafer surface to oxidize the film not covered by the mask. In another example, a chlorine plasma or low energy inert gas plasma ion can also be applied.FIG. 2B is a cross-sectional view of thestack 200 after the initiation step has been provide (step 108). Unmasked surface layers of the at least onemetal layer 208 are exposed to the ionic flux or ion beam and transformed into modifiedmetallic sites 216. In this example, the modifiedmetallic sites 216 are metal transformed into metal oxide, metal halide, or lattice damaged metallic sites. In this example, ions are provided from theion source 324 into theetch chamber 349. - A reaction step is provided (step 112).
FIG. 5 is a more detailed flow chart of providing a reaction step (step 112), which is provided in an embodiment of the invention. In this embodiment, the reaction step (step 112) comprises a solvate modified metallic sites step (step 504) and a ligand complex formation step (step 508). In this embodiment, the solvate modified metallic sites step (step 504) forms solvated metal at the modified metallic sites. In this embodiment, the modified metallic sites are exposed to a vapor solvent. Asolvent source 325 provides solvent to thesolvent vaporizer 326, which vaporizes the solvent and provides the solvent vapor into theetch chamber 349. Such solvents may be alcohols, amine, or hydrocarbons. Such solvents may be polar or non-polar, base or acidic. Providing a solvated metal is helpful in localizing the metal electron and facilitating the organic ligand attachment. In this embodiment, the ligand complex formation step (step 508) provides ligand vapor which transform the solvated metal into organometallic compounds. Aligand source 327, provides ligands to the ligand vaporizer 328, which vaporizes the ligands and provides the ligand vapor to theetch chamber 349. In this example, the ligand vapor provides organic ligands. The organic ligands that may be used to form ligand complexes may include acetylacetonate (acac) family (such as bis(acac)-EDIM), acetic acid, amides, amidinates (tBuNC(R)Net), allyls, ethylene, acetylene, and cyclo-pentadienyl. In this embodiment, the solvate modified metallic sites step (step 504) and a ligand complex formation step (step 508) are performed cyclically a plurality of times. In other embodiments, the solvate modified metallic sites step and a ligand complex formation step may be performed simultaneously. Where these steps are performed simultaneously, the ligand concentration must by high.FIG. 2C is a cross-sectional view of thestack 200 after the reactive step has been provide (step 112). The modified metallic sites have been transformed intoorganometallic sites 220. In this embodiment, theESC temperature controller 350, may be used to cool thechuck 308. In addition, theheat source 310 may be off, so that thestack 200 is kept cooler to increase the deposition of the vapors. - A desorption step is provided (step 116). In this embodiment, the
organometallic sites 220 are heated causing the desorption of organometallic material. The heating may be achieved by heating a chuck holding thesubstrate 204 or by radiation directly heating theorganometallic sites 220. In this example, theheat source 310 may use radiant heat to directly theorganometallic sites 220. TheESC temperature controller 350 may be used to heat thechuck 308, which heats thestack 200.FIG. 2D is a cross-sectional view of thestack 200 after the desorption step has been provide (step 116). The organometallic sites have been removed by desorption, leaving partially etchedsites 224. - The desorption step can also be realized with fine controlled ion energy sputtering so the organometallic compounds are detached but the ligands are not detached from metal sites.
- Since the at least one
metal layer 208 is only partially etched, the cycle is continued (step 120), which returns to the initiation step (step 108). The same initiation step as described above may be used or the parameters may be changed.FIG. 2E is a cross-sectional view of thestack 200 after the initiation step has been provide (step 108). Unmasked surface layers of the at least onemetal layer 208 is exposed to the ionic flux or ion beam and transformed into modifiedmetallic sites 228. - A reaction step is provided (step 112). The same reaction step as described above may be used or parameters may be changed.
FIG. 2F is a cross-sectional view of thestack 200 after the reactive step has been provide (step 112). The modified metallic sites have been transformed intoorganometallic sites 232. - A desorption step is provided (step 116). In this embodiment, the
organometallic sites 232 are heated causing the desorption of organometallic material. The same desorption step as described above may be used or parameters may be changed.FIG. 2G is a cross-sectional view of thestack 200 after the desorption step has been provide (step 116). The organometallic sites have been removed by desorption, leaving partially etchedsites 224. - The cycle is continued (step 120) until the etch process is completed.
FIG. 2H is a cross-sectional view of thestack 200 after the etching of the at least onemetal layer 208 is completed. - This embodiment provides a plasma free etching processes. Other embodiments may use a plasma during the initiation step or the desorption step. Such a plasma may be a downstream plasma provided to the
etch chamber 349 from a plasma source or may be created in situ, wherein theetch chamber 349 would require a precursor gas source and a plasma excitation system. In other embodiments an ion flux of O2, COS, or CH3OH may be used to provide the initiation step. In other embodiments a vapor generated from H2O2, HClO, O3, SOCl2, NH4OH, HCHO, or CH3COOH may be used to provide the initiation step. In other embodiments, a catalyst may be used during the reaction step to increase the reaction rate. -
FIG. 6A is a schematic cross-sectional view of astack 600 used in another embodiment of the invention. In thisstack 600 an inter layer dielectric layer (ILD) 604 is placed over a substrate, not shown. Abottom electrode 608 is formed over theILD 604. In this embodiment, thebottom electrode 608 is formed from Ta, Ti, or W. In other embodiments, other similar metals may be used for thebottom electrode 608. A bottom non-volatile metal (NVM) (pinned layer)layer 612 is formed over thebottom electrode 608. In this embodiment, the bottom NVM layer is formed from MnPt, CoPt, CoPd, or CoFe. In other embodiments, other similar alloys may be used for thebottom NVM layer 612. Atunneling layer 616 of magnesium oxide (MgO) is formed over thebottom NVM layer 612. Atop NVM layer 620 is formed over thetunneling layer 616. In this embodiment, thetop NVM layer 620 is formed from CoFe, CoFeB, Ru, CoPt, or CoPd. In other embodiments thetop NVM layer 620 is formed of other metals or alloys. In this embodiment, the combination of thebottom NVM layer 612, thetunneling layer 616, and thetop NVM layer 620 forms a magnetic tunnel junction (MTJ). A patternedhardmask 624 is formed over thetop NVM layer 620. In this embodiment the patternedhardmask 624 is Ta, TaN, TiN or W, and is used as an electrode. In other embodiments, other electrode materials may be used. - In this embodiment, the
top NVM layer 620 andtunneling layer 616 are etched using an RIE or IBE, which in this embodiment etches 2-3 nm of thebottom NVM 612. An IBE etch is able to etch thetop NVM layer 620 andtunneling layer 616 without forming sidewall deposition and without damaging thetunneling layer 616.FIG. 6B is a schematic cross-sectional view of the stack after theNVM layer 620 and tunneling 616 have been etched. Using IBE to only etch thetop NVM layer 620 andtunneling layer 616 lowers the IBE sidewall angle/aspect ratio limitation while maintainingtunneling layer 616 integrity without deposition build up. - An oxide or nitride spacer is formed around the partially etched
stack 600.FIG. 6C is a schematic cross-sectional view of thestack 600 after thespacer 628 has been formed. The spacer seals thetunneling layer 616 during subsequent etching. The spacer thickness is approximately 2 to 5 nm. RIE or IBE sputtering is used to open thespacer 628.FIG. 6D is a schematic cross-sectional view of thestack 600 after thespacer 628 have been opened. - The stack is then subjected to an etch process, as shown in
FIG. 1 , wherein the patternedhard mask 624, thetop NVM layer 620, thetunneling layer 616, and thespacer 628 provide a patterned mask for etching thebottom NVM layer 612. In this example, the initiation step (step 108) is provided by providing an oxidation by providing a pressure of 4 to 80 mTorr. 50 to 500 sccm of O2 and 0 to 500 sccm Ar are flowed into theetch chamber 349. 200 to 1500 TCP power at 13 MHz is provided to form the gas into a plasma. A bias voltage from 20 to 500 volts is provided. The oxidation process is maintained for 5 to 60 seconds. In an alternative embodiment, the initiation step may be provided by chlorination. In such a process a pressure of 4 to 80 mTorr is provided. 50 to 500 sccm of Cl2 and 0 to 500 sccm of Ar is flowed into theetch chamber 349. 200 to 1500 TCP power at 13 MHz is provided to form the gas into a plasma. A bias voltage from 20 to 500 volts is provided. The chlorination process is maintained for 5 to 60 seconds. - In this example, the solvate modified metallic sites step (step 504) is provided by providing a vapor of an organic acid. The ligand complex formation step (step 508) is provided by providing a vapor of a ligand. A pressure of 20 mTorr to 1 Torr is provided during the slovation and ligand complex formation steps with or without a carrier gas, where these steps may be cycled multiple times to enhance the reaction.
- In this example the desorption step (step 116) is provided by providing a light plasma sputtering. In one example, the light plasma sputtering may be accomplished by providing 4 to 80 mTorr of chamber pressure. 50 to 500 sccm Ar is flowed into the
etch chamber 349. 200 to 1500 TCP power is provided to form the gas into a plasma. A bias voltage from 0 to 100 volts is provided. The Ar gas may be replaced by He, Ne, or Xe. Preferably, the gas is a pure noble gas. In another example, desorption may be provided by heating thechuck 308 to a temperature of between 80° C. to 300° C. The process is repeated until the etching of theNVM layer 612 is completed.FIG. 6E is a schematic view of thestack 600 after theNVM layer 612 has been etched. - This embodiment uses an IBE to only etch the
tunneling layer 616 and to open the spacer, so that the IBE is used for shallower and lower aspect etching. This allows an IBE that does not form sidewall depositions and does not damage thetunneling layer 616. Partially patterning the film stack puts fewer constraints on the IBE sidewall angle/aspect ratio limitation while maintaining MgO integrity without deposition build up. The spacer is able to further protect the MgO layer while etching subsequent layers. This embodiment uses non-aqueous solvents to avoid potential degradation of the MgO layer. This embodiment uses vapors to create organometallic byproducts, which are volatile in nature and leave the wafer surface without excessive sidewall buildup. This allows the formation of high density MRAM patterning with high aspect ratio. This embodiment provides an anisotropic etch of an MRAM with small CD and high aspect ratios. By providing an atomic level etch this embodiment provides greater control of the etching process. - While this invention has been described in terms of several preferred embodiments, there are alterations, permutations, modifications, and various substitute equivalents, which fall within the scope of this invention. It should also be noted that there are many alternative ways of implementing the methods and apparatuses of the present invention. It is therefore intended that the following appended claims be interpreted as including all such alterations, permutations, and various substitute equivalents as fall within the true spirit and scope of the present invention.
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KR20150112757A (en) | 2015-10-07 |
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