US20120061059A1 - Cooling mechanism for stacked die package and method of manufacturing the same - Google Patents
Cooling mechanism for stacked die package and method of manufacturing the same Download PDFInfo
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- US20120061059A1 US20120061059A1 US13/033,840 US201113033840A US2012061059A1 US 20120061059 A1 US20120061059 A1 US 20120061059A1 US 201113033840 A US201113033840 A US 201113033840A US 2012061059 A1 US2012061059 A1 US 2012061059A1
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F28—HEAT EXCHANGE IN GENERAL
- F28D—HEAT-EXCHANGE APPARATUS, NOT PROVIDED FOR IN ANOTHER SUBCLASS, IN WHICH THE HEAT-EXCHANGE MEDIA DO NOT COME INTO DIRECT CONTACT
- F28D15/00—Heat-exchange apparatus with the intermediate heat-transfer medium in closed tubes passing into or through the conduit walls ; Heat-exchange apparatus employing intermediate heat-transfer medium or bodies
- F28D15/02—Heat-exchange apparatus with the intermediate heat-transfer medium in closed tubes passing into or through the conduit walls ; Heat-exchange apparatus employing intermediate heat-transfer medium or bodies in which the medium condenses and evaporates, e.g. heat pipes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
- H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
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- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
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- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
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- H—ELECTRICITY
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- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06517—Bump or bump-like direct electrical connections from device to substrate
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- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06589—Thermal management, e.g. cooling
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/146—Mixed devices
- H01L2924/1461—MEMS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15788—Glasses, e.g. amorphous oxides, nitrides or fluorides
Definitions
- the disclosure relates generally to stacked die packages and, more particularly, to cooling mechanisms for stacked die packages.
- 3D IC packages have provided a possible solution to traditional two-dimensional (2D) ICs in overcoming the interconnect scaling barrier and for improving performance.
- 2D ICs three-dimensional integrated circuit
- stacked die packages multiple dies are stacked together using vertical through silicon vias (TSVs) where longer wire connections and inter-die input/output (I/O) pads are eliminated.
- TSVs vertical through silicon vias
- I/O inter-die input/output
- 3D IC technology faces critical thermal management challenges.
- the thermal path for dissipating heat generated by the dies is limited.
- Stacked die packages are typically encapsulated in a material that does not dissipate heat well and, if the heat dissipation problem is not addressed, the dies may overheat during operation leading to possible problems with transistor performance and reliability.
- cooling systems that use thermal via and liquid micro channels have been proposed. However, such systems are complex and expensive to implement.
- FIG. 1 is a cross-sectional view of a stacked die package according to an embodiment of the present disclosure.
- FIG. 2 is a cross-sectional view of a multi-chip system package according to an embodiment of the present disclosure.
- FIG. 3 is a cross-sectional view of a different stacked die package according to an embodiment of the present disclosure.
- FIG. 4 is a flowchart illustrating a method of manufacturing a stacked die package having a cooling mechanism according to an embodiment of the present disclosure.
- FIG. 1 is a cross-sectional view of a stacked die package 10 according to an embodiment of the present invention.
- Stacked die package 10 includes a substrate 20 , a first die A, a second die B, a third die C, a fourth die D, a housing 40 and a cooling fluid 60 contained in a cavity of housing 40 .
- Substrate 20 may comprise a silicon substrate although other semiconductor substrates, such as silicon-germanium substrate, III-V compound substrate, glass substrate, or silicon on insulator (SOI) substrate may be utilized in various embodiments.
- Dies A, B, C, and D may include one of a processor die, memory die (e.g., SRAM, DRAM), power device die, an ASIC (application specific integrated circuit) die, or other functional device dies.
- memory die e.g., SRAM, DRAM
- ASIC application specific integrated circuit
- Dies A, B, C, and D may comprise a plurality of through silicon vias (TSVs) (not shown) for inter-die communication, silicon or other semiconductor materials and may include one or more conductive layers (not shown). There may be multiple metallization layers (not shown) formed within dies A, B, C, and D, and dies A, B, C, and D may include a plurality of other layers, such as inter-metal dielectric (IMD) layers (not shown). Dies A, B, C, and D may also include other active components or circuits, such as transistors, capacitors, and other devices. Bumps 30 sit on pads (not shown) and provide electrical connections between the dies.
- TSVs through silicon vias
- IMD inter-metal dielectric
- FIG. 1 shows the stacked die package 10 as having four dies A, B, C, and D stacked upon one another, one skilled in the art will understand that the stacked die package 10 may have two or more dies stacked one upon the other in some embodiments while in other embodiments the stacked die package 10 may have more than four dies.
- an approach according to an aspect of the present invention is to immerse dies A, B, C, and D in a cooling fluid.
- a volume of cooling fluid 60 is contained in housing 40 with the housing 40 hermetically sealing dies A, B, C, and D from ambient air or some other environment.
- the cooling fluid 60 both cools and insulates dies A, B, C, and D. Cooling fluid 60 helps cool dies A, B, C, and D by absorbing heat generated by operating dies A, B, C, and D and drawing the heat away from the dies to the walls of housing 40 where the heat is then dissipated to the ambient air.
- Cooling fluid 60 can comprise a fluid or liquid.
- cooling fluid 60 can comprise a fluid, such as oil, dielectric oil, water, a mixture of water and an anti-freezing agent, potassium formate, perfluorinate coolant, or the like.
- the cooling fluid 60 may comprise a non-electrically conductive liquid perfluorinate coolant, such as those made by 3MTM including 3M's HFE-7100 coolant and similar coolants.
- the cooling fluid 60 comprises a two-phase liquid, such as any two-phase liquid commercially available from various manufacturers.
- cooling fluid 60 may be any fluid capable of absorbing and releasing energy and may be in a fluid form, such as water, gas, oil, or a mixture thereof.
- a volume of cooling fluid 60 such as oil for example, heated by dies A, B, C, and D within housing 40 rises upwardly towards the top of housing 40 .
- cooling fluid 60 such as oil for example
- heated oil cools, its density increases with a resultant downward flow aided by gravity.
- the downward flow is limited by the bottom of housing 40 consequently establishing a lateral flow to again bring the cooling fluid into engagement with the dies to begin the cycle anew. It is understood that the level of the cooling fluid should be maintained at a prescribed level as otherwise the temperature of the operating dies may not be sufficiently lowered.
- the housing 40 defines the cooling fluid compartment and contains the cooling fluid 60 therein.
- the housing 40 has a generally rectangular shape but other shapes are also contemplated, such as a shape or design capable of placing the cooling fluid 60 and dies A, B, C, and D in efficient heat exchange with one another.
- Housing 40 may be constructed of a material, such as steel, aluminum, copper, silver, metal, silicon, or silicon carbide. Other materials, such as gold, though perhaps less cost effective than those already mentioned, are also thermally conductive to an adequate or even optimal degree and may also be used in certain embodiments.
- an outside surface of housing 40 includes a plurality of radiators or fins 50 for heat dissipation. Fins 50 may be disposed on any or all of the outside surface(s) of housing 40 .
- the fins 50 provide additional surface area for establishing heat transfer between the heated cooling fluid and the ambient air. Fins 50 may be elongated for efficient thermal energy transfer to the ambient air and may be constructed of a material such as steel, aluminum, copper, silver, metal silicon, or silicon carbide.
- fins 50 may be made from any material having a relatively high thermal conductivity.
- fins 50 can have a shape that is square, oval, circular, or a variety of other shapes capable of assisting with heat dissipation from stacked die package 10 . Fins 50 are affixed to an outer surface of housing 40 by soldering, brazing, bonding, or by some other manner.
- the stacked die package 10 includes a pressure release apparatus 65 .
- the pressure release apparatus 65 is shown in FIG. 1 simply as a box.
- the pressure release apparatus 65 releases pressure on the housing 40 caused by cooling fluid 60 .
- the temperature in the stacked die package 10 increases there is a corresponding increase in the pressure of the cooling fluid 60 .
- this pressure may rupture the housing 40 of the stacked die package 10 .
- the pressure release apparatus 65 releases the pressure in cooling fluid 60 to prevent such a rupture.
- the details of such will not be described herein.
- stacked die package 10 includes a deionizer 75 or an apparatus to deionize ions in the cooling fluid 60 that may be generated by the interaction between the cooling fluid 60 and components of the stacked die package 10 , such as dies A, B, C, D, or bumps 30 . If the cooling fluid 60 is not de-ionized, conductivity of cooling fluid 60 may increase causing shorts in one or more dies A, B, C, or D, thereby damaging them.
- a deionizer is constructed and for convenience the details of such will not be described herein.
- FIG. 2 is a cross-sectional view of a multi-chip system package 15 according to an embodiment of the invention.
- the multi-chip system package 15 may comprise many different chips, stacked chips, and components, such as 3D IC packages, MEMs packaging, system on chips (SOCs), THERMAL SOPs, OPTO SOPs, embedded components, antennas and filters, and the like.
- a volume of cooling fluid 60 is contained in housing 40 . Cooling fluid 60 both cools and insulates the components of multi-chip system package 15 .
- the cooling fluid 60 helps cool the components by absorbing heat generated by the components and drawing the absorbed heat to the walls of housing 40 where the absorbed heat is then dissipated to the ambient air.
- an outside surface of housing 40 includes a plurality of radiators or fins 50 for additional heat dissipation.
- FIG. 3 depicts the stacked die package 10 of FIG. 1 having a pump 80 and a conduit 85 .
- FIG. 3 does not depict a pressure release apparatus 65 for ease of illustration.
- One end of the conduit 85 is connected to a lower inlet or opening in housing 40 and the other end of the conduit 85 is connected to an upper outlet or opening in housing 40 .
- the conduit 85 can be a pipe, tube or any suitable passageway for allowing cooling fluid 60 to circulate from the upper opening to the lower opening.
- Pump 80 is coupled to conduit 85 for pumping the cooling fluid 60 from the upper opening to the lower opening of housing 40 .
- Pump 80 can be any apparatus for circulating the cooling fluid by means of a piston, plunger, or a set of rotating vanes, for example. In operation, the pump 80 pumps cooling fluid 60 from a bottom region of housing 40 where the cooling fluid is generally cooler to an upper region of housing 40 where the cooling fluid is generally warmer as compared to the cooling fluid at the bottom region.
- the circulation of cooling fluid 60 from the lower region to the upper region of housing 40 cools dies A, B, C, and D.
- cooling fluid flow contained within housing 40 in these embodiments and others may be circulated by one or more methods, such as by gravity, an active pumping action, such as with the mechanical pump described above, a passive pumping action, such as with a wicking action, a thermal siphoning action, or the like.
- stacked die package 10 includes one or more barriers 96 disposed within the housing 40 of the stacked die package 10 .
- Barriers 96 help direct the fluid flow F of cooling fluid 60 , particularly to areas between two stacked dies, in the region of the bumps 30 . Without the barriers 96 , a substantial amount of cooling fluid 60 may flow over the top of the topmost die D or around the sides of the dies A, B, C and D as fluid flow will generally take the path of least resistance.
- the barriers 96 may have any configuration or shape so long as such configuration or shape directs the fluid flow F substantially to regions between the dies (e.g., to the region of the bumps 30 ) and substantially blocks fluid flow over the top of the topmost die D or around the sides of the stacked dies A, B, C and D.
- a heat sink 70 is thermally coupled to conduit 85 .
- Heat sink 70 draws heat from cooling fluid 60 to ambient air thereby cooling cooling fluid 60 .
- the stacked die package 10 of FIG. 3 includes temperature sensors 55 A and 55 B. Temperature sensors 55 A and 55 B may be positioned at one or more places on an exterior wall portion of the housing 40 and therefore may be retrofitted in a relatively easy and inexpensive manner. According to one embodiment, temperature sensor 55 A is fitted at or near the lower inlet or opening in housing 40 , whereas temperature sensor 55 B is positioned at or near the upper outlet or opening in housing 40 but at a level just below the minimum prescribed cooling fluid level.
- Temperature sensors 55 A and 55 B may be resistive temperature sensors that indicate a change in temperature by a change in electrical resistance. The measured temperature is of course dependent on the level of the cooling fluid 60 , the ambient air temperature, and a given stacked die package design.
- the stack die package 10 may comprise a computer (not shown) having suitable computer software to receive the outputs and provide information indicative of an operation property from the measured temperatures.
- the computer compares a value associated with the measured outputs with predetermined values expected for a normal operation condition. If a difference between the expected predetermined outputs and measured outputs is above a threshold value, the computer is arranged to generate an alarm condition. In other embodiments, the computer may be arranged to generate a warning signal when the cooling fluid 60 drops below a prescribed minimum level.
- thermosensors Although in the above-described embodiments two temperature sensors are employed, a person skilled in the art will appreciate that in further variations more than two temperature sensors may be used. Further, the teachings of the present disclosure of employing temperature sensors for monitoring the cooling fluid level in a stacked die package can be equally applied to a multi-chip system package, such as the one depicted in FIG. 2 .
- FIG. 4 is a flowchart illustrating a method 400 of manufacturing a stacked die package having a cooling mechanism according to an embodiment of the present disclosure.
- a substrate is provided.
- a first die is placed over the substrate.
- the first die is bonded to the substrate.
- the bonding of the first die to the substrate can be accomplished via a flip chip bonding process.
- a second die is placed over the first die.
- the second die is bonded to the first die.
- the bonding of the second die to the first die can be accomplished via a flip chip bonding process.
- step 460 is placed over the first and second dies such that the housing seals the dies from the environment.
- step 470 a cooling fluid is added to immerse the first and second dies therein.
- step 420 to step 450 may be replaced with a step of first bonding a first die to a second die, placing the bonded first and second dies over the substrate, and then bonding the dies to the substrate.
- the teachings of the present disclosure protect dies in a stacked die package, individual chips, and/or components in a multi-chip system package from excessive heat that would otherwise compromise the performance and/or reliability of the dies, chips and/or components in these packages. It is another advantage that embodiments of the present disclosure require minimal modifications to the current design for existing packages that are low cost and simple to implement. It is yet another advantage of the present disclosure that underfill materials are not needed between stacked dies (not including those dies that are disposed on a substrate or an interposer) in contrast to conventional stacked die packages or multi-chip packages. It is yet another advantage that embodiments of the present disclosure provide monitoring of the level of a cooling fluid in a relatively easy manner and consequently reduce the risk of excessive temperature increases and the associated problems. It is contemplated that the cooling fluid systems and methods of the present disclosure can be used in any electronic packaging system, such as stacked chip package, multi-chip package, or stacked chip and multi-chip package that require a cooling fluid for cooling and/or excess heat prevention.
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Abstract
An apparatus for cooling a stacked die package comprises a first die provided above a substrate; a second die above the first die; a cooling fluid in fluid communication with the first die and the second die, the cooling fluid for absorbing thermal energy from the first and the second die; a housing containing the first and second dies, the housing sealing the first and second dies from an environment, wherein the housing further includes a first opening and a second opening, the first and second openings being vertically displaced from one another; a conduit having one end connected to the first opening and the other end connected to the second opening, the conduit allowing the cooling liquid to circulate from the first opening to the second opening; a first temperature sensor being arranged to provide an output that is dependent on a local temperature at the first opening; and a second temperature sensor being arranged to provide an output that is dependent on a local temperature at the second opening, wherein the outputs of the first and second temperature sensors relative to each other are indicative of a level of the cooling fluid.
Description
- The present application is a Continuation-in-Part of U.S. application Ser. No. 12/878,319, filed Sep. 9, 2010, and claims priority of U.S. Provisional Patent Application Ser. No. 61/418,281, filed on Nov. 30, 2010, which are incorporated herein by reference in their entireties.
- The disclosure relates generally to stacked die packages and, more particularly, to cooling mechanisms for stacked die packages.
- Recently, three-dimensional integrated circuit (3D IC) packages, or stacked die packages, have provided a possible solution to traditional two-dimensional (2D) ICs in overcoming the interconnect scaling barrier and for improving performance. In stacked die packages, multiple dies are stacked together using vertical through silicon vias (TSVs) where longer wire connections and inter-die input/output (I/O) pads are eliminated. The overall performance is significantly improved with faster and more power efficient inter-core communication across multiple silicon layers.
- As effective as 3D IC technology is, 3D IC technology faces critical thermal management challenges. When multiple dies are stacked vertically in a package, the thermal path for dissipating heat generated by the dies is limited. Stacked die packages are typically encapsulated in a material that does not dissipate heat well and, if the heat dissipation problem is not addressed, the dies may overheat during operation leading to possible problems with transistor performance and reliability. To address the heat dissipation problem, cooling systems that use thermal via and liquid micro channels have been proposed. However, such systems are complex and expensive to implement.
- The features, aspects, and advantages of the disclosure will become more fully apparent from the following detailed description, appended claims, and accompanying drawings in which:
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FIG. 1 is a cross-sectional view of a stacked die package according to an embodiment of the present disclosure. -
FIG. 2 is a cross-sectional view of a multi-chip system package according to an embodiment of the present disclosure. -
FIG. 3 is a cross-sectional view of a different stacked die package according to an embodiment of the present disclosure. -
FIG. 4 is a flowchart illustrating a method of manufacturing a stacked die package having a cooling mechanism according to an embodiment of the present disclosure. - In the following description, numerous specific details are set forth to provide a thorough understanding of embodiments of the present disclosure. However, one having an ordinary skill in the art will recognize that embodiments of the disclosure can be practiced without these specific details. In some instances, well-known structures and processes have not been described in detail to avoid unnecessarily obscuring embodiments of the present disclosure.
- Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present disclosure. Thus, the appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment.
- Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. It should be appreciated that the following figures are not drawn to scale; rather, these figures are merely intended for illustration.
-
FIG. 1 is a cross-sectional view of a stackeddie package 10 according to an embodiment of the present invention. Stacked diepackage 10 includes asubstrate 20, a first die A, a second die B, a third die C, a fourth die D, ahousing 40 and acooling fluid 60 contained in a cavity ofhousing 40.Substrate 20 may comprise a silicon substrate although other semiconductor substrates, such as silicon-germanium substrate, III-V compound substrate, glass substrate, or silicon on insulator (SOI) substrate may be utilized in various embodiments. Dies A, B, C, and D may include one of a processor die, memory die (e.g., SRAM, DRAM), power device die, an ASIC (application specific integrated circuit) die, or other functional device dies. Dies A, B, C, and D may comprise a plurality of through silicon vias (TSVs) (not shown) for inter-die communication, silicon or other semiconductor materials and may include one or more conductive layers (not shown). There may be multiple metallization layers (not shown) formed within dies A, B, C, and D, and dies A, B, C, and D may include a plurality of other layers, such as inter-metal dielectric (IMD) layers (not shown). Dies A, B, C, and D may also include other active components or circuits, such as transistors, capacitors, and other devices.Bumps 30 sit on pads (not shown) and provide electrical connections between the dies. - Although
FIG. 1 shows the stackeddie package 10 as having four dies A, B, C, and D stacked upon one another, one skilled in the art will understand that thestacked die package 10 may have two or more dies stacked one upon the other in some embodiments while in other embodiments thestacked die package 10 may have more than four dies. - To address the heat dissipation problem in stacked die
package 10, an approach according to an aspect of the present invention is to immerse dies A, B, C, and D in a cooling fluid. A volume ofcooling fluid 60 is contained inhousing 40 with thehousing 40 hermetically sealing dies A, B, C, and D from ambient air or some other environment. Thecooling fluid 60 both cools and insulates dies A, B, C, andD. Cooling fluid 60 helps cool dies A, B, C, and D by absorbing heat generated by operating dies A, B, C, and D and drawing the heat away from the dies to the walls ofhousing 40 where the heat is then dissipated to the ambient air. -
Cooling fluid 60 can comprise a fluid or liquid. As an example,cooling fluid 60 can comprise a fluid, such as oil, dielectric oil, water, a mixture of water and an anti-freezing agent, potassium formate, perfluorinate coolant, or the like. As a particular example, thecooling fluid 60 may comprise a non-electrically conductive liquid perfluorinate coolant, such as those made by 3M™ including 3M's HFE-7100 coolant and similar coolants. - In some embodiments, the
cooling fluid 60 comprises a two-phase liquid, such as any two-phase liquid commercially available from various manufacturers. One skilled in the art will understand thatcooling fluid 60 may be any fluid capable of absorbing and releasing energy and may be in a fluid form, such as water, gas, oil, or a mixture thereof. - In operation, a volume of
cooling fluid 60, such as oil for example, heated by dies A, B, C, and D withinhousing 40 rises upwardly towards the top ofhousing 40. As the oil rises towards the top of thehousing 40, upward flow is restricted and lateral flow occurs. Also, as heated oil cools, its density increases with a resultant downward flow aided by gravity. The downward flow is limited by the bottom ofhousing 40 consequently establishing a lateral flow to again bring the cooling fluid into engagement with the dies to begin the cycle anew. It is understood that the level of the cooling fluid should be maintained at a prescribed level as otherwise the temperature of the operating dies may not be sufficiently lowered. - The
housing 40 defines the cooling fluid compartment and contains thecooling fluid 60 therein. Thehousing 40 has a generally rectangular shape but other shapes are also contemplated, such as a shape or design capable of placing thecooling fluid 60 and dies A, B, C, and D in efficient heat exchange with one another.Housing 40 may be constructed of a material, such as steel, aluminum, copper, silver, metal, silicon, or silicon carbide. Other materials, such as gold, though perhaps less cost effective than those already mentioned, are also thermally conductive to an adequate or even optimal degree and may also be used in certain embodiments. - To assist cooling of dies A, B, C, and D, in some embodiments an outside surface of
housing 40 includes a plurality of radiators orfins 50 for heat dissipation. Fins 50 may be disposed on any or all of the outside surface(s) ofhousing 40. Thefins 50 provide additional surface area for establishing heat transfer between the heated cooling fluid and the ambient air. Fins 50 may be elongated for efficient thermal energy transfer to the ambient air and may be constructed of a material such as steel, aluminum, copper, silver, metal silicon, or silicon carbide. One skilled in the art will understand thatfins 50 may be made from any material having a relatively high thermal conductivity. Althoughfins 50 as depicted inFIG. 1 are rectangular in shape, such shape is not a requirement, andfins 50 can have a shape that is square, oval, circular, or a variety of other shapes capable of assisting with heat dissipation from stackeddie package 10. Fins 50 are affixed to an outer surface ofhousing 40 by soldering, brazing, bonding, or by some other manner. - In some embodiments, the stacked die
package 10 includes apressure release apparatus 65. For convenience of illustration and ease of understanding, thepressure release apparatus 65 is shown inFIG. 1 simply as a box. Thepressure release apparatus 65 releases pressure on thehousing 40 caused bycooling fluid 60. When the temperature in thestacked die package 10 increases there is a corresponding increase in the pressure of thecooling fluid 60. If the pressure of the coolingfluid 60 is not offset, this pressure may rupture thehousing 40 of the stackeddie package 10. Thepressure release apparatus 65 releases the pressure in coolingfluid 60 to prevent such a rupture. As one skilled in the art will understand the workings and construction of a pressure release apparatus, the details of such will not be described herein. - In some embodiments, stacked
die package 10 includes adeionizer 75 or an apparatus to deionize ions in the coolingfluid 60 that may be generated by the interaction between the coolingfluid 60 and components of the stackeddie package 10, such as dies A, B, C, D, or bumps 30. If the coolingfluid 60 is not de-ionized, conductivity of coolingfluid 60 may increase causing shorts in one or more dies A, B, C, or D, thereby damaging them. One skilled in the art will appreciate how a deionizer is constructed and for convenience the details of such will not be described herein. - The teachings of the present disclosure of immersing stacked dies in a cooling fluid contained in a housing can also be applied to a multiple chip package.
FIG. 2 is a cross-sectional view of amulti-chip system package 15 according to an embodiment of the invention. Themulti-chip system package 15 may comprise many different chips, stacked chips, and components, such as 3D IC packages, MEMs packaging, system on chips (SOCs), THERMAL SOPs, OPTO SOPs, embedded components, antennas and filters, and the like. A volume of coolingfluid 60 is contained inhousing 40. Coolingfluid 60 both cools and insulates the components ofmulti-chip system package 15. The coolingfluid 60 helps cool the components by absorbing heat generated by the components and drawing the absorbed heat to the walls ofhousing 40 where the absorbed heat is then dissipated to the ambient air. In some embodiments, an outside surface ofhousing 40 includes a plurality of radiators orfins 50 for additional heat dissipation. - Although cooling fluid circulation within
housing 40 may be achieved by passive means as described above, in another embodiment of the present invention an active pumping action with the use of amechanical pump 80 is employed to circulate the coolingfluid 60.FIG. 3 depicts the stackeddie package 10 ofFIG. 1 having apump 80 and aconduit 85.FIG. 3 does not depict apressure release apparatus 65 for ease of illustration. One end of theconduit 85 is connected to a lower inlet or opening inhousing 40 and the other end of theconduit 85 is connected to an upper outlet or opening inhousing 40. Theconduit 85 can be a pipe, tube or any suitable passageway for allowing coolingfluid 60 to circulate from the upper opening to the lower opening.Pump 80 is coupled toconduit 85 for pumping the coolingfluid 60 from the upper opening to the lower opening ofhousing 40.Pump 80 can be any apparatus for circulating the cooling fluid by means of a piston, plunger, or a set of rotating vanes, for example. In operation, thepump 80 pumps cooling fluid 60 from a bottom region ofhousing 40 where the cooling fluid is generally cooler to an upper region ofhousing 40 where the cooling fluid is generally warmer as compared to the cooling fluid at the bottom region. The circulation of cooling fluid 60 from the lower region to the upper region ofhousing 40 cools dies A, B, C, and D. - The teachings of the present disclosure of employing active pumping for circulating fluid in
housing 40 can be equally applied to the multi-chip system package ofFIG. 2 . It is to be understood that cooling fluid flow contained withinhousing 40 in these embodiments and others may be circulated by one or more methods, such as by gravity, an active pumping action, such as with the mechanical pump described above, a passive pumping action, such as with a wicking action, a thermal siphoning action, or the like. - Still referring to
FIG. 3 , in some embodiments stackeddie package 10 includes one ormore barriers 96 disposed within thehousing 40 of the stackeddie package 10.Barriers 96 help direct the fluid flow F of coolingfluid 60, particularly to areas between two stacked dies, in the region of thebumps 30. Without thebarriers 96, a substantial amount of coolingfluid 60 may flow over the top of the topmost die D or around the sides of the dies A, B, C and D as fluid flow will generally take the path of least resistance. One skilled in the art understands that thebarriers 96 may have any configuration or shape so long as such configuration or shape directs the fluid flow F substantially to regions between the dies (e.g., to the region of the bumps 30) and substantially blocks fluid flow over the top of the topmost die D or around the sides of the stacked dies A, B, C and D. - To further dissipate heat and enhance the cooling of cooling
fluid 60, in another embodiment, aheat sink 70 is thermally coupled toconduit 85.Heat sink 70 draws heat from coolingfluid 60 to ambient air thereby cooling coolingfluid 60. - It is important to maintain the level of the cooling
fluid 60 at a prescribed level as otherwise the resultant cooling may be insufficient. Accordingly, aspects of the present disclosure allow monitoring of the level of the coolingfluid 60 in a relatively easy manner, and consequently reduce the risk of excessive temperature increases and the associated problems. In one embodiment, the stackeddie package 10 ofFIG. 3 includestemperature sensors Temperature sensors housing 40 and therefore may be retrofitted in a relatively easy and inexpensive manner. According to one embodiment,temperature sensor 55A is fitted at or near the lower inlet or opening inhousing 40, whereastemperature sensor 55B is positioned at or near the upper outlet or opening inhousing 40 but at a level just below the minimum prescribed cooling fluid level.Temperature sensors fluid 60, the ambient air temperature, and a given stacked die package design. To read the measured outputs of the temperature sensors, the stack diepackage 10 may comprise a computer (not shown) having suitable computer software to receive the outputs and provide information indicative of an operation property from the measured temperatures. In calculating the level of the coolingfluid 60 in thehousing 40, the computer compares a value associated with the measured outputs with predetermined values expected for a normal operation condition. If a difference between the expected predetermined outputs and measured outputs is above a threshold value, the computer is arranged to generate an alarm condition. In other embodiments, the computer may be arranged to generate a warning signal when the coolingfluid 60 drops below a prescribed minimum level. - Although in the above-described embodiments two temperature sensors are employed, a person skilled in the art will appreciate that in further variations more than two temperature sensors may be used. Further, the teachings of the present disclosure of employing temperature sensors for monitoring the cooling fluid level in a stacked die package can be equally applied to a multi-chip system package, such as the one depicted in
FIG. 2 . -
FIG. 4 is a flowchart illustrating amethod 400 of manufacturing a stacked die package having a cooling mechanism according to an embodiment of the present disclosure. Atstep 410 of method 400 a substrate is provided. Next, at step 420 a first die is placed over the substrate. Then, atstep 430 the first die is bonded to the substrate. As an example, the bonding of the first die to the substrate can be accomplished via a flip chip bonding process. - At step 440 a second die is placed over the first die. Next, at
step 450 the second die is bonded to the first die. As an example, the bonding of the second die to the first die can be accomplished via a flip chip bonding process. - At
step 460 is placed over the first and second dies such that the housing seals the dies from the environment. Next, at step 470 a cooling fluid is added to immerse the first and second dies therein. - In some embodiments, step 420 to step 450 may be replaced with a step of first bonding a first die to a second die, placing the bonded first and second dies over the substrate, and then bonding the dies to the substrate.
- The teachings of the present disclosure protect dies in a stacked die package, individual chips, and/or components in a multi-chip system package from excessive heat that would otherwise compromise the performance and/or reliability of the dies, chips and/or components in these packages. It is another advantage that embodiments of the present disclosure require minimal modifications to the current design for existing packages that are low cost and simple to implement. It is yet another advantage of the present disclosure that underfill materials are not needed between stacked dies (not including those dies that are disposed on a substrate or an interposer) in contrast to conventional stacked die packages or multi-chip packages. It is yet another advantage that embodiments of the present disclosure provide monitoring of the level of a cooling fluid in a relatively easy manner and consequently reduce the risk of excessive temperature increases and the associated problems. It is contemplated that the cooling fluid systems and methods of the present disclosure can be used in any electronic packaging system, such as stacked chip package, multi-chip package, or stacked chip and multi-chip package that require a cooling fluid for cooling and/or excess heat prevention.
- In the preceding detailed description, the present invention is described with reference to specifically exemplary embodiments thereof. It will, however, be evident that various modifications, structures, processes, and changes may be made thereto without departing from the broader spirit and scope of the present disclosure. The specification and drawings are, accordingly, to be regarded as illustrative and not restrictive. It is understood that embodiments of the present disclosure are capable of using various other combinations and environments and are capable of changes or modifications within the scope of the invention as expressed herein.
Claims (20)
1. An apparatus for cooling a stacked die package, comprising:
a first die above a substrate;
a second die above the first die;
a cooling fluid in fluid communication with the first die and the second die, the cooling fluid for absorbing thermal energy from the first and the second die;
a housing containing the first and second dies, the housing sealing the first and second dies from an environment, wherein the housing includes a first opening and a second opening, the first and second openings being vertically displaced from one another;
a conduit having one end connected to the first opening and the other end connected to the second opening, the conduit allowing the cooling liquid to circulate from the first opening to the second opening;
a first temperature sensor being arranged to provide an output that is dependent on a local temperature at the first opening; and
a second temperature sensor being arranged to provide an output that is dependent on a local temperature at the second opening, wherein the outputs of the first and second temperature sensors relative to each other are indicative of a level of the cooling fluid.
2. The apparatus of claim 1 , wherein the first and second temperature sensors are positioned at exterior portions of the housing.
3. The apparatus of claim 1 , wherein the second opening is higher than the first opening.
4. The apparatus of claim 1 , wherein the second temperature sensor is located proximate to the second opening at a level just below a minimum prescribed cooling fluid level.
5. The apparatus of claim 1 , wherein the apparatus is arranged so that a warning signal is initiated when a drop in the level of the cooling fluid below a predetermined threshold level is detected.
6. The apparatus of claim 1 , wherein the first and the second temperature sensors are resistive temperature sensors that indicate a change in temperature by a change in electrical resistance.
7. The apparatus of claim 1 , comprising a computer arranged to read the measured outputs of the temperature sensors and provide information indicative of an operation property from the measured temperatures.
8. The apparatus of claim 7 , wherein the computer is arranged to compare the information indicative of an operating property with information associated with an expected predetermined operating property.
9. The apparatus of claim 7 , wherein the computer is arranged to calculate a value that is associated with a level of the cooling fluid.
10. The apparatus of claim 1 , further comprising a pump coupled to the conduit for pumping the cooling fluid from the first opening to the second opening.
11. The apparatus of claim 10 , wherein the pump pumps the cooling fluid from a bottom region of the housing to an upper region of the housing.
12. An apparatus for cooling a multi-chip package system, comprising:
a multi-chip package having two or more dies;
a cooling fluid in fluid communication with the two or more dies, the cooling fluid for absorbing thermal energy from the two or more dies;
a housing containing the multi-chip package, the housing sealing the multi-chip package from the environment, wherein the housing includes a first opening and a second opening, the first and second openings being vertically displaced from one another;
a conduit having one end connected to the first opening and the other end connected to the second opening, the conduit allowing circulating the cooling liquid to circulate from the first opening to the second opening;
a first temperature sensor being arranged to provide an output that is dependent on a local temperature at the first opening; and
a second temperature sensor being arranged to provide an output that is dependent on a local temperature at the second opening, wherein the outputs of the first and second temperature sensors relative to each other are indicative of a level of the cooling fluid.
13. The apparatus of claim 12 , wherein the first and second temperature sensors are positioned at exterior portions of the housing.
14. The apparatus of claim 12 , wherein the second opening is higher than the first opening.
15. The apparatus of claim 12 , wherein the second temperature sensor is located proximate the second opening at a level just below a minimum prescribed cooling fluid level.
16. The apparatus of claim 12 , wherein the apparatus is arranged so that a warning signal is initiated when a drop in the level of the cooling fluid below a predetermined threshold level is detected.
17. The apparatus of claim 12 , wherein the first and the second temperature sensors are resistive temperature sensors that indicate a change in temperature by a change in electrical resistance.
18. The apparatus of claim 12 , comprising a computer arranged to read the measured outputs of the temperature sensors and provide information indicative of an operation property from the measured temperatures.
19. The apparatus of claim 18 , wherein the computer is arranged to compare the information indicative of an operating property with information associated with an expected predetermined operating property.
20. The apparatus of claim 18 , wherein the computer is arranged to calculate a value that is associated with a level of the cooling fluid.
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US14/511,051 US9343436B2 (en) | 2010-09-09 | 2014-10-09 | Stacked package and method of manufacturing the same |
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US13/033,840 US20120061059A1 (en) | 2010-09-09 | 2011-02-24 | Cooling mechanism for stacked die package and method of manufacturing the same |
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Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20120256649A1 (en) * | 2011-04-08 | 2012-10-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dynamic Testing Based on Thermal and Stress Conditions |
US20130081258A1 (en) * | 2011-07-21 | 2013-04-04 | International Business Machines Corporation | Two-phase, water-based immersion-cooling apparatus with passive deionization |
CN103378026A (en) * | 2012-04-16 | 2013-10-30 | 北京大学 | Three-dimensional packaging method having heat radiation function |
US20150171972A1 (en) * | 2012-08-28 | 2015-06-18 | Huawei Technologies Co., Ltd. | Optical Receiver |
US20150200008A1 (en) * | 2014-01-16 | 2015-07-16 | Kabushiki Kaisha Toshiba | Semiconductor package and electronic apparatus |
US20150200151A1 (en) * | 2014-01-13 | 2015-07-16 | Stmicroelectronics Sa | Device comprising a three-dimensional integrated structure with simplified thermal dissipation, and corresponding fabrication method |
US20160013114A1 (en) * | 2014-07-14 | 2016-01-14 | Micron Technology, Inc. | Stacked semiconductor die assemblies with high efficiency thermal paths and associated systems |
US9508607B2 (en) | 2012-07-20 | 2016-11-29 | Qualcomm Incorporated | Thermal management of tightly integrated semiconductor device, system and/or package |
US9711487B2 (en) | 2015-04-08 | 2017-07-18 | Samsung Electronics Co., Ltd. | Method and device for controlling operation using temperature deviation in multi-chip package |
US9941250B2 (en) | 2012-08-30 | 2018-04-10 | International Business Machines Corporation | Chip stack structures that implement two-phase cooling with radial flow |
US10177116B2 (en) | 2014-02-05 | 2019-01-08 | International Business Machines Corporation | Large channel interconnects with through silicon vias (TSVs) and method for constructing the same |
US20220179465A1 (en) * | 2016-09-27 | 2022-06-09 | International Business Machines Corporation | Sensor-based non-uniform cooling |
Citations (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5144811A (en) * | 1991-01-10 | 1992-09-08 | Hughes Aircraft Company | Condensation control system for water-cooled electronics |
US5189911A (en) * | 1992-01-10 | 1993-03-02 | Sarasota Measurements & Controls, Inc. | Liquid level and temperature sensing device |
US5270571A (en) * | 1991-10-30 | 1993-12-14 | Amdahl Corporation | Three-dimensional package for semiconductor devices |
US5270572A (en) * | 1991-06-26 | 1993-12-14 | Hitachi, Ltd. | Liquid impingement cooling module for semiconductor devices |
US5528456A (en) * | 1993-11-15 | 1996-06-18 | Nec Corporation | Package with improved heat transfer structure for semiconductor device |
US5737186A (en) * | 1995-04-20 | 1998-04-07 | Daimler-Benz Ag | Arrangement of plural micro-cooling devices with electronic components |
US6349760B1 (en) * | 1999-10-22 | 2002-02-26 | Intel Corporation | Method and apparatus for improving the thermal performance of heat sinks |
US6550263B2 (en) * | 2001-02-22 | 2003-04-22 | Hp Development Company L.L.P. | Spray cooling system for a device |
US20030123225A1 (en) * | 2001-12-27 | 2003-07-03 | Miller Charles A. | Electronic package with direct cooling of active electronic components |
US20030159456A1 (en) * | 2002-02-22 | 2003-08-28 | Advanced Thermal Sciences Corp. | Systems and methods for temperature control |
US20040264124A1 (en) * | 2003-06-30 | 2004-12-30 | Patel Chandrakant D | Cooling system for computer systems |
US20060023424A1 (en) * | 2004-07-30 | 2006-02-02 | Espec Corp. | Cooling apparatus |
US7019971B2 (en) * | 2003-09-30 | 2006-03-28 | Intel Corporation | Thermal management systems for micro-components |
US7032392B2 (en) * | 2001-12-19 | 2006-04-25 | Intel Corporation | Method and apparatus for cooling an integrated circuit package using a cooling fluid |
US7159414B2 (en) * | 2002-09-27 | 2007-01-09 | Isothermal Systems Research Inc. | Hotspot coldplate spray cooling system |
US7180742B1 (en) * | 2004-05-24 | 2007-02-20 | Nvidia Corporation | Apparatus and method for cooling semiconductor devices |
US7289326B2 (en) * | 2006-02-02 | 2007-10-30 | Sun Microsystems, Inc. | Direct contact cooling liquid embedded package for a central processor unit |
US20080013291A1 (en) * | 2006-07-17 | 2008-01-17 | Toralf Bork | Thermal flow sensor having streamlined packaging |
US7344363B2 (en) * | 2003-01-31 | 2008-03-18 | Cooligy Inc. | Remedies to prevent cracking in a liquid system |
US20080128896A1 (en) * | 2006-12-05 | 2008-06-05 | Keiji Toh | Semiconductor apparatus and manufacturing method thereof |
US20080141875A1 (en) * | 2006-12-13 | 2008-06-19 | Jurgen Fahrenback | Cooled energy storage device and press including such a device |
US20090052137A1 (en) * | 2007-08-22 | 2009-02-26 | Chien Ouyang | Micro thrust cooling |
US7561425B2 (en) * | 2006-06-07 | 2009-07-14 | The Boeing Company | Encapsulated multi-phase electronics heat-sink |
US20090231811A1 (en) * | 2008-03-11 | 2009-09-17 | Hitachi. Ltd. | Electric Power Conversion Apparatus |
US20090268404A1 (en) * | 2008-04-23 | 2009-10-29 | International Business Machines Corporation | Energy efficient apparatus and method for cooling an electronics rack |
US20090279220A1 (en) * | 2008-05-06 | 2009-11-12 | Hauenstein Henning M | Semiconductor device package with internal device protection |
US20100134947A1 (en) * | 2007-01-25 | 2010-06-03 | Ion A-Z, Llc | Fluid cooled electrical capacitor and methods of making and using |
US20100246117A1 (en) * | 2008-02-28 | 2010-09-30 | International Business Machines Coporation | Variable flow computer cooling system for a data center and method of operation |
US7849914B2 (en) * | 2006-05-02 | 2010-12-14 | Clockspeed, Inc. | Cooling apparatus for microelectronic devices |
US20110292601A1 (en) * | 2010-05-26 | 2011-12-01 | International Business Machines Corporation | Dehumidifying and re-humidifying apparatus and method for an electronics rack |
US20110292595A1 (en) * | 2010-05-27 | 2011-12-01 | International Business Machines Corporation | Liquid Cooling System for Stackable Modules in Energy-Efficient Computing Systems |
-
2011
- 2011-02-24 US US13/033,840 patent/US20120061059A1/en not_active Abandoned
Patent Citations (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5144811A (en) * | 1991-01-10 | 1992-09-08 | Hughes Aircraft Company | Condensation control system for water-cooled electronics |
US5270572A (en) * | 1991-06-26 | 1993-12-14 | Hitachi, Ltd. | Liquid impingement cooling module for semiconductor devices |
US5270571A (en) * | 1991-10-30 | 1993-12-14 | Amdahl Corporation | Three-dimensional package for semiconductor devices |
US5189911A (en) * | 1992-01-10 | 1993-03-02 | Sarasota Measurements & Controls, Inc. | Liquid level and temperature sensing device |
US5528456A (en) * | 1993-11-15 | 1996-06-18 | Nec Corporation | Package with improved heat transfer structure for semiconductor device |
US5737186A (en) * | 1995-04-20 | 1998-04-07 | Daimler-Benz Ag | Arrangement of plural micro-cooling devices with electronic components |
US6349760B1 (en) * | 1999-10-22 | 2002-02-26 | Intel Corporation | Method and apparatus for improving the thermal performance of heat sinks |
US6550263B2 (en) * | 2001-02-22 | 2003-04-22 | Hp Development Company L.L.P. | Spray cooling system for a device |
US7032392B2 (en) * | 2001-12-19 | 2006-04-25 | Intel Corporation | Method and apparatus for cooling an integrated circuit package using a cooling fluid |
US20030123225A1 (en) * | 2001-12-27 | 2003-07-03 | Miller Charles A. | Electronic package with direct cooling of active electronic components |
US20060274501A1 (en) * | 2001-12-27 | 2006-12-07 | Formfactor, Inc. | Electronic package with direct cooling of active electronic components |
US20030159456A1 (en) * | 2002-02-22 | 2003-08-28 | Advanced Thermal Sciences Corp. | Systems and methods for temperature control |
US7159414B2 (en) * | 2002-09-27 | 2007-01-09 | Isothermal Systems Research Inc. | Hotspot coldplate spray cooling system |
US7344363B2 (en) * | 2003-01-31 | 2008-03-18 | Cooligy Inc. | Remedies to prevent cracking in a liquid system |
US20040264124A1 (en) * | 2003-06-30 | 2004-12-30 | Patel Chandrakant D | Cooling system for computer systems |
US7019971B2 (en) * | 2003-09-30 | 2006-03-28 | Intel Corporation | Thermal management systems for micro-components |
US7180742B1 (en) * | 2004-05-24 | 2007-02-20 | Nvidia Corporation | Apparatus and method for cooling semiconductor devices |
US7274568B1 (en) * | 2004-05-24 | 2007-09-25 | Nvidia Corporation | Apparatus and method for cooling semiconductor devices |
US20060023424A1 (en) * | 2004-07-30 | 2006-02-02 | Espec Corp. | Cooling apparatus |
US7289326B2 (en) * | 2006-02-02 | 2007-10-30 | Sun Microsystems, Inc. | Direct contact cooling liquid embedded package for a central processor unit |
US7849914B2 (en) * | 2006-05-02 | 2010-12-14 | Clockspeed, Inc. | Cooling apparatus for microelectronic devices |
US7561425B2 (en) * | 2006-06-07 | 2009-07-14 | The Boeing Company | Encapsulated multi-phase electronics heat-sink |
US20080013291A1 (en) * | 2006-07-17 | 2008-01-17 | Toralf Bork | Thermal flow sensor having streamlined packaging |
US20080128896A1 (en) * | 2006-12-05 | 2008-06-05 | Keiji Toh | Semiconductor apparatus and manufacturing method thereof |
US20080141875A1 (en) * | 2006-12-13 | 2008-06-19 | Jurgen Fahrenback | Cooled energy storage device and press including such a device |
US20100134947A1 (en) * | 2007-01-25 | 2010-06-03 | Ion A-Z, Llc | Fluid cooled electrical capacitor and methods of making and using |
US20090052137A1 (en) * | 2007-08-22 | 2009-02-26 | Chien Ouyang | Micro thrust cooling |
US20100246117A1 (en) * | 2008-02-28 | 2010-09-30 | International Business Machines Coporation | Variable flow computer cooling system for a data center and method of operation |
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