US20120038417A1 - Integrated circuit for reducing nonlinearity in sampling networks - Google Patents
Integrated circuit for reducing nonlinearity in sampling networks Download PDFInfo
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- US20120038417A1 US20120038417A1 US12/856,820 US85682010A US2012038417A1 US 20120038417 A1 US20120038417 A1 US 20120038417A1 US 85682010 A US85682010 A US 85682010A US 2012038417 A1 US2012038417 A1 US 2012038417A1
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
- G11C27/02—Sample-and-hold arrangements
- G11C27/024—Sample-and-hold arrangements using a capacitive memory element
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
- G11C27/02—Sample-and-hold arrangements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
- H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
- H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
- H03K2217/0018—Special modifications or use of the back gate voltage of a FET
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
- H03K2217/0054—Gating switches, e.g. pass gates
Definitions
- Sampling networks may be used for a variety of uses, such as digital filtering, analog-to-digital conversion, digital-to-analog conversion, or sampling inputs with sample and hold (or track and hold) circuits.
- sample and hold or track and hold circuits.
- a plurality of input signals are sampled onto an array of capacitors, sample and hold circuits, or track and hold circuits, depending on the configuration of the network.
- the stored signal may then be converted or filtered based on the design of the network.
- Sampling networks have a number of drawbacks which do not allow for ideal operation.
- An example of one such drawback is distortion that is produced from various circuit elements within the network.
- the input switch may be an initial source of distortion for the sampling network. This may occur in the network regardless of whether the circuit is in a track phase (where the tracking capacitors are being charged) or the circuit is in the hold phase (where the charge is held on the capacitors).
- sampling networks regardless of the configuration, have other sources of distortion.
- a particular high source of distortion in sampling networks occurs at the voltage sampled at a sampling capacitor. This is generally a result of the presence of a nonlinear resistor used in the sampling network which may be voltage dependent and thus cause distortion at the output of a sampled capacitor.
- Nonlinear parasitic capacitance may additionally contribute to the distortion at the sampled capacitor.
- One method to correct this distortion is to use a bootstrap circuit to “bootstrap” the devices in the sampling network.
- a bootstrap circuit that is connected to an input switch can pull up the current through the input switch and keep the gate-to-source and the back-gate-to-source voltages constant, and effectively eliminate a variation of the resistance of the nonlinear resistor from varying the input voltage.
- the use of a bootstrap circuit has the additional benefit of causing a reduction in a variation of a switch resistor with the input voltage.
- bootstrap circuits may lead to unwanted residual effects.
- bootstrapping a back-gate of a MOSFET device would lead to an unwanted junction capacitance at the input of the sampling network.
- This additional capacitance introduces nonlinearity at the input that may degrade the performance of the sampling network.
- FIG. 2 is an equivalent diagram of the integrated circuit coupled with a sampling network.
- Nonlinearity and distortion in a sampling network may be overcome by an integrated circuit that introduces additional series resistance into a sampling network.
- Embodiments of the present invention provide a pair of bootstrap circuits which may be coupled to a sampling network (such as an analog to digital converter), and a resistive element which may be connected between the input and a back-gate switch of the sampling network.
- Transistor 130 may be coupled to the voltage input terminal at the source terminal of the transistor, tying the source to the input.
- the source terminal of transistor 130 may have a representative source impedance, Z s , which is not shown.
- Z s a representative source impedance
- the drain terminal of transistor 130 may be coupled to capacitor 140 .
- Capacitor 140 may be connected to a switch 170 , which may connect and disconnect the sampling capacitor to ground.
- the back-gate of transistor 130 may be coupled to bootstrap circuit 150 .
- Bootstrap circuit 150 may contain two transistors, 152 , 154 .
- Transistors 152 and 154 may also be any nMOS devices.
- the source terminals of transistors 152 and 154 may be coupled together and tied to the back-gate of transistor 130 of the sampling network.
- the drain terminal of transistor 152 may be coupled to ground, and the drain terminal of transistor 154 may be coupled to resistor 160 , which may be a variable resistor.
- Resistor 160 may be coupled to the voltage input terminal.
- resistor 160 may be between 300 ohms to 1 kilohm. A resistance value that is significantly larger than 1 kilohm may actually degrade the performance of the sampling network and reduce an effectiveness of the bootstrapping of the back-gate by bootstrap circuit 150 .
- Transistor 134 may also turn on and operate in a linear region when the input signal is applied. Alternately during this phase, transistor 132 may be off. When transistor 134 is on, resistor 160 may be connected to the back-gate of transistor 130 . Resistor 160 may isolate the back-gate from the input signal and from the source terminal of transistor 130 .
- switch 170 When the capacitor plates of capacitor 140 have a differential voltage equal to V in , switch 170 may open. During this disconnecting phase, the voltage at the drain terminal of transistor 130 may be equal to V in and the drain-to-source voltage may be zero. Bootstrap circuit 110 may output a lower voltage to transistor 130 , where the gate-source voltage may be less than the threshold voltage. Transistor 130 may turn off, disconnecting capacitor 140 from the input.
- transistor 134 may turn off, disconnecting the back-gate of transistor 130 from the input signal.
- Transistor 132 may turn off, connecting the back-gate of transistor 130 to ground.
- resistor 160 may decrease the nonlinearity at the voltage input during operation, which is created by the nonlinear capacitance, C P , in the back-gate of transistor 130 . This may be demonstrated by modeling the input voltage in terms of transistor 130 and resistor 160 , which may be represented by equation (i):
- V in V s ⁇ Z L ⁇ ( 1 + sC p ⁇ R ) ( Z s + Z L ) ⁇ [ 1 + sC p ⁇ ( ( Z s ⁇ Z L Z s + Z L ) + R ) ] ( i )
- Z L is the impedance of sampling capacitor 160 and switch 170
- Z s is the source impedance of transistor 130
- V s is the source voltage of transistor 130
- R is the resistance of resistor 160
- C p is the back-gate nonlinear capacitance of transistor 130 scaled by a factor s.
- the relative distortion of the input voltage may further be modeled by the equation:
- V in - s ⁇ ⁇ ⁇ ⁇ ⁇ C p ⁇ ( Z s ⁇ Z L Z s + Z L ) ( 1 + s ⁇ ⁇ C p ⁇ R ) ⁇ [ 1 + s ⁇ ⁇ C p ⁇ ( ( Z s ⁇ Z L Z s + Z L ) + R ) ] ⁇ ⁇
- ⁇ C p is the distortion of the nonlinear capacitance of the back-gate of transistor 130 .
- V in - s ⁇ ⁇ ⁇ ⁇ C p ⁇ ( Z s ⁇ Z L Z s + Z L ) ( 1 + sC p ⁇ ( Z s ⁇ Z L Z s + Z L ) ) ( iii )
- Absent resistor 160 a distortion that is dependent on nonlinear back-gate capacitance C p may worsen.
- An input with a high frequency may also adversely affect the distortion at the voltage input terminal of a typical sampling voltage, creating a capacitive high-pass filter, in the absence of resistor 160 .
- Inserting resistor 160 between the back-gate of transistor 130 and the voltage input terminal may convert the capacitive high-pass filter to a low-pass filter response. If R is increased and thus the distortion is decreased, the corresponding frequency may also decrease.
- resistor 160 may reduce distortion due to nonlinearity from the back-gate capacitance in transistor 130 , other sources of distortion at the input may occur. These sources may include a switch resistance variation that occurs between the gate voltage and the back-gate voltage of transistor 130 . These sources may be corrected directly by bootstrap circuit 110 and bootstrap circuit 150 .
- FIG. 2 illustrates an equivalent diagram of the resistor insertion technique of the present invention embodied in FIG. 1 .
- V s may represent the voltage at the source of a MOSFET device in a sampling network and Z s may represent the impedance at the source of the MOSFET device.
- the source impedance may be coupled to the input voltage.
- Resistor 160 may be coupled to the input voltage and to a nonlinear capacitance C p of the MOSFET device.
- C p may be connected to ground and may be in series with resistor 160 .
- Resistor 160 and nonlinear capacitance C p may be connected in parallel with a load impedance Z L , where the load impedance may be the impedance of connected sampling capacitors.
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Abstract
Description
- The present invention relates to a sampling network. The present invention further relates to an integrated circuit that corrects a distortion at the input of a sampling network. The present invention further relates to a circuit that reduces nonlinearity in a sampling network resulting from a back-gate capacitance of a MOSFET device in the network.
- Sampling networks may be used for a variety of uses, such as digital filtering, analog-to-digital conversion, digital-to-analog conversion, or sampling inputs with sample and hold (or track and hold) circuits. In a particular sampling network, a plurality of input signals are sampled onto an array of capacitors, sample and hold circuits, or track and hold circuits, depending on the configuration of the network. The stored signal may then be converted or filtered based on the design of the network.
- Sampling networks have a number of drawbacks which do not allow for ideal operation. An example of one such drawback is distortion that is produced from various circuit elements within the network. In a sampling network that uses track and hold circuits, the input switch may be an initial source of distortion for the sampling network. This may occur in the network regardless of whether the circuit is in a track phase (where the tracking capacitors are being charged) or the circuit is in the hold phase (where the charge is held on the capacitors).
- Additionally, all sampling networks, regardless of the configuration, have other sources of distortion. A particular high source of distortion in sampling networks occurs at the voltage sampled at a sampling capacitor. This is generally a result of the presence of a nonlinear resistor used in the sampling network which may be voltage dependent and thus cause distortion at the output of a sampled capacitor. Nonlinear parasitic capacitance may additionally contribute to the distortion at the sampled capacitor. One method to correct this distortion is to use a bootstrap circuit to “bootstrap” the devices in the sampling network. A bootstrap circuit that is connected to an input switch can pull up the current through the input switch and keep the gate-to-source and the back-gate-to-source voltages constant, and effectively eliminate a variation of the resistance of the nonlinear resistor from varying the input voltage. The use of a bootstrap circuit has the additional benefit of causing a reduction in a variation of a switch resistor with the input voltage.
- The use of bootstrap circuits however, may lead to unwanted residual effects. For example, in a bootstrap circuit using MOSFET devices, bootstrapping a back-gate of a MOSFET device would lead to an unwanted junction capacitance at the input of the sampling network. This additional capacitance introduces nonlinearity at the input that may degrade the performance of the sampling network. Thus there remains a need in the art, for an integrated circuit which may improve linearity at the input of a sampling network, without leading to additional distortion.
-
FIG. 1 is a diagram of the integrated circuit with multiple bootstrap circuits coupled to a sampling network. -
FIG. 2 is an equivalent diagram of the integrated circuit coupled with a sampling network. - The subject invention will now be described in detail for specific preferred embodiments of the invention, it being understood that these embodiments are intended only as illustrative examples and the invention is not to be limited thereto.
- Nonlinearity and distortion in a sampling network may be overcome by an integrated circuit that introduces additional series resistance into a sampling network. Embodiments of the present invention provide a pair of bootstrap circuits which may be coupled to a sampling network (such as an analog to digital converter), and a resistive element which may be connected between the input and a back-gate switch of the sampling network.
-
FIG. 1 illustrates an integrated circuit of the present invention.Integrated circuit 100 may contain asampling network 120 coupled tobootstrap circuit 110.Sampling network 120 may contain atransistor 130 and asampling capacitor 140.Transistor 130 may be any three-terminal transistor such as an nMOS device. The gate oftransistor 130 may be coupled to the output ofbootstrap circuit 110. The input ofbootstrap circuit 110 may be connected to a voltage input terminal. For ease of illustration, the details ofbootstrap circuit 110 are not depicted. -
Transistor 130 may be coupled to the voltage input terminal at the source terminal of the transistor, tying the source to the input. The source terminal oftransistor 130 may have a representative source impedance, Zs, which is not shown. Asbootstrap circuit 110 is directly connected to the voltage input terminal, the output of thebootstrap circuit 110 will vary with a change to Vin, and the gate-to-source voltage oftransistor 130 may remain fixed. The drain terminal oftransistor 130 may be coupled tocapacitor 140. Capacitor 140 may be connected to aswitch 170, which may connect and disconnect the sampling capacitor to ground. - The back-gate of
transistor 130 may be coupled tobootstrap circuit 150.Bootstrap circuit 150 may contain two transistors, 152, 154.Transistors transistors transistor 130 of the sampling network. The drain terminal oftransistor 152 may be coupled to ground, and the drain terminal oftransistor 154 may be coupled toresistor 160, which may be a variable resistor.Resistor 160 may be coupled to the voltage input terminal. In an embodiment,resistor 160 may be between 300 ohms to 1 kilohm. A resistance value that is significantly larger than 1 kilohm may actually degrade the performance of the sampling network and reduce an effectiveness of the bootstrapping of the back-gate bybootstrap circuit 150. - During a sampling phase, an input signal (Vin) is applied to the source terminal of
transistor 130. During this phase, the input signal is also applied to an input ofbootstrap circuit 110 which may output a bootstrap voltage which may be greater than Vin to the gate terminal oftransistor 130. As the voltage of the gate terminal of may be greater than the voltage at the source terminal, the gate-to-source voltage (“VGS”) oftransistor 130 may be greater than a threshold voltage (“VTH”), andtransistor 130 may turn on. Whentransistor 130 is on, a channel is open between the drain and the source of the transistor, and the input signal may be applied tocapacitor 140. Switch 170 may close, connecting a bottom plate ofcapacitor 140 to ground. - Transistor 134 may also turn on and operate in a linear region when the input signal is applied. Alternately during this phase, transistor 132 may be off. When transistor 134 is on,
resistor 160 may be connected to the back-gate oftransistor 130.Resistor 160 may isolate the back-gate from the input signal and from the source terminal oftransistor 130. - When the capacitor plates of
capacitor 140 have a differential voltage equal to Vin,switch 170 may open. During this disconnecting phase, the voltage at the drain terminal oftransistor 130 may be equal to Vin and the drain-to-source voltage may be zero.Bootstrap circuit 110 may output a lower voltage totransistor 130, where the gate-source voltage may be less than the threshold voltage.Transistor 130 may turn off, disconnectingcapacitor 140 from the input. - During this disconnecting phase, transistor 134 may turn off, disconnecting the back-gate of
transistor 130 from the input signal. Transistor 132 may turn off, connecting the back-gate oftransistor 130 to ground. - The insertion of
resistor 160 between the voltage input terminal andbootstrap circuit 150 may decrease the nonlinearity at the voltage input during operation, which is created by the nonlinear capacitance, CP, in the back-gate oftransistor 130. This may be demonstrated by modeling the input voltage in terms oftransistor 130 andresistor 160, which may be represented by equation (i): -
- where ZL is the impedance of
sampling capacitor 160 and switch 170, Zs is the source impedance oftransistor 130, Vs is the source voltage oftransistor 130, R is the resistance ofresistor 160, and Cp is the back-gate nonlinear capacitance oftransistor 130 scaled by a factor s. - The relative distortion of the input voltage may further be modeled by the equation:
-
- is the relative distortion of the input voltage, and δCp is the distortion of the nonlinear capacitance of the back-gate of
transistor 130. - As demonstrated by equation (ii),
-
- is inversely proportional to R, and therefore the relative distortion of the input voltage may decrease if the resistance of
resistor 160 is increased. Ifresistor 160 is removed, R=0, and the relative distortion of the input voltage may be entirely dependent on the nonlinear back-gate capacitance CP, as shown in equation (iii): -
- Absent
resistor 160, a distortion that is dependent on nonlinear back-gate capacitance Cp may worsen. An input with a high frequency may also adversely affect the distortion at the voltage input terminal of a typical sampling voltage, creating a capacitive high-pass filter, in the absence ofresistor 160. Insertingresistor 160 between the back-gate oftransistor 130 and the voltage input terminal may convert the capacitive high-pass filter to a low-pass filter response. If R is increased and thus the distortion is decreased, the corresponding frequency may also decrease. - Although
resistor 160 may reduce distortion due to nonlinearity from the back-gate capacitance intransistor 130, other sources of distortion at the input may occur. These sources may include a switch resistance variation that occurs between the gate voltage and the back-gate voltage oftransistor 130. These sources may be corrected directly bybootstrap circuit 110 andbootstrap circuit 150. - The technique described herein may be used in any other sampling network where any nonlinear capacitance is generated in a signal path from an input voltage.
FIG. 2 illustrates an equivalent diagram of the resistor insertion technique of the present invention embodied inFIG. 1 . Vs may represent the voltage at the source of a MOSFET device in a sampling network and Zs may represent the impedance at the source of the MOSFET device. The source impedance may be coupled to the input voltage.Resistor 160 may be coupled to the input voltage and to a nonlinear capacitance Cp of the MOSFET device. Cp may be connected to ground and may be in series withresistor 160.Resistor 160 and nonlinear capacitance Cp may be connected in parallel with a load impedance ZL, where the load impedance may be the impedance of connected sampling capacitors. - Several embodiments of the invention are specifically illustrated and/or described herein. However, it will be appreciated that modifications and variations of the invention are covered by the above teachings and within the purview of the appended claims without departing from the spirit and intended scope of the invention.
Claims (15)
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US8698522B2 (en) * | 2011-06-08 | 2014-04-15 | Linear Technology Corporation | System and methods to improve the performance of semiconductor based sampling system |
US8723556B2 (en) * | 2011-06-08 | 2014-05-13 | Linear Technology Corporation | System and methods to improve the performance of semiconductor based sampling system |
US9065437B2 (en) * | 2013-04-29 | 2015-06-23 | Mediatek Singapore Pte. Ltd. | Circuit for driving high-side transistor utilizing voltage boost circuits |
CN103269202A (en) * | 2013-05-16 | 2013-08-28 | 苏州益高电动车辆制造有限公司 | Controller bootstrap type pre-charging self-discharging circuit |
US10037814B2 (en) * | 2015-09-11 | 2018-07-31 | Texas Instruments Incorporated | Track and hold with active charge cancellation |
US9419639B1 (en) | 2015-09-23 | 2016-08-16 | Qualcomm Incorporated | Low distortion sample and hold switch |
US10312906B2 (en) | 2016-09-16 | 2019-06-04 | Asahi Kasei Microdevices Corporation | Switch apparatus |
JP6845680B2 (en) * | 2016-12-19 | 2021-03-24 | 新日本無線株式会社 | Analog switch circuit |
US10236765B2 (en) * | 2017-01-31 | 2019-03-19 | Infineon Technologies Ag | Switched-capacitor circuit and method of operating a switched-capacitor circuit |
US11264111B2 (en) | 2017-08-14 | 2022-03-01 | Silicon Laboratories Inc. | Reduced-leakage apparatus for sampling electrical signals and associated methods |
US10515708B2 (en) * | 2017-08-14 | 2019-12-24 | Silicon Laboratories Inc. | Apparatus for sampling electrical signals with improved hold time and associated methods |
US10497455B2 (en) | 2017-08-14 | 2019-12-03 | Silicon Laboratories Inc. | Apparatus for sampling electrical signals with reduced leakage current and associated methods |
US11699995B2 (en) | 2020-12-02 | 2023-07-11 | Stmicroelectronics International N.V. | Multiplexer with highly linear analog switch |
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US5084634A (en) * | 1990-10-24 | 1992-01-28 | Burr-Brown Corporation | Dynamic input sampling switch for CDACS |
US5172019A (en) * | 1992-01-17 | 1992-12-15 | Burr-Brown Corporation | Bootstrapped FET sampling switch |
US5422583A (en) * | 1994-03-08 | 1995-06-06 | Analog Devices Inc. | Back gate switched sample and hold circuit |
US6265911B1 (en) * | 1999-12-02 | 2001-07-24 | Analog Devices, Inc. | Sample and hold circuit having improved linearity |
US6396325B2 (en) * | 1999-12-03 | 2002-05-28 | Fairchild Semiconductor Corporation | High frequency MOSFET switch |
US6329848B1 (en) * | 2000-04-27 | 2001-12-11 | Maxim Integrated Products, Inc. | Sample and hold circuits and methods |
US6525574B1 (en) * | 2001-09-06 | 2003-02-25 | Texas Instruments Incorporated | Gate bootstrapped CMOS sample-and-hold circuit |
US6693479B1 (en) * | 2002-06-06 | 2004-02-17 | Analog Devices, Inc. | Boost structures for switched-capacitor systems |
JP4128545B2 (en) * | 2004-05-20 | 2008-07-30 | 富士通株式会社 | Sampling switch |
US7453291B2 (en) * | 2004-09-09 | 2008-11-18 | The Regents Of The University Of California | Switch linearized track and hold circuit for switch linearization |
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