US20100141494A1 - Digital-to-analog converter having efficient switch configuration - Google Patents
Digital-to-analog converter having efficient switch configuration Download PDFInfo
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- US20100141494A1 US20100141494A1 US12/330,527 US33052708A US2010141494A1 US 20100141494 A1 US20100141494 A1 US 20100141494A1 US 33052708 A US33052708 A US 33052708A US 2010141494 A1 US2010141494 A1 US 2010141494A1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/68—Digital/analogue converters with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits
- H03M1/682—Digital/analogue converters with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits both converters being of the unary decoded type
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/74—Simultaneous conversion
- H03M1/76—Simultaneous conversion using switching tree
- H03M1/765—Simultaneous conversion using switching tree using a single level of switches which are controlled by unary decoded digital signals
Definitions
- the present invention relates to a digital-to-analog converter (DAC) configuration, and more particularly, to a DAC that uses fewer switches and has a more efficient circuit configuration.
- DAC digital-to-analog converter
- a conventional DAC 100 is formed by a resistor string 110 and a plurality of binary selectors 120 .
- the resistor string 110 is electrically connected between a first voltage level V 1 and a second voltage level V 2 so that each terminal of the resistors in the string 110 has a specific and different voltage level.
- Each binary selector 120 includes two switches 122 and 124 respectively controlled by a binary bit and its inverse. The switch that corresponds to the bit having a value equal to ‘1’ will be switched on, while another switch that corresponds to the bit having a value equal to ‘0’ will be switched off. Please refer to FIG.
- the binary selectors 120 are arranged in four stages, wherein the binary selectors 120 in the first stage are controlled by the first bit b 0 and its inverse b 0b , the binary selectors 120 in the second stage are controlled by the second bit b 1 and its inverse b 1b , and so on.
- the switches of the binary selectors 120 controlled by b 0b , b 1b , b 2 and b 3 are turned on, generating a conducting path that couples the output of the DAC 100 to the target terminal in the resistor string 110 .
- the DAC 100 therefore transforms the digital value ‘0011’ into an analog value, i.e. the voltage level at the target terminal.
- the conventional DAC requires 30 switches to convert a digital value with 4 bits.
- 2 ⁇ (2 n ⁇ 1) switches are needed.
- the bit number of the digital value increases, the number of switches required grows significantly, resulting in increases of chip area and power consumption for the DAC.
- One objective of the present invention is therefore to provide a DAC that uses fewer switches and has more efficient circuit configuration.
- the DAC is implemented in a source driver of a liquid crystal display (LCD) device, the gamma coupling and power consumption can both be reduced.
- a DAC comprises a gamma voltage generator for generating a plurality of gamma voltages, and a decoder for receiving an M-bit digital value to select one of the gamma voltages, wherein the decoder comprises a first thermometer encoder, a first selector and a second selector.
- the first thermometer encoder is utilized to receive N bits of the digital value to generate a first thermometer code with 2 N bits, wherein N is smaller than M, and M and N are positive integers.
- the first selector has a plurality of selecting groups, each selecting group having 2 N switches controlled by the first thermometer code to output one gamma voltage, where the second selector receives the gamma voltages outputted by the selecting groups of the first selector and outputs one gamma voltage selected from the received gamma voltages based on the (M ⁇ N) bit of the digital value.
- FIG. 1 shows a diagram of a conventional DAC formed by a resistor string and a plurality of binary selectors.
- FIG. 2 is a diagram showing how the DAC in FIG. 1 converts a digital value ‘b 0 b 1 b 2 b 3 ’ into an analog value.
- FIG. 3 shows a diagram of a DAC structure according to one exemplary embodiment of the present invention.
- FIG. 4 shows a diagram of a DAC structure according to another exemplary embodiment of the present invention.
- FIG. 5 shows a diagram of a DAC structure according to another exemplary embodiment of the present invention.
- FIG. 6 shows a diagram of a DAC structure according to another exemplary embodiment of the present invention.
- FIG. 3 shows a diagram of a DAC structure according to one exemplary embodiment of the present invention.
- the DAC 300 comprises a gamma voltage generator 310 utilized for generating a plurality of gamma voltages, and a decoder 320 utilized for receiving a M-bit digital value and selecting one of the gamma voltages according to the digital value, thereby converting the digital value into an analog gamma voltage at the output end of the DAC 300 .
- the gamma voltage generator 310 can be, but is not limited to, the resistor string 110 that is coupled between two voltage levels V 1 and V 2 shown in FIG. 1 .
- the decoder 320 comprises a first selector 340 and a second selector 360 , wherein in this embodiment, the first selector 340 and the second selector 360 are formed by selecting groups each having a plurality of switches whose output terminals are connected directly together.
- the first selector 340 comprises four selecting groups 350 a, 350 b, 350 c and 350 d, and each selecting group comprises 4 switches 355 w, 355 x, 355 y, and 355 z.
- the second selector 360 comprises one selecting group comprising 4 switches 365 w, 365 x, 365 y, and 365 z.
- the switch 355 may be implemented by an NMOS or PMOS, depending on the system requirement.
- the first selector 340 is controlled by a first thermometer code ‘q 0a q 0b q 0c q 0d ’ generated from encoding part of the M-bit digital value
- the second selector 360 is controlled by a second thermometer code ‘q 1a q 1b q 1c q 1d ’ generated from encoding the other part of the M-bit digital value.
- Switches 355 w, 355 x, 355 y, and 355 z are respectively controlled by q 0a , q 0b , q 0c , and q 0d , while switches 365 w, 365 x, 365 y, and 365 z are respectively controlled by q 1a , q 1b , q 1c , and q 1d . More specifically, the switch 355 w in every selecting group 350 a - 350 d is controlled by the first bit q 0a of the first thermometer code, the switch 355 x in every selecting group 350 a - 350 d is controlled by the second bit q 0b , and so on.
- the switch 355 w when the switch 355 w is implemented by a NMOS, it will be turned on if the value of q 0a equals to ‘1’ (i.e. high voltage level), and will be turned off if the value of q 0a equals to ‘0’ (i.e. low voltage level).
- ‘1’ i.e. high voltage level
- 0 i.e. low voltage level
- the encoding is performed by a first thermometer encoder 330 and a second thermometer encoder 370 .
- the first thermometer encoder 330 receives N bits of the digital value (for example, the least significant N bits of the digital value), and encodes it to generate the first thermometer code with 2 N bits, where N is smaller than M and is a positive integer;
- the second thermometer encoder 370 receives the rest (M ⁇ N) bits of the digital value (for example, the most significant (M ⁇ N) bits if the digital value), and encodes it to generate the second thermometer code with 2 (M ⁇ N) bits.
- the second thermometer encoder 370 receives the other 2 bits of the digital value to generate the second thermometer code with 4 bits ‘q 1a q 1b q 1c q 1d ’.
- the input digital value is represented by ‘b 0 b 1 b 2 b 3 ’
- the first thermometer encoder 330 receives two bits b 0 and b 1 , and generates the first thermometer code ‘q 0a q 0b q 0c q 0d ’ based on the following equations:
- thermometer encoder 370 receives two bits b 2 and b 3 , and generates the second thermometer code ‘q 1a q 1b q 1c q 1d ’ 0 based on the following equations:
- each selecting groups 350 a - 350 d in the first selector 340 will output one gamma voltage
- the second selector 360 receives the gamma voltages outputted by the selecting groups 350 a - 350 d and outputs one gamma voltage selected from the received gamma voltages. Only a single conducting path in the decoder 300 that couples the output of the DAC 300 to a unique target gamma voltage will be formed.
- FIG. 4 shows a diagram of a DAC 400 structure for converting an input digital value with 6 bits according to one exemplary embodiment of the present invention.
- the DAC 400 uses three thermometer encoders 430 , 470 , and 480 to encode the input digital value in order to generate three thermometer codes.
- the selecting group hereinafter represents the structure of the selecting group 350 mentioned above, which has 2 N switches (e.g. 4 switches) and each of which is controlled by a bit of a thermometer code with 2 N bits to output one gamma voltage.
- the first selector 440 comprises 16 selecting groups controlled by a first thermometer code generated by encoding two bits of the input digital value.
- the second selector 460 comprises 5 selecting groups arranged in two stages, wherein 4 selecting groups 450 arranged in the prior stage are controlled by a second thermometer code generated by encoding another two bits of the input digital value, and the selecting group 450 ′ arranged in the last stage is controlled by a third thermometer code generated by encoding the other two bits of the input digital value.
- the total switch number in the DAC 400 is 84 (64 for the first selector 440 , 16 for the prior stage of the second selector 460 , and 4 for the last stage of the second selector 460 ); however, the switch number required for the conventional DAC 100 to convert the 6-bit digital value is 126 (64+32+16+8+4+2). A significant efficiency improvement is obtained.
- a hybrid configuration is provided in FIG. 5 .
- the selecting group 450 ′ in the last stage of the second selector 460 is replaced by three binary selectors 590 and 590 ′.
- the binary selector 590 outputs the voltage received from either of its two input terminals based on a binary bit.
- the binary selectors 590 in a prior stage are controlled by the fifth bit b 4 of the digital value and its inverse b 4b
- the binary selector 590 ′ in a last stage is controlled by the last bit b 5 of the digital value and its inverse b 5b .
- the switch number required in the DAC 500 is slightly more than that in the DAC 400 (the DAC 500 needs 86 switches), it is still less than that required in the conventional DAC 100 .
- the advantages of reduced chip area, power consumption, and gamma coupling are also available in this embodiment.
- the second selector 460 is formed by binary selectors
- the binary selectors are arranged in four stages, and binary selectors in a same stage are controlled by a same bit of the digital value (b 2 , b 3 , b 4 , or b 5 in this embodiment).
- This structure 600 requires 94 switches, which is approximately a 25% reduction as compared with the conventional DAC 100 .
- the reduction results from the first selector 440 adopting selecting-group configuration.
- the DAC in the above embodiments is implemented in a source driver of a LCD device for converting digital display data into analog display data that is used to drive a panel of the LCD device, the chip area, the gamma coupling and power consumption can all be reduced. As the bit number of the input digital value to be converted increases, the advantages of the DAC become more obvious.
- the scope of the present invention should be extended to the DAC formed by slightly modifying the DACs shown in the above embodiments; for example, the selecting group may have 3 switches or more than 4 switches within, and the switch number of each selecting group may not be the same (for example, switches may be controlled by more than one bit of the thermometer code or the digital value, or some bits of the thermometer code may be idle and not utilized to control the turning on/off of switches).
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Abstract
Description
- 1. Field of the Invention
- The present invention relates to a digital-to-analog converter (DAC) configuration, and more particularly, to a DAC that uses fewer switches and has a more efficient circuit configuration.
- 2. Description of the Prior Art
- As shown in
FIG. 1 , aconventional DAC 100 is formed by aresistor string 110 and a plurality ofbinary selectors 120. Theresistor string 110 is electrically connected between a first voltage level V1 and a second voltage level V2 so that each terminal of the resistors in thestring 110 has a specific and different voltage level. Eachbinary selector 120 includes twoswitches FIG. 2 , which shows an example illustrating how theDAC 100 converts a digital value ‘b0 b1 b2 b3’ into an analog value. Thebinary selectors 120 are arranged in four stages, wherein thebinary selectors 120 in the first stage are controlled by the first bit b0 and its inverse b0b, thebinary selectors 120 in the second stage are controlled by the second bit b1 and its inverse b1b, and so on. When the input digital value is ‘0011’, the switches of thebinary selectors 120 controlled by b0b, b1b, b2 and b3 are turned on, generating a conducting path that couples the output of theDAC 100 to the target terminal in theresistor string 110. TheDAC 100 therefore transforms the digital value ‘0011’ into an analog value, i.e. the voltage level at the target terminal. - As can be seen, the conventional DAC requires 30 switches to convert a digital value with 4 bits. In general, to convert n-bit digital value, 2×(2n−1) switches are needed. As the bit number of the digital value increases, the number of switches required grows significantly, resulting in increases of chip area and power consumption for the DAC.
- One objective of the present invention is therefore to provide a DAC that uses fewer switches and has more efficient circuit configuration. When the DAC is implemented in a source driver of a liquid crystal display (LCD) device, the gamma coupling and power consumption can both be reduced.
- According to one exemplary embodiment of the present invention, a DAC is provided. The DAC comprises a gamma voltage generator for generating a plurality of gamma voltages, and a decoder for receiving an M-bit digital value to select one of the gamma voltages, wherein the decoder comprises a first thermometer encoder, a first selector and a second selector. The first thermometer encoder is utilized to receive N bits of the digital value to generate a first thermometer code with 2N bits, wherein N is smaller than M, and M and N are positive integers. The first selector has a plurality of selecting groups, each selecting group having 2N switches controlled by the first thermometer code to output one gamma voltage, where the second selector receives the gamma voltages outputted by the selecting groups of the first selector and outputs one gamma voltage selected from the received gamma voltages based on the (M−N) bit of the digital value.
- These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
-
FIG. 1 shows a diagram of a conventional DAC formed by a resistor string and a plurality of binary selectors. -
FIG. 2 is a diagram showing how the DAC inFIG. 1 converts a digital value ‘b0 b1 b2 b3’ into an analog value. -
FIG. 3 shows a diagram of a DAC structure according to one exemplary embodiment of the present invention. -
FIG. 4 shows a diagram of a DAC structure according to another exemplary embodiment of the present invention. -
FIG. 5 shows a diagram of a DAC structure according to another exemplary embodiment of the present invention. -
FIG. 6 shows a diagram of a DAC structure according to another exemplary embodiment of the present invention. - Certain terms are used throughout the description and following claims to refer to particular components. As one skilled in the art will appreciate, manufacturers may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms “include” and “comprise” are used in an open-ended fashion, and thus should be interpreted to mean “include, but not limited to . . . ”. Also, the term “couple” is intended to mean either an indirect or direct electrical connection. Accordingly, if one device is coupled to another device, that connection may be through a direct electrical connection, or through an indirect electrical connection via other devices and connections.
- Please refer to
FIG. 3 , which shows a diagram of a DAC structure according to one exemplary embodiment of the present invention. TheDAC 300 comprises agamma voltage generator 310 utilized for generating a plurality of gamma voltages, and adecoder 320 utilized for receiving a M-bit digital value and selecting one of the gamma voltages according to the digital value, thereby converting the digital value into an analog gamma voltage at the output end of theDAC 300. Thegamma voltage generator 310 can be, but is not limited to, theresistor string 110 that is coupled between two voltage levels V1 and V2 shown inFIG. 1 . - The
decoder 320 comprises afirst selector 340 and asecond selector 360, wherein in this embodiment, thefirst selector 340 and thesecond selector 360 are formed by selecting groups each having a plurality of switches whose output terminals are connected directly together. In one embodiment, thefirst selector 340 comprises four selectinggroups switches second selector 360 comprises one selecting group comprising 4switches second selectors FIG. 3 only shows an embodiment and is not meant to be a limitation. The switch 355(365) may be implemented by an NMOS or PMOS, depending on the system requirement. - Different from the prior arts, the
first selector 340 is controlled by a first thermometer code ‘q0a q0b q0c q0d’ generated from encoding part of the M-bit digital value, while thesecond selector 360 is controlled by a second thermometer code ‘q1a q1b q1c q1d’ generated from encoding the other part of the M-bit digital value.Switches switch 355 w in every selecting group 350 a-350 d is controlled by the first bit q0a of the first thermometer code, theswitch 355 x in every selecting group 350 a-350 d is controlled by the second bit q0b, and so on. For example, when theswitch 355 w is implemented by a NMOS, it will be turned on if the value of q0a equals to ‘1’ (i.e. high voltage level), and will be turned off if the value of q0a equals to ‘0’ (i.e. low voltage level). As can be seen, the number of switches in one selecting group and the bit number of a thermometer code are related to each other. - The encoding is performed by a
first thermometer encoder 330 and asecond thermometer encoder 370. In this embodiment, thefirst thermometer encoder 330 receives N bits of the digital value (for example, the least significant N bits of the digital value), and encodes it to generate the first thermometer code with 2N bits, where N is smaller than M and is a positive integer; thesecond thermometer encoder 370 receives the rest (M−N) bits of the digital value (for example, the most significant (M−N) bits if the digital value), and encodes it to generate the second thermometer code with 2(M−N) bits. - For convenience of illustration, the input digital value has 4 bits in this embodiment (i.e. M=4), the
first thermometer encoder 330 receives 2 bits (N=2) of the digital value to generate the first thermometer code with 4 bits ‘q0a q0b q0c q0d’, and thesecond thermometer encoder 370 receives the other 2 bits of the digital value to generate the second thermometer code with 4 bits ‘q1a q1b q1c q1d’. In one embodiment, the input digital value is represented by ‘b0 b1 b2 b3’, and thefirst thermometer encoder 330 receives two bits b0 and b1, and generates the first thermometer code ‘q0a q0b q0c q0d’ based on the following equations: -
q 0a=AND(b 0b ,b 1b), -
q 0b=AND(b 0 ,b 1b), -
q 0c=AND(b 0b ,b 1), -
q 0d=AND(b 0 ,b 1) - where b0b represents the inverse value of b0, and b1b represents the inverse value of b1. Similarly, the
second thermometer encoder 370 receives two bits b2 and b3, and generates the second thermometer code ‘q1a q1b q1c q1d’0 based on the following equations: -
q 1a=AND(b 2b ,b 3b), -
q 1b=AND(b 2 ,b 3b), -
q 1c=AND(b 2b ,b 3), -
q 1d=AND(b 2 ,b 3) - where b2b represents the inverse value of b2, and b3b represents the inverse value of b3.
- Please note that the above equations are for illustrative purposes only and are not meant to be limitations of the present invention. Other encoding algorithms can also be used as long as the encoding algorithms can generate a code ‘q0a q0b q0c q0d’ where only one bit (q0a, q0b, q0c, or q0d) of the code has a value equal to ‘1’ if the switches 355 are implemented by NMOSs, or generate a code where only one bit of the code has a value equal to ‘0’ if the switches 355 are implemented by PMOSs. Therefore, only one switch will be turned on in one selecting group: each selecting groups 350 a-350 d in the
first selector 340 will output one gamma voltage, and thesecond selector 360 receives the gamma voltages outputted by the selecting groups 350 a-350 d and outputs one gamma voltage selected from the received gamma voltages. Only a single conducting path in thedecoder 300 that couples the output of theDAC 300 to a unique target gamma voltage will be formed. - In this way, the number of switches required by the
DAC 300 is reduced from 2×(2n−1) to 4/3×(2n−1), which is approximately a 33% reduction. The immediate advantages caused by the reduction are smaller chip area, power consumption, and gamma coupling. As the bit number of the input digital value increases, the advantages of the present invention become more obvious when compared to the prior arts.FIG. 4 shows a diagram of aDAC 400 structure for converting an input digital value with 6 bits according to one exemplary embodiment of the present invention. TheDAC 400 uses threethermometer encoders first selector 440 comprises 16 selecting groups controlled by a first thermometer code generated by encoding two bits of the input digital value. Thesecond selector 460 comprises 5 selecting groups arranged in two stages, wherein 4 selectinggroups 450 arranged in the prior stage are controlled by a second thermometer code generated by encoding another two bits of the input digital value, and the selectinggroup 450′ arranged in the last stage is controlled by a third thermometer code generated by encoding the other two bits of the input digital value. The total switch number in theDAC 400 is 84 (64 for thefirst selector 440, 16 for the prior stage of thesecond selector 460, and 4 for the last stage of the second selector 460); however, the switch number required for theconventional DAC 100 to convert the 6-bit digital value is 126 (64+32+16+8+4+2). A significant efficiency improvement is obtained. - A hybrid configuration is provided in
FIG. 5 . In this embodiment, the selectinggroup 450′ in the last stage of thesecond selector 460 is replaced by threebinary selectors binary selector 590 outputs the voltage received from either of its two input terminals based on a binary bit. In this embodiment, thebinary selectors 590 in a prior stage are controlled by the fifth bit b4 of the digital value and its inverse b4b, and thebinary selector 590′ in a last stage is controlled by the last bit b5 of the digital value and its inverse b5b. Although the switch number required in theDAC 500 is slightly more than that in the DAC 400 (theDAC 500 needs 86 switches), it is still less than that required in theconventional DAC 100. The advantages of reduced chip area, power consumption, and gamma coupling are also available in this embodiment. - In another embodiment where the
second selector 460 is formed by binary selectors, as shown inFIG. 6 , the binary selectors are arranged in four stages, and binary selectors in a same stage are controlled by a same bit of the digital value (b2, b3, b4, or b5 in this embodiment). Thisstructure 600 requires 94 switches, which is approximately a 25% reduction as compared with theconventional DAC 100. The reduction results from thefirst selector 440 adopting selecting-group configuration. According to the above embodiments, it is profitable to use the selecting-group configuration or the hybrid configuration that mixes the selecting groups with binary selectors to improve system design flexibility in the DAC. For the hybrid configuration, it is preferred to dispose selecting groups rather than binary selectors in the prior stages coupled to the gamma voltage generator since this arrangement can save more switches. - When the DAC in the above embodiments is implemented in a source driver of a LCD device for converting digital display data into analog display data that is used to drive a panel of the LCD device, the chip area, the gamma coupling and power consumption can all be reduced. As the bit number of the input digital value to be converted increases, the advantages of the DAC become more obvious. Furthermore, the scope of the present invention should be extended to the DAC formed by slightly modifying the DACs shown in the above embodiments; for example, the selecting group may have 3 switches or more than 4 switches within, and the switch number of each selecting group may not be the same (for example, switches may be controlled by more than one bit of the thermometer code or the digital value, or some bits of the thermometer code may be idle and not utilized to control the turning on/off of switches).
- Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention.
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US20180342210A1 (en) * | 2017-05-26 | 2018-11-29 | Db Hitek Co., Ltd. | Data Driver and Display Apparatus Including the Same |
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US8842034B1 (en) * | 2013-02-06 | 2014-09-23 | Xilinx, Inc. | Resistor network implemented in an integrated circuit |
KR101603302B1 (en) * | 2014-09-02 | 2016-03-15 | 엘지디스플레이 주식회사 | Ditigal to analog converting device, data driver and display device using the same |
EP2993787B1 (en) * | 2014-09-05 | 2020-07-15 | Dialog Semiconductor (UK) Ltd | Generalized data weighted averaging method for equally weighted multi-bit D/A elements |
CN109523964B (en) * | 2018-12-17 | 2021-04-20 | 合肥奕斯伟集成电路有限公司 | Selection circuit, digital-to-analog converter and display device |
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US6166672A (en) * | 1998-01-23 | 2000-12-26 | Hyundai Electronics Industries, Co., Ltd. | Digital/analog converter and method using voltage distribution |
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US20180342210A1 (en) * | 2017-05-26 | 2018-11-29 | Db Hitek Co., Ltd. | Data Driver and Display Apparatus Including the Same |
KR20180129293A (en) * | 2017-05-26 | 2018-12-05 | 주식회사 디비하이텍 | Data driver and a display apparatus including the same |
US10482824B2 (en) * | 2017-05-26 | 2019-11-19 | Db Hitek Co., Ltd. | Digital-to-analog converter, data driver and display apparatus including the same |
KR102398445B1 (en) | 2017-05-26 | 2022-05-16 | 주식회사 디비하이텍 | Data driver and a display apparatus including the same |
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US7733257B1 (en) | 2010-06-08 |
TW201023528A (en) | 2010-06-16 |
CN101753143A (en) | 2010-06-23 |
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