US20100035678A1 - Video game - Google Patents
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- US20100035678A1 US20100035678A1 US12/440,309 US44030907A US2010035678A1 US 20100035678 A1 US20100035678 A1 US 20100035678A1 US 44030907 A US44030907 A US 44030907A US 2010035678 A1 US2010035678 A1 US 2010035678A1
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Classifications
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- A—HUMAN NECESSITIES
- A63—SPORTS; GAMES; AMUSEMENTS
- A63F—CARD, BOARD, OR ROULETTE GAMES; INDOOR GAMES USING SMALL MOVING PLAYING BODIES; VIDEO GAMES; GAMES NOT OTHERWISE PROVIDED FOR
- A63F13/00—Video games, i.e. games using an electronically generated display having two or more dimensions
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- A—HUMAN NECESSITIES
- A63—SPORTS; GAMES; AMUSEMENTS
- A63F—CARD, BOARD, OR ROULETTE GAMES; INDOOR GAMES USING SMALL MOVING PLAYING BODIES; VIDEO GAMES; GAMES NOT OTHERWISE PROVIDED FOR
- A63F13/00—Video games, i.e. games using an electronically generated display having two or more dimensions
- A63F13/45—Controlling the progress of the video game
- A63F13/49—Saving the game status; Pausing or ending the game
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- A—HUMAN NECESSITIES
- A63—SPORTS; GAMES; AMUSEMENTS
- A63F—CARD, BOARD, OR ROULETTE GAMES; INDOOR GAMES USING SMALL MOVING PLAYING BODIES; VIDEO GAMES; GAMES NOT OTHERWISE PROVIDED FOR
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- A—HUMAN NECESSITIES
- A63—SPORTS; GAMES; AMUSEMENTS
- A63F—CARD, BOARD, OR ROULETTE GAMES; INDOOR GAMES USING SMALL MOVING PLAYING BODIES; VIDEO GAMES; GAMES NOT OTHERWISE PROVIDED FOR
- A63F13/00—Video games, i.e. games using an electronically generated display having two or more dimensions
- A63F13/60—Generating or modifying game content before or while executing the game program, e.g. authoring tools specially adapted for game development or game-integrated level editor
- A63F13/69—Generating or modifying game content before or while executing the game program, e.g. authoring tools specially adapted for game development or game-integrated level editor by enabling or updating specific game elements, e.g. unlocking hidden features, items, levels or versions
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- A—HUMAN NECESSITIES
- A63—SPORTS; GAMES; AMUSEMENTS
- A63F—CARD, BOARD, OR ROULETTE GAMES; INDOOR GAMES USING SMALL MOVING PLAYING BODIES; VIDEO GAMES; GAMES NOT OTHERWISE PROVIDED FOR
- A63F2300/00—Features of games using an electronically generated display having two or more dimensions, e.g. on a television screen, showing representations related to the game
- A63F2300/30—Features of games using an electronically generated display having two or more dimensions, e.g. on a television screen, showing representations related to the game characterized by output arrangements for receiving control signals generated by the game device
- A63F2300/303—Features of games using an electronically generated display having two or more dimensions, e.g. on a television screen, showing representations related to the game characterized by output arrangements for receiving control signals generated by the game device for displaying additional data, e.g. simulating a Head Up Display
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- A—HUMAN NECESSITIES
- A63—SPORTS; GAMES; AMUSEMENTS
- A63F—CARD, BOARD, OR ROULETTE GAMES; INDOOR GAMES USING SMALL MOVING PLAYING BODIES; VIDEO GAMES; GAMES NOT OTHERWISE PROVIDED FOR
- A63F2300/00—Features of games using an electronically generated display having two or more dimensions, e.g. on a television screen, showing representations related to the game
- A63F2300/60—Methods for processing data by generating or executing the game program
- A63F2300/609—Methods for processing data by generating or executing the game program for unlocking hidden game elements, e.g. features, items, levels
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- A—HUMAN NECESSITIES
- A63—SPORTS; GAMES; AMUSEMENTS
- A63F—CARD, BOARD, OR ROULETTE GAMES; INDOOR GAMES USING SMALL MOVING PLAYING BODIES; VIDEO GAMES; GAMES NOT OTHERWISE PROVIDED FOR
- A63F2300/00—Features of games using an electronically generated display having two or more dimensions, e.g. on a television screen, showing representations related to the game
- A63F2300/60—Methods for processing data by generating or executing the game program
- A63F2300/63—Methods for processing data by generating or executing the game program for controlling the execution of the game in time
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- A—HUMAN NECESSITIES
- A63—SPORTS; GAMES; AMUSEMENTS
- A63F—CARD, BOARD, OR ROULETTE GAMES; INDOOR GAMES USING SMALL MOVING PLAYING BODIES; VIDEO GAMES; GAMES NOT OTHERWISE PROVIDED FOR
- A63F2300/00—Features of games using an electronically generated display having two or more dimensions, e.g. on a television screen, showing representations related to the game
- A63F2300/60—Methods for processing data by generating or executing the game program
- A63F2300/65—Methods for processing data by generating or executing the game program for computing the condition of a game character
Definitions
- This invention relates to video games.
- Some video games have a measure of player “life” often referred to as a life clock. This is a measure which might start at a certain level and decay towards zero with time. When the life clock reaches zero, the player “dies”, i.e. that instance of the game ends in respect of that player. It may be that there is an automatic reset to give the player another “life”.
- the life clock can also be decremented by actions adverse to a player, such as being shot or hit by another game character, or falling off something very high, or the like.
- This invention provides video game apparatus in which a game object acts within a game environment of a video game under the control of a user controller, the video game ending in respect of that game object when a game continuation variable reaches a game end amount; the apparatus comprising:
- the invention provides an improved game technique for handling player lifetimes in a game involving a game object (e.g. a game character, vehicle or the like).
- a game object e.g. a game character, vehicle or the like.
- a player's game continuation variable (e.g. a life clock) decrements with time as described above.
- a game style variable is also provided.
- an unexpected feature is introduced, which is to allow the style measure to act as a variable buffer against adverse game actions which would otherwise have resulted in damage (a decrement) to the player's life clock.
- FIG. 1 schematically illustrates the overall system architecture of the PlayStation2
- FIG. 2 schematically illustrates the architecture of an Emotion Engine
- FIG. 3 schematically illustrates the configuration of a Graphics Synthesiser
- FIGS. 4 a and 4 b when viewed together, are a schematic flowchart showing the operation of the apparatus of FIGS. 1 to 3 in respect of a life clock and style bar function;
- FIGS. 5 a to 5 g are schematic representations of a life clock and style bar.
- FIG. 1 schematically illustrates the overall system architecture of the PlayStation2.
- a system unit 10 is provided, with various peripheral devices connectable to the system unit.
- the system unit 10 comprises: an Emotion Engine 100 ; a Graphics Synthesiser 200 ; a sound processor unit 300 having dynamic random access memory (DRAM); a read only memory (ROM) 400 ; a compact disc (CD) and digital versatile disc (DVD) reader 450 ; a Rambus Dynamic Random Access Memory (RDRAM) unit 500 ; an input/output processor (IOP) 700 with dedicated RAM 750 .
- An (optional) external hard disk drive (HDD) 390 may be connected.
- the input/output processor 700 has two Universal Serial Bus (USB) ports 715 and an iLink or IEEE 1394 port (iLink is the Sony Corporation implementation of the IEEE 1394 standard).
- the IOP 700 handles all USB, iLink and game controller data traffic. For example when a user is playing a game, the IOP 700 receives data from the game controller and directs it to the Emotion Engine 100 which updates the current state of the game accordingly.
- the IOP 700 has a Direct Memory Access (DMA) architecture to facilitate rapid data transfer rates. DMA involves transfer of data from main memory to a device without passing it through the CPU.
- the USB interface is compatible with Open Host Controller Interface (OHCI) and can handle data transfer rates of between 1.5 Mbps and 12 Mbps. Provision of these interfaces means that the PlayStation2 is potentially compatible with peripheral devices such as video cassette recorders (VCRs), digital cameras, microphones, set-top boxes, printers, keyboard, mouse and joystick.
- VCRs video cassette recorders
- VCRs video cassette recorders
- a device driver In order for successful data communication to occur with a peripheral device connected to a USB port 715 , an appropriate piece of software such as a device driver should be provided.
- Device driver technology is very well known and will not be described in detail here, except to say that the skilled man will be aware that a device driver or similar software interface may be required in the embodiment described here.
- a USB microphone 730 is connected to the USB port.
- the USB microphone 730 may be a hand-held microphone or may form part of a head-set that is worn by the human operator.
- the advantage of wearing a head-set is that the human operator's hand are free to perform other actions.
- the microphone includes an analogue-to-digital converter (ADC) and a basic hardware-based real-time data compression and encoding arrangement, so that audio data are transmitted by the microphone 730 to the USB port 715 in an appropriate format, such as 16-bit mono PCM (an uncompressed format) for decoding at the PlayStation 2 system unit 10 .
- ADC analogue-to-digital converter
- two other ports 705 , 710 are proprietary sockets allowing the connection of a proprietary non-volatile RAM memory card 720 for storing game-related information, a hand-held game controller 725 or a device (not shown) mimicking a hand-held controller, such as a dance mat.
- the system unit 10 may be connected to a network adapter 805 that provides an interface (such as an Ethernet interface) to a network.
- This network may be, for example, a LAN, a WAN or the Internet.
- the network may be a general network or one that is dedicated to game related communication.
- the network adapter 805 allows data to be transmitted to and received from other system units 10 that are connected to the same network, (the other system units 10 also having corresponding network adapters 805 ).
- the Emotion Engine 100 is a 128-bit Central Processing Unit (CPU) that has been specifically designed for efficient simulation of 3 dimensional (3D) graphics for games applications.
- the Emotion Engine components include a data bus, cache memory and registers, all of which are 128-bit. This facilitates fast processing of large volumes of multi-media data.
- Conventional PCs by way of comparison, have a basic 64-bit data structure
- the floating point calculation performance of the PlayStation2 is 6.2 GFLOPs.
- the Emotion Engine also comprises MPEG2 decoder circuitry which allows for simultaneous processing of 3D graphics data and DVD data.
- the Emotion Engine performs geometrical calculations including mathematical transforms and translations and also performs calculations associated with the physics of simulation objects, for example, calculation of friction between two objects.
- the image rendering commands are output in the form of display lists.
- a display list is a sequence of drawing commands that specifies to the Graphics Synthesiser which primitive graphic objects (e.g. points, lines, triangles, sprites) to draw on the screen and at which co-ordinates.
- primitive graphic objects e.g. points, lines, triangles, sprites
- a typical display list will comprise commands to draw vertices, commands to shade the faces of polygons, render bitmaps and so on.
- the Emotion Engine 100 can asynchronously generate multiple display lists.
- the Graphics Synthesiser 200 is a video accelerator that performs rendering of the display lists produced by the Emotion Engine 100 .
- the Graphics Synthesiser 200 includes a graphics interface unit (GIF) which handles, tracks and manages the multiple display lists.
- the rendering function of the Graphics Synthesiser 200 can generate image data that supports several alternative standard output image formats, i.e., NTSC/PAL, High Definition Digital TV and VESA.
- NTSC/PAL High Definition Digital TV
- VESA High Definition Digital TV
- the rendering capability of graphics systems is defined by the memory bandwidth between a pixel engine and a video memory, each of which is located within the graphics processor.
- Conventional graphics systems use external Video Random Access Memory (VRAM) connected to the pixel logic via an off-chip bus which tends to restrict available bandwidth.
- VRAM Video Random Access Memory
- the Graphics Synthesiser 200 of the PlayStation2 provides the pixel logic and the video memory on a single high-performance chip which allows for a comparatively large 38.4 Gigabyte per second memory access bandwidth.
- the Graphics Synthesiser is theoretically capable of achieving a peak drawing capacity of 75 million polygons per second. Even with a full range of effects such as textures, lighting and transparency, a sustained rate of 20 million polygons per second can be drawn continuously. Accordingly, the Graphics Synthesiser 200 is capable of rendering a film-quality image.
- the Sound Processor Unit (SPU) 300 is effectively the soundcard of the system which is capable of recognising 3D digital sound such as Digital Theater Surround (DTS®) sound and AC-3 (also known as Dolby Digital) which is the sound format used for DVDs.
- DTS® Digital Theater Surround
- AC-3 also known as Dolby Digital
- a display and sound output device 305 such as a video monitor or television set with an associated loudspeaker arrangement 310 , is connected to receive video and audio signals from the graphics synthesiser 200 and the sound processing unit 300 .
- the main memory supporting the Emotion Engine 100 is the RDRAM (Rambus Dynamic Random Access Memory) module 500 produced by Rambus Incorporated.
- This RDRAM memory subsystem comprises RAM, a RAM controller and a bus connecting the RAM to the Emotion Engine 100 .
- FIG. 2 schematically illustrates the architecture of the Emotion Engine 100 of FIG. 1 .
- the Emotion Engine 100 comprises: a floating point unit (FPU) 104 ; a central processing unit (CPU) core 102 ; vector unit zero (VU0) 106 ; vector unit one (VU1) 108 ; a graphics interface unit (GIF) 110 ; an interrupt controller (INTC) 112 ; a timer unit 114 ; a direct memory access controller 116 ; an image data processor unit (IPU) 118 ; a dynamic random access memory controller (DRAMC) 120 ; a sub-bus interface (SIF) 122 ; and all of these components are connected via a 128-bit main bus 124 .
- FPU floating point unit
- CPU central processing unit
- VU0 vector unit zero
- VU1 vector unit one
- GIF graphics interface
- IPC image data processor unit
- DRAMC dynamic random access memory controller
- SIF sub-bus interface
- the CPU core 102 is a 128-bit processor clocked at 300 MHz.
- the CPU core has access to 32 MB of main memory via the DRAMC 120 .
- the CPU core 102 instruction set is based on MIPS III RISC with some MIPS IV RISC instructions together with additional multimedia instructions.
- MIPS III and IV are Reduced Instruction Set Computer (RISC) instruction set architectures proprietary to MIPS Technologies, Inc. Standard instructions are 64-bit, two-way superscalar, which means that two instructions can be executed simultaneously.
- Multimedia instructions use 128-bit instructions via two pipelines.
- the CPU core 102 comprises a 16 KB instruction cache, an 8 KB data cache and a 16 KB scratchpad RAM which is a portion of cache reserved for direct private usage by the CPU.
- the FPU 104 serves as a first co-processor for the CPU core 102 .
- the vector unit 106 acts as a second co-processor.
- the FPU 104 comprises a floating point product sum arithmetic logic unit (FMAC) and a floating point division calculator (FDIV). Both the FMAC and FDIV operate on 32-bit values so when an operation is carried out on a 128-bit value (composed of four 32-bit values) an operation can be carried out on all four parts concurrently. For example adding 2 vectors together can be done at the same time.
- FMAC floating point product sum arithmetic logic unit
- FDIV floating point division calculator
- the vector units 106 and 108 perform mathematical operations and are essentially specialised FPUs that are extremely fast at evaluating the multiplication and addition of vector equations. They use Floating-Point Multiply-Adder Calculators (FMACs) for addition and multiplication operations and Floating-Point Dividers (FDIVs) for division and square root operations. They have built-in-memory for storing micro-programs and interface with the rest of the system via Vector Interface Units (VIFs). Vector unit zero 106 can work as a coprocessor to the CPU core 102 via a dedicated 128-bit bus so it is essentially a second specialised FPU.
- FMACs Floating-Point Multiply-Adder Calculators
- FDIVs Floating-Point Dividers
- VIPs Vector Interface Units
- Vector unit one 108 has a dedicated bus to the Graphics synthesiser 200 and thus can be considered as a completely separate processor.
- the inclusion of two vector units allows the software developer to split up the work between different parts of the CPU and the vector units can be used in either serial or parallel connection.
- Vector unit zero 106 comprises 4 FMACS and 1 FDIV. It is connected to the CPU core 102 via a coprocessor connection. It has 4 Kb of vector unit memory for data and 4 Kb of micro-memory for instructions. Vector unit zero 106 is useful for performing physics calculations associated with the images for display. It primarily executes non-patterned geometric processing together with the CPU core 102 .
- Vector unit one 108 comprises 5 FMACS and 2 FDIVs. It has no direct path to the CPU core 102 , although it does have a direct path to the GIF unit 110 . It has 16 Kb of vector unit memory for data and 16 Kb of micro-memory for instructions. Vector unit one 108 is useful for performing transformations. It primarily executes patterned geometric processing and directly outputs a generated display list to the GIF 110 .
- the GIF 110 is an interface unit to the Graphics Synthesiser 200 . It converts data according to a tag specification at the beginning of a display list packet and transfers drawing commands to the Graphics Synthesiser 200 whilst mutually arbitrating multiple transfer.
- the interrupt controller (INTC) 112 serves to arbitrate interrupts from peripheral devices, except the DMAC 116 .
- the timer unit 114 comprises four independent timers with 16-bit counters. The timers are driven either by the bus clock (at 1/16 or 1/256 intervals) or via an external clock.
- the DMAC 116 handles data transfers between main memory and peripheral processors or main memory and the scratch pad memory. It arbitrates the main bus 124 at the same time. Performance optimisation of the DMAC 116 is a key way by which to improve Emotion Engine performance.
- the image processing unit (IPU) 118 is an image data processor that is used to expand compressed animations and texture images. It performs I-PICTURE Macro-Block decoding, colour space conversion and vector quantisation.
- the sub-bus interface (SIF) 122 is an interface unit to the IOP 700 . It has its own memory and bus to control I/O devices such as sound chips and storage devices.
- FIG. 3 schematically illustrates the configuration of the Graphic Synthesiser 200 .
- the Graphics Synthesiser comprises: a host interface 202 ; a set-up/rasterizing unit; a pixel pipeline 206 ; a memory interface 208 ; a local memory 212 including a frame page buffer 214 and a texture page buffer 216 ; and a video converter 210 .
- the host interface 202 transfers data with the host (in this case the CPU core 102 of the Emotion Engine 100 ). Both drawing data and buffer data from the host pass through this interface.
- the output from the host interface 202 is supplied to the graphics synthesiser 200 which develops the graphics to draw pixels based on vertex information received from the Emotion Engine 100 , and calculates information such as RGBA value, depth value (i.e. Z-value), texture value and fog value for each pixel.
- the RGBA value specifies the red, green, blue (RGB) colour components and the A (Alpha) component represents opacity of an image object.
- the Alpha value can range from completely transparent to totally opaque.
- the pixel data is supplied to the pixel pipeline 206 which performs processes such as texture mapping, fogging and Alpha-blending and determines the final drawing colour based on the calculated pixel information.
- the pixel pipeline 206 comprises 16 pixel engines PE 1 , PE 2 , . . . , PE 16 so that it can process a maximum of 16 pixels concurrently.
- the pixel pipeline 206 runs at 150 MHz with 32-bit colour and a 32-bit Z-buffer.
- the memory interface 208 reads data from and writes data to the local Graphics Synthesiser memory 212 . It writes the drawing pixel values (RGBA and Z) to memory at the end of a pixel operation and reads the pixel values of the frame buffer 214 from memory. These pixel values read from the frame buffer 214 are used for pixel test or Alpha-blending.
- the memory interface 208 also reads from local memory 212 the RGBA values for the current contents of the frame buffer.
- the local memory 212 is a 32 Mbit (4 MB) memory that is built-in to the Graphics Synthesiser 200 . It can be organised as a frame buffer 214 , texture buffer 216 and a 32-bit Z-buffer 215 .
- the frame buffer 214 is the portion of video memory where pixel data such as colour information is stored.
- the Graphics Synthesiser uses a 2D to 3D texture mapping process to add visual detail to 3D geometry. Each texture may be wrapped around a 3D image object and is stretched and skewed to give a 3D graphical effect.
- the texture buffer is used to store the texture information for image objects.
- the Z-buffer 215 also known as depth buffer
- Images are constructed from basic building blocks known as graphics primitives or polygons. When a polygon is rendered with Z-buffering, the depth value of each of its pixels is compared with the corresponding value stored in the Z-buffer.
- the value stored in the Z-buffer is greater than or equal to the depth of the new pixel value then this pixel is determined visible so that it should be rendered and the Z-buffer will be updated with the new pixel depth. If however the Z-buffer depth value is less than the new pixel depth value the new pixel value is behind what has already been drawn and will not be rendered.
- the local memory 212 has a 1024-bit read port and a 1024-bit write port for accessing the frame buffer and Z-buffer and a 512-bit port for texture reading.
- the video converter 210 is operable to display the contents of the frame memory in a specified output format.
- FIGS. 4 a and 4 b when viewed together, are a schematic flowchart showing the operation of the apparatus of FIGS. 1 to 3 in respect of a life clock and style bar function. Reference will also be made to FIGS. 5 a to 5 g, which are schematic representations of a life clock and style bar.
- FIGS. 4 a and 4 b represents an example of actions which might be taken by the apparatus described above, and in particular by the Emotion Engine 100 under control of a game program loaded from a disc or downloaded from the internet, in order to implement the functionality of a life clock and style bar arrangement to be described below.
- Other parts of the functionality required to implement a video game are known to the skilled person and will not be described here.
- FIGS. 5 a to 5 g represent life clocks and style bars at various stages of use within a game environment.
- the life clock and style bar would be displayed (either all the time or intermittently) at a relatively unobtrusive position on the display 305 , for example in a corner of the screen.
- the exact displayed form of the life clock and style bar e.g. the shape, font, nature (e.g. bar chart, digital counter, pie chart, analogue clock etc), format (e.g. hours:minutes:seconds, countdown etc) is not technically important to the invention and that the arrangements shown here are merely examples.
- terms such as “decrement”, “increment” and “zero” will be used, these are for ease of explanation. It does not matter technically whether the variables count up or down, linearly or otherwise.
- a life clock 960 is represented to the left side of the page and a style bar 970 to the right side.
- the style bar 970 “fills” form left to right, as illustrated by a shaded portion 1010 . It has three threshold points 980 , 990 , 1000 .
- the style variable represented by the style bar reaches a threshold point an enhanced action or ability on the part of that player is enabled.
- a variable life is set to a starting value start_life. In FIG. 5 a this is represented by a player being given a life of one hour.
- a style variable is set to a starting value of zero.
- the style bar 970 is empty.
- the loop could be carried out at every display frame, or at a certain repetition frequency (e.g. 10 times a second) during game play.
- a step 820 detects whether the life variable is at or below zero. If so, the game (in respect of that player at least) ends at a step 830 . If not, processing carries on to a step 840 which detects whether an event adverse to that player has occurred. If so, and if the style variable is greater than zero at a step 850 , the style variable is reduced at a step 860 . It may be that this is sufficient; but if the style variable happens to be very low or zero and the amount of the decrement (which may vary depending on the severity of the adverse event) is more than the remaining style, it may also be necessary to decrement the life variable at a step 870 . In this way, the style variable acts as a buffer against events which would otherwise result in a decrease of the life variable.
- FIGS. 5 b to 5 d This situation is illustrated schematically in FIGS. 5 b to 5 d.
- FIG. 5 b a certain level of style has been built up, as indicated by the shaded portion 1010 of the style bar.
- An adverse event occurs and the style bar is decreased ( FIG. 5 c ) while leaving the life clock untouched. If however another adverse event then occurs, there is insufficient style left to absorb the decrement, and so not only is the small amount of remaining style removed but the life clock is also decremented (see FIG. 5 d ).
- Examples of adverse actions relevant to an action adventure game might be: the player is killed or knocked out; the player falls from a great height etc.
- the degree of reduction of the style/life variables can be different for each example.
- the particular adverse events would be set up by the game designer.
- a step 880 detects whether a “stylish” game action has been carried out. This could be anything as defined by the game designer, and the degree of “style” associated with each action could differ. Some examples relevant to an action adventure game might be: an enemy killed or knocked out; a number of consecutive enemy kills or knock-outs within a certain time limit; a successful counter to an enemy attack; an aerial fight action; spearing two enemy with one spear and the like.
- step 890 the style variable is incremented by an amount relevant to that action. This is represented by moving from FIG. 5 d to FIG. 5 e.
- a step 900 detects whether the style variable has reached or exceeded a threshold amount.
- a threshold amount In fact, in the example of FIGS. 5 a to 5 g there are three such threshold amounts, but the principle is the same for one or more. If a threshold amount has been reached, then at a step 910 an enhanced action or ability is enabled for that player, e.g. by setting a software flag to indicate this. Examples of enhanced abilities might be: the unlocking of new weapons; the ability to jump higher or hit harder etc. The enhancement remains in place as long as the style variable is at or exceeds the relevant threshold.
- FIG. 5 e shows a threshold 990 which has been reached.
- a step 920 detects whether such an enhanced action or ability has been used. Once it has been used, the enhancement is withdrawn by decrementing the style variable at a step 930 , although a corresponding increment is made to the life variable at a step 940 .
- the style variable can be reduced to zero (as in the transition from FIG. 5 e to FIG. 5 g ) or to the next lower threshold (as in the transition from FIG. 5 e to FIG. 5 f ), or to another point as set by the game designer.
- the threshold arrangement is not essential; enhanced abilities could be provided in proportion to the current style variable.
- step 950 the life variable is reduced in respect of the normal passage of time within the game environment, and control returns to the step 820 .
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Abstract
Description
- This invention relates to video games.
- Some video games have a measure of player “life” often referred to as a life clock. This is a measure which might start at a certain level and decay towards zero with time. When the life clock reaches zero, the player “dies”, i.e. that instance of the game ends in respect of that player. It may be that there is an automatic reset to give the player another “life”.
- Apart from being decremented by the passage of time, the life clock can also be decremented by actions adverse to a player, such as being shot or hit by another game character, or falling off something very high, or the like.
- It is known to provide mechanisms to increase the life clock; for example, the player might complete a particular action successfully, or pick up a special life-enhancing treasure, or use a game currency to “buy” more life.
- It is also known to reward particularly stylish play by a player in the form of a style bar or the like. This has a measure which is incremented by stylish play and usually enables new abilities on the part of the player, either in proportion to the level of recorded “style” or when the style measure reaches a threshold. In some cases the use of such enhanced abilities has the effect of decrementing the amount of recorded style.
- This invention provides video game apparatus in which a game object acts within a game environment of a video game under the control of a user controller, the video game ending in respect of that game object when a game continuation variable reaches a game end amount; the apparatus comprising:
- means for adjusting the game continuation variable towards the game end amount in response to time spent playing that instance of the game;
- means for detecting game actions in respect of the game object;
- means for maintaining a game style variable indicative of the manner in which one or more predetermined game actions are carried out by the game object;
- means, responsive to a game action carried out successfully by the game object, for adjusting the game style variable to indicate a greater game style;
- means, responsive to a game action adverse to the game object, for adjusting the game style variable to indicate a lower game style or, if the game style variable reaches a level indicative of zero game style, for adjusting the game continuation variable towards the game end amount; and
- means for enhancing the ability of the game object to perform a game action in dependence on the level of the game style variable; in which the enhancing means comprises means for detecting whether the game style variable reaches an action enablement threshold and, if so, for enabling the game object to perform a game action associated with that action enablement threshold; and when the game object carries out an action enabled by the game style variable reaching the action enablement threshold, the apparatus is arranged to adjust the game style variable towards a level indicative of zero game style and to adjust the game continuation variable away from the game end amount.
- The invention provides an improved game technique for handling player lifetimes in a game involving a game object (e.g. a game character, vehicle or the like).
- A player's game continuation variable (e.g. a life clock) decrements with time as described above. A game style variable is also provided. However, an unexpected feature is introduced, which is to allow the style measure to act as a variable buffer against adverse game actions which would otherwise have resulted in damage (a decrement) to the player's life clock.
- So, if a player has built up a value of the game style variable, this has two benefits: one is that it can enable additional abilities on the part of the player, and the other is that in the case of an adverse game action the game style variable is decremented in preference to the life clock (the game continuation variable).
- Further respective aspects and features of the invention are defined in the appended claims.
- Embodiments of the invention will now be described, by way of example only, with reference to the accompanying drawings in which:
-
FIG. 1 schematically illustrates the overall system architecture of the PlayStation2; -
FIG. 2 schematically illustrates the architecture of an Emotion Engine; -
FIG. 3 schematically illustrates the configuration of a Graphics Synthesiser; -
FIGS. 4 a and 4 b, when viewed together, are a schematic flowchart showing the operation of the apparatus ofFIGS. 1 to 3 in respect of a life clock and style bar function; and -
FIGS. 5 a to 5 g are schematic representations of a life clock and style bar. -
FIG. 1 schematically illustrates the overall system architecture of the PlayStation2. Asystem unit 10 is provided, with various peripheral devices connectable to the system unit. - The
system unit 10 comprises: an EmotionEngine 100; aGraphics Synthesiser 200; asound processor unit 300 having dynamic random access memory (DRAM); a read only memory (ROM) 400; a compact disc (CD) and digital versatile disc (DVD)reader 450; a Rambus Dynamic Random Access Memory (RDRAM)unit 500; an input/output processor (IOP) 700 withdedicated RAM 750. An (optional) external hard disk drive (HDD) 390 may be connected. - The input/
output processor 700 has two Universal Serial Bus (USB)ports 715 and an iLink or IEEE 1394 port (iLink is the Sony Corporation implementation of the IEEE 1394 standard). The IOP 700 handles all USB, iLink and game controller data traffic. For example when a user is playing a game, the IOP 700 receives data from the game controller and directs it to the Emotion Engine 100 which updates the current state of the game accordingly. The IOP 700 has a Direct Memory Access (DMA) architecture to facilitate rapid data transfer rates. DMA involves transfer of data from main memory to a device without passing it through the CPU. The USB interface is compatible with Open Host Controller Interface (OHCI) and can handle data transfer rates of between 1.5 Mbps and 12 Mbps. Provision of these interfaces means that the PlayStation2 is potentially compatible with peripheral devices such as video cassette recorders (VCRs), digital cameras, microphones, set-top boxes, printers, keyboard, mouse and joystick. - Generally, in order for successful data communication to occur with a peripheral device connected to a
USB port 715, an appropriate piece of software such as a device driver should be provided. Device driver technology is very well known and will not be described in detail here, except to say that the skilled man will be aware that a device driver or similar software interface may be required in the embodiment described here. - In the present embodiment, a
USB microphone 730 is connected to the USB port. It will be appreciated that theUSB microphone 730 may be a hand-held microphone or may form part of a head-set that is worn by the human operator. The advantage of wearing a head-set is that the human operator's hand are free to perform other actions. The microphone includes an analogue-to-digital converter (ADC) and a basic hardware-based real-time data compression and encoding arrangement, so that audio data are transmitted by themicrophone 730 to theUSB port 715 in an appropriate format, such as 16-bit mono PCM (an uncompressed format) for decoding at the PlayStation 2system unit 10. - Apart from the USB ports, two
other ports RAM memory card 720 for storing game-related information, a hand-heldgame controller 725 or a device (not shown) mimicking a hand-held controller, such as a dance mat. - The
system unit 10 may be connected to anetwork adapter 805 that provides an interface (such as an Ethernet interface) to a network. This network may be, for example, a LAN, a WAN or the Internet. The network may be a general network or one that is dedicated to game related communication. Thenetwork adapter 805 allows data to be transmitted to and received fromother system units 10 that are connected to the same network, (theother system units 10 also having corresponding network adapters 805). - The Emotion Engine 100 is a 128-bit Central Processing Unit (CPU) that has been specifically designed for efficient simulation of 3 dimensional (3D) graphics for games applications. The Emotion Engine components include a data bus, cache memory and registers, all of which are 128-bit. This facilitates fast processing of large volumes of multi-media data. Conventional PCs, by way of comparison, have a basic 64-bit data structure The floating point calculation performance of the PlayStation2 is 6.2 GFLOPs. The Emotion Engine also comprises MPEG2 decoder circuitry which allows for simultaneous processing of 3D graphics data and DVD data. The Emotion Engine performs geometrical calculations including mathematical transforms and translations and also performs calculations associated with the physics of simulation objects, for example, calculation of friction between two objects. It produces sequences of image rendering commands which are subsequently utilised by the Graphics Synthesiser 200. The image rendering commands are output in the form of display lists. A display list is a sequence of drawing commands that specifies to the Graphics Synthesiser which primitive graphic objects (e.g. points, lines, triangles, sprites) to draw on the screen and at which co-ordinates. Thus a typical display list will comprise commands to draw vertices, commands to shade the faces of polygons, render bitmaps and so on. The Emotion Engine 100 can asynchronously generate multiple display lists.
- The Graphics Synthesiser 200 is a video accelerator that performs rendering of the display lists produced by the Emotion Engine 100. The Graphics Synthesiser 200 includes a graphics interface unit (GIF) which handles, tracks and manages the multiple display lists. The rendering function of the Graphics Synthesiser 200 can generate image data that supports several alternative standard output image formats, i.e., NTSC/PAL, High Definition Digital TV and VESA. In general, the rendering capability of graphics systems is defined by the memory bandwidth between a pixel engine and a video memory, each of which is located within the graphics processor. Conventional graphics systems use external Video Random Access Memory (VRAM) connected to the pixel logic via an off-chip bus which tends to restrict available bandwidth. However, the
Graphics Synthesiser 200 of the PlayStation2 provides the pixel logic and the video memory on a single high-performance chip which allows for a comparatively large 38.4 Gigabyte per second memory access bandwidth. The Graphics Synthesiser is theoretically capable of achieving a peak drawing capacity of 75 million polygons per second. Even with a full range of effects such as textures, lighting and transparency, a sustained rate of 20 million polygons per second can be drawn continuously. Accordingly, theGraphics Synthesiser 200 is capable of rendering a film-quality image. - The Sound Processor Unit (SPU) 300 is effectively the soundcard of the system which is capable of recognising 3D digital sound such as Digital Theater Surround (DTS®) sound and AC-3 (also known as Dolby Digital) which is the sound format used for DVDs.
- A display and
sound output device 305, such as a video monitor or television set with an associatedloudspeaker arrangement 310, is connected to receive video and audio signals from thegraphics synthesiser 200 and thesound processing unit 300. - The main memory supporting the
Emotion Engine 100 is the RDRAM (Rambus Dynamic Random Access Memory)module 500 produced by Rambus Incorporated. This RDRAM memory subsystem comprises RAM, a RAM controller and a bus connecting the RAM to theEmotion Engine 100. -
FIG. 2 schematically illustrates the architecture of theEmotion Engine 100 ofFIG. 1 . TheEmotion Engine 100 comprises: a floating point unit (FPU) 104; a central processing unit (CPU)core 102; vector unit zero (VU0) 106; vector unit one (VU1) 108; a graphics interface unit (GIF) 110; an interrupt controller (INTC) 112; atimer unit 114; a directmemory access controller 116; an image data processor unit (IPU) 118; a dynamic random access memory controller (DRAMC) 120; a sub-bus interface (SIF) 122; and all of these components are connected via a 128-bitmain bus 124. - The
CPU core 102 is a 128-bit processor clocked at 300 MHz. The CPU core has access to 32 MB of main memory via theDRAMC 120. TheCPU core 102 instruction set is based on MIPS III RISC with some MIPS IV RISC instructions together with additional multimedia instructions. MIPS III and IV are Reduced Instruction Set Computer (RISC) instruction set architectures proprietary to MIPS Technologies, Inc. Standard instructions are 64-bit, two-way superscalar, which means that two instructions can be executed simultaneously. Multimedia instructions, on the other hand, use 128-bit instructions via two pipelines. TheCPU core 102 comprises a 16 KB instruction cache, an 8 KB data cache and a 16 KB scratchpad RAM which is a portion of cache reserved for direct private usage by the CPU. - The
FPU 104 serves as a first co-processor for theCPU core 102. Thevector unit 106 acts as a second co-processor. TheFPU 104 comprises a floating point product sum arithmetic logic unit (FMAC) and a floating point division calculator (FDIV). Both the FMAC and FDIV operate on 32-bit values so when an operation is carried out on a 128-bit value (composed of four 32-bit values) an operation can be carried out on all four parts concurrently. For example adding 2 vectors together can be done at the same time. - The
vector units CPU core 102 via a dedicated 128-bit bus so it is essentially a second specialised FPU. Vector unit one 108, on the other hand, has a dedicated bus to theGraphics synthesiser 200 and thus can be considered as a completely separate processor. The inclusion of two vector units allows the software developer to split up the work between different parts of the CPU and the vector units can be used in either serial or parallel connection. - Vector unit zero 106 comprises 4 FMACS and 1 FDIV. It is connected to the
CPU core 102 via a coprocessor connection. It has 4 Kb of vector unit memory for data and 4 Kb of micro-memory for instructions. Vector unit zero 106 is useful for performing physics calculations associated with the images for display. It primarily executes non-patterned geometric processing together with theCPU core 102. - Vector unit one 108 comprises 5 FMACS and 2 FDIVs. It has no direct path to the
CPU core 102, although it does have a direct path to theGIF unit 110. It has 16 Kb of vector unit memory for data and 16 Kb of micro-memory for instructions. Vector unit one 108 is useful for performing transformations. It primarily executes patterned geometric processing and directly outputs a generated display list to theGIF 110. - The
GIF 110 is an interface unit to theGraphics Synthesiser 200. It converts data according to a tag specification at the beginning of a display list packet and transfers drawing commands to theGraphics Synthesiser 200 whilst mutually arbitrating multiple transfer. The interrupt controller (INTC) 112 serves to arbitrate interrupts from peripheral devices, except theDMAC 116. - The
timer unit 114 comprises four independent timers with 16-bit counters. The timers are driven either by the bus clock (at 1/16 or 1/256 intervals) or via an external clock. TheDMAC 116 handles data transfers between main memory and peripheral processors or main memory and the scratch pad memory. It arbitrates themain bus 124 at the same time. Performance optimisation of theDMAC 116 is a key way by which to improve Emotion Engine performance. The image processing unit (IPU) 118 is an image data processor that is used to expand compressed animations and texture images. It performs I-PICTURE Macro-Block decoding, colour space conversion and vector quantisation. Finally, the sub-bus interface (SIF) 122 is an interface unit to theIOP 700. It has its own memory and bus to control I/O devices such as sound chips and storage devices. -
FIG. 3 schematically illustrates the configuration of theGraphic Synthesiser 200. The Graphics Synthesiser comprises: ahost interface 202; a set-up/rasterizing unit; a pixel pipeline 206; amemory interface 208; alocal memory 212 including aframe page buffer 214 and atexture page buffer 216; and avideo converter 210. - The
host interface 202 transfers data with the host (in this case theCPU core 102 of the Emotion Engine 100). Both drawing data and buffer data from the host pass through this interface. The output from thehost interface 202 is supplied to thegraphics synthesiser 200 which develops the graphics to draw pixels based on vertex information received from theEmotion Engine 100, and calculates information such as RGBA value, depth value (i.e. Z-value), texture value and fog value for each pixel. The RGBA value specifies the red, green, blue (RGB) colour components and the A (Alpha) component represents opacity of an image object. The Alpha value can range from completely transparent to totally opaque. The pixel data is supplied to the pixel pipeline 206 which performs processes such as texture mapping, fogging and Alpha-blending and determines the final drawing colour based on the calculated pixel information. - The pixel pipeline 206 comprises 16 pixel engines PE1, PE2, . . . , PE16 so that it can process a maximum of 16 pixels concurrently. The pixel pipeline 206 runs at 150 MHz with 32-bit colour and a 32-bit Z-buffer. The
memory interface 208 reads data from and writes data to the localGraphics Synthesiser memory 212. It writes the drawing pixel values (RGBA and Z) to memory at the end of a pixel operation and reads the pixel values of theframe buffer 214 from memory. These pixel values read from theframe buffer 214 are used for pixel test or Alpha-blending. Thememory interface 208 also reads fromlocal memory 212 the RGBA values for the current contents of the frame buffer. Thelocal memory 212 is a 32 Mbit (4 MB) memory that is built-in to theGraphics Synthesiser 200. It can be organised as aframe buffer 214,texture buffer 216 and a 32-bit Z-buffer 215. Theframe buffer 214 is the portion of video memory where pixel data such as colour information is stored. - The Graphics Synthesiser uses a 2D to 3D texture mapping process to add visual detail to 3D geometry. Each texture may be wrapped around a 3D image object and is stretched and skewed to give a 3D graphical effect. The texture buffer is used to store the texture information for image objects. The Z-buffer 215 (also known as depth buffer) is the memory available to store the depth information for a pixel. Images are constructed from basic building blocks known as graphics primitives or polygons. When a polygon is rendered with Z-buffering, the depth value of each of its pixels is compared with the corresponding value stored in the Z-buffer. If the value stored in the Z-buffer is greater than or equal to the depth of the new pixel value then this pixel is determined visible so that it should be rendered and the Z-buffer will be updated with the new pixel depth. If however the Z-buffer depth value is less than the new pixel depth value the new pixel value is behind what has already been drawn and will not be rendered.
- The
local memory 212 has a 1024-bit read port and a 1024-bit write port for accessing the frame buffer and Z-buffer and a 512-bit port for texture reading. Thevideo converter 210 is operable to display the contents of the frame memory in a specified output format. -
FIGS. 4 a and 4 b, when viewed together, are a schematic flowchart showing the operation of the apparatus ofFIGS. 1 to 3 in respect of a life clock and style bar function. Reference will also be made toFIGS. 5 a to 5 g, which are schematic representations of a life clock and style bar. - The flowchart of
FIGS. 4 a and 4 b represents an example of actions which might be taken by the apparatus described above, and in particular by theEmotion Engine 100 under control of a game program loaded from a disc or downloaded from the internet, in order to implement the functionality of a life clock and style bar arrangement to be described below. Other parts of the functionality required to implement a video game are known to the skilled person and will not be described here. - The drawings of
FIGS. 5 a to 5 g represent life clocks and style bars at various stages of use within a game environment. Typically, the life clock and style bar would be displayed (either all the time or intermittently) at a relatively unobtrusive position on thedisplay 305, for example in a corner of the screen. It will be appreciated that the exact displayed form of the life clock and style bar—e.g. the shape, font, nature (e.g. bar chart, digital counter, pie chart, analogue clock etc), format (e.g. hours:minutes:seconds, countdown etc) is not technically important to the invention and that the arrangements shown here are merely examples. It will also be appreciated that while terms such as “decrement”, “increment” and “zero” will be used, these are for ease of explanation. It does not matter technically whether the variables count up or down, linearly or otherwise. - In
FIGS. 5 a to 5 g, alife clock 960 is represented to the left side of the page and astyle bar 970 to the right side. Thestyle bar 970 “fills” form left to right, as illustrated by a shaded portion 1010. It has threethreshold points - Referring to the flowchart, at a step 800 a variable life is set to a starting value start_life. In
FIG. 5 a this is represented by a player being given a life of one hour. At a step 810 a style variable is set to a starting value of zero. At this stage (FIG. 5 a) thestyle bar 970 is empty. - There now follows a looped process which continues as long as the player has life. The loop could be carried out at every display frame, or at a certain repetition frequency (e.g. 10 times a second) during game play.
- A
step 820 detects whether the life variable is at or below zero. If so, the game (in respect of that player at least) ends at astep 830. If not, processing carries on to astep 840 which detects whether an event adverse to that player has occurred. If so, and if the style variable is greater than zero at astep 850, the style variable is reduced at astep 860. It may be that this is sufficient; but if the style variable happens to be very low or zero and the amount of the decrement (which may vary depending on the severity of the adverse event) is more than the remaining style, it may also be necessary to decrement the life variable at astep 870. In this way, the style variable acts as a buffer against events which would otherwise result in a decrease of the life variable. - This situation is illustrated schematically in
FIGS. 5 b to 5 d. InFIG. 5 b a certain level of style has been built up, as indicated by the shaded portion 1010 of the style bar. An adverse event occurs and the style bar is decreased (FIG. 5 c) while leaving the life clock untouched. If however another adverse event then occurs, there is insufficient style left to absorb the decrement, and so not only is the small amount of remaining style removed but the life clock is also decremented (seeFIG. 5 d). - Examples of adverse actions relevant to an action adventure game might be: the player is killed or knocked out; the player falls from a great height etc. The degree of reduction of the style/life variables can be different for each example. The particular adverse events would be set up by the game designer.
- A
step 880 detects whether a “stylish” game action has been carried out. This could be anything as defined by the game designer, and the degree of “style” associated with each action could differ. Some examples relevant to an action adventure game might be: an enemy killed or knocked out; a number of consecutive enemy kills or knock-outs within a certain time limit; a successful counter to an enemy attack; an aerial fight action; spearing two enemy with one spear and the like. - If a stylish action has been carried out, then at a
step 890 the style variable is incremented by an amount relevant to that action. This is represented by moving fromFIG. 5 d toFIG. 5 e. - A
step 900 detects whether the style variable has reached or exceeded a threshold amount. In fact, in the example ofFIGS. 5 a to 5 g there are three such threshold amounts, but the principle is the same for one or more. If a threshold amount has been reached, then at astep 910 an enhanced action or ability is enabled for that player, e.g. by setting a software flag to indicate this. Examples of enhanced abilities might be: the unlocking of new weapons; the ability to jump higher or hit harder etc. The enhancement remains in place as long as the style variable is at or exceeds the relevant threshold.FIG. 5 e shows athreshold 990 which has been reached. - A
step 920 detects whether such an enhanced action or ability has been used. Once it has been used, the enhancement is withdrawn by decrementing the style variable at astep 930, although a corresponding increment is made to the life variable at astep 940. The style variable can be reduced to zero (as in the transition fromFIG. 5 e toFIG. 5 g) or to the next lower threshold (as in the transition fromFIG. 5 e toFIG. 5 f), or to another point as set by the game designer. - It will be appreciated that the threshold arrangement is not essential; enhanced abilities could be provided in proportion to the current style variable.
- Finally, at a
step 950 the life variable is reduced in respect of the normal passage of time within the game environment, and control returns to thestep 820.
Claims (12)
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GB0618407A GB2441976A (en) | 2006-09-19 | 2006-09-19 | Video game |
PCT/GB2007/002735 WO2008035026A2 (en) | 2006-09-19 | 2007-07-19 | Style gauge for video game |
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US20090318217A1 (en) * | 2008-06-24 | 2009-12-24 | Acres-Fiore Patents | Gaming device with durational game elements |
US9542798B2 (en) | 2010-02-25 | 2017-01-10 | Patent Investment & Licensing Company | Personal electronic device for gaming and bonus system |
US11704963B2 (en) | 2010-02-25 | 2023-07-18 | Acres Technology | Personal electronic device for gaming and bonus system |
US11069180B2 (en) | 2010-02-25 | 2021-07-20 | Acres Technology | Personal electronic device for gaming and bonus system |
US10529171B2 (en) | 2010-02-25 | 2020-01-07 | Patent Investment & Licensing Company | Personal electronic device for gaming and bonus system |
US9524612B2 (en) | 2010-03-02 | 2016-12-20 | Patent Investment & Licensing Company | System for trade-in bonus |
US9767653B2 (en) | 2010-03-02 | 2017-09-19 | Patent Investment & Licensing Company | System for trade-in bonus |
US9922499B2 (en) | 2010-03-02 | 2018-03-20 | Patent Investment & Licensing Company | System for trade-in bonus |
US10388114B2 (en) | 2010-03-02 | 2019-08-20 | Patent Investment & Licensing Company | System for trade-in bonus |
US9286761B2 (en) | 2010-03-02 | 2016-03-15 | Patent Investment & Licensing Company | System for trade-in bonus |
US10650640B2 (en) | 2010-03-02 | 2020-05-12 | Acres Technology | System for trade-in bonus |
US10937276B2 (en) | 2010-03-02 | 2021-03-02 | Acres Technology | System for trade-in bonus |
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CN110180180A (en) * | 2018-02-23 | 2019-08-30 | 索尼互动娱乐欧洲有限公司 | Videograph and playback system and method |
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Also Published As
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GB2441976A (en) | 2008-03-26 |
WO2008035026B1 (en) | 2008-07-24 |
WO2008035026A3 (en) | 2008-05-22 |
GB0618407D0 (en) | 2006-11-01 |
WO2008035026A2 (en) | 2008-03-27 |
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