US20100007010A1 - Semiconductor package, method for enhancing the bond of a bonding wire, and method for manufacturing a semiconductor package - Google Patents
Semiconductor package, method for enhancing the bond of a bonding wire, and method for manufacturing a semiconductor package Download PDFInfo
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- US20100007010A1 US20100007010A1 US12/501,309 US50130909A US2010007010A1 US 20100007010 A1 US20100007010 A1 US 20100007010A1 US 50130909 A US50130909 A US 50130909A US 2010007010 A1 US2010007010 A1 US 2010007010A1
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- pad
- bonding wire
- conductive adhesive
- adhesive material
- block portion
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Definitions
- the present invention generally relates to a method for enhancing the bond of a bonding wire, and more particularly to a wire bonding structure of a semiconductor package including a non-conductive adhesive material which covers an aluminum pad and seals the whole block portion of a copper bonding wire.
- Wire bonding process is mainly based on gold (Au) wires, but copper (Cu) wire has an advantage of low cost. Compared with the gold, the copper has better electric conductivity and thermal conductivity, whereby the copper bonding wire has thinner diameter of wire and better dissipation of heat. However, the copper has disadvantage of insufficient ductility and easy oxidation such that the utilization of the copper bonding wire is restricted.
- the copper bonding wire is only applied to a chip pad with a big size or low dielectric material (low-k) of wafer, because the success of the wire bonding process of the copper bonding wire depends on the structural strength of the chip pad. In order to avoid the failure of the wire bonding process of the copper bonding wire, the small size of the chip pad will be limited.
- FIGS. 2 to 4 they depict a conventional method for bonding a copper bonding wire.
- a copper bonding wire 20 is provided by a wire bonding machine, wherein the copper bonding wire 20 has a copper line 22 and a copper ball 24 .
- the copper ball 24 is physically connected to an end of the copper line 22 by a discharging electricity manner or a burning hydrogen manner.
- the copper ball 24 is pressed and then deformed.
- the deformed copper ball 24 is bonded to an aluminum (Al) pad 32 by a vibration process.
- Al aluminum
- U.S. Pat. No. 7,115,446 B2 entitled “Flip Chip Bonding Method For Enhancing Adhesion Force In Flip Chip Packaging Process And Metal Layer-built Structure Of Substrate For The Same”, discloses that a method for packaging flip chip and a substrate structure can enhance the bond between a chip 50 and substrate 52 by forming bumps 54 on pads 51 of the chip 50 or pads 53 of the substrate 52 .
- an adhesive layer 56 disclosed in the U.S. Pat. No. 7,115,446 B2 can enhance the adhesive force during the bonding processes of flip chip, the adhesive layer 56 is not applied to the bonding process of the bonding wire. Furthermore, the adhesive layer 56 does not seal the whole bump 54 , and thus the adhesive layer 56 cannot generate the effect upon mold lock.
- the present invention provides a wire bonding structure of a semiconductor package includes a bonding wire, a pad and a non-conductive adhesive material.
- the bonding wire includes a line portion and a block portion, wherein the block portion is physically connected to the line portion, and the sectional area of the block portion is bigger than that of the line portion.
- the pad is bonded to the block portion.
- the non-conductive adhesive material covers the pad and seals the whole block portion of the bonding wire.
- the non-conductive adhesive material covers the aluminum pad and seals the whole block portion of the copper bonding wire, thereby enhancing the bond between the copper bonding wire and the aluminum pad. Furthermore, according to the above-mentioned wire bonding structure of the present invention, the non-conductive adhesive material covers the aluminum pad and seals the whole block portion of the copper bonding wire, thereby generating the effect upon mold lock. In addition, the non-conductive adhesive material covers the aluminum pad and seals the whole block portion of the copper bonding wire, thereby preventing the copper bonding wire from oxidation and electric leakage so as to cause the aluminum pads to have fine pitch.
- FIG. 1 is a cross-sectional view showing a method for bonding a wire in the prior art.
- FIGS. 2 to 4 are cross-sectional views showing a method for bonding a copper bonding wire in the prior art.
- FIG. 5 is a cross-sectional view showing a method for bonding flip chip in the prior art.
- FIGS. 6 and 16 are cross-sectional views showing a method for manufacturing a semiconductor package according to the first embodiment of the present invention.
- FIGS. 17 and 18 are cross-sectional views showing a method for enhancing the bond of a bonding wire according to the second embodiment of the present invention.
- FIGS. 6 to 17 they depict a method for manufacturing a semiconductor package according to the first embodiment of the present invention.
- a wafer 100 is provided, wherein the wafer 100 defines a plurality of chips 110 arranged in array manner.
- FIG. 7 it depicts a partially expanded cross-section of the chip 110 .
- Each chip 110 includes a passivating layer 112 and at least one pad (e.g. aluminum pad 132 ).
- the aluminum pad 132 is electrically connected to the circuit of the chip 110 .
- the passivating layer 112 covers the aluminum pad 132 and exposes a part of the aluminum pad 132 .
- a non-conductive adhesive material 140 is formed on the aluminum pad 132 .
- the forming step of the non-conductive adhesive material 140 can include the following steps: the non-conductive adhesive material 140 is formed on the aluminum pad 132 by a spin coating process, and then the non-conductive adhesive material 140 is solidified from a liquid state to a half-solid state.
- the forming step of the non-conductive adhesive material 140 can include the following steps: the non-conductive adhesive material 140 is formed on the aluminum pad 132 by a printing process, and then the non-conductive adhesive material 140 (e.g. typical adhesive) is solidified from a liquid state to a half-solid state.
- the forming step of the non-conductive adhesive material 140 can include the following step: the non-conductive adhesive material 140 which is in a half-solid state is directly disposed on the aluminum pad 132 .
- the wafer 100 is sawed to a plurality of chips 110 so as to form the chips 110 having the aluminum pad 132 and the non-conductive adhesive material 140 of the present invention.
- the chip 110 is mounted on a carrier 106 by an adhesive 104 .
- the carrier 106 can be a substrate or a leadframe.
- the carrier 106 has an upper surface 113 and a lower surface 114 opposite to the upper surface 113 .
- a chip 110 is disposed on the carrier 106 , wherein the chip 110 has an active surface 115 and a back surface 116 opposite to the active surface 115 , and the back surface 116 of the chip 110 is located on the upper surface 113 of the carrier 106 .
- the aluminum pad 132 is disposed on the active surface 215 of the chip 110 .
- a bonding wire (e.g. copper bonding wire 120 ) is provided by a wire bonding machine 102 , wherein the copper bonding wire 120 has a line portion 122 and a block portion 124 , wherein the block portion 124 is physically connected to an end of the line portion 122 , and the cross-sectional area of the block portion 124 is bigger than that of the line portion 122 .
- the block portion 124 can be spherical or non-spherical.
- the whole block portion 124 of the copper bonding wire 120 is inserted into the non-conductive adhesive material 140 .
- the block portion 124 is moved for contacting the aluminum pad 132 , and is pressed and deformed by a pressing process.
- the block portion 124 of the copper bonding wire 120 is bonded to the aluminum pad 132 by a vibration process, wherein the non-conductive adhesive material 140 covers the aluminum pad 132 and seals the whole block portion 124 of the copper bonding wire 120 .
- the non-conductive adhesive material 140 is solidified from a half-solid state to a solid state so as to form a wire bonding structure and a method for enhancing the bond of a bonding wire of the present invention.
- the carrier 106 can be a substrate 106 a, one end 125 of the copper bonding wire 120 is electrically connected to the aluminum pad 132 , the other end 126 of the copper bonding wire 120 can be electrically connected to a pad 107 of the carrier 106 .
- the substrate 106 a includes external electrical contacts 146 located on the second surface 114 .
- the chip 110 and the copper bonding wire 120 are sealed, and the carrier 106 is covered by a molding compound 138 so as to form a package, i.e. a semiconductor package 150 of the present invention, thereby finishing the method for manufacturing a semiconductor package of the present invention.
- the non-conductive adhesive material covers the aluminum pad and seals the whole block portion of the copper bonding wire, thereby enhancing the bond between the copper bonding wire and the aluminum pad. Furthermore, according to the above-mentioned wire bonding structure of the present invention, the non-conductive adhesive material covers the aluminum pad and seals the whole block portion of the copper bonding wire, thereby generating the effect upon mold lock. In addition, the non-conductive adhesive material covers the aluminum pad and seals the whole block portion of the copper bonding wire, thereby preventing the copper bonding wire from oxidation and electric leakage so as to cause the aluminum pads to have fine pitch.
- FIGS. 17 to 18 they depict a method for manufacturing a semiconductor package according to the second embodiment of the present invention.
- the method for manufacturing a semiconductor package according to the second embodiment is substantially similar to the method for manufacturing a semiconductor package according to the first embodiment, wherein the same elements are designated with the same reference numerals.
- the difference between the first and second embodiments is that the method for enhancing the bond of a bonding wire in the second embodiment includes the following steps. Referring to FIG. 17 , the block portion 124 of the copper bonding wire 120 is firstly bonded to the aluminum pad 132 . Referring to FIG.
- the aluminum pad 132 is covered by a non-conductive adhesive material 140 ′, and the whole block portion 124 of the copper bonding wire 120 is sealed by the non-conductive adhesive material 140 ′.
- the non-conductive adhesive material 140 ′ is solidified from a liquid state to a sold state so as to form a wire bonding structure of the present invention.
- the non-conductive adhesive material covers the aluminum pad and seals the whole block portion of the copper bonding wire, thereby enhancing the bond between the copper bonding wire and the aluminum pad. Furthermore, according to the above-mentioned wire bonding structure of the present invention, the non-conductive adhesive material covers the aluminum pad and seals the whole block portion of the copper bonding wire, thereby generating the effect upon mold lock. In addition, the non-conductive adhesive material covers the aluminum pad and seals the whole block portion of the copper bonding wire, thereby preventing the copper bonding wire from oxidation and electric leakage so as to cause the aluminum pads to have fine pitch.
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
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- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
Abstract
Description
- This application claims the priority benefit of U.S. Patent Application Ser. No. 61/079,811, filed on Jul. 11, 2008 and Taiwan Patent Application Serial Number 097142797, filed on Nov. 6, 2008, the full disclosure of which is incorporated herein by reference.
- 1. Field of the Invention
- The present invention generally relates to a method for enhancing the bond of a bonding wire, and more particularly to a wire bonding structure of a semiconductor package including a non-conductive adhesive material which covers an aluminum pad and seals the whole block portion of a copper bonding wire.
- 2. Description of the Related Art
- Referring to
FIG. 1 , according to a process for manufacturing a semiconductor package, the technology of wire bonding process widely applied to the electrical connection between apad 11 of achip 10 and apad 13 of asubstrate 12 by using abonding wire 14. Wire bonding process is mainly based on gold (Au) wires, but copper (Cu) wire has an advantage of low cost. Compared with the gold, the copper has better electric conductivity and thermal conductivity, whereby the copper bonding wire has thinner diameter of wire and better dissipation of heat. However, the copper has disadvantage of insufficient ductility and easy oxidation such that the utilization of the copper bonding wire is restricted. - Recently, the copper bonding wire is only applied to a chip pad with a big size or low dielectric material (low-k) of wafer, because the success of the wire bonding process of the copper bonding wire depends on the structural strength of the chip pad. In order to avoid the failure of the wire bonding process of the copper bonding wire, the small size of the chip pad will be limited.
- Referring to
FIGS. 2 to 4 , they depict a conventional method for bonding a copper bonding wire. Referring toFIG. 2 , acopper bonding wire 20 is provided by a wire bonding machine, wherein thecopper bonding wire 20 has acopper line 22 and acopper ball 24. Thecopper ball 24 is physically connected to an end of thecopper line 22 by a discharging electricity manner or a burning hydrogen manner. Referring toFIG. 3 , thecopper ball 24 is pressed and then deformed. Referring toFIG. 4 , thedeformed copper ball 24 is bonded to an aluminum (Al)pad 32 by a vibration process. However, the prior art fails to disclose an additional adhesive force for enhancing the bond between a copper bonding wire and an aluminum pad. - U.S. Pat. No. 7,115,446 B2, entitled “Flip Chip Bonding Method For Enhancing Adhesion Force In Flip Chip Packaging Process And Metal Layer-built Structure Of Substrate For The Same”, discloses that a method for packaging flip chip and a substrate structure can enhance the bond between a
chip 50 andsubstrate 52 by formingbumps 54 onpads 51 of thechip 50 orpads 53 of thesubstrate 52. - Referring to
FIG. 5 , although anadhesive layer 56 disclosed in the U.S. Pat. No. 7,115,446 B2 can enhance the adhesive force during the bonding processes of flip chip, theadhesive layer 56 is not applied to the bonding process of the bonding wire. Furthermore, theadhesive layer 56 does not seal thewhole bump 54, and thus theadhesive layer 56 cannot generate the effect upon mold lock. - Accordingly, there exists a need for a method for enhancing the bond of a bonding wire capable of solving the above-mentioned problems.
- The present invention provides a wire bonding structure of a semiconductor package includes a bonding wire, a pad and a non-conductive adhesive material. The bonding wire includes a line portion and a block portion, wherein the block portion is physically connected to the line portion, and the sectional area of the block portion is bigger than that of the line portion. The pad is bonded to the block portion. The non-conductive adhesive material covers the pad and seals the whole block portion of the bonding wire.
- According to the wire bonding structure of the present invention, the non-conductive adhesive material covers the aluminum pad and seals the whole block portion of the copper bonding wire, thereby enhancing the bond between the copper bonding wire and the aluminum pad. Furthermore, according to the above-mentioned wire bonding structure of the present invention, the non-conductive adhesive material covers the aluminum pad and seals the whole block portion of the copper bonding wire, thereby generating the effect upon mold lock. In addition, the non-conductive adhesive material covers the aluminum pad and seals the whole block portion of the copper bonding wire, thereby preventing the copper bonding wire from oxidation and electric leakage so as to cause the aluminum pads to have fine pitch.
- The foregoing, as well as additional objects, features and advantages of the invention will be more apparent from the following detailed description, which proceeds with reference to the accompanying drawings.
-
FIG. 1 is a cross-sectional view showing a method for bonding a wire in the prior art. -
FIGS. 2 to 4 are cross-sectional views showing a method for bonding a copper bonding wire in the prior art. -
FIG. 5 is a cross-sectional view showing a method for bonding flip chip in the prior art. -
FIGS. 6 and 16 are cross-sectional views showing a method for manufacturing a semiconductor package according to the first embodiment of the present invention. -
FIGS. 17 and 18 are cross-sectional views showing a method for enhancing the bond of a bonding wire according to the second embodiment of the present invention. - Referring to
FIGS. 6 to 17 , they depict a method for manufacturing a semiconductor package according to the first embodiment of the present invention. Referring toFIG. 6 , awafer 100 is provided, wherein thewafer 100 defines a plurality ofchips 110 arranged in array manner. Referring toFIG. 7 , it depicts a partially expanded cross-section of thechip 110. Eachchip 110 includes apassivating layer 112 and at least one pad (e.g. aluminum pad 132). Thealuminum pad 132 is electrically connected to the circuit of thechip 110. Thepassivating layer 112 covers thealuminum pad 132 and exposes a part of thealuminum pad 132. Referring toFIG. 8 , a non-conductiveadhesive material 140 is formed on thealuminum pad 132. The forming step of the non-conductiveadhesive material 140 can include the following steps: the non-conductiveadhesive material 140 is formed on thealuminum pad 132 by a spin coating process, and then the non-conductiveadhesive material 140 is solidified from a liquid state to a half-solid state. Or, the forming step of the non-conductiveadhesive material 140 can include the following steps: the non-conductiveadhesive material 140 is formed on thealuminum pad 132 by a printing process, and then the non-conductive adhesive material 140 (e.g. typical adhesive) is solidified from a liquid state to a half-solid state. Or, the forming step of the non-conductiveadhesive material 140 can include the following step: the non-conductiveadhesive material 140 which is in a half-solid state is directly disposed on thealuminum pad 132. - Referring to
FIG. 9 , thewafer 100 is sawed to a plurality ofchips 110 so as to form thechips 110 having thealuminum pad 132 and the non-conductiveadhesive material 140 of the present invention. Referring toFIG. 10 , thechip 110 is mounted on acarrier 106 by an adhesive 104. Thecarrier 106 can be a substrate or a leadframe. Thecarrier 106 has anupper surface 113 and alower surface 114 opposite to theupper surface 113. Achip 110 is disposed on thecarrier 106, wherein thechip 110 has anactive surface 115 and aback surface 116 opposite to theactive surface 115, and theback surface 116 of thechip 110 is located on theupper surface 113 of thecarrier 106. Thealuminum pad 132 is disposed on the active surface 215 of thechip 110. - Referring to
FIGS. 11 a and 11 b, a bonding wire (e.g. copper bonding wire 120) is provided by awire bonding machine 102, wherein thecopper bonding wire 120 has aline portion 122 and ablock portion 124, wherein theblock portion 124 is physically connected to an end of theline portion 122, and the cross-sectional area of theblock portion 124 is bigger than that of theline portion 122. Theblock portion 124 can be spherical or non-spherical. - Referring to
FIG. 12 , thewhole block portion 124 of thecopper bonding wire 120 is inserted into the non-conductiveadhesive material 140. Referring toFIG. 13 , theblock portion 124 is moved for contacting thealuminum pad 132, and is pressed and deformed by a pressing process. Referring toFIG. 14 , theblock portion 124 of thecopper bonding wire 120 is bonded to thealuminum pad 132 by a vibration process, wherein the non-conductiveadhesive material 140 covers thealuminum pad 132 and seals thewhole block portion 124 of thecopper bonding wire 120. Referring toFIG. 15 , the non-conductiveadhesive material 140 is solidified from a half-solid state to a solid state so as to form a wire bonding structure and a method for enhancing the bond of a bonding wire of the present invention. - Referring to
FIG. 16 , thecarrier 106 can be asubstrate 106 a, oneend 125 of thecopper bonding wire 120 is electrically connected to thealuminum pad 132, theother end 126 of thecopper bonding wire 120 can be electrically connected to apad 107 of thecarrier 106. Thesubstrate 106 a includes externalelectrical contacts 146 located on thesecond surface 114. - Referring to
FIG. 16 again, finally thechip 110 and thecopper bonding wire 120 are sealed, and thecarrier 106 is covered by amolding compound 138 so as to form a package, i.e. asemiconductor package 150 of the present invention, thereby finishing the method for manufacturing a semiconductor package of the present invention. - According to the wire bonding structure of the present invention, the non-conductive adhesive material covers the aluminum pad and seals the whole block portion of the copper bonding wire, thereby enhancing the bond between the copper bonding wire and the aluminum pad. Furthermore, according to the above-mentioned wire bonding structure of the present invention, the non-conductive adhesive material covers the aluminum pad and seals the whole block portion of the copper bonding wire, thereby generating the effect upon mold lock. In addition, the non-conductive adhesive material covers the aluminum pad and seals the whole block portion of the copper bonding wire, thereby preventing the copper bonding wire from oxidation and electric leakage so as to cause the aluminum pads to have fine pitch.
- Referring to
FIGS. 17 to 18 , they depict a method for manufacturing a semiconductor package according to the second embodiment of the present invention. The method for manufacturing a semiconductor package according to the second embodiment is substantially similar to the method for manufacturing a semiconductor package according to the first embodiment, wherein the same elements are designated with the same reference numerals. The difference between the first and second embodiments is that the method for enhancing the bond of a bonding wire in the second embodiment includes the following steps. Referring toFIG. 17 , theblock portion 124 of thecopper bonding wire 120 is firstly bonded to thealuminum pad 132. Referring toFIG. 18 , then thealuminum pad 132 is covered by a non-conductiveadhesive material 140′, and thewhole block portion 124 of thecopper bonding wire 120 is sealed by the non-conductiveadhesive material 140′. Finally, the non-conductiveadhesive material 140′ is solidified from a liquid state to a sold state so as to form a wire bonding structure of the present invention. - According to the wire bonding structure of the present invention, the non-conductive adhesive material covers the aluminum pad and seals the whole block portion of the copper bonding wire, thereby enhancing the bond between the copper bonding wire and the aluminum pad. Furthermore, according to the above-mentioned wire bonding structure of the present invention, the non-conductive adhesive material covers the aluminum pad and seals the whole block portion of the copper bonding wire, thereby generating the effect upon mold lock. In addition, the non-conductive adhesive material covers the aluminum pad and seals the whole block portion of the copper bonding wire, thereby preventing the copper bonding wire from oxidation and electric leakage so as to cause the aluminum pads to have fine pitch.
- Although the invention has been explained in relation to its preferred embodiment, it is not used to limit the invention. It is to be understood that many other possible modifications and variations can be made by those skilled in the art without departing from the spirit and scope of the invention as hereinafter claimed.
Claims (20)
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US12/501,309 US8018075B2 (en) | 2008-07-11 | 2009-07-10 | Semiconductor package, method for enhancing the bond of a bonding wire, and method for manufacturing a semiconductor package |
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US7981108P | 2008-07-11 | 2008-07-11 | |
TW097142797 | 2008-11-06 | ||
TW97142797A | 2008-11-06 | ||
TW097142797A TWI385740B (en) | 2008-07-11 | 2008-11-06 | Wire bonding structure, method for enhancing the bond of a wire, and method for manufacturing a semiconductor package |
US12/501,309 US8018075B2 (en) | 2008-07-11 | 2009-07-10 | Semiconductor package, method for enhancing the bond of a bonding wire, and method for manufacturing a semiconductor package |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100200969A1 (en) * | 2009-02-09 | 2010-08-12 | Advanced Semiconductor Engineering, Inc. | Semiconductor package and method of manufacturing the same |
US8618677B2 (en) | 2012-04-06 | 2013-12-31 | Advanced Semiconductor Engineering, Inc. | Wirebonded semiconductor package |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5318651A (en) * | 1991-11-27 | 1994-06-07 | Nec Corporation | Method of bonding circuit boards |
US6091140A (en) * | 1998-10-23 | 2000-07-18 | Texas Instruments Incorporated | Thin chip-size integrated circuit package |
US20050224959A1 (en) * | 2004-04-01 | 2005-10-13 | Chippac, Inc | Die with discrete spacers and die spacing method |
US20060043612A1 (en) * | 2004-09-02 | 2006-03-02 | Stats Chippac Ltd. | Wire sweep resistant semiconductor package and manufacturing method thereof |
US7115446B2 (en) * | 2003-11-25 | 2006-10-03 | Ja Uk Koo | Flip chip bonding method for enhancing adhesion force in flip chip packaging process and metal layer-built structure of substrate for the same |
US20090085220A1 (en) * | 2007-09-28 | 2009-04-02 | Qimonda Ag | Semiconductor component and method of manufacturing |
-
2009
- 2009-07-10 US US12/501,309 patent/US8018075B2/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5318651A (en) * | 1991-11-27 | 1994-06-07 | Nec Corporation | Method of bonding circuit boards |
US6091140A (en) * | 1998-10-23 | 2000-07-18 | Texas Instruments Incorporated | Thin chip-size integrated circuit package |
US7115446B2 (en) * | 2003-11-25 | 2006-10-03 | Ja Uk Koo | Flip chip bonding method for enhancing adhesion force in flip chip packaging process and metal layer-built structure of substrate for the same |
US20050224959A1 (en) * | 2004-04-01 | 2005-10-13 | Chippac, Inc | Die with discrete spacers and die spacing method |
US20060043612A1 (en) * | 2004-09-02 | 2006-03-02 | Stats Chippac Ltd. | Wire sweep resistant semiconductor package and manufacturing method thereof |
US20090085220A1 (en) * | 2007-09-28 | 2009-04-02 | Qimonda Ag | Semiconductor component and method of manufacturing |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100200969A1 (en) * | 2009-02-09 | 2010-08-12 | Advanced Semiconductor Engineering, Inc. | Semiconductor package and method of manufacturing the same |
US8357998B2 (en) | 2009-02-09 | 2013-01-22 | Advanced Semiconductor Engineering, Inc. | Wirebonded semiconductor package |
US8618677B2 (en) | 2012-04-06 | 2013-12-31 | Advanced Semiconductor Engineering, Inc. | Wirebonded semiconductor package |
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