US20090065953A1 - Chip module and a fabrication method thereof - Google Patents

Chip module and a fabrication method thereof Download PDF

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Publication number
US20090065953A1
US20090065953A1 US12/230,829 US23082908A US2009065953A1 US 20090065953 A1 US20090065953 A1 US 20090065953A1 US 23082908 A US23082908 A US 23082908A US 2009065953 A1 US2009065953 A1 US 2009065953A1
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Prior art keywords
chip
substrate
glue structure
passive units
glue
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US12/230,829
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Jian-Cheng Chen
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Advanced Semiconductor Engineering Inc
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Advanced Semiconductor Engineering Inc
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Assigned to ADVANCED SEMICONDUCTOR ENGINEERING, INC. reassignment ADVANCED SEMICONDUCTOR ENGINEERING, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: CHEN, JIAN-CHENG
Publication of US20090065953A1 publication Critical patent/US20090065953A1/en
Priority to US13/076,947 priority Critical patent/US8373285B2/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
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Definitions

  • the invention relates in general to a chip module and a fabricating method thereof, and more particularly to a chip module with a power amplifier and a fabricating method thereof.
  • FIG. 1 is a perspective view illustrating a typical wireless module 10 .
  • the wireless module 10 has a substrate 11 , at least one chip packaging structure 12 , a power amplifier chip 13 , and many passive units 14 such as resistors, inductances and capacitors.
  • the passive units 14 are assembled on the substrate 11 by surface mount technology (SMT).
  • SMT surface mount technology
  • the power amplifier chip 13 usually applys a III/V semiconductor chip such as gallium arsenide (GaAs) chip for providing a high frequency signal. Because the power amplifier chip 13 is usually used in a strict high frequency environment, the flip-chip technology or wireless chip level (WLCSP) package is unsuitable for assembling the chip 13 on the substrate 11 .
  • the power amplifier chip is adhered to the substrate 11 , and wires are used for electrically connecting the power amplifier chip with the substrate 11 . Then, the power amplifier chip is buried in a packaging material. Further, the wires must be buried in a packaging material for avoiding the exposed wires causing an antenna to excite energy.
  • FIGS. 2A and 2B are respectively a cross-sectional view and top view illustrating the package structure of a typical power amplifier chip.
  • a dam structure 160 encircling the power amplifier chip 120 is formed on the substrate 110 .
  • the above package structure is capable of appropriately packaging the power amplifier chip 120 in the wireless module 10 .
  • a predetermined space on the substrate 110 must be reserved for manufacturing the dam structure 160 . Therefore, the dam structure 160 will certainly increase the size of the package structure and jeopardize the portability of electronic devices.
  • the invention provides a chip module and a fabricating method thereof capable of appropriately packaging the power amplifier chip 120 in the chip module and avoiding unnecessary increase in the size of the package structure.
  • the invention is directed to a chip module and a fabricating method thereof.
  • a power amplifier is packaged in the chip module, such that the wires can do without insulation and the size of the package structure will not increase due to the insulation.
  • a chip module comprises a substrate, a chip, a plurality of passive units, a first glue structure and a second glue structure.
  • the chip is assembled on the substrate and electrically connected with the substrate.
  • a plurality of passive units is assembled on the substrate in the style of encircling the chip.
  • the first glue structure is filled between the passive units so that an encircled area is defined by the first glue structure and the passive units.
  • the second glue structure is filled within the encircled area so that the chip is covered by the second glue structure.
  • a method of fabricating chip module comprises the following steps.
  • (a) A substrate is provided.
  • (b) A chip is assembled on the substrate and electrically connected with the substrate.
  • (c) A plurality of passive units is assembled on the substrate in the style of encircling the chip.
  • (d) A first glue structure is filled between the passive units so that an enencircled area is defined by the first glue structure and the passive units.
  • (e) A second glue structure is filled within the encircled area so that the chip is covered by the second glue structure.
  • FIG. 1 is a perspective view illustrating a typical wireless module
  • FIGS. 2A and 2B are perspectives view illustrating a typical power amplifier package structure
  • FIGS. 3 , 4 , 5 A, 5 B, 6 A, 6 B and 7 are views illustrating a fabricating method of a chip module in accordance with a first preferred embodiment of the present invention
  • FIGS. 8A and 8B are views illustrating a fabricating method of the chip module in accordance with a second preferred embodiment of the present invention.
  • FIG. 9 is a view illustrating a fabricating method of the chip module in accordance with a third preferred embodiment of the present invention.
  • FIG. 10 is a view illustrating a fabricating method of the chip module in accordance with a fourth preferred embodiment of the present invention.
  • FIGS. 3-7 are a first preferred embodiment of a fabricating method of a chip module 200 of the invention. Firstly, as indicated in FIG. 3 , a substrate 210 is provided. Next, an adhesive layer 270 is disposed on the substrate 210 , and a chip 220 , such as a power amplifier chip, is assembled on an adhesive layer 270 . The chip 220 is adhered to the substrate 210 via the adhesive layer 270 . Afterward, as indicated in FIG.
  • a plurality of wires 230 is disposed for connecting a contact pad (not illustrated) disposed on the chip 220 with a conductive pattern (not illustrated) disposed on the substrate 210 , such that the signal generated by the chip 220 can be transmitted to the substrate 210 via the wires 230 and further transmitted outward from the substrate 210 .
  • a plurality of passive units 240 is assembled on the substrate 210 in the style of encircling the chip.
  • the passive units 240 can be assembled on the substrate 210 by surface mount technology (SMT).
  • a first glue structure 250 is filled between the passive units 240 .
  • the first glue structure 250 completely covers each of the passive units 240 .
  • An encircled area R is defined by the first glue structure 250 and the passive units 240 for encircling the chip 220 and the wires 230 .
  • the chip 220 and the wires 230 are located within the encircled area R.
  • a second glue structure 260 is filled within the encircled area R for covering the chip 220 and the wires 230 , so that the chip 220 and the wires 230 are isolated from the outside.
  • the first glue structure 250 and the second glue structure 260 can be made from different materials, respectively.
  • the first glue structure 250 is filled between the passive units 240 for defining the encircled area R.
  • the first glue structure 250 is preferably made from an easy-forming material with high adhesiveness.
  • the second glue structure 260 is preferably made from a material with high fluidity.
  • viscosity of the first glue structure 250 preferably is higher than viscosity of the second glue structure 260 .
  • each of the passive units 240 is completely buried in the first glue structure 250 .
  • the invention is not limited thereto.
  • the first glue structure 350 is filled in the gap between neighboring passive units 240 . Parts of the lateral sides and top surface of the passive units 240 are still exposed.
  • the passive units 240 and the first glue structure 350 still define an encircled area to accommodate the chip 220 and the wires 230 .
  • the formation of an encircled area is not compulsory in the invention.
  • the first glue structure 450 and the passive units 240 do not form an encircled area for accommodating the chip 220 and the wires 230 .
  • the first glue structure 450 and the passive units 240 still define an internal space.
  • the second glue structure is preferably made from a material with high adhesiveness for avoiding the second glue structure (not illustrated) overflowing outward onto the first glue structure 450 and the passive units 240 .
  • the passive units 240 can be used as a shield and the second glue structure is filled between the passive units 240 for defining an enencircled area R′ such that the package structure is completed without filling the first glue structure 250 between the passive units 240 .
  • the second glue structure is preferably made from a material with high adhesiveness for aviding the second glue structure overflowing outward onto the first glue structure 450 and the passive units 240 .
  • conventional packaging method employs an additional dam structure 160 to protect the power amplifier chip 120 assembled on the substrate 110 .
  • dam structure 160 increases the size of the package structure and jeopardizes the portability of the chip module.
  • the invention defines an encircled area by the passive units 240 and the first glue structures 250 , 350 , 450 , and then the second glue structure 260 is filled within the encircled space to finish the package structure with the power amplifier chip 220 .
  • the invention omits the dam structure which is used in conventional packaging method and reduces the size of the chip module.

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  • Chemical & Material Sciences (AREA)
  • Dispersion Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Transmitters (AREA)

Abstract

A chip module and a fabricating method thereof are provided. Firstly, a substrate is provided. Next, a chip is assembled on the substrate and electrically connected with the substrate. Afterward, a plurality of passive units is assembled on the substrate in the style of encircling the chip. Then, a first glue structure is filled between the passive units so that an encircled area is defined by the first glue structure and the passive units. Then, a second glue structure is filled in the encircled area so that the chip is covered by the second glue structure.

Description

  • This application claims the benefit of Taiwan application Serial No. 96133942, filed Sep. 11, 2007, the subject matter of which is incorporated herein by reference.
    • BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • The invention relates in general to a chip module and a fabricating method thereof, and more particularly to a chip module with a power amplifier and a fabricating method thereof.
  • 2. Description of the Related Art
  • How to increase the portability of electronic communication devices is an important trend for the industry of wireless communication, and is also essential to increase product competiveness. The size and weight of electronic communication devices must be reduced in order to increase the portability of electronic communication devices. An electronic communication device s normally has a substrate and the chip is assembled on the substrate by a packaging technology. Thus, the size of the chip package structure directly affects the size of the whole of an electronic product.
  • FIG. 1 is a perspective view illustrating a typical wireless module 10. Referring to FIG. 1, the wireless module 10 has a substrate 11, at least one chip packaging structure 12, a power amplifier chip 13, and many passive units 14 such as resistors, inductances and capacitors. The passive units 14 are assembled on the substrate 11 by surface mount technology (SMT).
  • Currently, the power amplifier chip 13 usually applys a III/V semiconductor chip such as gallium arsenide (GaAs) chip for providing a high frequency signal. Because the power amplifier chip 13 is usually used in a strict high frequency environment, the flip-chip technology or wireless chip level (WLCSP) package is unsuitable for assembling the chip 13 on the substrate 11. In general, the power amplifier chip is adhered to the substrate 11, and wires are used for electrically connecting the power amplifier chip with the substrate 11. Then, the power amplifier chip is buried in a packaging material. Further, the wires must be buried in a packaging material for avoiding the exposed wires causing an antenna to excite energy.
  • FIGS. 2A and 2B are respectively a cross-sectional view and top view illustrating the package structure of a typical power amplifier chip. Referring to FIGS. 2A and 2B, a dam structure 160 encircling the power amplifier chip 120 is formed on the substrate 110. The space encircled by the dam structure 160 with the packaging material 170 for encircling the power amplifier chip 120 and the wires 130 and for providing the power amplifier chip 120 and the wires 130 with necessary insulation protection. The above package structure is capable of appropriately packaging the power amplifier chip 120 in the wireless module 10. However, during manufacturing the dam structure 160, a predetermined space on the substrate 110 must be reserved for manufacturing the dam structure 160. Therefore, the dam structure 160 will certainly increase the size of the package structure and jeopardize the portability of electronic devices.
  • Thus, the invention provides a chip module and a fabricating method thereof capable of appropriately packaging the power amplifier chip 120 in the chip module and avoiding unnecessary increase in the size of the package structure.
    • SUMMARY OF THE INVENTION
  • The invention is directed to a chip module and a fabricating method thereof. A power amplifier is packaged in the chip module, such that the wires can do without insulation and the size of the package structure will not increase due to the insulation.
  • According to a first aspect of the present invention, a chip module is provided. The chip module comprises a substrate, a chip, a plurality of passive units, a first glue structure and a second glue structure. The chip is assembled on the substrate and electrically connected with the substrate. A plurality of passive units is assembled on the substrate in the style of encircling the chip. The first glue structure is filled between the passive units so that an encircled area is defined by the first glue structure and the passive units. The second glue structure is filled within the encircled area so that the chip is covered by the second glue structure.
  • According to a second aspect of the present invention, a method of fabricating chip module is provided. The method comprises the following steps. (a) A substrate is provided. (b) A chip is assembled on the substrate and electrically connected with the substrate. (c) A plurality of passive units is assembled on the substrate in the style of encircling the chip. (d) A first glue structure is filled between the passive units so that an enencircled area is defined by the first glue structure and the passive units. (e) A second glue structure is filled within the encircled area so that the chip is covered by the second glue structure.
  • The invention will become apparent from the following detailed description of the preferred but non-limiting embodiments. The following description is made with reference to the accompanying drawings.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a perspective view illustrating a typical wireless module;
  • FIGS. 2A and 2B are perspectives view illustrating a typical power amplifier package structure;
  • FIGS. 3, 4, 5A, 5B, 6A, 6B and 7 are views illustrating a fabricating method of a chip module in accordance with a first preferred embodiment of the present invention;
  • FIGS. 8A and 8B are views illustrating a fabricating method of the chip module in accordance with a second preferred embodiment of the present invention;
  • FIG. 9 is a view illustrating a fabricating method of the chip module in accordance with a third preferred embodiment of the present invention; and
  • FIG. 10 is a view illustrating a fabricating method of the chip module in accordance with a fourth preferred embodiment of the present invention.
    •  DETAILED DESCRIPTION OF THE INVENTION
  • FIGS. 3-7 are a first preferred embodiment of a fabricating method of a chip module 200 of the invention. Firstly, as indicated in FIG. 3, a substrate 210 is provided. Next, an adhesive layer 270 is disposed on the substrate 210, and a chip 220, such as a power amplifier chip, is assembled on an adhesive layer 270. The chip 220 is adhered to the substrate 210 via the adhesive layer 270. Afterward, as indicated in FIG. 4, a plurality of wires 230 is disposed for connecting a contact pad (not illustrated) disposed on the chip 220 with a conductive pattern (not illustrated) disposed on the substrate 210, such that the signal generated by the chip 220 can be transmitted to the substrate 210 via the wires 230 and further transmitted outward from the substrate 210.
  • Next, as indicated in FIGS. 5A and 5B, a plurality of passive units 240 is assembled on the substrate 210 in the style of encircling the chip. In a preferred embodiment, the passive units 240 can be assembled on the substrate 210 by surface mount technology (SMT).
  • Afterward, as indicated in FIGS. 6A and 6B, a first glue structure 250 is filled between the passive units 240. In the present embodiment of the invention, the first glue structure 250 completely covers each of the passive units 240. An encircled area R is defined by the first glue structure 250 and the passive units 240 for encircling the chip 220 and the wires 230. The chip 220 and the wires 230 are located within the encircled area R. Next, as indicated in FIG. 7, a second glue structure 260 is filled within the encircled area R for covering the chip 220 and the wires 230, so that the chip 220 and the wires 230 are isolated from the outside.
  • The first glue structure 250 and the second glue structure 260 can be made from different materials, respectively. In a preferred embodiment, the first glue structure 250 is filled between the passive units 240 for defining the encircled area R. For the convenience in the manufacturing process, the first glue structure 250 is preferably made from an easy-forming material with high adhesiveness. On the other side, For making sure that the second glue structure 260 can effectively bury the wires 230, the second glue structure 260 is preferably made from a material with high fluidity. Thus, viscosity of the first glue structure 250 preferably is higher than viscosity of the second glue structure 260.
  • Then, as indicated in FIGS. 6A and 6B, in the present embodiment of the invention, each of the passive units 240 is completely buried in the first glue structure 250. However, the invention is not limited thereto. As indicated in FIGS. 8A and 8B, in a second embodiment of the invention, the first glue structure 350 is filled in the gap between neighboring passive units 240. Parts of the lateral sides and top surface of the passive units 240 are still exposed. In the present embodiment of the invention, the passive units 240 and the first glue structure 350 still define an encircled area to accommodate the chip 220 and the wires 230.
  • The formation of an encircled area is not compulsory in the invention. As indicated in FIG. 9, in a third embodiment of the invention, despite the first glue structure 450 is filled between the passive units 240, the first glue structure 450 and the passive units 240 do not form an encircled area for accommodating the chip 220 and the wires 230. However, the first glue structure 450 and the passive units 240 still define an internal space. In the present embodiment of the invention, the second glue structure is preferably made from a material with high adhesiveness for avoiding the second glue structure (not illustrated) overflowing outward onto the first glue structure 450 and the passive units 240.
  • As indicated in FIG. 10, in a third embodiment of the invention, if the passive units 240 are closely arranged, then the passive units 240 can be used as a shield and the second glue structure is filled between the passive units 240 for defining an enencircled area R′ such that the package structure is completed without filling the first glue structure 250 between the passive units 240. However, in the present embodiment of the invention, the second glue structure is preferably made from a material with high adhesiveness for aviding the second glue structure overflowing outward onto the first glue structure 450 and the passive units 240.
  • As indicated in FIGS. 2A and 2B, conventional packaging method employs an additional dam structure 160 to protect the power amplifier chip 120 assembled on the substrate 110. However, such dam structure 160 increases the size of the package structure and jeopardizes the portability of the chip module. Compared with the conventional method, the invention defines an encircled area by the passive units 240 and the first glue structures 250, 350, 450, and then the second glue structure 260 is filled within the encircled space to finish the package structure with the power amplifier chip 220. As a result, the invention omits the dam structure which is used in conventional packaging method and reduces the size of the chip module.
  • While the invention has been described by way of example and in terms of a preferred embodiment, it is to be understood that the invention is not limited thereto. On the contrary, it is intended for covering various modifications and similar arrangements and procedures, and the scope of the appended claims therefore should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements and procedures.

Claims (17)

1. A chip module, comprising:
a substrate;
a chip assembled on the substrate and electrically connected with the substrate;
a plurality of passive units assembled on the substrate in the style of encircling the chip
a first glue structure filled between the passive units so that an encircled area is defined by the first glue structure and the passive units; and
a second glue structure filled within the encircled area so that the chip is covered by the second glue structure.
2. The chip module according to claim 1, wherein an adhesive layer disposed between the chip and the substrate.
3. The chip module according to claim 1, further comprising a plurality of wires is electrically connected with the chip and the substrate.
4. The chip module according to claim 3, wherein the wires are buried in the second glue structure.
5. The chip module according to claim 1, wherein the chip is a power amplifier chip.
6. The chip module according to claim 1, wherein the passive units are buried in the first glue structure.
7. The chip module according to claim 1, wherein the constituent of the first glue structure is different from that of the second glue structure.
8. The chip module according to claim 1, wherein viscosity of the first glue structure is higher than viscosity of the second glue structure.
9. A fabricating method of chip module, the method comprising:
providing a substrate;
assembling a chip on the substrate and electrically connecting the chip with the substrate;
assembling a plurality of passive units on the substrate in the style of encircling the chip;
filling a first glue structure between the passive units so that an encircled area is defined by the first glue structure and the passive units; and
filling the encircled area with a second glue structure so that the chip is covered by the second glue structure.
10. The fabricating method according to claim 9, wherein the passive units are assembled on the substrate by surface mount technology (SMT).
11. The fabricating method according to claim 9, wherein before the step of assembling the chip on the substrate, the method further comprises:
disposing an adhesive layer on the substrate, the chip is adhered to the substrate via the adhesive layer.
12. The fabricating method according to claim 9, further comprises:
disposing a plurality of wires so that the wires electrically connect the chip with the substrate.
13. The fabricating method according to claim 12, wherein the wires are buried in the second glue structure.
14. The fabricating method according to claim 9, wherein the chip is a power amplifier chip.
15. The fabricating method according to claim 9, wherein during the step of filling the first glue structure between the passive units, the passive units are buried in the first glue structure.
16. The fabricating method according to claim 9, wherein the constituent of the first glue structure is different from that of the second glue structure.
17. The fabricating method according to claim 16, wherein viscosity of the first glue structure is higher than viscosity of the second glue structure.
US12/230,829 2007-09-11 2008-09-05 Chip module and a fabrication method thereof Abandoned US20090065953A1 (en)

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