US20060133754A1 - Ultra low-loss CMOS compatible silicon waveguides - Google Patents

Ultra low-loss CMOS compatible silicon waveguides Download PDF

Info

Publication number
US20060133754A1
US20060133754A1 US11/314,305 US31430505A US2006133754A1 US 20060133754 A1 US20060133754 A1 US 20060133754A1 US 31430505 A US31430505 A US 31430505A US 2006133754 A1 US2006133754 A1 US 2006133754A1
Authority
US
United States
Prior art keywords
waveguiding structure
silicon
soi
low loss
based optical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US11/314,305
Inventor
Vipulkumar Patel
David Piede
Margaret Ghiron
Prakash Gothoskar
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Cisco Technology Inc
Lightwire LLC
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to US11/314,305 priority Critical patent/US20060133754A1/en
Assigned to SIOPTICAL, INC. reassignment SIOPTICAL, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: GHIRON, MARGARET, GOTHASKAR, PRAKASH, PATEL, VIPULKUMAR, PIEDE, DAVID
Publication of US20060133754A1 publication Critical patent/US20060133754A1/en
Priority to US11/890,123 priority patent/US7941023B2/en
Assigned to CISCO SYSTEMS, INC. reassignment CISCO SYSTEMS, INC. SECURITY AGREEMENT Assignors: LIGHTWIRE, INC.
Assigned to LIGHTWIRE, INC. reassignment LIGHTWIRE, INC. RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS). Assignors: CISCO SYSTEMS, INC.
Assigned to Lightwire LLC reassignment Lightwire LLC CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). Assignors: LIGHTWIRE, INC.
Assigned to CISCO TECHNOLOGY, INC. reassignment CISCO TECHNOLOGY, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: Lightwire LLC
Abandoned legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/015Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements with at least one potential jump barrier, e.g. PN, PIN junction
    • G02F1/025Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements with at least one potential jump barrier, e.g. PN, PIN junction in an optical waveguide structure
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/122Basic optical elements, e.g. light-guiding paths
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/122Basic optical elements, e.g. light-guiding paths
    • G02B6/1228Tapered waveguides, e.g. integrated spot-size transformers
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12035Materials
    • G02B2006/12061Silicon
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12083Constructional arrangements
    • G02B2006/12097Ridge, rib or the like

Definitions

  • the present invention relates to the formation of low loss silicon optical waveguides in a silicon-on-insulator (SOI) structure and, more particularly, to the inclusion of a rib/slab of a CMOS-compatible material having a refractive index intermediate that of silicon and silicon dioxide to achieve the desired lower loss.
  • SOI silicon-on-insulator
  • the optical waveguides typically formed in SOI-based structures comprise silicon (with a refractive index of approximately 3.47), the silicon formed in a “slab”, “rib” or “strip” geometry on the surface of the SOI substrate.
  • a strip waveguide typically comprises crystalline silicon, where crystalline silicon is known to exhibit less loss that a polysilicon form of the same material.
  • strip waveguides tend to exhibit relatively high optical loss through their (relatively rough) sidewalls, which serve as scattering surfaces for a propagating optical signal. That is, since an etching process is used to form the sidewalls of the strip, the etchant tends to roughen the exposed sidewall surfaces. Any geometry that introduces sharp corners in the strip waveguide also serves to introduce scattering centers and increase optical loss.
  • a “rib” waveguide structure conventionally comprises a polysilicon rib formed over the surface silicon layer (often referred to as the “SOI layer”) in SOI-based applications.
  • SOI layer surface silicon layer
  • the bulk losses of polysilicon are greater than that of crystalline silicon, resulting in higher optical losses along the rib waveguide.
  • the present invention relates to the formation of low loss silicon optical waveguides in a silicon-on-insulator (SOI) structure and, more particularly, to the inclusion of a rib/slab of a CMOS-compatible material having a refractive index intermediate that of silicon and silicon dioxide to achieve the desired lower loss.
  • SOI silicon-on-insulator
  • a rib/slab of a material having a refractive index less than that of silicon, but greater than that of silicon dioxide is formed over a portion of the surface SOI layer of a SOI-based structure.
  • silicon nitride may be used as this material (inasmuch as it is particularly well-suited for CMOS-based fabrication processes).
  • the thickness of the rib/slab is controlled as a trade-off between optical coupling into the rib/slab and optical loss.
  • silicon nitride is an amorphous material (as are other appropriate semiconductor materials, such as SiON and SiC), scattering losses through rib sidewalls of such a structure are significantly less than in the prior art silicon structure.
  • CMOS fabrication processes various dopants may first be deposited within the SOI layer and will not migrate within SOI layer during deposition of the overlying rib/slab structure.
  • FIG. 1 illustrates, in an isometric view, a prior art silicon rib waveguide arrangement
  • FIG. 2 is a cut-away side view of a first embodiment of a tri-material rib waveguide structure formed in accordance with the present invention
  • FIG. 3 contains a variation of the arrangement of FIG. 2 , with the inclusion of a relatively thin gate oxide layer between the SOI layer and the rib waveguide structure;
  • FIG. 4 illustrates a cut-away side view of an exemplary active optical device structure formed in accordance with the present invention, where SOI layer has been doped in appropriate regions to form an active device;
  • FIG. 5 illustrates an alternative to the arrangement of FIG. 4 , where the doped regions are formed as contiguous vertical areas within the SOI layer;
  • FIG. 7 is a top view of the arrangement of FIG. 6 ;
  • FIG. 8 is a top view of yet another embodiment of the present invention, where a propagating optical signal is coupled with low loss between the SIO layer and a tapered rib structure formed of a material such as silicon nitride;
  • FIG. 9 is a top view of another embodiment of the present invention, where the doping within the surface SOI layer is controlled to provide a tapered transition between a passive device region and an active device region;
  • FIG. 10 is an isometric view of the embodiment of FIG. 9 ;
  • FIGS. 11-14 illustrate a set of process steps useful in forming a low loss rounded profile SOI layer rib waveguide in accordance with the present invention.
  • FIG. 1 illustrates an SOI-based silicon rib waveguide structure 1 as typical in the prior art.
  • the longitudinal z-axis indicates the direction of light propagation, indicated by arrows 2 , with the transverse y-direction and x-direction referred to as the “horizontal” and “vertical” directions, respectively.
  • Silicon rib waveguide structure 1 generally consists of a relatively thin single crystal silicon surface layer 3 (generally referred to hereinafter as the “SOI layer”) bonded to a relatively thick silicon substrate 4 , with an isolation layer 5 therebetween (thus forming the silicon-on-insulator (SOI) structure).
  • Rib structure 6 is generally fabricated by reactive ion etching (RIE) a pair of parallel trenches 7 in SOI layer 3 .
  • RIE reactive ion etching
  • Rib structure 6 is defined as having a top surface 8 and opposing sidewalls 9 , 10 .
  • the optical mode profile O is also shown in FIG. 1 .
  • the use of an etching technique to create sidewalls 9 and 10 results in allowing a significant portion of the traveling optical beam 2 to “leak” through the sidewalls prior to exiting waveguide structure 1 .
  • polysilicon when forming a rib waveguide, is generally used to form the rib structure. For situations where low optical loss is desired, polysilicon is not well-suited since it experiences relatively high levels of optical loss.
  • FIG. 2 contains a side view of a first embodiment of the present invention, illustrating an SOI-based, low loss optical waveguiding structure 20 .
  • Optical waveguiding structure 20 similar to the prior art arrangement described above, comprises an SOI layer 22 , an isolating layer 24 and a silicon substrate 26 .
  • SOI layer 22 comprises a thickness of less than one micron so as to support the transmission of a single mode optical signal.
  • the refractive index of SOI layer 22 is thus approximately 3.47 and the refractive index of the underlying oxide layer is approximately 1.46.
  • a rib waveguiding structure 28 of a third material is disposed over a portion of the top surface 23 of SOI layer 22 , where the semiconductor material used to form rib waveguiding structure 28 is selected to have a refractive index between the oxide and silicon values of 1.46 and 3.47. That is, 1.46 ⁇ refractive index of rib 28 ⁇ 3.47.
  • One material that satisfies this criteria is silicon nitride (SiN), which has a refractive index of approximately 2.0 and is a conventional material often used in CMOS process.
  • Other suitable materials include, but are not limited to, SiON and SiC.
  • Layer 30 is disposed to surround rib waveguide 28 , as well as the exposed surface 23 of SOI layer 22 .
  • layer 30 is formed to comprise a material with a refractive index less than that of rib waveguide 28 . In most cases, an oxide (such as silicon dioxide) will be used to form layer 30 .
  • a significant aspect of the present invention is the index mis-match between SOI layer 22 and rib waveguide 28 .
  • a majority of the optical energy will remain within SOI layer 22 (although guided along the waveguiding structure formed by the patterning of rib 28 ). Therefore, the opportunity for leakage of optical signal through sidewalls 27 and 29 of rib 28 are significantly reduced over the prior art structure.
  • silicon nitride or any other suitable material
  • scattering losses along sidewalls 27 and 29 will be minimal.
  • the use of a lower refractive index material also enables the use of wider waveguides that retain single mode operation. This also reduces sidewall losses since the optical intensity at the sidewalls is significantly reduced when compared to silicon single mode waveguides.
  • FIG. 3 illustrates a slight variation of the arrangement of FIG. 2 , where a relatively thin oxide layer 32 is formed between rib waveguide structure 28 and SOI layer 22 .
  • the thickness of oxide layer 32 (such as a relatively thin gate oxide), is not considered to significantly reduce the optical coupling between rib 28 and SOI layer 22 .
  • Oxide layer 32 is important in the formation of active optical devices using the inventive structure. Additionally, the oxide material functions as an etch stop for CMOS processing operations.
  • FIG. 4 illustrates one such active optical device 40 , where the portion of SOI layer 22 underlying SiN rib 28 is doped to include an N-type region (denoted 22 -N) and a P-type region (denoted 22 -P).
  • a first contact 42 is formed within SOI layer 22 to provide electrical contact to N-type region 22 -N and a second contact 44 is formed within a spaced-apart area of SOI layer 22 to provide electrical contact to P-type region 22 -P.
  • Dotted line 46 is used to define the partition between region 22 -N and 22 -P.
  • the regions are formed to overlap horizontally, with extended areas in the regions adjacent to their respective contacts.
  • conventional CMOS processing may be used to form silicide regions for contacts 42 and 44 .
  • regions 42 and 44 may comprise heavily-doped silicon areas (as compared with the more lightly-doped regions 22 -N and 22 -P).
  • FIG. 5 is a side view of an alternative active optical device structure, where in this case doped regions 22 -N and 22 -P are formed as adjacent regions, divided by a vertical partition 48 . The remaining layers and materials are essentially the same as discussed above with respect to FIG. 4 .
  • FIG. 6 is an isometric view (and FIG. 7 a top view) of one exemplary arrangement. It is to be understood that many other variations are also possible.
  • SOI layer 22 is shown as being etched to create a strip waveguiding area, denoted 22 -S.
  • a pair of tapers 22 -T 1 and 22 -T 2 are used to narrow SOI layer 22 into strip 22 -S while also preventing back reflections of the propagating optical signal.
  • rib 28 is also tapered as shown so as to focus the optical energy into the central region of the structure and thus couple efficiently into silicon strip waveguide 22 -S.
  • the tapered sidewalls of SiN rib 28 being denoted as 28 -T 1 and 28 -T 2 in FIGS. 6 and 7 .
  • Well-known patterning and etching techniques may be used to form these etched structures.
  • silicon strip 22 -T may thereafter comprise an overlying polysilicon layer (taper), thus forming a “poly-loaded” SOI structure as known in the art.
  • FIG. 8 contains a top view of an alternative embodiment of the present invention, this particular embodiment including a slab waveguiding structure 50 of an intermediate index material (such as, for example, SiN, SiON or SiC).
  • SOI layer 22 is formed as including an inward taper 22 -T, terminating at an endpoint 22 -E, as shown.
  • Waveguide structure 50 (for example, an SiN waveguide) is also formed as a taper 50 -T, expanding from an endpoint 50 -E, and disposed so as to form an overlapping region 52 with SOI layer 22 .
  • the tapers provide for minimal reflections, while allowing the propagating optical signal to couple with low loss between SOI layer 22 and SiN strip waveguide 50 .
  • the doping profile within SOI layer 22 itself may be used to form a pseudo-taper and minimize the presence of optical reflections within a structure formed in accordance with the present invention.
  • FIG. 9 is a top view and FIG. 10 an isometric view, of an exemplary structure of the present invention where the doping profile within SOI layer 22 is controlled to minimize reflections.
  • a region of SOI layer 22 denoted 22 -A has been doped in a manner required to form active optical devices, as previously discussed.
  • the doping profile is controlled to provide for a tapered transition between the passive area of SOI layer 22 and active area 22 -A.
  • the SOI layer itself may be “rounded” into a rib structure, using the fabrication steps as shown in FIGS. 11-14 .
  • a rounded rib structure with smooth surfaces and dimensions matching the optical mode profile will result in an ultra low loss waveguide structure, since scattering losses from the rough sidewalls of prior art structures are minimized by the rounding.
  • FIG. 11 illustrates an exemplary starting configuration for forming a rounded, low loss optical rib waveguide structure within an SOI-based structure 70 .
  • the rounded waveguide surface is extremely smooth as it is fabricated using an oxidation process without the need for any etching operations.
  • Structure 70 includes a surface SOI layer 72 , buried oxide layer 74 and silicon substrate 76 .
  • a relatively thick oxide layer 78 is first formed over SOI layer 72 , where a thermal oxidation process may be used to form oxide layer 78 .
  • An oxide-resistant layer 80 is then formed over oxide layer 78 , where silicon nitride may be used to form layer 80 .
  • layer 80 is patterned so as to remove all of material outside of the area where a waveguide (or waveguides) need to be defined. As shown in FIG. 12 , a remaining portion 82 of layer 80 is defined as located in a region where a rounded rib waveguide will be formed.
  • the next step in the process is to oxidize the structure of FIG. 12 (where, for example, a local oxidation process such as LOCOS may be used). The oxidation results in the consumption of a portion of SOI layer 72 , with preferential growth of oxide 78 beyond the periphery of silicon nitride portion 82 .
  • SOI layer 72 will be transformed to include a rounded profile 84 in the waveguide area of interest. Thereafter, removal of silicon nitride portion 82 and oxide 78 results in exposing rounded waveguide 84 , as shown in FIG. 14 . It is to be understood that various active optical devices may be formed in the structure of FIG. 14 by the inclusion of the proper dopants and contact regions in SOI layer 72 (similar to the arrangements described above in association with FIGS. 4 and 5 ).

Abstract

A low loss optical waveguiding structure for silicon-on-insulator (SOI)-based arrangements utilizes a tri-material configuration including a rib/strip waveguide formed of a material with a refractive index less than silicon, but greater than the refractive index of the underlying insulating material. In one arrangement, silicon nitirde may be used. The index mismatch between the silicon surface layer (the SOI layer) and the rib/strip waveguide results in a majority of the optical energy remaining within the SOI layer, thus reducing scattering losses from the rib/strip structure (while the rib/strip allows for guiding along a desired signal path to be followed). Further, since silicon nitirde is an amorphous material without a grain structure, this will also reduce scattering losses. Advantageously, the use of silicon nitride allows for conventional CMOS fabrication processes to be used in forming both passive and active devices.

Description

    CROSS-REFERENCE TO RELATED APPLICATION
  • The present application claims the benefit of U.S. Provisional Application No. 60/638,216, filed Dec. 21, 2004.
  • TECHNICAL FIELD
  • The present invention relates to the formation of low loss silicon optical waveguides in a silicon-on-insulator (SOI) structure and, more particularly, to the inclusion of a rib/slab of a CMOS-compatible material having a refractive index intermediate that of silicon and silicon dioxide to achieve the desired lower loss.
  • BACKGROUND OF THE INVENTION
  • The optical waveguides typically formed in SOI-based structures comprise silicon (with a refractive index of approximately 3.47), the silicon formed in a “slab”, “rib” or “strip” geometry on the surface of the SOI substrate. A strip waveguide typically comprises crystalline silicon, where crystalline silicon is known to exhibit less loss that a polysilicon form of the same material. However, strip waveguides tend to exhibit relatively high optical loss through their (relatively rough) sidewalls, which serve as scattering surfaces for a propagating optical signal. That is, since an etching process is used to form the sidewalls of the strip, the etchant tends to roughen the exposed sidewall surfaces. Any geometry that introduces sharp corners in the strip waveguide also serves to introduce scattering centers and increase optical loss.
  • A “rib” waveguide structure conventionally comprises a polysilicon rib formed over the surface silicon layer (often referred to as the “SOI layer”) in SOI-based applications. The bulk losses of polysilicon are greater than that of crystalline silicon, resulting in higher optical losses along the rib waveguide.
  • One prior art attempt to address the loss experienced by these optical waveguides is discussed in U.S. Pat. No. 6,850,683, issued to K. K. Lee et al. on Feb. 1, 2005. In the Lee et al. arrangement, a post formation oxidation process is used at a high temperature to smooth the rough sidewalls of a silicon waveguide. While this method is somewhat successful in reducing scattering losses, it cannot be used in applications involving “active” waveguide structures, since such a high temperature process will result in unwanted dopant migration within the SOI layer.
  • An alternative method of creating low loss silicon waveguides is disclosed in US Patent Application Publication 2005/0158002, published for J. A. Kubby et al. on Jul. 21, 2005. In the Kubby et al. arrangement, a silicon nitride cladding layer is formed over a silicon rib waveguide to entrap the propagating optical signal and minimize scattering losses through the sidewalls of the rib structure.
  • SUMMARY OF THE INVENTION
  • The need remaining in the prior art is addressed by the present invention, which relates to the formation of low loss silicon optical waveguides in a silicon-on-insulator (SOI) structure and, more particularly, to the inclusion of a rib/slab of a CMOS-compatible material having a refractive index intermediate that of silicon and silicon dioxide to achieve the desired lower loss.
  • In accordance with the present invention, a rib/slab of a material having a refractive index less than that of silicon, but greater than that of silicon dioxide is formed over a portion of the surface SOI layer of a SOI-based structure. In a preferred embodiment, silicon nitride may be used as this material (inasmuch as it is particularly well-suited for CMOS-based fabrication processes). The thickness of the rib/slab is controlled as a trade-off between optical coupling into the rib/slab and optical loss. By virtue of using a material with a refractive index less than that of silicon, the contrast in refractive index helps in confining the majority of the optical signal within the SOI layer, thus significantly reducing optical loss through the rib/slab portion of the waveguide.
  • Since silicon nitride is an amorphous material (as are other appropriate semiconductor materials, such as SiON and SiC), scattering losses through rib sidewalls of such a structure are significantly less than in the prior art silicon structure. The formation of such a rib/slab uses straightforward CMOS fabrication processes, various dopants may first be deposited within the SOI layer and will not migrate within SOI layer during deposition of the overlying rib/slab structure.
  • Other and further aspects and features of the present invention will become apparent during the course of the following discussion and by reference to the accompanying drawings.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • Referring now to the drawings,
  • FIG. 1 illustrates, in an isometric view, a prior art silicon rib waveguide arrangement;
  • FIG. 2 is a cut-away side view of a first embodiment of a tri-material rib waveguide structure formed in accordance with the present invention;
  • FIG. 3 contains a variation of the arrangement of FIG. 2, with the inclusion of a relatively thin gate oxide layer between the SOI layer and the rib waveguide structure;
  • FIG. 4 illustrates a cut-away side view of an exemplary active optical device structure formed in accordance with the present invention, where SOI layer has been doped in appropriate regions to form an active device;
  • FIG. 5 illustrates an alternative to the arrangement of FIG. 4, where the doped regions are formed as contiguous vertical areas within the SOI layer;
  • FIG. 6 is an isometric view of another embodiment of the present invention, where the rib waveguide structure is formed to include a tapered region to facilitate the coupling of optical signals between the combination rib/SOI layer and the SOI layer itself;
  • FIG. 7 is a top view of the arrangement of FIG. 6;
  • FIG. 8 is a top view of yet another embodiment of the present invention, where a propagating optical signal is coupled with low loss between the SIO layer and a tapered rib structure formed of a material such as silicon nitride;
  • FIG. 9 is a top view of another embodiment of the present invention, where the doping within the surface SOI layer is controlled to provide a tapered transition between a passive device region and an active device region;
  • FIG. 10 is an isometric view of the embodiment of FIG. 9; and
  • FIGS. 11-14 illustrate a set of process steps useful in forming a low loss rounded profile SOI layer rib waveguide in accordance with the present invention.
  • DETAILED DESCRIPTION
  • FIG. 1 illustrates an SOI-based silicon rib waveguide structure 1 as typical in the prior art. The longitudinal z-axis indicates the direction of light propagation, indicated by arrows 2, with the transverse y-direction and x-direction referred to as the “horizontal” and “vertical” directions, respectively. Silicon rib waveguide structure 1 generally consists of a relatively thin single crystal silicon surface layer 3 (generally referred to hereinafter as the “SOI layer”) bonded to a relatively thick silicon substrate 4, with an isolation layer 5 therebetween (thus forming the silicon-on-insulator (SOI) structure). Rib structure 6 is generally fabricated by reactive ion etching (RIE) a pair of parallel trenches 7 in SOI layer 3. Rib structure 6 is defined as having a top surface 8 and opposing sidewalls 9, 10. The optical mode profile O is also shown in FIG. 1. As mentioned above, the use of an etching technique to create sidewalls 9 and 10 results in allowing a significant portion of the traveling optical beam 2 to “leak” through the sidewalls prior to exiting waveguide structure 1.
  • In some cases, when forming a rib waveguide, polysilicon is generally used to form the rib structure. For situations where low optical loss is desired, polysilicon is not well-suited since it experiences relatively high levels of optical loss.
  • In accordance with the present invention, the use of a pure silicon material to form the rib/slab portion of an optical waveguide is replaced with an alternative material that is compatible with conventional CMOS processing and exhibits a refractive index intermediate that of silicon (approximately 3.47) and silicon dioxide (approximately 1.46). FIG. 2 contains a side view of a first embodiment of the present invention, illustrating an SOI-based, low loss optical waveguiding structure 20. Optical waveguiding structure 20, similar to the prior art arrangement described above, comprises an SOI layer 22, an isolating layer 24 and a silicon substrate 26. In most cases, SOI layer 22 comprises a thickness of less than one micron so as to support the transmission of a single mode optical signal. The refractive index of SOI layer 22 is thus approximately 3.47 and the refractive index of the underlying oxide layer is approximately 1.46. In accordance with the present invention, a rib waveguiding structure 28 of a third material is disposed over a portion of the top surface 23 of SOI layer 22, where the semiconductor material used to form rib waveguiding structure 28 is selected to have a refractive index between the oxide and silicon values of 1.46 and 3.47. That is, 1.46< refractive index of rib 28≦3.47. One material that satisfies this criteria is silicon nitride (SiN), which has a refractive index of approximately 2.0 and is a conventional material often used in CMOS process. Other suitable materials include, but are not limited to, SiON and SiC.
  • For the purposes of the present discussion, reference will be made to the formation of a silicon nitride rib waveguide or slab waveguide. This reference is merely for the purpose of simplifying the discussion of the present invention and should not be considered to limit the scope of the various materials that may be used within the tri-layer structure of the present invention. Layer 30 is disposed to surround rib waveguide 28, as well as the exposed surface 23 of SOI layer 22. In accordance with the present invention, layer 30 is formed to comprise a material with a refractive index less than that of rib waveguide 28. In most cases, an oxide (such as silicon dioxide) will be used to form layer 30.
  • As mentioned above, a significant aspect of the present invention is the index mis-match between SOI layer 22 and rib waveguide 28. As a result, a majority of the optical energy will remain within SOI layer 22 (although guided along the waveguiding structure formed by the patterning of rib 28). Therefore, the opportunity for leakage of optical signal through sidewalls 27 and 29 of rib 28 are significantly reduced over the prior art structure. Moreover, inasmuch as silicon nitride (or any other suitable material) is an amorphous material with no grain structure, scattering losses along sidewalls 27 and 29 will be minimal. The use of a lower refractive index material also enables the use of wider waveguides that retain single mode operation. This also reduces sidewall losses since the optical intensity at the sidewalls is significantly reduced when compared to silicon single mode waveguides.
  • FIG. 3 illustrates a slight variation of the arrangement of FIG. 2, where a relatively thin oxide layer 32 is formed between rib waveguide structure 28 and SOI layer 22. The thickness of oxide layer 32 (such as a relatively thin gate oxide), is not considered to significantly reduce the optical coupling between rib 28 and SOI layer 22. Oxide layer 32 is important in the formation of active optical devices using the inventive structure. Additionally, the oxide material functions as an etch stop for CMOS processing operations.
  • As mentioned above, an advantage of the CMOS-compatible structure of the present invention is that dopants may be included within SOI layer 22 to form active optical devices, without the problem of dopant migration associated with prior art structures that utilized thermal post-processing. FIG. 4 illustrates one such active optical device 40, where the portion of SOI layer 22 underlying SiN rib 28 is doped to include an N-type region (denoted 22-N) and a P-type region (denoted 22-P). A first contact 42 is formed within SOI layer 22 to provide electrical contact to N-type region 22-N and a second contact 44 is formed within a spaced-apart area of SOI layer 22 to provide electrical contact to P-type region 22-P. Dotted line 46 is used to define the partition between region 22-N and 22-P. In this case, the regions are formed to overlap horizontally, with extended areas in the regions adjacent to their respective contacts. In one example, conventional CMOS processing may be used to form silicide regions for contacts 42 and 44. Alternatively, regions 42 and 44 may comprise heavily-doped silicon areas (as compared with the more lightly-doped regions 22-N and 22-P).
  • Advantageously, there is no need to structural transition regions between active and passive optical devices using the arrangement of the present invention, allowing for various monolithic structures incorporating both passive and active devices (as well as electronic devices) to be formed. The doping profile for regions 22-N and 22-P (as well as the placement of contacts 42 and 44) may be optimized on a case-by-case basis, as function of the desired speed and optical loss requirements. FIG. 5 is a side view of an alternative active optical device structure, where in this case doped regions 22-N and 22-P are formed as adjacent regions, divided by a vertical partition 48. The remaining layers and materials are essentially the same as discussed above with respect to FIG. 4.
  • An advantage of using a CMOS-compatible material to form the rib waveguiding structure of the present invention is that conventional processes (patterning, etching, etc.) may be used to modify the geometry of the rib waveguide for various purposes. FIG. 6 is an isometric view (and FIG. 7 a top view) of one exemplary arrangement. It is to be understood that many other variations are also possible. Referring to FIG. 6, SOI layer 22 is shown as being etched to create a strip waveguiding area, denoted 22-S. A pair of tapers 22-T1 and 22-T2 (shown best in FIG. 7) are used to narrow SOI layer 22 into strip 22-S while also preventing back reflections of the propagating optical signal. In order to provide efficient coupling of the propagating optical signal from the layered combination of SiN rib 28/SOI layer 22, rib 28 is also tapered as shown so as to focus the optical energy into the central region of the structure and thus couple efficiently into silicon strip waveguide 22-S. The tapered sidewalls of SiN rib 28 being denoted as 28-T1 and 28-T2 in FIGS. 6 and 7. Well-known patterning and etching techniques may be used to form these etched structures. In a further embodiment (not shown), silicon strip 22-T may thereafter comprise an overlying polysilicon layer (taper), thus forming a “poly-loaded” SOI structure as known in the art.
  • FIG. 8 contains a top view of an alternative embodiment of the present invention, this particular embodiment including a slab waveguiding structure 50 of an intermediate index material (such as, for example, SiN, SiON or SiC). In this particular embodiment, SOI layer 22 is formed as including an inward taper 22-T, terminating at an endpoint 22-E, as shown. Waveguide structure 50 (for example, an SiN waveguide) is also formed as a taper 50-T, expanding from an endpoint 50-E, and disposed so as to form an overlapping region 52 with SOI layer 22. The tapers provide for minimal reflections, while allowing the propagating optical signal to couple with low loss between SOI layer 22 and SiN strip waveguide 50.
  • The doping profile within SOI layer 22 itself may be used to form a pseudo-taper and minimize the presence of optical reflections within a structure formed in accordance with the present invention. FIG. 9 is a top view and FIG. 10 an isometric view, of an exemplary structure of the present invention where the doping profile within SOI layer 22 is controlled to minimize reflections. A region of SOI layer 22 denoted 22-A has been doped in a manner required to form active optical devices, as previously discussed. In this particular embodiment of the present invention, the doping profile is controlled to provide for a tapered transition between the passive area of SOI layer 22 and active area 22-A. In particular, a region 60 is defined as essentially a “wedge” of dopant at the interface between active device region 22-A and the passive region, with wedge 60 disposed directly under SiN rib waveguiding structure 28. FIG. 10 illustrates this particular arrangement in an isometric view.
  • In another method of reducing optical loss within a rib structure, the SOI layer itself may be “rounded” into a rib structure, using the fabrication steps as shown in FIGS. 11-14. In general, a rounded rib structure with smooth surfaces and dimensions matching the optical mode profile will result in an ultra low loss waveguide structure, since scattering losses from the rough sidewalls of prior art structures are minimized by the rounding. FIG. 11 illustrates an exemplary starting configuration for forming a rounded, low loss optical rib waveguide structure within an SOI-based structure 70. Advantageously, the rounded waveguide surface is extremely smooth as it is fabricated using an oxidation process without the need for any etching operations. Structure 70 includes a surface SOI layer 72, buried oxide layer 74 and silicon substrate 76. A relatively thick oxide layer 78 is first formed over SOI layer 72, where a thermal oxidation process may be used to form oxide layer 78. An oxide-resistant layer 80 is then formed over oxide layer 78, where silicon nitride may be used to form layer 80.
  • Referring to FIG. 12, layer 80 is patterned so as to remove all of material outside of the area where a waveguide (or waveguides) need to be defined. As shown in FIG. 12, a remaining portion 82 of layer 80 is defined as located in a region where a rounded rib waveguide will be formed. The next step in the process, as shown in FIG. 13, is to oxidize the structure of FIG. 12 (where, for example, a local oxidation process such as LOCOS may be used). The oxidation results in the consumption of a portion of SOI layer 72, with preferential growth of oxide 78 beyond the periphery of silicon nitride portion 82. As shown, SOI layer 72 will be transformed to include a rounded profile 84 in the waveguide area of interest. Thereafter, removal of silicon nitride portion 82 and oxide 78 results in exposing rounded waveguide 84, as shown in FIG. 14. It is to be understood that various active optical devices may be formed in the structure of FIG. 14 by the inclusion of the proper dopants and contact regions in SOI layer 72 (similar to the arrangements described above in association with FIGS. 4 and 5).
  • It is to be understood that the various arrangements described above are merely a few examples of optical devices (both active and passive) that may be formed using a tri-material arrangement with a rib/slab structure formed to exhibit a refractive index intermediate that of silicon and silicon dioxide. It is not possible to illustrate all of the various structures that may be formed. Indeed, the present invention is intended to be lilmited only by the scope of the claims appended hereto.

Claims (14)

1. A low loss silicon-on-insulator (SOI)-based optical waveguiding structure comprising
a silicon substrate;
an insulating layer disposed over the silicon substrate, the insulating layer having a first refractive index value;
a relatively thin silicon surface layer disposed over at least a portion of the insulating layer, the silicon exhibiting a refractive index value greater than the first refractive index value of the insulating layer; and
an optically transparent semiconductor waveguiding structure disposed over a portion of the relatively thin silicon surface layer, the optically transparent waveguiding structure having a refractive index value less than the refractive index value of silicon but greater than the first refractive index value of the insulating layer.
2. A low loss SOI-based optical waveguiding structure as defined in claim 1 wherein the optically transparent waveguiding structure is formed as a rib waveguide.
3. A low loss SOI-based optical waveguiding structure as defined in claim 1 wherein the optically transparent semiconductor waveguiding structure comprises a material selected from the group consisting of SiN, SiON and SiC.
4. A low loss SOI-based optical waveguiding structure as defined in claim 1 wherein the structure further comprises a relatively thin oxide layer disposed between the relatively thin silicon surface layer and the optically transparent semiconductor waveguiding structure.
5. A low loss SOI-based optical waveguiding structure as defined in claim 4 wherein the structure is used to form an active optical device, with the relatively thin silicon surface layer comprising regions of oppositely doped conductivity, and further including electrical contact areas formed within the silicon surface layer.
6. A low loss SOI-based optical waveguiding structure as defined in claim 5 wherein the regions are disposed to form a p-n junction within the relatively thin silicon surface layer.
7. A low loss SOI-based optical waveguiding structure as defined in claim 6 wherein the doped regions are disposed in a horizontal configuration.
8. A low loss SOI-based optical waveguiding structure as defined in claim 6 wherein the doped regions are disposed in a vertical configuration.
9. A low loss SOI-based optical waveguiding structure as defined in claim 1 wherein the optically transparent waveguiding structure includes a tapered region to reduce optical reflections therealong.
10. A low loss SOI-based optical waveguiding structure as defined in claim 9 wherein the silicon surface layer includes a tapered region to further reduce optical reflections.
11. A low loss SOI-based optical waveguiding structure as defined in claim 1 wherein the silicon surface layer exhibits a tapered doping profile between a first, passive device region and a second, active device region.
12. A low loss SOI-based optical waveguiding structure as defined in claim 1 wherein the insulating layer comprises silicon dioxide with a refractive index of approximately 1.47 and the optically transparent semiconductor waveguiding structure comprises silicon nitride with a refractive index of approximately 2.0.
13. A low loss SOI-based optical waveguiding structure as defined in claim 1 wherein the structure further comprises a cladding layer disposed to surround the exposed portions of the optically transparent waveguiding structure.
14. A low loss SOI-based optical waveguiding structure as defined in claim 13 wherein the cladding layer comprises a CMOS-compatible oxide layer.
US11/314,305 2004-12-21 2005-12-21 Ultra low-loss CMOS compatible silicon waveguides Abandoned US20060133754A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US11/314,305 US20060133754A1 (en) 2004-12-21 2005-12-21 Ultra low-loss CMOS compatible silicon waveguides
US11/890,123 US7941023B2 (en) 2004-12-21 2007-08-03 Ultra low-loss CMOS compatible silicon waveguides

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US63821604P 2004-12-21 2004-12-21
US11/314,305 US20060133754A1 (en) 2004-12-21 2005-12-21 Ultra low-loss CMOS compatible silicon waveguides

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US11/890,123 Continuation US7941023B2 (en) 2004-12-21 2007-08-03 Ultra low-loss CMOS compatible silicon waveguides

Publications (1)

Publication Number Publication Date
US20060133754A1 true US20060133754A1 (en) 2006-06-22

Family

ID=36595869

Family Applications (2)

Application Number Title Priority Date Filing Date
US11/314,305 Abandoned US20060133754A1 (en) 2004-12-21 2005-12-21 Ultra low-loss CMOS compatible silicon waveguides
US11/890,123 Active 2026-09-15 US7941023B2 (en) 2004-12-21 2007-08-03 Ultra low-loss CMOS compatible silicon waveguides

Family Applications After (1)

Application Number Title Priority Date Filing Date
US11/890,123 Active 2026-09-15 US7941023B2 (en) 2004-12-21 2007-08-03 Ultra low-loss CMOS compatible silicon waveguides

Country Status (1)

Country Link
US (2) US20060133754A1 (en)

Cited By (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009032820A1 (en) 2007-09-04 2009-03-12 International Business Machines Corporation Silicide thermal heaters for silicon-on-insulator nanophotonic devices
JP2009205089A (en) * 2008-02-29 2009-09-10 Fujikura Ltd Optical element, wavelength dispersion correcting element, and phase modulation element
WO2010039594A2 (en) 2008-09-30 2010-04-08 Intel Corporation Method and apparatus for high speed silicon optical modulation using pn diode
JP2013190492A (en) * 2012-03-12 2013-09-26 Fujitsu Ltd Semiconductor optical modulation element and manufacturing method of semiconductor optical modulation element
US20140241734A1 (en) * 2013-02-25 2014-08-28 Hitachi, Ltd. Light emitting device, manufacturing method thereof, and optical transceiver
WO2015112814A1 (en) * 2014-01-24 2015-07-30 Cisco Technology, Inc. Electro-optical modulator using ribbed waveguides
JP2015179748A (en) * 2014-03-19 2015-10-08 株式会社日立製作所 Manufacturing method of semiconductor optical element and semiconductor optical element
US20160062156A1 (en) * 2013-05-14 2016-03-03 Coriant Advanced Technology, LLC Ultra-responsive phase shifters for depletion mode silicon modulators
WO2016036734A1 (en) * 2014-09-02 2016-03-10 Tyco Electronics Corporation Mode size converters and optical assemblies
US9329415B2 (en) 2012-11-05 2016-05-03 Agency For Science, Technology And Research Method for forming an optical modulator
US9484417B1 (en) * 2015-07-22 2016-11-01 Globalfoundries Inc. Methods of forming doped transition regions of transistor structures
WO2016208732A1 (en) * 2015-06-26 2016-12-29 株式会社フジクラ Optical waveguide element
JP2017156454A (en) * 2016-02-29 2017-09-07 国立研究開発法人産業技術総合研究所 Optical modulator and manufacturing method therefor
EP3287821A4 (en) * 2015-05-08 2018-05-16 Huawei Technologies Co. Ltd. Tapered waveguide and silicon-based chip
US20180210242A1 (en) * 2013-05-14 2018-07-26 Elenion Technologies, Llc Optical modulator
US10444433B1 (en) * 2018-10-25 2019-10-15 Globalfoundries Inc. Waveguides including a patterned dielectric layer
US10473858B1 (en) * 2019-02-08 2019-11-12 Finisar Corporation Waveguide routing configurations and methods
US10921682B1 (en) * 2019-08-16 2021-02-16 Kvh Industries, Inc. Integrated optical phase modulator and method of making same
US11105974B2 (en) * 2015-06-30 2021-08-31 Massachusetts Institute Of Technology Waveguide-coupled silicon-germanium photodetectors and fabrication methods for same
US20220093808A1 (en) * 2020-09-18 2022-03-24 Taiwan Semiconductor Manufacturing Company Limited Semiconductor device and method of making
US20220115546A1 (en) * 2020-10-08 2022-04-14 Globalfoundries U.S. Inc. Photodetectors including a coupling region with multiple tapers
WO2024007798A1 (en) * 2022-07-07 2024-01-11 苏州湃矽科技有限公司 Silicon optical modulator
CN117389071A (en) * 2023-12-13 2024-01-12 众瑞速联(武汉)科技有限公司 PN junction doped structure, low-loss electro-optical modulator and preparation method thereof

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8149493B2 (en) * 2008-09-06 2012-04-03 Sifotonics Technologies (Usa) Inc. Electro-optic silicon modulator
EP2549311B1 (en) 2011-07-19 2014-09-03 Huawei Technologies Co., Ltd. Deep-shallow optical radiation filters
KR20130116099A (en) * 2012-04-13 2013-10-23 삼성전자주식회사 Semiconductor device and method for fabricating the same
EP2720073B1 (en) * 2012-10-11 2017-04-19 Octrolix BV Surface waveguide having a tapered region and method of forming
US9221074B2 (en) 2012-10-11 2015-12-29 Octrolix Bv Stress-tuned planar lightwave circuit and method therefor
JP5413865B1 (en) * 2012-12-27 2014-02-12 株式会社フジクラ Optical waveguide device and optical modulator
US9005458B2 (en) 2013-02-26 2015-04-14 Micron Technology, Inc. Photonic device structure and method of manufacture
US9903020B2 (en) 2014-03-31 2018-02-27 Applied Materials, Inc. Generation of compact alumina passivation layers on aluminum plasma equipment components
US9703039B2 (en) * 2014-04-09 2017-07-11 Futurewei Technologies, Inc. Edge coupling device fabrication
KR102604742B1 (en) 2015-12-23 2023-11-22 삼성전자주식회사 Optical device and method for manufacturing the same
US10025033B2 (en) 2016-03-01 2018-07-17 Advanced Semiconductor Engineering, Inc. Optical fiber structure, optical communication apparatus and manufacturing process for manufacturing the same
US10241264B2 (en) 2016-07-01 2019-03-26 Advanced Semiconductor Engineering, Inc. Semiconductor device packages
US10663669B2 (en) * 2018-09-10 2020-05-26 Lumentum Operations Llc Optical coupling structure for coupling an integrated silicon germanium photodetector/transimpedance amplifier and an integrated optics circuit
US20220320813A1 (en) * 2019-06-05 2022-10-06 Nippon Telegraph And Telephone Corporation Optical Device
US11067751B2 (en) 2019-10-09 2021-07-20 Globalfoundries U.S. Inc. Trench-based optical components for photonics chips
US11409037B2 (en) 2020-10-28 2022-08-09 Globalfoundries U.S. Inc. Enlarged waveguide for photonic integrated circuit without impacting interconnect layers

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4997246A (en) * 1989-12-21 1991-03-05 International Business Machines Corporation Silicon-based rib waveguide optical modulator
US5838870A (en) * 1997-02-28 1998-11-17 The United States Of America As Represented By The Secretary Of The Air Force Nanometer-scale silicon-on-insulator photonic componets
US6063299A (en) * 1998-10-23 2000-05-16 Bookham Technology Limited Manufacture of a silicon waveguide structure
US6231771B1 (en) * 1998-12-14 2001-05-15 Bookham Technology Plc Process for making optical waveguides
US6316281B1 (en) * 1998-09-12 2001-11-13 Electronics And Telecommunications Research Institute Method for fabricating a hybrid optical integrated circuit employing SOI optical waveguide
US20030021568A1 (en) * 2000-12-20 2003-01-30 Samara-Rubio Dean A. Method and apparatus for switching an optical beam usng an optical rib waveguide method and apparatus for switching an optical beam using an optical rib waveguide
US20030059190A1 (en) * 2001-09-10 2003-03-27 Gunn Lawrence Cary Strip loaded waveguide with low-index transition layer
US20030068131A1 (en) * 2001-09-10 2003-04-10 Gunn Lawrence C. Modulator based on tunable resonant cavity
US6597852B2 (en) * 1999-12-15 2003-07-22 Bookham Technology Plc Controlling birefringence in an optical waveguide
US6850683B2 (en) * 2000-07-10 2005-02-01 Massachusetts Institute Of Technology Low-loss waveguide and method of making same
US20050158002A1 (en) * 2004-01-20 2005-07-21 Xerox Corporation Low loss silicon waveguide and method of fabrication thereof
US7088890B2 (en) * 2004-11-30 2006-08-08 Intel Corporation Dual “cheese wedge” silicon taper waveguide

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR940007557A (en) * 1992-09-07 1994-04-27 에프. 제이. 스미트 Optical elements and optoelectronic devices for raising electromagnetic radiation frequencies

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4997246A (en) * 1989-12-21 1991-03-05 International Business Machines Corporation Silicon-based rib waveguide optical modulator
US5838870A (en) * 1997-02-28 1998-11-17 The United States Of America As Represented By The Secretary Of The Air Force Nanometer-scale silicon-on-insulator photonic componets
US6316281B1 (en) * 1998-09-12 2001-11-13 Electronics And Telecommunications Research Institute Method for fabricating a hybrid optical integrated circuit employing SOI optical waveguide
US6063299A (en) * 1998-10-23 2000-05-16 Bookham Technology Limited Manufacture of a silicon waveguide structure
US6231771B1 (en) * 1998-12-14 2001-05-15 Bookham Technology Plc Process for making optical waveguides
US6597852B2 (en) * 1999-12-15 2003-07-22 Bookham Technology Plc Controlling birefringence in an optical waveguide
US6850683B2 (en) * 2000-07-10 2005-02-01 Massachusetts Institute Of Technology Low-loss waveguide and method of making same
US20030021568A1 (en) * 2000-12-20 2003-01-30 Samara-Rubio Dean A. Method and apparatus for switching an optical beam usng an optical rib waveguide method and apparatus for switching an optical beam using an optical rib waveguide
US20030059190A1 (en) * 2001-09-10 2003-03-27 Gunn Lawrence Cary Strip loaded waveguide with low-index transition layer
US20030068131A1 (en) * 2001-09-10 2003-04-10 Gunn Lawrence C. Modulator based on tunable resonant cavity
US20050158002A1 (en) * 2004-01-20 2005-07-21 Xerox Corporation Low loss silicon waveguide and method of fabrication thereof
US7088890B2 (en) * 2004-11-30 2006-08-08 Intel Corporation Dual “cheese wedge” silicon taper waveguide

Cited By (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2185958A4 (en) * 2007-09-04 2011-08-03 Ibm Silicide thermal heaters for silicon-on-insulator nanophotonic devices
EP2185958A1 (en) * 2007-09-04 2010-05-19 International Business Machines Corporation Silicide thermal heaters for silicon-on-insulator nanophotonic devices
US20110002576A1 (en) * 2007-09-04 2011-01-06 International Business Machines Corporation Silicide Thermal Heaters for Silicon-on-Insulator Nanophotonic Devices
US8098968B2 (en) 2007-09-04 2012-01-17 International Business Machines Corporation Silicide thermal heaters for silicon-on-insulator nanophotonic devices
WO2009032820A1 (en) 2007-09-04 2009-03-12 International Business Machines Corporation Silicide thermal heaters for silicon-on-insulator nanophotonic devices
JP2009205089A (en) * 2008-02-29 2009-09-10 Fujikura Ltd Optical element, wavelength dispersion correcting element, and phase modulation element
WO2010039594A2 (en) 2008-09-30 2010-04-08 Intel Corporation Method and apparatus for high speed silicon optical modulation using pn diode
EP2350716A2 (en) * 2008-09-30 2011-08-03 Intel Corporation Method and apparatus for high speed silicon optical modulation using pn diode
EP2350716A4 (en) * 2008-09-30 2013-06-19 Intel Corp Method and apparatus for high speed silicon optical modulation using pn diode
JP2013190492A (en) * 2012-03-12 2013-09-26 Fujitsu Ltd Semiconductor optical modulation element and manufacturing method of semiconductor optical modulation element
US9329415B2 (en) 2012-11-05 2016-05-03 Agency For Science, Technology And Research Method for forming an optical modulator
US20140241734A1 (en) * 2013-02-25 2014-08-28 Hitachi, Ltd. Light emitting device, manufacturing method thereof, and optical transceiver
US9052449B2 (en) * 2013-02-25 2015-06-09 Hitachi, Ltd. Light emitting device, manufacturing method thereof, and optical transceiver
EP2997415A4 (en) * 2013-05-14 2017-01-04 Coriant Advanced Technology, LLC Ultra-responsive phase shifters for depletion mode silicon modulators
US9638942B2 (en) * 2013-05-14 2017-05-02 Elenion Technologies, Llc Ultra-responsive phase shifters for depletion mode silicon modulators
US20160062156A1 (en) * 2013-05-14 2016-03-03 Coriant Advanced Technology, LLC Ultra-responsive phase shifters for depletion mode silicon modulators
US20180210242A1 (en) * 2013-05-14 2018-07-26 Elenion Technologies, Llc Optical modulator
CN105474077A (en) * 2013-05-14 2016-04-06 科锐安先进科技有限公司 Ultra-responsive phase shifters for depletion mode silicon modulators
US9910302B2 (en) 2013-05-14 2018-03-06 Elenion Technologies, Llc Ultra-responsive phase shifters for depletion mode silcon modulators
US10120212B2 (en) * 2013-05-14 2018-11-06 Elenion Technologies, Llc Optical modulator
JP2016524722A (en) * 2013-05-14 2016-08-18 コリアント・アドヴァンスド・テクノロジー・エルエルシー Super-responsive phase shifter for depletion mode silicon modulator
US10317710B2 (en) * 2013-05-14 2019-06-11 Elenion Technologies, Llc Ultra-responsive phase shifters for depletion mode silcon modulators
WO2015112922A1 (en) * 2014-01-24 2015-07-30 Cisco Technology, Inc. Electro-optical modulators with folded gate layers
WO2015112814A1 (en) * 2014-01-24 2015-07-30 Cisco Technology, Inc. Electro-optical modulator using ribbed waveguides
US10598967B2 (en) 2014-01-24 2020-03-24 Cisco Technology, Inc. Electro-optical modulator using waveguides with overlapping ridges
CN106133585A (en) * 2014-01-24 2016-11-16 思科技术公司 Use the electrooptic modulator of rib waveguide
US11226505B2 (en) 2014-01-24 2022-01-18 Cisco Technology, Inc. Electro-optical modulator using waveguides with overlapping ridges
US9360688B2 (en) 2014-01-24 2016-06-07 Cisco Technology, Inc. Electro-optical modulators with folded gate layers
US9766484B2 (en) 2014-01-24 2017-09-19 Cisco Technology, Inc. Electro-optical modulator using waveguides with overlapping ridges
JP2015179748A (en) * 2014-03-19 2015-10-08 株式会社日立製作所 Manufacturing method of semiconductor optical element and semiconductor optical element
WO2016036734A1 (en) * 2014-09-02 2016-03-10 Tyco Electronics Corporation Mode size converters and optical assemblies
EP3287821A4 (en) * 2015-05-08 2018-05-16 Huawei Technologies Co. Ltd. Tapered waveguide and silicon-based chip
WO2016208732A1 (en) * 2015-06-26 2016-12-29 株式会社フジクラ Optical waveguide element
US20170168326A1 (en) * 2015-06-26 2017-06-15 Fujikura Ltd. Optical waveguide element
US9927637B2 (en) * 2015-06-26 2018-03-27 Fujikura Ltd. Optical waveguide element
JP2017015773A (en) * 2015-06-26 2017-01-19 株式会社フジクラ Optical waveguide element
US11105974B2 (en) * 2015-06-30 2021-08-31 Massachusetts Institute Of Technology Waveguide-coupled silicon-germanium photodetectors and fabrication methods for same
US9484417B1 (en) * 2015-07-22 2016-11-01 Globalfoundries Inc. Methods of forming doped transition regions of transistor structures
JP2017156454A (en) * 2016-02-29 2017-09-07 国立研究開発法人産業技術総合研究所 Optical modulator and manufacturing method therefor
US10444433B1 (en) * 2018-10-25 2019-10-15 Globalfoundries Inc. Waveguides including a patterned dielectric layer
US10473858B1 (en) * 2019-02-08 2019-11-12 Finisar Corporation Waveguide routing configurations and methods
US10921682B1 (en) * 2019-08-16 2021-02-16 Kvh Industries, Inc. Integrated optical phase modulator and method of making same
US20220093808A1 (en) * 2020-09-18 2022-03-24 Taiwan Semiconductor Manufacturing Company Limited Semiconductor device and method of making
CN114284382A (en) * 2020-09-18 2022-04-05 台湾积体电路制造股份有限公司 Semiconductor device and method for forming semiconductor device
TWI826780B (en) * 2020-09-18 2023-12-21 台灣積體電路製造股份有限公司 Semiconductor device and method for forming semiconductor device
US11869991B2 (en) * 2020-09-18 2024-01-09 Taiwan Semiconductor Manufacturing Company Limited Semiconductor device and method of making
US20220115546A1 (en) * 2020-10-08 2022-04-14 Globalfoundries U.S. Inc. Photodetectors including a coupling region with multiple tapers
US11588062B2 (en) * 2020-10-08 2023-02-21 Globalfoundries U.S. Inc. Photodetectors including a coupling region with multiple tapers
WO2024007798A1 (en) * 2022-07-07 2024-01-11 苏州湃矽科技有限公司 Silicon optical modulator
CN117389071A (en) * 2023-12-13 2024-01-12 众瑞速联(武汉)科技有限公司 PN junction doped structure, low-loss electro-optical modulator and preparation method thereof

Also Published As

Publication number Publication date
US20070280616A1 (en) 2007-12-06
US7941023B2 (en) 2011-05-10

Similar Documents

Publication Publication Date Title
US7941023B2 (en) Ultra low-loss CMOS compatible silicon waveguides
US8871554B2 (en) Method for fabricating butt-coupled electro-absorptive modulators
US10955692B2 (en) Optoelectronic component
US8160404B2 (en) High speed and low loss GeSi/Si electro-absorption light modulator and method of fabrication using selective growth
US8532440B2 (en) Silicon-based electro-optic device
US9568674B2 (en) Photonic device structure and method of manufacture
US6169825B1 (en) Integrated optical polarizer
US7118682B2 (en) Low loss SOI/CMOS compatible silicon waveguide and method of making the same
US6571039B1 (en) Optical waveguide having a weakly-confining waveguide section and a strongly-confining waveguide section optically coupled by a tapered neck
WO2007016070A2 (en) Method of fabricating ge or sige/si waveguide or photonic crystal structures by selective growth
US11079544B2 (en) Waveguide absorbers
US11156775B2 (en) Photonic device having a photonic crystal lower cladding layer provided on a semiconductor substrate
KR101649431B1 (en) Photonic crystal waveguide with reduced coupling loss towards the substrate
CN108828797B (en) Silicon-based electro-absorption modulator and preparation method thereof
EP3497511B1 (en) Optical structure and method of fabricating an optical structure
CN210109379U (en) Optoelectronic device
US10976490B2 (en) Optoelectronic device and method of manufacturing the same
US7539358B2 (en) SOI-based opto-electronic device including corrugated active region
US20190019902A1 (en) Silicon waveguide integrated with germanium pin photodetector
GB2265252A (en) An electro-optic device
US20240142701A1 (en) Optical Waveguide Structure and Method for Manufacturing Same
JP3112114B2 (en) Method for manufacturing semiconductor optical waveguide
CN117741860A (en) Selective epitaxial silicon-based ridge type optical waveguide and manufacturing method thereof
CN114895401A (en) Silicon photonic chip optical coupling structure and manufacturing method thereof

Legal Events

Date Code Title Description
AS Assignment

Owner name: SIOPTICAL, INC., PENNSYLVANIA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:PATEL, VIPULKUMAR;PIEDE, DAVID;GHIRON, MARGARET;AND OTHERS;REEL/FRAME:017592/0520

Effective date: 20060209

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION

AS Assignment

Owner name: CISCO SYSTEMS, INC., CALIFORNIA

Free format text: SECURITY AGREEMENT;ASSIGNOR:LIGHTWIRE, INC.;REEL/FRAME:027812/0631

Effective date: 20120301

AS Assignment

Owner name: LIGHTWIRE, INC., CALIFORNIA

Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:CISCO SYSTEMS, INC.;REEL/FRAME:028078/0927

Effective date: 20120418

AS Assignment

Owner name: CISCO TECHNOLOGY, INC., CALIFORNIA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:LIGHTWIRE LLC;REEL/FRAME:029275/0050

Effective date: 20121018

Owner name: LIGHTWIRE LLC, DELAWARE

Free format text: CHANGE OF NAME;ASSIGNOR:LIGHTWIRE, INC.;REEL/FRAME:029275/0040

Effective date: 20120320