US20060071204A1 - Resistive memory element - Google Patents
Resistive memory element Download PDFInfo
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- US20060071204A1 US20060071204A1 US10/953,606 US95360604A US2006071204A1 US 20060071204 A1 US20060071204 A1 US 20060071204A1 US 95360604 A US95360604 A US 95360604A US 2006071204 A1 US2006071204 A1 US 2006071204A1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/841—Electrodes
- H10N70/8413—Electrodes adapted for resistive heating
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
- H10N70/8828—Tellurides, e.g. GeSbTe
Definitions
- This invention relates to non-volatile semiconductor memory chips, and more particularly, relates to an electrically operated, resistive memory element including a volume of resistive memory material, such as a phase change material.
- Optically rewritable disks such as compact disks (CDs) or digital versatile disks (DVDs)
- phase change materials for storing information, which, using a laser beam, are switched between their crystalline and amorphous states. Since the optical reflectivity of the phase change material differs in its crystalline and amorphous states, a change of phase can be used to store and read digital information.
- phase change materials may represent a new type of non-volatile memory cells that could replace the dynamic random access memory (DRAM) as the standard memory for computing devices.
- DRAM dynamic random access memory
- phase change memory devices will eventually allow for “instant on” systems that come to life as soon as the computer system is turned on, thus saving the amount of time needed for a conventional computer to transfer boot data from a hard disk drive to volatile DRAM during system power up.
- Specific alloys having at least one element of group VI of the periodic table of elements, such as Te or Se, also referred to as chalcogenides, may be used in resistive memory cell applications, since the electric resistivity has been found to vary by at least two order of magnitudes when such alloy is switched between the more resistive amorphous phase and the less resistive crystalline phase.
- An amorphous-crystalline phase transition of the phase change material is induced by raising the temperature above crystallization temperature of the material, so that a fast nucleation of crystallites can take place.
- Such transition starting from the amorphous phase and arriving at the crystalline phase typically is referred to as “writing” a memory cell.
- To bring the phase change material back to its amorphous state it is necessary to raise the temperature above the melting temperature of the material and then cool off rapidly.
- Such transition starting from the crystalline phase and arriving at the amorphous phase typically is referred to as “erasing” a memory cell.
- Both crystallization and melting temperatures can, for instance, be reached by causing a current to flow through a resistive element, which heats the phase change material by the Joule effect.
- a reading voltage is applied to the cell, with the proviso that the reading current resulting therefrom must be smaller than the currents for writing or erasing in order to not effect an inadvertent writing or erasing of the memory cell.
- phase change memory cells are quite large in the relatively high writing and erasing currents, which must be applied to a selected memory cell to raise the temperature of the phase change material above the crystallization and melting temperatures.
- the electric currents, which are applied for reading or erasing a phase change memory cell are too big to be supplied by a single CMOS tranistor having a minimum structure size, there is no possibility to realize a compact memory cell array comprising single memory cells in a 1 transistor/1 resistor-arrangement having a cell size of not more than 5-8 F 2 (where F is the minimum feature size of the technology used for fabrication) is not possible.
- a maximum electric current ranging from 50 to 100 ⁇ A (dependent from the actual structure size) can be supplied by a single transistor. Accordingly, a further reduction of writing and erasing currents of the phase change memory cells is highly advantageous, since energy consumed by the memory device can be lowered and parallel programming of the phase change memory cells can be enabled.
- phase change material because of physical limitations, not more than about 10% nitrogen can be introduced into the phase change material, and, in doping the phase change material other material parameters, such as crystallization temperature, crystallization speed, grain size and the like, are likely to be changed which may result in undesired effects.
- a resistive memory element which further reduces heating currents, i.e., writing or erasing currents, of the resistive memory material, such as a phase change material, without being bound to physical size limitations of the technology used for fabrication or having adverse effects on material parameters of the resistive memory material is desirable.
- An electrically operated, resistive memory element for use in a resistive memory cell has a volume of resistive memory material, that is adapted to be switched between different detectable resistive states in response to selected enery pulses applied thereto.
- resistive memory element and “resistive memory material,” respectively, are used to describe resistive memory cells and resistive memory materials, respectively, of any kind, which can be brought into two or more states exhibiting different electrical resistance values, such as phase change materials.
- the resistive memory element further includes a means for delivering electrical signals to at least a portion of the volume of the resistive memory material, which may be, for example, first and second electrical contacts, which adjoin the resistive memory material.
- the resistive memory element also includes a volume of heating material for Ohmic heating of the resistive memory material in response to the electrical signals being supplied by the first and second electrical contacts.
- the heating material is embedded (integrated) in the volume of resistive memory material.
- the heating material for instance, is selected to have a specific electrical resistivity value relatively greater than that one of the resistive memory material in its lowest resistance state so that it can effectively be used for heating of the resistive memory material.
- the specific electric resistivity of the heating material may be chosen to meet specific requirements and typically can be varied within a broad range of possible specific electric resistivity values. In the case where the natural specific resistivity of the resistive memory material is very low (e.g., ⁇ 5 m ⁇ cm), this choice is required to enable low current memory operation.
- Integrating (embedding) the heating material into the resistive memory material allows the total electric resistivity of the active material formed by the volume of resistive memory material and the volume of heating material embedded therein to be adjusted, without adverse effects on other material characteristices of the active material, such as its crystallization behavior.
- Enhancing the operating voltage of the resistive memory cell having the resistive memory element for instance, from 0.3 Volts to 1 Volt, the currents necessary for heating the resistive memory material above critic temperatures of the resistive memory material in writing or erasing the resistive memory cell can be reduced.
- a trade-off between enhancing the operating voltage and reducing the heating currents for writing or erasing the memory cell may be attained.
- embedding the heating material into the resistive memory material can minimize the thermal losses due to thermal conductivity.
- one of the first and second electrical contacts providing a means for supplying electric signals is chosen to be a heater electrode for heating the resistive memory material using the Joule effect.
- the term “heater electrode” as used in the present invention describes an electrode with relatively smaller contact dimension than the counter electrode in order to locally increase the current density in the resistive memory material.
- the resistive memory element may also include a layer made of the resistive memory material sandwiched between the heater electrode and the volume of resistive memory material.
- one of the first and second electrical contacts is a plug electrode adapted to be connected to a transistor device.
- a via opening can be provided between the plug and the other one of the first and second electrical contacts, where the via opening is partly or completely filled with the resistive memory material, which is contacting the plug.
- the volume of heating material forms at least one heating material layer, and, together with the resistive memory material may, for example, be arranged in a stacked overlying relationship.
- the at least one layer made of heating material for instance, has a thickness in the range of 2 to 70 nanometers, and, more specifically, lies in the range of 5 to 20 nanometers.
- the heating layer may be a very thin layer which, for instance, may have a thickness as thin as 5 nanometers. Accordingly, since the heating layer has a very low thermal capacity, relatively little additional thermal energy for heating the heating layer itself is supplied.
- a distance between the heating material layer and the heater electrode under certain circumstances, for example, is chosen to be relatively greater than a distance between the heating material layer and the other one of the first and second electrical contacts.
- a distance between the heating material layer and the electrical contact is chosen to be relatively greater than a distance between the heating material layer and the plug.
- the heating material is selected, for example, to have a thermal conductivity being relativley greater than that one of the resistive memory material.
- a thermal conductivity being relativley greater than that one of the resistive memory material.
- an improved homogeneous lateral distribution of temperature across the memory element may be achieved. Since local over-heating can be avoided by that measure, life-time of the memory cell can be enhanced, and, positive effects on the reading signal may also be observed.
- the resistive memory material for instance, is chosen to be a phase change material.
- the phase change material includes, for instance, at least one chalcogen element, and may, for instance, be Ge 2 Sb 2 Te 5 .
- the heating material for instance, is selected from the group including TiO x N y , TiSi x N y , TiAl x N y , TaAl x N y , TaSi x N y , TaO x N y and C (graphitic or DLC).
- the exact material properties can be tuned by adjusting the material composition properly selecting x and y. Particularly, in selecting stoichiometry of such heating materials, the specific resistivity can be adjusted over a broad range of resistivity values, and, thus specific requirements can be met.
- the resistive memory element of the invention for use in a resistive memory cell, it is possible to further reduce heating currents with regard to prior art solutions without being limited to a specific technology for fabrication and without adverse effects on crystallization characteristics.
- a further reduction in size of the memory element is possible for a memory cell in 5 to 8 F 2 size in convenient silicon CMOS processing, where F is the minimum feature size of the technology used.
- FIG. 1 is a schematic vertical sectional view of an embodiment of a resistive memory element of the present invention.
- FIG. 2 is a schematic vertical sectional view of another embodiment of a resistive memory element of the present invention.
- a resistive memory element includes a resistive memory material and a heating material.
- an electrically operated, resistive memory element has a resistive memory material 1 , which in the present embodiment is an alloy having at least one chalcogenid, such as Ge 2 Sb 2 Te 5 .
- the phase change material 1 is sandwiched between a top electrode 2 and a bottom electrode 3 , i.e., both electrodes adjoin the phase change material in direct electrical contact.
- Top and bottom electrodes are, for instance, made of TiN or W or the like.
- the bottom electrode 3 is formed as heating electrode having a smaller lateral dimension than the top electrode 2 .
- the bottom electrode 3 is further connected to a plug electrode 4 arranged below of it, for instance, made of W, which is in electric contact with the source-drain-path of a transistor device (not shown in the drawings). Both bottom electrode 3 and plug electrode 4 are surrounded by an isolating material 5 , such as SiO 2 .
- a heating layer 6 for heating the phase change material 1 for instance, made of TiO x N y , C, TiAl x N y , TiSi x N y , TaSi x N y or the like, is embedded, such that an upper part 1 a and a lower part 1 b of the phase change material 1 is formed. As is illustrated in FIG.
- the heating layer 6 is located closer to the top electrode 2 than to the bottom electrode 3 , i.e., the distance between heating layer 6 and top electrode 2 is relatively smaller than the distance between heating layer 6 and bottom electrode 3 .
- the upper part 1 a of the phase change material 1 layer has a thickness of about 10 nm
- the lower part 1 b of the phase change material 1 has a thickness of about 20 nm
- the heating layer 6 has a thickness of about 5 nm.
- the top electrode 2 has a thickness of about 140 nm
- the bottom electrode 3 has a thickness of about 100 nm
- the plug electrode 4 has a thickness of about 175 nm.
- the bottom electrode 3 in left-right direction referred to as D 2
- the bottom electrode 3 has a width of about 60 nm
- the plug electrode 4 has a width of about 280 nm.
- the resistive memory element has a resistive memory material and a heating material.
- the electrically operated, resistive memory element has a resistive memory material 1 , which in the present embodiment, as in the embodiment of FIG. 1 , is an alloy containing at least one chalcogenid, such as Ge 2 Sb 2 Te 5 .
- the phase change material 1 is sandwiched between a top electrode 2 and a plug electrode 4 , i.e., both electrodes adjoin the phase change material in direct electrical contact.
- the top electrode is, for instance, made of TiN or W or the like, while the plug electrode 4 , for instance, is made of W or the like, and is in electric contact with the source-drain-path of a transistor device (not shown in the drawings).
- the phase change material 1 is partly filled in a via opening 7 between top electrode 2 and plug electrode 4 .
- the remaining part of the partly filled via opening 7 is filled with a via opening part 8 of the top electrode 2 .
- the via opening 7 can be relatively completely filled with the phase change material 1 .
- Both via connection 7 and plug electrode 4 are surrounded by an isolating material 5 , such as SiO 2 .
- a heating layer 6 for heating the phase change material 1 for instance, made of TiO x N y , C, TiAl x N y , TiSi x N y , TaSi x N y , TaAl x N y , TaO x N y or the like, is embedded, such that an upper part 1 a and a lower part 1 b of the phase change material 1 is formed. As is illustrated in FIG.
- the heating layer 6 is located relatively closer to the plug electrode 4 than to the top electrode 2 , i.e., the distance between heating layer 6 and plug electrode 4 is relatively smaller than the distance between heating layer 6 and protruding part 8 of the top electrode 2 .
- the upper part 1 a of the phase change material 1 layer has a thickness of about 20 nm
- the lower part 1 b of the phase change material 1 has a thickness of about 10 nm
- the heating layer 6 has a thickness of about 5 nm.
- the top electrode 2 (without protruding part 8 ) has a thickness of about 100 nm
- the protruding part 8 of the top electrode 2 has a thickness of 100 nm
- the plug electrode 4 has a thickness of about 225 nm.
- the protruding part 8 of the top electrode 2 , the phase change material 1 and the heating layer 6 each have a width of about 60 nm, and the plug electrode 4 has a width of about 260 nm.
- Heater geometry I reset (current for erasing the memory cell) for 30 nm thickness Ge 2 Sb 2 Te 5 reference without heating layer amounts to about 1200 ⁇ A, and with heating layer is reduced to about 882 ⁇ A.
- I reset current for erasing the memory cell
- I reset current for erasing the memory cell
- the total electric resistivity can be enhanced without having adverse effects on specific characteristics of the resistive memory material.
Abstract
Description
- This invention relates to non-volatile semiconductor memory chips, and more particularly, relates to an electrically operated, resistive memory element including a volume of resistive memory material, such as a phase change material.
- Optically rewritable disks, such as compact disks (CDs) or digital versatile disks (DVDs), typically use phase change materials for storing information, which, using a laser beam, are switched between their crystalline and amorphous states. Since the optical reflectivity of the phase change material differs in its crystalline and amorphous states, a change of phase can be used to store and read digital information.
- As has been found, amorphous and crystalline states not only differ in their optical reflectivities, but also in their electric resistivity values, so that a particular state can also be read electrically. This is the reason why resistive memory cells based on phase change materials may represent a new type of non-volatile memory cells that could replace the dynamic random access memory (DRAM) as the standard memory for computing devices. Particularly, the use of phase change memory devices as a non-volatile RAM will eventually allow for “instant on” systems that come to life as soon as the computer system is turned on, thus saving the amount of time needed for a conventional computer to transfer boot data from a hard disk drive to volatile DRAM during system power up.
- Specific alloys having at least one element of group VI of the periodic table of elements, such as Te or Se, also referred to as chalcogenides, may be used in resistive memory cell applications, since the electric resistivity has been found to vary by at least two order of magnitudes when such alloy is switched between the more resistive amorphous phase and the less resistive crystalline phase.
- An amorphous-crystalline phase transition of the phase change material is induced by raising the temperature above crystallization temperature of the material, so that a fast nucleation of crystallites can take place. Such transition starting from the amorphous phase and arriving at the crystalline phase typically is referred to as “writing” a memory cell. To bring the phase change material back to its amorphous state, it is necessary to raise the temperature above the melting temperature of the material and then cool off rapidly. Such transition starting from the crystalline phase and arriving at the amorphous phase typically is referred to as “erasing” a memory cell. Both crystallization and melting temperatures can, for instance, be reached by causing a current to flow through a resistive element, which heats the phase change material by the Joule effect.
- For electrically reading the state of a memory cell using a phase change material, a reading voltage is applied to the cell, with the proviso that the reading current resulting therefrom must be smaller than the currents for writing or erasing in order to not effect an inadvertent writing or erasing of the memory cell.
- However, a considerable drawback of such phase change memory cells is seen in the relatively high writing and erasing currents, which must be applied to a selected memory cell to raise the temperature of the phase change material above the crystallization and melting temperatures. In order to successfully integrate such phase change memory cells into convenient silicon CMOS processing the following has to be observed: if the electric currents, which are applied for reading or erasing a phase change memory cell, are too big to be supplied by a single CMOS tranistor having a minimum structure size, there is no possibility to realize a compact memory cell array comprising single memory cells in a 1 transistor/1 resistor-arrangement having a cell size of not more than 5-8 F2 (where F is the minimum feature size of the technology used for fabrication) is not possible. If the above precondition is met, at present, a maximum electric current ranging from 50 to 100 μA (dependent from the actual structure size) can be supplied by a single transistor. Accordingly, a further reduction of writing and erasing currents of the phase change memory cells is highly advantageous, since energy consumed by the memory device can be lowered and parallel programming of the phase change memory cells can be enabled.
- So far, in efforts to reduce writing and erasing currents, developers have attempted to diminish the programmable volume of the phase change material by reducing a contact area between the heating electrode and the phase change material, since currents necessary for writing or erasing typically scale with the programmable volume of the phase change material. Such known undertakings, however, are limited by the minimum (photo-)lithographic dimensions which can be reached, which at present typically amount to about 100 nm. Furthermore, doping of the phase change material using doping materials, such as nitrogen in order to enhance the speficic resistivity to gain a reduction in heating currents, is also known. However, because of physical limitations, not more than about 10% nitrogen can be introduced into the phase change material, and, in doping the phase change material other material parameters, such as crystallization temperature, crystallization speed, grain size and the like, are likely to be changed which may result in undesired effects.
- A resistive memory element which further reduces heating currents, i.e., writing or erasing currents, of the resistive memory material, such as a phase change material, without being bound to physical size limitations of the technology used for fabrication or having adverse effects on material parameters of the resistive memory material is desirable.
- An electrically operated, resistive memory element for use in a resistive memory cell, has a volume of resistive memory material, that is adapted to be switched between different detectable resistive states in response to selected enery pulses applied thereto. Throughout this specification, the terms “resistive memory element” and “resistive memory material,” respectively, are used to describe resistive memory cells and resistive memory materials, respectively, of any kind, which can be brought into two or more states exhibiting different electrical resistance values, such as phase change materials. The resistive memory element further includes a means for delivering electrical signals to at least a portion of the volume of the resistive memory material, which may be, for example, first and second electrical contacts, which adjoin the resistive memory material. The resistive memory element also includes a volume of heating material for Ohmic heating of the resistive memory material in response to the electrical signals being supplied by the first and second electrical contacts. The heating material is embedded (integrated) in the volume of resistive memory material. The heating material, for instance, is selected to have a specific electrical resistivity value relatively greater than that one of the resistive memory material in its lowest resistance state so that it can effectively be used for heating of the resistive memory material. The specific electric resistivity of the heating material may be chosen to meet specific requirements and typically can be varied within a broad range of possible specific electric resistivity values. In the case where the natural specific resistivity of the resistive memory material is very low (e.g., <5 mΩcm), this choice is required to enable low current memory operation.
- Integrating (embedding) the heating material into the resistive memory material allows the total electric resistivity of the active material formed by the volume of resistive memory material and the volume of heating material embedded therein to be adjusted, without adverse effects on other material characteristices of the active material, such as its crystallization behavior. Enhancing the operating voltage of the resistive memory cell having the resistive memory element, for instance, from 0.3 Volts to 1 Volt, the currents necessary for heating the resistive memory material above critic temperatures of the resistive memory material in writing or erasing the resistive memory cell can be reduced. In general, a trade-off between enhancing the operating voltage and reducing the heating currents for writing or erasing the memory cell may be attained. Furthermore, embedding the heating material into the resistive memory material can minimize the thermal losses due to thermal conductivity.
- In a first embodiment of the invention, one of the first and second electrical contacts providing a means for supplying electric signals is chosen to be a heater electrode for heating the resistive memory material using the Joule effect. The term “heater electrode” as used in the present invention describes an electrode with relatively smaller contact dimension than the counter electrode in order to locally increase the current density in the resistive memory material. In that embodiment, the resistive memory element may also include a layer made of the resistive memory material sandwiched between the heater electrode and the volume of resistive memory material.
- In a second embodiment of the invention, one of the first and second electrical contacts is a plug electrode adapted to be connected to a transistor device. In the second embodiment, a via opening can be provided between the plug and the other one of the first and second electrical contacts, where the via opening is partly or completely filled with the resistive memory material, which is contacting the plug.
- According to the invention, the volume of heating material forms at least one heating material layer, and, together with the resistive memory material may, for example, be arranged in a stacked overlying relationship. The at least one layer made of heating material, for instance, has a thickness in the range of 2 to 70 nanometers, and, more specifically, lies in the range of 5 to 20 nanometers. Particularly, using a heating material having a relatively high specific resistivity and, for instance, relatively low specific thermal capacity, the heating layer may be a very thin layer which, for instance, may have a thickness as thin as 5 nanometers. Accordingly, since the heating layer has a very low thermal capacity, relatively little additional thermal energy for heating the heating layer itself is supplied.
- In the first embodiment of the invention, a distance between the heating material layer and the heater electrode under certain circumstances, for example, is chosen to be relatively greater than a distance between the heating material layer and the other one of the first and second electrical contacts.
- Otherwise, in the second embodiment of the invention, a distance between the heating material layer and the electrical contact, for instance, is chosen to be relatively greater than a distance between the heating material layer and the plug.
- According to the invention, the heating material is selected, for example, to have a thermal conductivity being relativley greater than that one of the resistive memory material. In that case, an improved homogeneous lateral distribution of temperature across the memory element may be achieved. Since local over-heating can be avoided by that measure, life-time of the memory cell can be enhanced, and, positive effects on the reading signal may also be observed.
- In the resistive memory element according to the invention, the resistive memory material, for instance, is chosen to be a phase change material. In one embodiment, the phase change material includes, for instance, at least one chalcogen element, and may, for instance, be Ge2Sb2Te5.
- In the resistive memory element according to the invention, the heating material, for instance, is selected from the group including TiOxNy, TiSixNy, TiAlxNy, TaAlxNy, TaSixNy, TaOxNy and C (graphitic or DLC). The exact material properties can be tuned by adjusting the material composition properly selecting x and y. Particularly, in selecting stoichiometry of such heating materials, the specific resistivity can be adjusted over a broad range of resistivity values, and, thus specific requirements can be met.
- In the resistive memory element of the invention for use in a resistive memory cell, it is possible to further reduce heating currents with regard to prior art solutions without being limited to a specific technology for fabrication and without adverse effects on crystallization characteristics. Thus, a further reduction in size of the memory element is possible for a memory cell in 5 to 8 F2 size in convenient silicon CMOS processing, where F is the minimum feature size of the technology used.
- Other and further features of the invention will appear more fully from the following description.
- The accompanying drawings, which are incorporated herein and constitute a part of the specification, illustrate present embodiments of the invention, and together with the general description given above and the detailed description given below, serve to explain the principles of the invention.
-
FIG. 1 is a schematic vertical sectional view of an embodiment of a resistive memory element of the present invention; and -
FIG. 2 is a schematic vertical sectional view of another embodiment of a resistive memory element of the present invention. - Embodiments of the present invention will be described in detail below with reference to the accompanying drawings, where like designations denote like elements.
- Referring to
FIG. 1 , a resistive memory element includes a resistive memory material and a heating material. Based on a conventional heater electrode geometry, an electrically operated, resistive memory element has aresistive memory material 1, which in the present embodiment is an alloy having at least one chalcogenid, such as Ge2Sb2Te5. Thephase change material 1 is sandwiched between atop electrode 2 and abottom electrode 3, i.e., both electrodes adjoin the phase change material in direct electrical contact. Top and bottom electrodes are, for instance, made of TiN or W or the like. In that embodiment, thebottom electrode 3 is formed as heating electrode having a smaller lateral dimension than thetop electrode 2. Thebottom electrode 3 is further connected to aplug electrode 4 arranged below of it, for instance, made of W, which is in electric contact with the source-drain-path of a transistor device (not shown in the drawings). Bothbottom electrode 3 and plugelectrode 4 are surrounded by an isolatingmaterial 5, such as SiO2. Within thephase change material 1, aheating layer 6 for heating thephase change material 1, for instance, made of TiOxNy, C, TiAlxNy, TiSixNy, TaSixNy or the like, is embedded, such that anupper part 1 a and alower part 1 b of thephase change material 1 is formed. As is illustrated inFIG. 1 , due to the relatively larger thermal diffusivity of thetop electrode 2 relative to thebottom electrode 3, theheating layer 6 is located closer to thetop electrode 2 than to thebottom electrode 3, i.e., the distance betweenheating layer 6 andtop electrode 2 is relatively smaller than the distance betweenheating layer 6 andbottom electrode 3. - In
FIG. 1 , in an upward-downward direction referred to as D1, theupper part 1 a of thephase change material 1 layer has a thickness of about 10 nm, thelower part 1 b of thephase change material 1 has a thickness of about 20 nm, and theheating layer 6 has a thickness of about 5 nm. Further, thetop electrode 2 has a thickness of about 140 nm, thebottom electrode 3 has a thickness of about 100 nm, and theplug electrode 4 has a thickness of about 175 nm. InFIG. 1 , in left-right direction referred to as D2, thebottom electrode 3 has a width of about 60 nm, and theplug electrode 4 has a width of about 280 nm. - Referring to
FIG. 2 , another embodiment of the resistive memory element has a resistive memory material and a heating material. Based on a conventional active material-in-via geometry, the electrically operated, resistive memory element has aresistive memory material 1, which in the present embodiment, as in the embodiment ofFIG. 1 , is an alloy containing at least one chalcogenid, such as Ge2Sb2Te5. Thephase change material 1 is sandwiched between atop electrode 2 and aplug electrode 4, i.e., both electrodes adjoin the phase change material in direct electrical contact. The top electrode is, for instance, made of TiN or W or the like, while theplug electrode 4, for instance, is made of W or the like, and is in electric contact with the source-drain-path of a transistor device (not shown in the drawings). Thephase change material 1 is partly filled in a viaopening 7 betweentop electrode 2 and plugelectrode 4. The remaining part of the partly filled viaopening 7 is filled with a via openingpart 8 of thetop electrode 2. While not shown inFIG. 2 , the viaopening 7 can be relatively completely filled with thephase change material 1. Both viaconnection 7 and plugelectrode 4 are surrounded by an isolatingmaterial 5, such as SiO2. Within thephase change material 1, aheating layer 6 for heating thephase change material 1, for instance, made of TiOxNy, C, TiAlxNy, TiSixNy, TaSixNy, TaAlxNy, TaOxNy or the like, is embedded, such that anupper part 1 a and alower part 1 b of thephase change material 1 is formed. As is illustrated inFIG. 2 , due to the relatively larger thermal diffusivity of theplug electrode 4 relative to theprotruding part 8 of thetop electrode 2, theheating layer 6 is located relatively closer to theplug electrode 4 than to thetop electrode 2, i.e., the distance betweenheating layer 6 and plugelectrode 4 is relatively smaller than the distance betweenheating layer 6 and protrudingpart 8 of thetop electrode 2. - In
FIG. 2 , in an upward-downward direction referred to as D1, theupper part 1 a of thephase change material 1 layer has a thickness of about 20 nm, thelower part 1 b of thephase change material 1 has a thickness of about 10 nm, and theheating layer 6 has a thickness of about 5 nm. Further, the top electrode 2 (without protruding part 8) has a thickness of about 100 nm, the protrudingpart 8 of thetop electrode 2 has a thickness of 100 nm, and theplug electrode 4 has a thickness of about 225 nm. InFIG. 1 , in left-right direction referred to as D2, the protrudingpart 8 of thetop electrode 2, thephase change material 1 and theheating layer 6 each have a width of about 60 nm, and theplug electrode 4 has a width of about 260 nm. - Numeric simulations using the heater geometry as shown in
FIG. 1 and the active material-in-via geometry as shown inFIG. 2 brought the following results: - In both the above cases, a thermal conductivity of 10 W/m·K, density of 5240 kg/m3, specific thermal capacity of 784 J/kg·K and specific resistivity of 5·103 Ohm·m for the heating layer made of TiOxNy have been assumed.
- Heater geometry: Ireset (current for erasing the memory cell) for 30 nm thickness Ge2Sb2Te5 reference without heating layer amounts to about 1200 μA, and with heating layer is reduced to about 882 μA.
- Active material-in-via geometry: Ireset (current for erasing the memory cell) for 30 nm thickness Ge2Sb2Te5 reference without heating layer amounts to about 665 μA, and with heating layer is reduced to about 175 μA.
- In the resistive memory of the invention using the heating material, the total electric resistivity can be enhanced without having adverse effects on specific characteristics of the resistive memory material.
- While the invention has been described in detail and with reference to specific embodiments thereof, it will be apparent to one skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope thereof. Accordingly, it is intended that the present invention covers the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.
-
- 1 Phase change material
- 1 a Upper part
- 1 b Lower part
- 2 Top electrode
- 3 Bottom electrode
- 4 Plug electrode
- 5 Isolating material
- 6 Heating material
- 7 Via opening
- 8 Via part of top electrode
Claims (21)
Priority Applications (6)
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US10/953,606 US7023008B1 (en) | 2004-09-30 | 2004-09-30 | Resistive memory element |
CNA200580001408XA CN1898750A (en) | 2004-09-30 | 2005-09-09 | Resistive memory element with heater |
PCT/EP2005/054500 WO2006034953A1 (en) | 2004-09-30 | 2005-09-09 | Resistive memory element with heater |
EP05789499A EP1797565A1 (en) | 2004-09-30 | 2005-09-09 | Resistive memory element with heater |
KR1020067009705A KR100800739B1 (en) | 2004-09-30 | 2005-09-09 | Resistive memory element with heater |
TW094131384A TWI297193B (en) | 2004-09-30 | 2005-09-12 | Resistive memory element |
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US10/953,606 US7023008B1 (en) | 2004-09-30 | 2004-09-30 | Resistive memory element |
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EP (1) | EP1797565A1 (en) |
KR (1) | KR100800739B1 (en) |
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TW (1) | TWI297193B (en) |
WO (1) | WO2006034953A1 (en) |
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Also Published As
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WO2006034953A1 (en) | 2006-04-06 |
TW200620535A (en) | 2006-06-16 |
TWI297193B (en) | 2008-05-21 |
US7023008B1 (en) | 2006-04-04 |
EP1797565A1 (en) | 2007-06-20 |
KR20060132828A (en) | 2006-12-22 |
CN1898750A (en) | 2007-01-17 |
KR100800739B1 (en) | 2008-02-01 |
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