US20060038449A1 - Apparatus and method for selectively coupling a system with a first power supply or a second power supply - Google Patents
Apparatus and method for selectively coupling a system with a first power supply or a second power supply Download PDFInfo
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- US20060038449A1 US20060038449A1 US10/922,074 US92207404A US2006038449A1 US 20060038449 A1 US20060038449 A1 US 20060038449A1 US 92207404 A US92207404 A US 92207404A US 2006038449 A1 US2006038449 A1 US 2006038449A1
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- power supply
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0068—Battery or charger load switching, e.g. concurrent charging and load supply
Definitions
- the present invention is directed to systems having a plurality of power supplies.
- a preferred embodiment of the present invention is directed to systems that have a battery power supply and an alternating current power supply.
- Two problems may occur when switching power supplies such as, by way of example and not by way of limitation, when switching between battery power supply and a dc power supply such as would be derived from an AC adapter for a notebook computer or a handheld computing or communication device.
- high peak currents e.g., in excess of 70 Amps
- Such a condition may cause reliability problems and usually adds to the cost of the system because of increased robustness of components required to withstand the rigors of high inrush current such as, by way of example and not by way of limitation, increased robustness of protection components and switches.
- An apparatus for selectively coupling a system with a first power supply or a second power supply includes: (a) a first switch for effecting a first coupling of the system with the first power supply; (b) a second switch for effecting a second coupling of the system with the second power supply; (c) a first switch control unit coupled for controlling the first switch; (d) a second switch control unit coupled for controlling the second switch; (e) a connection director unit coupled with the first and second switch control units for providing control signals to effect the first and second coupling; at least one of the first and second coupling being effected as an initial coupling establishing a generally time-dependent increasing current between the system and one power supply and a continuing coupling establishing a substantially constant operating current between the system and the one power supply.
- a method for selectively coupling a system with a first power supply or a second power supply includes the steps of: (a) in no particular order: (1) providing a first switch connected for switchingly effecting a first coupling of the system with the first power supply; (2) providing a second switch connected for switchingly effecting a second coupling of the system with the second power supply; (3) providing a first switch control unit coupled with the first switch for controlling the first switch; (4) providing a second switch control unit coupled with the second switch for controlling the second switch; and (5) providing a connection director unit coupled with the first switch control unit and coupled with the second switch control unit; (b) operating the connection director unit to provide a first plurality of control signals and to provide a second plurality of control signals; (c) operating the first switch control unit and the second switch control unit to respond to the first plurality of control signals and the second plurality of control signals to selectively effect the first coupling and the second coupling; and (d) effecting at least one of the first coupling and the second coupling as an initial coupling and
- an object of the present invention to provide an apparatus and method that can effect switching between power supplies that limits current inrush when powering up a system using an AC adapter power supply.
- FIG. 1 is an electrical schematic diagram illustrating a prior art apparatus for selectively coupling a system with a first power supply or a second power supply.
- FIG. 2 is an electrical schematic diagram illustrating an apparatus for selectively coupling a system with a first power supply or a second power supply configured according to the present invention.
- FIG. 3 is an electrical schematic diagram illustrating an alternate embodiment for the timer unit of the apparatus of the present invention.
- FIG. 4 is a flow diagram illustrating the method of the present invention.
- FIG. 1 is an electrical schematic diagram illustrating a prior art apparatus for selectively coupling a system with a first power supply or a second power supply.
- an apparatus 10 is configured for selecting a power supply for a dual supply system (not shown in FIG. 1 ) coupled with a system connection locus 18 .
- Apparatus 10 includes a connection director unit 12 coupled with switching units 14 , 16 .
- Switching unit 14 includes a switch control unit 20 coupled with a PMOS switch 22 .
- Switch control unit 20 includes an AND gate 24 and an “inverter” 26 (“inverter” 26 is a level shifter which translates a digital control signal to a level-shifted digital signal, ACDRV, the new level-shifted signal having a high voltage of V CC , for example, and a low voltage of V CC ⁇ V NEG ).
- V NEG is a predetermined lower supply voltage established at a level below supply voltage V CC .
- the level-shifting inverter 26 will hereafter be called simply an inverter.
- AND gate 24 receives a first input 30 (signal ACON; AC adapter voltage connection on) from connection director unit 12 and receives a second input 32 from switching unit 16 .
- signal ACON received at first input 30 is a “1”
- the signal received from switching unit 16 at second input 32 is a “1”
- AND gate 24 provides a “1” signal to inverter 26 .
- inverter 26 receives a “1” from AND gate 24
- inverter 26 presents a signal ACDRV as a “0” (V CC ⁇ V NEG ) to PMOS switch 22 , thereby turning on PMOS switch 22 and coupling system connection locus 18 with an AC adapter power supply (not shown in FIG. 1 ) coupled at an AC adapter power input locus 36 .
- Signal ACDRV is also provided to a comparator 40 .
- Comparator 40 receives a voltage of (V CC ⁇ V REF ; V REF is a reference voltage) at an inverting input locus 42 .
- V REF is a reference voltage
- comparator 40 presents a “0” at an output locus 46 .
- comparator 40 presents a “1” at output locus 46 .
- Switching unit 16 includes a switch control unit 50 coupled with a PMOS switch 52 .
- Switch control unit 50 includes an AND gate 54 and an inverter 56 .
- AND gate 54 receives a first input 60 (signal BATON; battery connected to system) from connection director unit 12 and receives a second input 62 from switching unit 14 .
- signal BATON received at first input 60 is a “1”
- the signal received from switching unit 14 at second input 62 is a “1”
- AND gate 54 provides a “1” signal to level-shifting inverter 56 .
- Level-shifting inverter 56 will hereafter be called simply an inverter.
- inverter 56 When inverter 56 receives a “1” from AND gate 54 , inverter 56 presents a signal BATDRV as a “0” to PMOS switch 52 , thereby turning on PMOS switch 22 and coupling system connection locus 18 with a PACK (i.e., battery pack) power supply (not shown in FIG. 1 ) coupled at a PACK power input locus 66 .
- Signal BATDRV signal is also provided to a comparator 70 .
- Comparator 70 receives a reference voltage, V CC ⁇ V REF , at an inverting input locus 72 . When signal BATDRV is “0”, comparator 70 presents a “0” at an output locus 76 . When signal BATDRV is “1”, comparator 70 presents a “1” at output locus 76 .
- Output 46 is coupled with input locus 62 of AND gate 54 so that a “1” cannot be provided to inverter 56 whenever signal ACDRV is a “0”.
- signal BAT DRV cannot close PMOS switch 52 when PMOS switch 22 is closed.
- Output 76 is coupled with input locus 32 of AND gate 34 so that a “1” cannot be provided to inverter 36 whenever signal BATDRV is a “0”.
- signal ACDRV cannot close PMOS switch 22 when PMOS switch 52 is closed.
- Switching unit 16 also includes a protection circuit 80 that includes Zener diodes 82 , 84 opposingly coupled between source 53 and gate 55 of PMOS switch 52 .
- Protection circuit 80 keeps V GS (gate-to-source voltage) of PMOS switch 52 from exceeding a predetermined value such as, by way of example and not by way of limitation, 20 volts, absolute (i.e., ⁇ 20 volts).
- comparators 40 , 70 operate as “break-before-make” systems.
- Comparator 70 controls operation of AND gate 24 to ensure that signal BATDRV no longer turns on PMOS switch 52 before signal ACDRV can turn on PMOS switch 22 .
- Comparator 40 controls operation of AND gate 54 to ensure that signal ACDRV no longer turns on PMOS switch 22 before signal BATDRV can turn on PMOS switch 52 .
- the secondary circuit of the AC adapter unit can provide very high current to connection locus 18 for short periods of time. Because the AC adapter is already on with power at locus 36 , very high current peaks are often present in PMOS switch 22 . It is difficult to control how fast the (internal or external) PMOS switch 22 connects the AC adapter.
- PMOS 52 must always be turned off using the higher voltage applied at system connection locus 18 .
- Many external switching FET (Field Effect Transistor) devices having a rated V GS at 20 volts. This high voltage requires using protection circuit 80 (described above) to clamp gate 55 of PMOS switch 52 during turn-off transients.
- protection circuit 80 described above
- a lockup condition will occur when a command to switch to AC adapter power is issued by connection directing unit 12 and BATDRV locus 55 exceeds the system voltage at system connection locus 18 by more than a predetermined amount, such as 20 volts.
- connection directing unit 12 changes signal ACON from “0” to “1” and changes signal BATON from “1” to “0” and voltage at BATDRV input locus 55 exceeds voltage at system connection locus 18 by 20 volts or more (for example), Zener diodes 82 , 84 (gate clamp diodes) will break down when signal BATDRV increases (BATDRV “1” is typically set to voltage V CC . Voltage at system, locus 18 , can initially be as low as 0 V).
- FIG. 2 is an electrical schematic diagram illustrating an apparatus for selectively coupling a system with a first power supply or a second power supply configured according to the present invention.
- an apparatus 110 is configured for selecting a power supply for a dual supply system (not shown in FIG. 2 ) coupled with a system connection locus 118 .
- Apparatus 110 includes a connection director unit 112 coupled with switching units 114 , 116 .
- Switching unit 114 includes a switch control unit 120 coupled with a PMOS switch 122 .
- Switch control unit 120 includes an AND gate 124 and an inverting level-shifter (hereafter referred to as an inverter) 126 .
- AND gate 124 receives a first input 130 (signal ACON; AC adapter-to-system on) and a second signal SOFT (soft start) from connection director unit 112 .
- AND gate 124 receives a second input 132 from switching unit 116 .
- AC adapter power is initiated for apparatus 110 using signal SOFT for a predetermined time to initiate a soft start for apparatus 110 .
- signal SOFT is set to a “1”.
- inverter 126 is set to a HIGH Z state in which output signals from inverter 126 do not seek to drive toward a maximum value or toward a minimum value.
- a soft start circuit 190 is actuated and serves to establish a generally time-dependent increasing current through a PMOS transistor 122 .
- Signal SOFT turns on an NMOS (N channel Metal Oxide Semiconductor) switch 191 to complete a circuit through an RC (Resistor-Capacitor) circuit including a resistor 192 coupled between a V NEG voltage node 127 and a locus 193 in common with a gate 125 of PMOS transistor 122 .
- Soft start circuit 190 also includes a capacitor 194 coupled between locus 193 and drain 123 of PMOS transistor 122 , which is in common with a system connection locus 118 to which the system to be powered is coupled (the system is not shown in FIG. 2 ).
- Applying signal SOFT to soft start circuit 190 permits a relatively gradual increase of gate current applied at gate 125 , thereby establishing a generally time-dependent increasing current between system connection locus 118 and an AC power input locus 136 to which an AC power supply (not shown in FIG. 2 ) is coupled. High levels of inrush current are thereby avoided.
- signal SOFT is set to “0”, turning off NMOS transistor 191 , and setting signal ACON at first input 130 to “1”.
- signal ACON is a “1” and the signal received from switching unit 116 at second input 132 is a “1”
- AND gate 124 provides a “1” signal to inverter 126 .
- inverter 126 When inverter 126 receives a “1” from AND gate 124 , inverter 126 presents a signal ACDRV as a “0” to PMOS switch 122 , thereby turning on PMOS switch 122 and maintaining coupling between system connection locus 118 and an AC adapter power supply (not shown in FIG. 2 ) coupled at AC adapter power input locus 136 .
- Signal ACDRV is also provided to a comparator 140 .
- Comparator 140 receives a reference voltage, V CC ⁇ V REF , at an inverting input locus 142 . When signal ACDRV is “0”, comparator 140 presents a “0” at an output locus 146 . When signal ACDRV is “1”, comparator 140 presents a “1” at output locus 146 .
- Switching unit 116 includes a switch control unit 150 coupled with a PMOS switch 152 .
- Switch control unit 150 includes an AND gate 154 and an inverter 156 .
- AND gate 154 receives a first input 160 (signal BATON; battery switch 152 on) from connection director unit 112 and receives a second input 162 from switching unit 114 .
- signal BATON received at first input 160 is a “1” and the signal received from switching unit 114 at second input 162 is a “1”
- AND gate 154 provides a “1” signal to inverting level-shifter (hereafter referred to as an inverter) 156 .
- inverter inverting level-shifter
- inverter 156 When inverter 156 receives a “1” from AND gate 154 , inverter 156 presents a signal BATDRV as a “0” to PMOS switch 152 , thereby turning on PMOS switch 152 and coupling system connection locus 118 with a PACK (i.e., battery pack) power supply (not shown in FIG. 2 ) coupled at a PACK power input locus 166 .
- Signal BATDRV is also provided to comparator 170 .
- Comparator 170 receives a reference voltage of V CC ⁇ V REF at an inverting input locus 172 . When signal BATDRV is “0”, comparator 170 presents a “0” at an output locus 176 . When signal BATDRV is “1”, comparator 170 presents a “1” at output locus 176 .
- Output 146 is coupled with input locus 162 of AND gate 154 so that a “1” cannot be provided to inverter 156 whenever signal ACDRV is a “0”. By this arrangement signal BATDRV cannot close PMOS switch 152 when PMOS switch 122 is closed.
- Switching unit 116 also includes a protection circuit 180 that includes Zener diodes 182 , 184 opposingly coupled between source 153 and gate 155 of PMOS switch 152 .
- Protection circuit 180 keeps V GS (gate-to-source voltage) of PMOS switch 152 from exceeding a predetermined value such as, by way of example and not by way of limitation, 20 volts.
- Output 176 is coupled with a reset node 204 of a timer unit 200 .
- Timer unit 200 receives signal BATON at an inverting set node 202 .
- Timer 200 presents output signals at an output node 206 .
- An OR gate 208 has a first input 210 coupled with output 176 and a second input 212 coupled with timer output node 206 .
- signal BATON goes to “0” (and signal ACON goes to “1”) indicating an order from connection director unit to disconnect system locus 118 from PACK power input locus 136 and to connect system connection locus 118 with AC power input locus 136
- signal BATON is applied at inverting set node 202 , thereby setting timer unit 200 . If voltage at BATDRV input locus 155 exceeds voltage at system connection locus 118 by 20 volts or more, Zener diodes 182 , 184 (gate clamp diodes) will break down when signal BATDRV increases, as described earlier herein in connection with FIG. 1 .
- OR gate 208 will apply a “1” signal if either of its input loci 210 , 212 experiences a “1” signal. That is, if amplifier 170 reaches sufficient threshold voltage to present a “1” signal at output 176 , OR gate 208 will present a “1” to AND gate 124 on line 132 , thereby permitting AND gate 124 to respond to signal ACON going to a “1” value by presenting a “1” to inverter 126 and gating PMOS transistor 122 to complete a circuit between system connection locus 118 and AC power input locus 136 . A “1” signal on line 176 will also be applied to reset node 204 of timer unit 200 and reset timer unit 200 . This is a normal shift from battery power to AC power.
- timer unit 200 will ensure that a “1” signal is presented from output node 206 to input 212 of OR gate 208 after a predetermined time has elapsed, so that PMOS switch 122 will be turned on by switch control unit 120 substantially as described when output 176 is a “1”. This use of timer unit 200 precludes there being an indefinite period for a lock up condition being experienced by break-before-make circuit (embodied in amplifier 170 ).
- Breakdown of Zener diodes 182 , 184 and therefore possible indefinite turn off of both PMOS transistor 152 and PMOS transistor 122 is thereby avoided (an indefinite state where there is no system power for an indefinitely long time is avoided).
- the make-before-break configuration ensures that PMOS switch 152 is turned off before signal ACON can effect turning on of PMOS switch 122 . It is preferable that apparatus 110 effect initial powering up using AC adapter power and effect any change to AC adapter power from battery power (or from no initial system power) using an initial condition with signal SOFT at a “1” followed by a continuing condition in which signal ACON is at a “1”.
- FIG. 3 is an electrical schematic diagram illustrating an alternate embodiment for the timer unit of the apparatus of the present invention.
- line 376 from a break-before-make circuit embodied in a comparator (not shown in FIG. 3 ) is coupled with a reset node 404 of a timer unit 400 .
- Timer unit 400 receives signal BATON at an inverting set node 402 .
- Timer unit 400 presents output signals at an output node 406 .
- An OR gate 408 has a first input 410 coupled with output 376 and a second input 412 coupled with timer output node 406 .
- signal BATON goes to “0” (and signal ACON goes to “1”) indicating an order from a connection director unit (not shown in FIG. 3 ) to disconnect a system (not shown in FIG. 3 ) from battery power and to connect the system with AC power
- signal BATON is applied at inverting set node 402 , thereby setting timer unit 400 . If BATDRV voltage with respect to system voltage is sufficiently high, protection circuits protecting transistor switching units will break down, as described earlier herein in connection with FIGS. 1 and 2 .
- OR gate 408 will apply a “1” signal if either of its input loci 410 , 412 experiences a “1” signal.
- line 376 will present a “1” at input 410 and OR gate 408 will present a “1” to AND gate 324 on line 332 , thereby permitting AND gate 324 to respond to signal SOFT going to a “1” value by presenting a “1” to inverting level-shifter (hereafter referred to simply as inverter) 326 to set inverter 326 in a HIGH Z mode. Only when signal SOFT is “1” and output from OR gate 408 is “1” and signal ACON is “1” can inverter 326 turn on PMOS transistor 122 to complete a circuit between a system and AC power.
- inverter inverting level-shifter
- timer unit 400 will ensure that a “1” signal is presented from output node 406 to input 412 of OR gate 408 after a predetermined time has elapsed, so that PMOS switch 322 will be turned on substantially as described when output 376 is a “1”.
- This use of timer 400 precludes there being an indefinite period for a lock up condition being experienced by break-before-make circuit (embodied in comparator 370 ; not shown). Breakdown of protective circuits and damage to PMOS switches are thereby avoided.
- the make-before-break configuration of the timer unit configuration illustrated in FIG. 3 ensures that a PMOS switch connecting a system with battery power is turned off before either signal SOFT or signal ACON can effect connecting a system with AC power.
- FIG. 4 is a flow diagram illustrating the method of the present invention.
- a method 500 for selectively coupling a system with a first power supply or a second power supply begins at a START locus 502 .
- Method 500 continues with the step of, in no particular order, (1) providing a first switch connected for switchingly effecting a first coupling of the system with the first power supply, as indicated by a block 504 ; (2) providing a second switch connected for switchingly effecting a second coupling of the system with the second power supply, as indicated by a block 506 ; (3) providing a first switch control unit coupled with the first switch for controlling the first switch, as indicated by a block 508 ; (4) providing a second switch control unit coupled with the second switch for controlling the second switch, as indicated by a block 510 ; and (5) providing a connection director unit coupled with the first switch control unit and coupled with the second switch control unit, as indicated by a block 512 .
- Method 500 continues with the step of operating the connection director unit to provide a first plurality of control signals and to provide a second plurality of control signals, as indicated by a block 514 .
- Method 500 continues with the step of operating the first switch control unit and the second switch control unit to respond to the first plurality of control signals and the second plurality of control signals to selectively effect the first coupling and the second coupling, as indicated by a block 516 .
- Method 500 continues with the step of effecting at least one of the first coupling and the second coupling as an initial coupling and a subsequent continuing coupling; the initial coupling establishing a generally time-dependent increasing current between the system and one power supply of the first power supply and the second power supply; the continuing coupling establishing a substantially constant operating current between the system and the one power supply, as indicated by a block 518 .
- Method 500 terminates at an end locus 520 .
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Abstract
An apparatus for selectively coupling a system with a first power supply or a second power supply includes: (a) a first switch for effecting a first coupling of the system with the first power supply; (b) a second switch for effecting a second coupling of the system with the second power supply; (c) a first switch control unit coupled for controlling the first switch; (d) a second switch control unit coupled for controlling the second switch; (e) a connection director unit coupled with the first and second switch control units for providing control signals to effect the first and second coupling; at least one of the first and second coupling being effected as an initial coupling establishing a generally time-dependent increasing current between the system and one power supply and a continuing coupling establishing a substantially constant operating current between the system and the one power supply.
Description
- The present invention is directed to systems having a plurality of power supplies. A preferred embodiment of the present invention is directed to systems that have a battery power supply and an alternating current power supply.
- Two problems may occur when switching power supplies such as, by way of example and not by way of limitation, when switching between battery power supply and a dc power supply such as would be derived from an AC adapter for a notebook computer or a handheld computing or communication device. First, when powering up the system using an AC adapter power supply, high peak currents (e.g., in excess of 70 Amps) may occur. Such a condition may cause reliability problems and usually adds to the cost of the system because of increased robustness of components required to withstand the rigors of high inrush current such as, by way of example and not by way of limitation, increased robustness of protection components and switches. Second, there can be reliability issues relating to switching between power supplies that have voltages higher than the ratings for commercially available PMOS (P-channel Metal Oxide Semiconductor) power switches (i.e., approximately 20 volts). Circuit designers commonly have added protection circuits to overcome this reliability issue. However, the protection circuitry may sometimes effect a lock up condition when switching between power supplies at high voltage.
- There is a need for an apparatus and method that can effect switching between power supplies that limits current inrush when powering up a system using an AC adapter-derived power supply.
- There is a need for an apparatus and method that can effect switching between power supplies that avoids a lock up condition when switching between power supplies.
- An apparatus for selectively coupling a system with a first power supply or a second power supply includes: (a) a first switch for effecting a first coupling of the system with the first power supply; (b) a second switch for effecting a second coupling of the system with the second power supply; (c) a first switch control unit coupled for controlling the first switch; (d) a second switch control unit coupled for controlling the second switch; (e) a connection director unit coupled with the first and second switch control units for providing control signals to effect the first and second coupling; at least one of the first and second coupling being effected as an initial coupling establishing a generally time-dependent increasing current between the system and one power supply and a continuing coupling establishing a substantially constant operating current between the system and the one power supply.
- A method for selectively coupling a system with a first power supply or a second power supply includes the steps of: (a) in no particular order: (1) providing a first switch connected for switchingly effecting a first coupling of the system with the first power supply; (2) providing a second switch connected for switchingly effecting a second coupling of the system with the second power supply; (3) providing a first switch control unit coupled with the first switch for controlling the first switch; (4) providing a second switch control unit coupled with the second switch for controlling the second switch; and (5) providing a connection director unit coupled with the first switch control unit and coupled with the second switch control unit; (b) operating the connection director unit to provide a first plurality of control signals and to provide a second plurality of control signals; (c) operating the first switch control unit and the second switch control unit to respond to the first plurality of control signals and the second plurality of control signals to selectively effect the first coupling and the second coupling; and (d) effecting at least one of the first coupling and the second coupling as an initial coupling and a subsequent continuing coupling; the initial coupling establishing a generally time-dependent increasing current between the system and one power supply of the first power supply and the second power supply; the continuing coupling establishing a substantially constant operating current between the system and the one power supply.
- It is, therefore, an object of the present invention to provide an apparatus and method that can effect switching between power supplies that limits current inrush when powering up a system using an AC adapter power supply.
- It is another object of the present invention to provide an apparatus and method that can effect switching between power supplies that avoids a lock up condition when switching between power supplies.
- Further objects and features of the present invention will be apparent from the following specification and claims when considered in connection with the accompanying drawings, in which like elements are labeled using like reference numerals in the various figures, illustrating the preferred embodiments of the invention.
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FIG. 1 is an electrical schematic diagram illustrating a prior art apparatus for selectively coupling a system with a first power supply or a second power supply. -
FIG. 2 is an electrical schematic diagram illustrating an apparatus for selectively coupling a system with a first power supply or a second power supply configured according to the present invention. -
FIG. 3 is an electrical schematic diagram illustrating an alternate embodiment for the timer unit of the apparatus of the present invention. -
FIG. 4 is a flow diagram illustrating the method of the present invention. -
FIG. 1 is an electrical schematic diagram illustrating a prior art apparatus for selectively coupling a system with a first power supply or a second power supply. InFIG. 1 , anapparatus 10 is configured for selecting a power supply for a dual supply system (not shown inFIG. 1 ) coupled with asystem connection locus 18.Apparatus 10 includes aconnection director unit 12 coupled withswitching units -
Switching unit 14 includes aswitch control unit 20 coupled with aPMOS switch 22.Switch control unit 20 includes anAND gate 24 and an “inverter” 26 (“inverter” 26 is a level shifter which translates a digital control signal to a level-shifted digital signal, ACDRV, the new level-shifted signal having a high voltage of VCC, for example, and a low voltage of VCC−VNEG). VNEG is a predetermined lower supply voltage established at a level below supply voltage VCC. The level-shiftinginverter 26 will hereafter be called simply an inverter. ANDgate 24 receives a first input 30 (signal ACON; AC adapter voltage connection on) fromconnection director unit 12 and receives asecond input 32 from switchingunit 16. When signal ACON received atfirst input 30 is a “1” and the signal received from switchingunit 16 atsecond input 32 is a “1”, ANDgate 24 provides a “1” signal to inverter 26. Wheninverter 26 receives a “1” fromAND gate 24,inverter 26 presents a signal ACDRV as a “0” (VCC−VNEG) toPMOS switch 22, thereby turning onPMOS switch 22 and couplingsystem connection locus 18 with an AC adapter power supply (not shown inFIG. 1 ) coupled at an AC adapterpower input locus 36. Signal ACDRV is also provided to acomparator 40.Comparator 40 receives a voltage of (VCC−VREF; VREF is a reference voltage) at an invertinginput locus 42. When signal ACDRV is “0”,comparator 40 presents a “0” at anoutput locus 46. When signal ACDRV is “1” (i.e., at voltage level VCC),comparator 40 presents a “1” atoutput locus 46. -
Switching unit 16 includes aswitch control unit 50 coupled with aPMOS switch 52.Switch control unit 50 includes anAND gate 54 and aninverter 56. ANDgate 54 receives a first input 60 (signal BATON; battery connected to system) fromconnection director unit 12 and receives asecond input 62 from switchingunit 14. When signal BATON received atfirst input 60 is a “1” and the signal received from switchingunit 14 atsecond input 62 is a “1”, ANDgate 54 provides a “1” signal to level-shifting inverter 56. Level-shiftinginverter 56 will hereafter be called simply an inverter. Wheninverter 56 receives a “1” from ANDgate 54, inverter 56 presents a signal BATDRV as a “0” toPMOS switch 52, thereby turning onPMOS switch 22 and couplingsystem connection locus 18 with a PACK (i.e., battery pack) power supply (not shown inFIG. 1 ) coupled at a PACKpower input locus 66. Signal BATDRV signal is also provided to acomparator 70.Comparator 70 receives a reference voltage, VCC−VREF, at an invertinginput locus 72. When signal BATDRV is “0”,comparator 70 presents a “0” at anoutput locus 76. When signal BATDRV is “1”,comparator 70 presents a “1” atoutput locus 76. -
Output 46 is coupled withinput locus 62 of ANDgate 54 so that a “1” cannot be provided to inverter 56 whenever signal ACDRV is a “0”. By this arrangement signal BAT DRV cannot closePMOS switch 52 whenPMOS switch 22 is closed.Output 76 is coupled withinput locus 32 of AND gate 34 so that a “1” cannot be provided to inverter 36 whenever signal BATDRV is a “0”. By this arrangement signal ACDRV cannot closePMOS switch 22 whenPMOS switch 52 is closed. -
Switching unit 16 also includes aprotection circuit 80 that includes Zenerdiodes source 53 andgate 55 ofPMOS switch 52.Protection circuit 80 keeps VGS (gate-to-source voltage) ofPMOS switch 52 from exceeding a predetermined value such as, by way of example and not by way of limitation, 20 volts, absolute (i.e., ±20 volts). - Using
apparatus 10, when either PACKpower input locus 66 or AC adapterpower input locus 36 is switched to couple withsystem connection locus 18 in response to signals ACON, BATON fromconnection directing unit 12,comparators Comparator 70 controls operation of ANDgate 24 to ensure that signal BATDRV no longer turns onPMOS switch 52 before signal ACDRV can turn onPMOS switch 22.Comparator 40 controls operation ofAND gate 54 to ensure that signal ACDRV no longer turns onPMOS switch 22 before signal BATDRV can turn onPMOS switch 52. - During power up conditions using an AC adapter power supply unit (not shown in
FIG. 1 ) connected with AC adapterpower input locus 36 with no battery pack present (or with battery pack present), the secondary circuit of the AC adapter unit (not shown inFIG. 1 ) can provide very high current toconnection locus 18 for short periods of time. Because the AC adapter is already on with power atlocus 36, very high current peaks are often present inPMOS switch 22. It is difficult to control how fast the (internal or external)PMOS switch 22 connects the AC adapter. By way of example and not by way of limitation, with notebook computers having a 5 amp standard AC adapter unit coupled, peak currents from the AC adapter unit to the notebook computer (i.e., the system coupled with system connection locus 18) can reach 70 Amps for several hundred microseconds until protection circuitry internal to the AC adapter unit is activated. Such potential for a high current gives rise to reliability considerations in designing systems because of power dissipation (and associated heat) and excessive current throughPMOS switch 22. Decreasing rise times atgate 25 ofPMOS switch 22 reduces the undesirable current peak but at the expense of additional power dissipation and heat, and is therefore not an effective solution to this current inrush problem. - Another drawback with
apparatus 10 is thatPMOS 52 must always be turned off using the higher voltage applied atsystem connection locus 18. Many external switching FET (Field Effect Transistor) devices having a rated VGS at 20 volts. This high voltage requires using protection circuit 80 (described above) toclamp gate 55 ofPMOS switch 52 during turn-off transients. For systems operating with voltages higher than the clamping voltage ofprotection circuit 80, a lockup condition will occur when a command to switch to AC adapter power is issued byconnection directing unit 12 andBATDRV locus 55 exceeds the system voltage atsystem connection locus 18 by more than a predetermined amount, such as 20 volts. That is, whenconnection directing unit 12 changes signal ACON from “0” to “1” and changes signal BATON from “1” to “0” and voltage atBATDRV input locus 55 exceeds voltage atsystem connection locus 18 by 20 volts or more (for example),Zener diodes 82, 84 (gate clamp diodes) will break down when signal BATDRV increases (BATDRV “1” is typically set to voltage VCC. Voltage at system,locus 18, can initially be as low as 0 V). Under such conditions, the threshold voltage atnoninverting input locus 74 ofamplifier 70 will never be reached,amplifier 70 will not fulfill its break-before-make function,PMOS switch 52 will be off while PMOS switch 22 will also be left off indefinitely, thereby leaving thesystem locus 18 unpowered indefinitely, even though power is desired from the AC adapter. -
FIG. 2 is an electrical schematic diagram illustrating an apparatus for selectively coupling a system with a first power supply or a second power supply configured according to the present invention. InFIG. 2 , anapparatus 110 is configured for selecting a power supply for a dual supply system (not shown inFIG. 2 ) coupled with asystem connection locus 118.Apparatus 110 includes aconnection director unit 112 coupled with switchingunits -
Switching unit 114 includes aswitch control unit 120 coupled with aPMOS switch 122.Switch control unit 120 includes an ANDgate 124 and an inverting level-shifter (hereafter referred to as an inverter) 126. ANDgate 124 receives a first input 130 (signal ACON; AC adapter-to-system on) and a second signal SOFT (soft start) fromconnection director unit 112. ANDgate 124 receives asecond input 132 from switchingunit 116. - Preferably, AC adapter power is initiated for
apparatus 110 using signal SOFT for a predetermined time to initiate a soft start forapparatus 110. To initiate a soft start, signal SOFT is set to a “1”. When the signal received from switchingunit 116 atinput 132 is also a “1” (at the same time signal SOFT is set to a “1”)inverter 126 is set to a HIGH Z state in which output signals frominverter 126 do not seek to drive toward a maximum value or toward a minimum value. In this HIGH Z orientation, asoft start circuit 190 is actuated and serves to establish a generally time-dependent increasing current through aPMOS transistor 122. Signal SOFT turns on an NMOS (N channel Metal Oxide Semiconductor)switch 191 to complete a circuit through an RC (Resistor-Capacitor) circuit including aresistor 192 coupled between a VNEG voltage node 127 and alocus 193 in common with agate 125 ofPMOS transistor 122.Soft start circuit 190 also includes acapacitor 194 coupled betweenlocus 193 and drain 123 ofPMOS transistor 122, which is in common with asystem connection locus 118 to which the system to be powered is coupled (the system is not shown inFIG. 2 ). Applying signal SOFT tosoft start circuit 190 permits a relatively gradual increase of gate current applied atgate 125, thereby establishing a generally time-dependent increasing current betweensystem connection locus 118 and an ACpower input locus 136 to which an AC power supply (not shown inFIG. 2 ) is coupled. High levels of inrush current are thereby avoided. After a time, signal SOFT is set to “0”, turning offNMOS transistor 191, and setting signal ACON atfirst input 130 to “1”. When signal ACON is a “1” and the signal received from switchingunit 116 atsecond input 132 is a “1”, ANDgate 124 provides a “1” signal toinverter 126. Wheninverter 126 receives a “1” from ANDgate 124,inverter 126 presents a signal ACDRV as a “0” toPMOS switch 122, thereby turning onPMOS switch 122 and maintaining coupling betweensystem connection locus 118 and an AC adapter power supply (not shown inFIG. 2 ) coupled at AC adapterpower input locus 136. Signal ACDRV is also provided to acomparator 140.Comparator 140 receives a reference voltage, VCC−VREF, at an invertinginput locus 142. When signal ACDRV is “0”,comparator 140 presents a “0” at anoutput locus 146. When signal ACDRV is “1”,comparator 140 presents a “1” atoutput locus 146. -
Switching unit 116 includes aswitch control unit 150 coupled with aPMOS switch 152.Switch control unit 150 includes an ANDgate 154 and aninverter 156. ANDgate 154 receives a first input 160 (signal BATON;battery switch 152 on) fromconnection director unit 112 and receives asecond input 162 from switchingunit 114. When signal BATON received atfirst input 160 is a “1” and the signal received from switchingunit 114 atsecond input 162 is a “1”, ANDgate 154 provides a “1” signal to inverting level-shifter (hereafter referred to as an inverter) 156. Wheninverter 156 receives a “1” from ANDgate 154,inverter 156 presents a signal BATDRV as a “0” toPMOS switch 152, thereby turning onPMOS switch 152 and couplingsystem connection locus 118 with a PACK (i.e., battery pack) power supply (not shown inFIG. 2 ) coupled at a PACKpower input locus 166. Signal BATDRV is also provided tocomparator 170.Comparator 170 receives a reference voltage of VCC−VREF at an invertinginput locus 172. When signal BATDRV is “0”,comparator 170 presents a “0” at anoutput locus 176. When signal BATDRV is “1”,comparator 170 presents a “1” atoutput locus 176. -
Output 146 is coupled withinput locus 162 of ANDgate 154 so that a “1” cannot be provided toinverter 156 whenever signal ACDRV is a “0”. By this arrangement signal BATDRV cannot closePMOS switch 152 whenPMOS switch 122 is closed. -
Switching unit 116 also includes aprotection circuit 180 that includesZener diodes source 153 andgate 155 ofPMOS switch 152.Protection circuit 180 keeps VGS (gate-to-source voltage) ofPMOS switch 152 from exceeding a predetermined value such as, by way of example and not by way of limitation, 20 volts. -
Output 176 is coupled with areset node 204 of atimer unit 200.Timer unit 200 receives signal BATON at aninverting set node 202.Timer 200 presents output signals at anoutput node 206. An ORgate 208 has afirst input 210 coupled withoutput 176 and asecond input 212 coupled withtimer output node 206. - When signal BATON goes to “0” (and signal ACON goes to “1”) indicating an order from connection director unit to disconnect
system locus 118 from PACKpower input locus 136 and to connectsystem connection locus 118 with ACpower input locus 136, signal BATON is applied at inverting setnode 202, thereby settingtimer unit 200. If voltage atBATDRV input locus 155 exceeds voltage atsystem connection locus 118 by 20 volts or more,Zener diodes 182, 184 (gate clamp diodes) will break down when signal BATDRV increases, as described earlier herein in connection withFIG. 1 . However, ORgate 208 will apply a “1” signal if either of itsinput loci amplifier 170 reaches sufficient threshold voltage to present a “1” signal atoutput 176, ORgate 208 will present a “1” to ANDgate 124 online 132, thereby permitting ANDgate 124 to respond to signal ACON going to a “1” value by presenting a “1” toinverter 126 and gatingPMOS transistor 122 to complete a circuit betweensystem connection locus 118 and ACpower input locus 136. A “1” signal online 176 will also be applied to resetnode 204 oftimer unit 200 and resettimer unit 200. This is a normal shift from battery power to AC power. - If a lock up condition occurs with amplifier 170 (as described earlier herein with in connection with
FIG. 1 ), thentimer unit 200 will ensure that a “1” signal is presented fromoutput node 206 to input 212 ofOR gate 208 after a predetermined time has elapsed, so thatPMOS switch 122 will be turned on byswitch control unit 120 substantially as described whenoutput 176 is a “1”. This use oftimer unit 200 precludes there being an indefinite period for a lock up condition being experienced by break-before-make circuit (embodied in amplifier 170). Breakdown ofZener diodes PMOS transistor 152 andPMOS transistor 122 is thereby avoided (an indefinite state where there is no system power for an indefinitely long time is avoided). The make-before-break configuration ensures thatPMOS switch 152 is turned off before signal ACON can effect turning on ofPMOS switch 122. It is preferable thatapparatus 110 effect initial powering up using AC adapter power and effect any change to AC adapter power from battery power (or from no initial system power) using an initial condition with signal SOFT at a “1” followed by a continuing condition in which signal ACON is at a “1”. -
FIG. 3 is an electrical schematic diagram illustrating an alternate embodiment for the timer unit of the apparatus of the present invention. InFIG. 3 ,line 376 from a break-before-make circuit embodied in a comparator (not shown inFIG. 3 ) is coupled with areset node 404 of atimer unit 400.Timer unit 400 receives signal BATON at aninverting set node 402.Timer unit 400 presents output signals at anoutput node 406. An ORgate 408 has afirst input 410 coupled withoutput 376 and asecond input 412 coupled withtimer output node 406. - When signal BATON goes to “0” (and signal ACON goes to “1”) indicating an order from a connection director unit (not shown in
FIG. 3 ) to disconnect a system (not shown inFIG. 3 ) from battery power and to connect the system with AC power, signal BATON is applied at inverting setnode 402, thereby settingtimer unit 400. If BATDRV voltage with respect to system voltage is sufficiently high, protection circuits protecting transistor switching units will break down, as described earlier herein in connection withFIGS. 1 and 2 . ORgate 408 will apply a “1” signal if either of itsinput loci line 376 will present a “1” atinput 410 andOR gate 408 will present a “1” to ANDgate 324 online 332, thereby permitting ANDgate 324 to respond to signal SOFT going to a “1” value by presenting a “1” to inverting level-shifter (hereafter referred to simply as inverter) 326 to setinverter 326 in a HIGH Z mode. Only when signal SOFT is “1” and output from ORgate 408 is “1” and signal ACON is “1” can inverter 326 turn onPMOS transistor 122 to complete a circuit between a system and AC power. - If a lock up condition occurs because of not achieving a threshold voltage (as described earlier herein with in connection with
FIGS. 1 and 2 ), thentimer unit 400 will ensure that a “1” signal is presented fromoutput node 406 to input 412 ofOR gate 408 after a predetermined time has elapsed, so that PMOS switch 322 will be turned on substantially as described whenoutput 376 is a “1”. This use oftimer 400 precludes there being an indefinite period for a lock up condition being experienced by break-before-make circuit (embodied in comparator 370; not shown). Breakdown of protective circuits and damage to PMOS switches are thereby avoided. The make-before-break configuration of the timer unit configuration illustrated inFIG. 3 ensures that a PMOS switch connecting a system with battery power is turned off before either signal SOFT or signal ACON can effect connecting a system with AC power. -
FIG. 4 is a flow diagram illustrating the method of the present invention. InFIG. 4 , amethod 500 for selectively coupling a system with a first power supply or a second power supply begins at aSTART locus 502.Method 500 continues with the step of, in no particular order, (1) providing a first switch connected for switchingly effecting a first coupling of the system with the first power supply, as indicated by ablock 504; (2) providing a second switch connected for switchingly effecting a second coupling of the system with the second power supply, as indicated by ablock 506; (3) providing a first switch control unit coupled with the first switch for controlling the first switch, as indicated by ablock 508; (4) providing a second switch control unit coupled with the second switch for controlling the second switch, as indicated by ablock 510; and (5) providing a connection director unit coupled with the first switch control unit and coupled with the second switch control unit, as indicated by ablock 512. -
Method 500 continues with the step of operating the connection director unit to provide a first plurality of control signals and to provide a second plurality of control signals, as indicated by ablock 514.Method 500 continues with the step of operating the first switch control unit and the second switch control unit to respond to the first plurality of control signals and the second plurality of control signals to selectively effect the first coupling and the second coupling, as indicated by ablock 516. -
Method 500 continues with the step of effecting at least one of the first coupling and the second coupling as an initial coupling and a subsequent continuing coupling; the initial coupling establishing a generally time-dependent increasing current between the system and one power supply of the first power supply and the second power supply; the continuing coupling establishing a substantially constant operating current between the system and the one power supply, as indicated by ablock 518.Method 500 terminates at anend locus 520. - It is to be understood that, while the detailed drawings and specific examples given describe preferred embodiments of the invention, they are for the purpose of illustration only, that the apparatus and method of the invention are not limited to the precise details and conditions disclosed and that various changes may be made therein without departing from the spirit of the invention which is defined by the following claims:
Claims (20)
1. An apparatus for selecting a power supply in a dual supply system; the apparatus comprising:
(a) a connection director unit; said connection director unit presenting a plurality of actuating signals;
(b) a first switching unit coupled with said connection director unit, coupled with a first power supply and coupled with said system; said first switching unit generating a first indicating signal to indicate whether said first switch is closed;
(c) a second switching unit coupled with said connection director unit, coupled with a second power supply and coupled with said system; said second switching unit generating a second indicating signal to indicate whether said second switch is closed;
(d) said first switching unit being coupled with said second switching unit; said first switching unit responding to a first signal combination of said second indicating signal and at least one first actuating signal of said plurality of actuating signals for effecting a first coupling between said system and said first power supply; and
(e) said second switching unit being coupled with said first switching unit; said second switching unit responding to a second signal combination of said first indicating signal and at least one second actuating signal of said plurality of actuating signals for effecting a second coupling between said system and a second power supply; said at least one second actuating signal including an initiating signal and an operating signal; said second switching unit responding to said initiating signal to establish a generally time-dependent increasing current between said system and said second power supply; said second switching unit responding to said operating signal to establish a substantially constant operating current between said system and said second power supply.
2. An apparatus for selecting a power supply in a dual supply system as recited in claim 1 wherein said first switching unit responds to said second predetermined signal combination to interrupt said first coupling and wherein said second switching unit responds to said first predetermined signal combination to interrupt said second coupling.
3. An apparatus for selecting a power supply in a dual supply system as recited in claim 1 wherein said first switching unit includes a break-before-make circuit; said break-before-make circuit ensuring that said first switching unit interrupts said first coupling before said second switching unit effects said second coupling when said connection director unit presents said second predetermined signal combination.
4. An apparatus for selecting a power supply in a dual supply system as recited in claim 1 wherein said first switching unit includes a timer unit coupled for receiving said at least one first actuating signal; said timer unit operating to assure said substantially constant operating current between said system and said second power supply occurs no more than a predetermined time interval after said connection director unit presents said second predetermined signal combination.
5. An apparatus for selecting a power supply in a dual supply system as recited in claim 2 wherein said first switching unit includes a break-before-make circuit; said break-before-make circuit ensuring that said first switching unit interrupts said first coupling before said second switching unit effects said second coupling when said connection director unit presents said second predetermined signal combination.
6. An apparatus for selecting a power supply in a dual supply system as recited in claim 2 wherein said first switching unit includes a timer unit coupled for receiving said at least one first actuating signal; said timer unit operating to assure said substantially constant operating current between said system and said second power supply occurs no more than a predetermined time interval after said connection director unit presents said second predetermined signal combination.
7. An apparatus for selecting a power supply in a dual supply system as recited in claim 3 wherein said first switching unit includes a timer unit coupled for receiving said at least one first actuating signal; said timer unit operating to assure said substantially constant operating current between said system and said second power supply occurs no more than a predetermined time interval after said connection director unit presents said second predetermined signal combination.
8. An apparatus for selectively coupling a system with a first power supply or a second power supply; the apparatus comprising:
(a) a first switch for switchingly effecting a first coupling of said system with said first power supply;
(b) a second switch for switchingly effecting a second coupling of said system with said second power supply;
(c) a first switch control unit coupled with said first switch for controlling said first switch;
(d) a second switch control unit coupled with said second switch for controlling said second switch;
(e) a connection director unit coupled with said first switch control unit and coupled with said second switch control unit; said connection director unit providing a first plurality of control signals to effect said first coupling; said connection director unit providing a second plurality of control signals to effect said second coupling; at least one of said first coupling and said second coupling being effected as an initial coupling and a subsequent continuing coupling; said initial coupling establishing a generally time-dependent increasing current between said system and one power supply of said first power supply and said second power supply; said continuity coupling establishing a substantially constant operating current between said system and said one power supply.
9. An apparatus for selectively coupling a system with a first power supply or a second power supply as recited in claim 8 wherein said first switch control unit and said second switch control unit cooperate to interrupt said coupling of said system with one power supply of said first power supply and said second power supply when the other power supply of said first power supply and said second power supply is coupled with said system.
10. An apparatus for selectively coupling a system with a first power supply or a second power supply as recited in claim 8 wherein at least one switch control unit of said first switch control unit and said second switch control unit includes a break-before-make circuit coupled with the other switch control unit of said first switch control unit and said second switch control unit; said break-before-make circuit ensuring that at least one of said first switch and said second switch interrupts said first coupling before effecting said second coupling and interrupts said second coupling before effecting said first coupling.
11. An apparatus for selectively coupling a system with a first power supply or a second power supply as recited in claim 8 wherein at least one switch control unit of said first switch control unit and said second switch control unit includes a timer unit coupled with the other switch control unit of said first switch control unit and said second switch control unit; said timer unit operating to ensure said continuity coupling is effected by said other switch control unit no more than a predetermined time interval after said initial coupling is established by said other switch control unit.
12. An apparatus for selectively coupling a system with a first power supply or a second power supply as recited in claim 8 wherein at least one switch control unit of said first switch control unit and said second switch control unit includes a break-before-make circuit coupled with the other switch control unit of said first switch control unit and said second switch control unit; said break-before-make circuit ensuring that at least one of said first switch and said second switch interrupts said first coupling before effecting said second coupling and interrupts said second coupling before effecting said first coupling.
13. An apparatus for selectively coupling a system with a first power supply or a second power supply as recited in claim 9 wherein at least one switch control unit of said first switch control unit and said second switch control unit includes a timer unit coupled with the other switch control unit of said first switch control unit and said second switch control unit; said timer unit operating to ensure said continuity coupling is effected by said other switch control unit no more than a predetermined time interval after said initial coupling is established by said other switch control unit.
14. An apparatus for selectively coupling a system with a first power supply or a second power supply as recited in claim 10 wherein at least one switch control unit of said first switch control unit and said second switch control unit includes a timer unit coupled with the other switch control unit of said first switch control unit and said second switch control unit; said timer unit operating to ensure said continuity coupling is effected by said other switch control unit no more than a predetermined time interval after said initial coupling is established by said other switch control unit.
15. A method for selectively coupling a system with a first power supply or a second power supply; the method comprising the steps of:
(a) in no particular order:
(1) providing a first switch connected for switchingly effecting a first coupling of said system with said first power supply;
(2) providing a second switch connected for switchingly effecting a second coupling of said system with said second power supply;
(3) providing a first switch control unit coupled with said first switch for controlling said first switch;
(4) providing a second switch control unit coupled with said second switch for controlling said second switch; and
(5) providing a connection director unit coupled with said first switch control unit and coupled with said second switch control unit;
(b) operating said connection director unit to provide a first plurality of control signals and to provide a second plurality of control signals;
(c) operating said first switch control unit and said second switch control unit to respond to said first plurality of control signals and said second plurality of control signals to selectively effect said first coupling and said second coupling; and
(d) effecting at least one of said first coupling and said second coupling as an initial coupling and a subsequent continuing coupling; said initial coupling establishing a generally time-dependent increasing current between said system and one power supply of said first power supply and said second power supply; said continuing coupling establishing a substantially constant operating current between said system and said one power supply.
16. A method for selectively coupling a system with a first power supply or a second power supply as recited in claim 15 wherein said first switch control unit and said second switch control unit cooperate to interrupt said coupling of said system with one power supply of said first power supply and said second power supply when the other power supply of said first power supply and said second power supply is coupled with said system.
17. A method for selectively coupling a system with a first power supply or a second power supply as recited in claim 15 wherein at least one switch control unit of said first switch control unit and said second switch control unit includes a break-before-make circuit coupled with the other switch control unit of said first switch control unit and said second switch control unit; said break-before-make circuit ensuring that at least one of said first switch and said second switch interrupts said first coupling before effecting said second coupling and interrupts said second coupling before effecting said first coupling.
18. A method for selectively coupling a system with a first power supply or a second power supply as recited in claim 15 wherein at least one switch control unit of said first switch control unit and said second switch control unit includes a timer unit coupled with the other switch control unit of said first switch control unit and said second switch control unit; said timer unit operating to ensure said continuity coupling is effected by said other switch control unit no more than a predetermined time interval after said initial coupling is established by said other switch control unit.
19. A method for selectively coupling a system with a first power supply or a second power supply as recited in claim 15 wherein at least one switch control unit of said first switch control unit and said second switch control unit includes a break-before-make circuit coupled with the other switch control unit of said first switch control unit and said second switch control unit; said break-before-make circuit ensuring that at least one of said first switch and said second switch interrupts said first coupling before effecting said second coupling and interrupts said second coupling before effecting said first coupling.
20. A method for selectively coupling a system with a first power supply or a second power supply as recited in claim 16 wherein at least one switch control unit of said first switch control unit and said second switch control unit includes a timer unit coupled with the other switch control unit of said first switch control unit and said second switch control unit; said timer unit operating to ensure said continuity coupling is effected by said other switch control unit no more than a predetermined time interval after said initial coupling is established by said other switch control unit.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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US10/922,074 US20060038449A1 (en) | 2004-08-19 | 2004-08-19 | Apparatus and method for selectively coupling a system with a first power supply or a second power supply |
US11/877,546 US7535123B2 (en) | 2004-08-19 | 2007-10-23 | Apparatus and method for selectively coupling system with a first power supply or a second power supply |
Applications Claiming Priority (1)
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US10/922,074 US20060038449A1 (en) | 2004-08-19 | 2004-08-19 | Apparatus and method for selectively coupling a system with a first power supply or a second power supply |
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US11/877,546 Continuation US7535123B2 (en) | 2004-08-19 | 2007-10-23 | Apparatus and method for selectively coupling system with a first power supply or a second power supply |
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US20060038449A1 true US20060038449A1 (en) | 2006-02-23 |
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US10/922,074 Abandoned US20060038449A1 (en) | 2004-08-19 | 2004-08-19 | Apparatus and method for selectively coupling a system with a first power supply or a second power supply |
US11/877,546 Active US7535123B2 (en) | 2004-08-19 | 2007-10-23 | Apparatus and method for selectively coupling system with a first power supply or a second power supply |
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US11/877,546 Active US7535123B2 (en) | 2004-08-19 | 2007-10-23 | Apparatus and method for selectively coupling system with a first power supply or a second power supply |
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Cited By (4)
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US20060145673A1 (en) * | 2005-01-03 | 2006-07-06 | Fogg John K | Method and apparatus for reducing inrush current to a voltage regulating circuit |
CN101882867A (en) * | 2010-06-28 | 2010-11-10 | 浙江大华技术股份有限公司 | Anti-strong interference switch control signal generating circuit of system power supply |
CN106374897A (en) * | 2016-11-22 | 2017-02-01 | 亿嘉和科技股份有限公司 | Delayed startup/shutdown circuit and delayed startup/shutdown control method |
CN108121430A (en) * | 2017-12-20 | 2018-06-05 | 福建利利普光电科技有限公司 | A kind of soft boot-strap circuit in the charged pool path for applying to data collecting system |
Families Citing this family (3)
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US8115337B2 (en) * | 2008-12-01 | 2012-02-14 | Texas Instruments Incorporated | Soft-start circuit |
CN102200820A (en) * | 2010-03-26 | 2011-09-28 | 鸿富锦精密工业(深圳)有限公司 | Starting circuit |
CN105141026B (en) * | 2015-08-21 | 2017-09-05 | 中车青岛四方机车车辆股份有限公司 | AC-DC conversion for double-current system EMUs controls circuit |
Citations (1)
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US20050253560A1 (en) * | 2004-05-14 | 2005-11-17 | Vlad Mihail Popescu-Stanesti | Power management system |
-
2004
- 2004-08-19 US US10/922,074 patent/US20060038449A1/en not_active Abandoned
-
2007
- 2007-10-23 US US11/877,546 patent/US7535123B2/en active Active
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
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US20050253560A1 (en) * | 2004-05-14 | 2005-11-17 | Vlad Mihail Popescu-Stanesti | Power management system |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060145673A1 (en) * | 2005-01-03 | 2006-07-06 | Fogg John K | Method and apparatus for reducing inrush current to a voltage regulating circuit |
CN101882867A (en) * | 2010-06-28 | 2010-11-10 | 浙江大华技术股份有限公司 | Anti-strong interference switch control signal generating circuit of system power supply |
CN106374897A (en) * | 2016-11-22 | 2017-02-01 | 亿嘉和科技股份有限公司 | Delayed startup/shutdown circuit and delayed startup/shutdown control method |
CN108121430A (en) * | 2017-12-20 | 2018-06-05 | 福建利利普光电科技有限公司 | A kind of soft boot-strap circuit in the charged pool path for applying to data collecting system |
CN108121430B (en) * | 2017-12-20 | 2021-04-02 | 福建利利普光电科技有限公司 | Apply to soft start circuit of taking battery route of data acquisition system |
Also Published As
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US20080129121A1 (en) | 2008-06-05 |
US7535123B2 (en) | 2009-05-19 |
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