US20050256668A1 - Method and system for capturing data to create serial ata eye diagram - Google Patents
Method and system for capturing data to create serial ata eye diagram Download PDFInfo
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- US20050256668A1 US20050256668A1 US10/844,686 US84468604A US2005256668A1 US 20050256668 A1 US20050256668 A1 US 20050256668A1 US 84468604 A US84468604 A US 84468604A US 2005256668 A1 US2005256668 A1 US 2005256668A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/24—Testing correct operation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
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- This invention relates generally to the field of Serial ATA, and particularly to a method and system for capturing data to create a Serial ATA eye diagram.
- Serial ATA Advanced Technology Attachment
- Serial ATA is a computer bus primarily designed for transfer of data between a computer processor and hard disk and has at least three advantages over Parallel ATA, namely speed, cable management, and Serial ATA's ability of being hot swappable.
- the eye diagram test is used to check the signal quality of a serial stream of data and to check whether the signal transmission meets the specifications for the Serial ATA host controller.
- data sent through the Serial ATA host controller is captured over a period of time and displayed in a bit over bit fashion on the screen of an oscilloscope.
- Standard test masks are defined on the screen and typically have an “eye” in the center in addition to regions at the top and bottom which test for overshoot/undershoot. A signal which intrudes into the mask violates the standard.
- An eye diagram test conventionally requires a pattern generator which may be very expensive.
- a pattern generator which may be very expensive.
- a method for capturing data to create a Serial ATA eye diagram includes the following steps: (a) powering up a Serial ATA host controller including a first Serial ATA port and a second Serial ATA port, receive lines of the first Serial ATA port being short-circuited to receive lines of the second Serial ATA port, the first Serial ATA port being communicatively coupled to a Serial ATA drive; (b) receiving, by the first Serial ATA port and the second Serial ATA port, an initialization pattern from the Serial ATA drive; (c) transmitting an ALIGN/SYNC pattern over transmit lines of the second Serial ATA port; and (d) capturing data transmitted over the transmit lines of the second Serial ATA port using a high impedance differential probe and an oscilloscope, the transmit lines of the second Serial ATA port being connected to each other via a resistor of 100
- a system for capturing data to create a Serial ATA eye diagram includes the following: (a) means for powering up a Serial ATA host controller including a first Serial ATA port and a second Serial ATA port, receive lines of the first Serial ATA port being short-circuited to receive lines of the second Serial ATA port, the first Serial ATA port being communicatively coupled to a Serial ATA drive; (b) means for receiving, by the first Serial ATA port and the second Serial ATA port, an initialization pattern from the Serial ATA drive; (c) means for transmitting an ALIGN/SYNC pattern over transmit lines of the second Serial ATA port; and (d) a high impedance differential probe and an oscilloscope for capturing data transmitted over the transmit lines of the second Serial ATA port, the transmit lines of the second Serial ATA port being connected to each other via a resistor, and the high impedance differential probe being communicatively coupled to the oscilloscope, wherein the captured data is used to create a Serial ATA host controller including a
- a system for capturing data to create a Serial ATA eye diagram includes the following: (a) a Serial ATA host controller including a first Serial ATA port and a second Serial ATA port, receive lines of the first Serial ATA port being short-circuited to receive lines of the second Serial ATA port; (b) a Serial ATA drive, communicatively coupled to the first Serial ATA port, for transmitting an initialization pattern to the first Serial ATA port and the second Serial ATA port when the Serial ATA host controller is powered up; (c) a resistor for connecting transmit lines of the second Serial ATA port; and (d) a high impedance differential probe and an oscilloscope for capturing data transmitted over the transmit lines of the second Serial ATA port, the high impedance differential probe being communicatively coupled to the oscilloscope and the transmit lines of the second Serial ATA port, wherein the captured data is used to create a Serial ATA eye diagram for the second Serial ATA port on the oscilloscope.
- a test board for testing a Serial ATA port includes the following: (a) a Serial ATA receptacle for being communicatively coupled to a first Serial ATA port of a Serial ATA host controller, transmit lines of the Serial ATA receptacle being connected to each other via a resistor; (b) a first Serial ATA plug for being communicatively coupled to a second Serial ATA port of the Serial ATA host controller, receive lines of the first Serial ATA plug being communicatively coupled to receive lines of the Serial ATA receptacle; (c) a second Serial ATA plug for being communicatively coupled to a Serial ATA drive, receive lines of the second Serial ATA plug being communicatively coupled to the receive lines of the first Serial ATA plug, and transmit lines of the second Serial ATA plug being communicatively coupled to transmit lines of the first Serial ATA plug, wherein a high impedance differential probe and an oscilloscope capture data transmitted over the transmit lines of Serial ATA
- a system for testing a Serial ATA port of a Serial ATA host controller includes the following: (a) a Serial ATA drive; (b) a Serial ATA receptacle for being communicatively coupled to a first Serial ATA port of a Serial ATA host controller, transmit lines of the Serial ATA receptacle being connected to each other via a resistor; (c) a first Serial ATA plug for being communicatively coupled to a second Serial ATA port of the Serial ATA host controller, receive lines of the first Serial ATA plug being communicatively coupled to receive lines of the Serial ATA receptacle; (d) a second Serial ATA plug communicatively coupled to the Serial ATA drive, receive lines of the second Serial ATA plug being communicatively coupled to the receive lines of the first Serial ATA plug, and transmit lines of the second Serial ATA plug being communicatively coupled to transmit lines of the first Serial ATA plug; and (e) an oscilloscope communicatively
- FIG. 1 is a schematic diagram illustrating a system for creating a Serial ATA eye diagram using a pattern generator
- FIG. 2 is a schematic diagram illustrating a system for capturing data to create a Serial ATA eye diagram without using a pattern generator in accordance with an exemplary embodiment of the present invention
- FIG. 3 is a flow chart of a method for capturing data to create a Serial ATA eye diagram in accordance with an exemplary embodiment of the present invention.
- FIG. 4 is a schematic diagram illustrating a system for capturing data to create a Serial ATA eye diagram, the system including a test board in accordance with another exemplary embodiment of the present invention.
- Serial ATA is a hard disk control architecture in which data is sent to the drive in a serial fashion.
- the simplest data pattern that can be used for eye diagram analysis is ALIGN/SYNC data pattern which is sent over the medium when the Serial ATA host controller is connected to a Serial ATA device (e.g., a Serial ATA drive, or the like) and idle.
- a Serial ATA device e.g., a Serial ATA drive, or the like
- the Serial ATA host controller is connected to both the Serial ATA drive and the oscilloscope, data used for eye diagram cannot be taken from a data line while the data line is connected to the Serial ATA drive. Otherwise, the quality of the data may deteriorate.
- FIG. 1 is a schematic diagram illustrating a system 100 for creating a Serial ATA eye diagram using a pattern generator.
- the system 100 includes a Serial ATA board such as a Serial ATA host controller 102 under test, a pattern generator 104 , and an oscilloscope 106 .
- the Serial ATA host controller 102 includes a first Serial ATA connector 108 for a first Serial ATA port and a second Serial ATA connector 110 for a second Serial ATA port which is under test.
- a test board 112 is communicatively coupled to the second Serial ATA port via the second Serial ATA connector 110 to test the second Serial ATA port.
- the transmit lines and receive lines of the Serial ATA host controller 102 are separated.
- the receive lines are connected to the pattern generator 104 that is programmed to mimic the device initialization patterns via 50 Ohm coax cables 114 .
- the transmit lines are connected to the channels of the oscilloscope 106 via 50 Ohm coax cables 114 .
- the pattern generator 104 When the pattern generator 104 generates the device initialization pattern, the Serial ATA host controller 102 receives the initialization pattern and starts sending the ALIGN/SYNC pattern, which may be captured by the oscilloscope 106 to generate the eye diagram for the second Serial ATA port of the Serial ATA host controller 102 .
- the pattern generator 104 may be very expensive. Thus, it would be desirable to provide a method and system for capturing data to create a Serial ATA eye diagram without using a pattern generator.
- the system 200 includes a Serial ATA board such as a Serial ATA host controller 202 under test, a Serial ATA drive 204 , and an oscilloscope 206 .
- the Serial ATA host controller 202 includes a first Serial ATA connector 208 for a first Serial ATA port and a second Serial ATA connector 210 for a second Serial ATA port which is under test.
- the first Serial port of the Serial ATA host controller 202 is communicatively coupled to the Serial ATA drive 204 through the first Serial ATA connector 208 and preferably via a differential Serial ATA cable 214 .
- Receive lines of the first Serial ATA port are short-circuited to receive lines of the second Serial ATA port under test via a trace or cable 212 (preferably a 100 Ohm differential Serial ATA cable).
- Transmit lines of the second Serial ATA port are connected to each other via a resistor 218 (preferably a 100 Ohm termination resistor).
- the transmit lines of the second Serial ATA port are communicatively coupled to the oscilloscope 206 via a high impedance differential probe 216 .
- both the first Serial ATA port and the second Serial ATA port of the Serial ATA host controller 202 may receive the initialization pattern from the Serial ATA drive 204 .
- the initialization pattern received by the second Serial ATA port of the Serial ATA host controller 202 may mimic the connectivity to the Serial ATA drive 204 . This may result in transmission of the ALIGN/SYNC pattern over the transmit lines of the second Serial ATA port of the Serial ATA host controller 202 . While the ALIGN/SYNC pattern is transmitted, the data or signal may be captured using the high impedance differential probe 216 and the oscilloscope 206 .
- the high impedance differential probe 216 may have very high input impedance so that the data or signal under test may not be affected by the high impedance differential probe 216 too much.
- the captured data may be used by the oscilloscope 206 to create a Serial ATA eye diagram for the second Serial ATA port of the Serial ATA host controller 202 on the oscilloscope 206 .
- FIG. 3 is a flow chart of a method or process 300 for capturing data to create a Serial ATA eye diagram in accordance with an exemplary embodiment of the present invention.
- the process 300 may be implemented in the system 200 shown in FIG. 2 .
- the process 300 may start with a step 302 , in which a Serial ATA host controller including a first and a second Serial ATA ports is powered up, where receive lines of the first Serial ATA port are short-circuited to receive lines of the second Serial ATA port.
- the second Serial ATA port is under test.
- the first and second Serial ATA ports receive an initialization pattern from a Serial ATA drive communicatively coupled to the first Serial ATA port 304 .
- An ALIGN/SYNC pattern is transmitted over transmit lines of the second Serial ATA port 306 .
- Data transmitted over the transmit lines of the second Serial ATA port is captured using a high impedance differential probe and an oscilloscope communicatively coupled to the high impedance differential probe, where the transmit lines of the second Serial ATA port are connected to each other via a resistor 308 .
- the captured data is used by the oscilloscope to create a Serial ATA eye diagram for the second Serial ATA port on the oscilloscope 310 .
- FIG. 4 is a schematic diagram illustrating a system 400 for capturing data to create a Serial ATA eye diagram in accordance with another exemplary embodiment of the present invention, where a test board 408 is used.
- the system 400 includes a Serial ATA board such as a Serial ATA host controller 402 under test, a Serial ATA drive 404 , an oscilloscope 406 , and the test board 408 .
- the Serial ATA host controller 402 includes a first Serial ATA connector 410 for a first Serial ATA port (which is a channel under test), and a second Serial ATA connector 412 for a second Serial ATA port (which is an “Exciter” channel).
- the test board 408 includes a Serial ATA receptacle 414 , a first Serial ATA plug 416 , and a second Serial ATA plug 418 .
- the Serial ATA receptacle 414 is communicatively coupled to the first Serial ATA port of the Serial ATA host controller 402 via the first Serial ATA connector 410 .
- Transmit lines of the Serial ATA receptacle 414 are connected to each other via a resistor, preferably via a 100 Ohm resistor.
- the first Serial ATA plug 416 is communicatively coupled to the second Serial ATA port of the Serial ATA host controller 402 , preferably via a differential Serial ATA cable 420 .
- Receive lines of the first Serial ATA plug 416 are communicatively coupled to receive lines of the Serial ATA receptacle 414 , preferably via 100 Ohm differential traces 422 on the test board 408 .
- the second Serial ATA plug 418 is communicatively coupled to the Serial ATA drive 404 , preferably via a differential Serial ATA cable 420 .
- Receive lines of the second Serial ATA plug 418 are communicatively coupled to the receive lines of the first Serial ATA plug 416
- transmit lines of the second Serial ATA plug 418 are communicatively coupled to transmit lines of the first Serial ATA plug 416 , preferably via 100 Ohm differential traces 422 on the test board 408 .
- a high impedance differential probe 424 communicatively coupled to the oscilloscope 406 and the transmit lines of the Serial ATA receptacle 414 , may be used in conjunction with the oscilloscope 406 to capture data transmitted over the transmit lines of Serial ATA receptacle 414 to create a Serial ATA eye diagram for the first Serial ATA port of the Serial ATA host controller 402 on the oscilloscope 406 when the Serial ATA host controller 402 is powered up.
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Abstract
Description
- This invention relates generally to the field of Serial ATA, and particularly to a method and system for capturing data to create a Serial ATA eye diagram.
- Serial ATA (Advanced Technology Attachment) is an evolutionary replacement for the Parallel ATA physical storage interface. Serial ATA is a computer bus primarily designed for transfer of data between a computer processor and hard disk and has at least three advantages over Parallel ATA, namely speed, cable management, and Serial ATA's ability of being hot swappable.
- To determine the performance of a Serial ATA host controller, the first type of analysis an engineer often performs is to look at an eye diagram. The eye diagram test is used to check the signal quality of a serial stream of data and to check whether the signal transmission meets the specifications for the Serial ATA host controller. During an eye diagram test, data sent through the Serial ATA host controller is captured over a period of time and displayed in a bit over bit fashion on the screen of an oscilloscope. Standard test masks are defined on the screen and typically have an “eye” in the center in addition to regions at the top and bottom which test for overshoot/undershoot. A signal which intrudes into the mask violates the standard.
- An eye diagram test conventionally requires a pattern generator which may be very expensive. Thus, it would be desirable to provide a method and system for capturing data to create a Serial ATA eye diagram without using a pattern generator.
- Accordingly, the present invention is directed to a method and system for capturing data to create a Serial ATA eye diagram without using a pattern generator. In a first aspect of the present invention, a method for capturing data to create a Serial ATA eye diagram includes the following steps: (a) powering up a Serial ATA host controller including a first Serial ATA port and a second Serial ATA port, receive lines of the first Serial ATA port being short-circuited to receive lines of the second Serial ATA port, the first Serial ATA port being communicatively coupled to a Serial ATA drive; (b) receiving, by the first Serial ATA port and the second Serial ATA port, an initialization pattern from the Serial ATA drive; (c) transmitting an ALIGN/SYNC pattern over transmit lines of the second Serial ATA port; and (d) capturing data transmitted over the transmit lines of the second Serial ATA port using a high impedance differential probe and an oscilloscope, the transmit lines of the second Serial ATA port being connected to each other via a resistor of 100 ohm for specified termination, and the high impedance differential probe being communicatively coupled to the oscilloscope. The captured data may be used to create a Serial ATA eye diagram for the second Serial ATA port on the oscilloscope.
- In an additional aspect of the present invention, a system for capturing data to create a Serial ATA eye diagram includes the following: (a) means for powering up a Serial ATA host controller including a first Serial ATA port and a second Serial ATA port, receive lines of the first Serial ATA port being short-circuited to receive lines of the second Serial ATA port, the first Serial ATA port being communicatively coupled to a Serial ATA drive; (b) means for receiving, by the first Serial ATA port and the second Serial ATA port, an initialization pattern from the Serial ATA drive; (c) means for transmitting an ALIGN/SYNC pattern over transmit lines of the second Serial ATA port; and (d) a high impedance differential probe and an oscilloscope for capturing data transmitted over the transmit lines of the second Serial ATA port, the transmit lines of the second Serial ATA port being connected to each other via a resistor, and the high impedance differential probe being communicatively coupled to the oscilloscope, wherein the captured data is used to create a Serial ATA eye diagram for the second Serial ATA port on the oscilloscope.
- In another aspect of the present invention, a system for capturing data to create a Serial ATA eye diagram includes the following: (a) a Serial ATA host controller including a first Serial ATA port and a second Serial ATA port, receive lines of the first Serial ATA port being short-circuited to receive lines of the second Serial ATA port; (b) a Serial ATA drive, communicatively coupled to the first Serial ATA port, for transmitting an initialization pattern to the first Serial ATA port and the second Serial ATA port when the Serial ATA host controller is powered up; (c) a resistor for connecting transmit lines of the second Serial ATA port; and (d) a high impedance differential probe and an oscilloscope for capturing data transmitted over the transmit lines of the second Serial ATA port, the high impedance differential probe being communicatively coupled to the oscilloscope and the transmit lines of the second Serial ATA port, wherein the captured data is used to create a Serial ATA eye diagram for the second Serial ATA port on the oscilloscope.
- In a further aspect of the present invention, a test board for testing a Serial ATA port includes the following: (a) a Serial ATA receptacle for being communicatively coupled to a first Serial ATA port of a Serial ATA host controller, transmit lines of the Serial ATA receptacle being connected to each other via a resistor; (b) a first Serial ATA plug for being communicatively coupled to a second Serial ATA port of the Serial ATA host controller, receive lines of the first Serial ATA plug being communicatively coupled to receive lines of the Serial ATA receptacle; (c) a second Serial ATA plug for being communicatively coupled to a Serial ATA drive, receive lines of the second Serial ATA plug being communicatively coupled to the receive lines of the first Serial ATA plug, and transmit lines of the second Serial ATA plug being communicatively coupled to transmit lines of the first Serial ATA plug, wherein a high impedance differential probe and an oscilloscope capture data transmitted over the transmit lines of Serial ATA receptacle to create a Serial ATA eye diagram for the first Serial ATA port on the oscilloscope when the Serial ATA host controller is powered up, the high impedance differential probe being communicatively coupled to the oscilloscope and the transmit lines of the Serial ATA receptacle.
- In still a further aspect of the present invention, a system for testing a Serial ATA port of a Serial ATA host controller includes the following: (a) a Serial ATA drive; (b) a Serial ATA receptacle for being communicatively coupled to a first Serial ATA port of a Serial ATA host controller, transmit lines of the Serial ATA receptacle being connected to each other via a resistor; (c) a first Serial ATA plug for being communicatively coupled to a second Serial ATA port of the Serial ATA host controller, receive lines of the first Serial ATA plug being communicatively coupled to receive lines of the Serial ATA receptacle; (d) a second Serial ATA plug communicatively coupled to the Serial ATA drive, receive lines of the second Serial ATA plug being communicatively coupled to the receive lines of the first Serial ATA plug, and transmit lines of the second Serial ATA plug being communicatively coupled to transmit lines of the first Serial ATA plug; and (e) an oscilloscope communicatively coupled to the transmit lines of the Serial ATA receptacle via a high impedance differential probe, wherein the high impedance differential probe and the oscilloscope capture data transmitted over the transmit lines of Serial ATA receptacle for creating a Serial ATA eye diagram for the first Serial ATA port on the oscilloscope when the Serial ATA host controller is powered up.
- It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention as claimed. The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate an embodiment of the invention and together with the general description, serve to explain the principles of the invention.
- The numerous advantages of the present invention may be better understood by those skilled in the art by reference to the accompanying figures in which:
-
FIG. 1 is a schematic diagram illustrating a system for creating a Serial ATA eye diagram using a pattern generator; -
FIG. 2 is a schematic diagram illustrating a system for capturing data to create a Serial ATA eye diagram without using a pattern generator in accordance with an exemplary embodiment of the present invention; -
FIG. 3 is a flow chart of a method for capturing data to create a Serial ATA eye diagram in accordance with an exemplary embodiment of the present invention; and -
FIG. 4 is a schematic diagram illustrating a system for capturing data to create a Serial ATA eye diagram, the system including a test board in accordance with another exemplary embodiment of the present invention. - Reference will now be made in detail to the presently preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings.
- Serial ATA is a hard disk control architecture in which data is sent to the drive in a serial fashion. The simplest data pattern that can be used for eye diagram analysis is ALIGN/SYNC data pattern which is sent over the medium when the Serial ATA host controller is connected to a Serial ATA device (e.g., a Serial ATA drive, or the like) and idle. However, since the Serial ATA host controller is connected to both the Serial ATA drive and the oscilloscope, data used for eye diagram cannot be taken from a data line while the data line is connected to the Serial ATA drive. Otherwise, the quality of the data may deteriorate.
- One way to transmit the ALIGN/SYNC pattern by a Serial ATA host controller is to use a pattern generator.
FIG. 1 is a schematic diagram illustrating asystem 100 for creating a Serial ATA eye diagram using a pattern generator. Thesystem 100 includes a Serial ATA board such as a SerialATA host controller 102 under test, apattern generator 104, and anoscilloscope 106. The SerialATA host controller 102 includes a firstSerial ATA connector 108 for a first Serial ATA port and a secondSerial ATA connector 110 for a second Serial ATA port which is under test. Atest board 112 is communicatively coupled to the second Serial ATA port via the secondSerial ATA connector 110 to test the second Serial ATA port. The transmit lines and receive lines of the Serial ATA host controller 102 (thus, the test board 112) are separated. The receive lines are connected to thepattern generator 104 that is programmed to mimic the device initialization patterns via 50Ohm coax cables 114. The transmit lines are connected to the channels of theoscilloscope 106 via 50Ohm coax cables 114. When thepattern generator 104 generates the device initialization pattern, the SerialATA host controller 102 receives the initialization pattern and starts sending the ALIGN/SYNC pattern, which may be captured by theoscilloscope 106 to generate the eye diagram for the second Serial ATA port of the SerialATA host controller 102. However, thepattern generator 104 may be very expensive. Thus, it would be desirable to provide a method and system for capturing data to create a Serial ATA eye diagram without using a pattern generator. - Referring now to
FIG. 2 , a schematic diagram illustrating asystem 200 for capturing data to create a Serial ATA eye diagram without using a pattern generator in accordance with an exemplary embodiment of the present invention is shown. Thesystem 200 includes a Serial ATA board such as a SerialATA host controller 202 under test, aSerial ATA drive 204, and anoscilloscope 206. The SerialATA host controller 202 includes a firstSerial ATA connector 208 for a first Serial ATA port and a secondSerial ATA connector 210 for a second Serial ATA port which is under test. The first Serial port of the SerialATA host controller 202 is communicatively coupled to the Serial ATA drive 204 through the firstSerial ATA connector 208 and preferably via a differentialSerial ATA cable 214. Receive lines of the first Serial ATA port are short-circuited to receive lines of the second Serial ATA port under test via a trace or cable 212 (preferably a 100 Ohm differential Serial ATA cable). Transmit lines of the second Serial ATA port are connected to each other via a resistor 218 (preferably a 100 Ohm termination resistor). The transmit lines of the second Serial ATA port are communicatively coupled to theoscilloscope 206 via a high impedancedifferential probe 216. When the SerialATA host controller 202 is powered up, both the first Serial ATA port and the second Serial ATA port of the SerialATA host controller 202 may receive the initialization pattern from theSerial ATA drive 204. The initialization pattern received by the second Serial ATA port of the SerialATA host controller 202 may mimic the connectivity to theSerial ATA drive 204. This may result in transmission of the ALIGN/SYNC pattern over the transmit lines of the second Serial ATA port of the SerialATA host controller 202. While the ALIGN/SYNC pattern is transmitted, the data or signal may be captured using the high impedancedifferential probe 216 and theoscilloscope 206. The high impedancedifferential probe 216 may have very high input impedance so that the data or signal under test may not be affected by the high impedancedifferential probe 216 too much. The captured data may be used by theoscilloscope 206 to create a Serial ATA eye diagram for the second Serial ATA port of the SerialATA host controller 202 on theoscilloscope 206. -
FIG. 3 is a flow chart of a method orprocess 300 for capturing data to create a Serial ATA eye diagram in accordance with an exemplary embodiment of the present invention. Theprocess 300 may be implemented in thesystem 200 shown inFIG. 2 . Theprocess 300 may start with astep 302, in which a Serial ATA host controller including a first and a second Serial ATA ports is powered up, where receive lines of the first Serial ATA port are short-circuited to receive lines of the second Serial ATA port. The second Serial ATA port is under test. The first and second Serial ATA ports receive an initialization pattern from a Serial ATA drive communicatively coupled to the firstSerial ATA port 304. An ALIGN/SYNC pattern is transmitted over transmit lines of the secondSerial ATA port 306. Data transmitted over the transmit lines of the second Serial ATA port is captured using a high impedance differential probe and an oscilloscope communicatively coupled to the high impedance differential probe, where the transmit lines of the second Serial ATA port are connected to each other via aresistor 308. The captured data is used by the oscilloscope to create a Serial ATA eye diagram for the second Serial ATA port on theoscilloscope 310. -
FIG. 4 is a schematic diagram illustrating asystem 400 for capturing data to create a Serial ATA eye diagram in accordance with another exemplary embodiment of the present invention, where atest board 408 is used. Thesystem 400 includes a Serial ATA board such as a SerialATA host controller 402 under test, a Serial ATA drive 404, anoscilloscope 406, and thetest board 408. The SerialATA host controller 402 includes a firstSerial ATA connector 410 for a first Serial ATA port (which is a channel under test), and a secondSerial ATA connector 412 for a second Serial ATA port (which is an “Exciter” channel). Thetest board 408 includes aSerial ATA receptacle 414, a firstSerial ATA plug 416, and a secondSerial ATA plug 418. TheSerial ATA receptacle 414 is communicatively coupled to the first Serial ATA port of the SerialATA host controller 402 via the firstSerial ATA connector 410. Transmit lines of theSerial ATA receptacle 414 are connected to each other via a resistor, preferably via a 100 Ohm resistor. The first Serial ATA plug 416 is communicatively coupled to the second Serial ATA port of the SerialATA host controller 402, preferably via a differentialSerial ATA cable 420. Receive lines of the first Serial ATA plug 416 are communicatively coupled to receive lines of theSerial ATA receptacle 414, preferably via 100 Ohm differential traces 422 on thetest board 408. The second Serial ATA plug 418 is communicatively coupled to the Serial ATA drive 404, preferably via a differentialSerial ATA cable 420. Receive lines of the second Serial ATA plug 418 are communicatively coupled to the receive lines of the firstSerial ATA plug 416, and transmit lines of the second Serial ATA plug 418 are communicatively coupled to transmit lines of the firstSerial ATA plug 416, preferably via 100 Ohm differential traces 422 on thetest board 408. A high impedancedifferential probe 424, communicatively coupled to theoscilloscope 406 and the transmit lines of theSerial ATA receptacle 414, may be used in conjunction with theoscilloscope 406 to capture data transmitted over the transmit lines ofSerial ATA receptacle 414 to create a Serial ATA eye diagram for the first Serial ATA port of the SerialATA host controller 402 on theoscilloscope 406 when the SerialATA host controller 402 is powered up. - Those of ordinary skill in the art will understand that the present invention may be used to generate eye diagrams for other devices without departing from the scope and spirit of the present invention.
- It is understood that the specific order or hierarchy of steps in the processes disclosed is an example of exemplary approaches. Based upon design preferences, it is understood that the specific order or hierarchy of steps in the processes may be rearranged while remaining within the scope of the present invention. The accompanying method claims present elements of the various steps in a sample order, and are not meant to be limited to the specific order or hierarchy presented.
- It is believed that the present invention and many of its attendant advantages will be understood by the foregoing description. It is also believed that it will be apparent that various changes may be made in the form, construction and arrangement of the components thereof without departing from the scope and spirit of the invention or without sacrificing all of its material advantages. The form herein before described being merely an explanatory embodiment thereof, it is the intention of the following claims to encompass and include such changes.
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Cited By (3)
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US20070103204A1 (en) * | 2005-11-10 | 2007-05-10 | X-Emi, Inc. | Method and apparatus for conversion between quasi differential signaling and true differential signaling |
US20080113525A1 (en) * | 2006-11-15 | 2008-05-15 | Sandisk Il Ltd. | Compact solid state drive and processor assembly |
CN113709443A (en) * | 2020-07-21 | 2021-11-26 | 深圳Tcl新技术有限公司 | Impedance adaptation method, impedance adaptation device, storage medium and computer equipment |
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DE102009019039A1 (en) | 2009-04-27 | 2010-11-11 | Rohde & Schwarz Gmbh & Co. Kg | Measuring device and measuring method for measuring differential signals |
US8451883B1 (en) | 2009-12-03 | 2013-05-28 | Altera Corporation | On-chip full eye viewer architecture |
US8744012B1 (en) | 2012-02-08 | 2014-06-03 | Altera Corporation | On-chip eye viewer architecture for highspeed transceivers |
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US6909980B2 (en) * | 2003-03-13 | 2005-06-21 | Agilent Technologies, Inc. | Auto skew alignment of high-speed differential eye diagrams |
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US6909980B2 (en) * | 2003-03-13 | 2005-06-21 | Agilent Technologies, Inc. | Auto skew alignment of high-speed differential eye diagrams |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
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US20070103204A1 (en) * | 2005-11-10 | 2007-05-10 | X-Emi, Inc. | Method and apparatus for conversion between quasi differential signaling and true differential signaling |
US20080113525A1 (en) * | 2006-11-15 | 2008-05-15 | Sandisk Il Ltd. | Compact solid state drive and processor assembly |
CN113709443A (en) * | 2020-07-21 | 2021-11-26 | 深圳Tcl新技术有限公司 | Impedance adaptation method, impedance adaptation device, storage medium and computer equipment |
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