US20050189229A1 - Method and apparatus for electroplating a semiconductor wafer - Google Patents
Method and apparatus for electroplating a semiconductor wafer Download PDFInfo
- Publication number
- US20050189229A1 US20050189229A1 US11/114,312 US11431205A US2005189229A1 US 20050189229 A1 US20050189229 A1 US 20050189229A1 US 11431205 A US11431205 A US 11431205A US 2005189229 A1 US2005189229 A1 US 2005189229A1
- Authority
- US
- United States
- Prior art keywords
- wafer
- anode
- conductive elements
- center
- electroplating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 238000009713 electroplating Methods 0.000 title claims description 17
- 238000000034 method Methods 0.000 title abstract description 13
- 239000004065 semiconductor Substances 0.000 title description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 28
- 229910052802 copper Inorganic materials 0.000 claims abstract description 28
- 239000010949 copper Substances 0.000 claims abstract description 28
- 239000012530 fluid Substances 0.000 claims description 2
- 230000004888 barrier function Effects 0.000 abstract description 11
- 238000007747 plating Methods 0.000 abstract description 10
- 229910052751 metal Inorganic materials 0.000 abstract description 4
- 239000002184 metal Substances 0.000 abstract description 4
- 150000002739 metals Chemical class 0.000 abstract description 2
- 235000012431 wafers Nutrition 0.000 description 42
- 239000010410 layer Substances 0.000 description 35
- 238000005498 polishing Methods 0.000 description 5
- 239000004809 Teflon Substances 0.000 description 3
- 229920006362 Teflon® Polymers 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000000151 deposition Methods 0.000 description 2
- -1 Cu+2 ions Chemical class 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000006722 reduction reaction Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D17/00—Constructional parts, or assemblies thereof, of cells for electrolytic coating
- C25D17/10—Electrodes, e.g. composition, counter electrode
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D17/00—Constructional parts, or assemblies thereof, of cells for electrolytic coating
- C25D17/001—Apparatus specially adapted for electrolytic coating of wafers, e.g. semiconductors or solar cells
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D17/00—Constructional parts, or assemblies thereof, of cells for electrolytic coating
- C25D17/10—Electrodes, e.g. composition, counter electrode
- C25D17/12—Shape or form
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
- C25D7/12—Semiconductors
- C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
- H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
Definitions
- This invention relates to the field of electroplating metals onto a semiconductor wafer.
- metal layers are often formed on semiconductor wafers as part of a process for forming conductive lines. More recently, the electroplating of copper is used in a damascene process because of the high conductivity of copper when compared, for instance, to aluminum.
- a copper electrode (an anode) 10 is disposed above a surface 14 of a semiconductor wafer 13 .
- a second electrode 12 is clamped about the outer edge of the wafer 13 and provides a conductive path to the first electrode through a barrier layer or seed layer formed on surface 14 .
- a potential 16 is applied between the electrodes 10 and 12 , current flows between the electrodes. When this occurs, copper moves from the plating solution to the surface 14 , thereby plating the surface 14 with copper.
- the deposition rate of copper in a given area on the surface 14 is directly related to the current density, that is, the more current the more copper is deposited.
- the seed layer or barrier layer on the surface 14 has a relatively high resistivity.
- the current path between electrode 10 to electrode 12 follows paths of different resistance depending upon where on the wafer surface the current enters the barrier or seed layer as it moves toward the electrode 12 .
- the path for example, that includes the center of the wafer has more resistance because the current must travel the full radius of the wafer.
- the path nearer the electrode 12 and electrode 10 has a relatively short path, and consequently, encounters a lower resistance. For this reason, the current flow between the anode and the wafer surface 14 is not uniform across the surface of the wafer. Less current flows in the center of the wafer and more current flows toward the periphery of the wafer per unit area. This causes the thickness of the copper layer to be thicker near electrode 12 and thinner in the center of the wafer.
- the generally concave shaped copper layer formed on the wafer 13 is made uniform by polishing the layer using, for instance, chemical-mechanical polishing (CMP).
- CMP chemical-mechanical polishing
- FIG. 1 is a schematic of a prior art electroplating apparatus.
- FIG. 2 is a schematic of an electroplating apparatus in accordance with one embodiment of the present invention.
- FIG. 2A is a plan view of a segment of the anode of FIG. 2 .
- FIG. 2B is a plan view of a segment of an alternate embodiment of an anode.
- FIG. 3 is a schematic of another embodiment of an electroplating apparatus.
- FIG. 4 is a schematic of yet another embodiment of an electroplating apparatus in accordance with the present invention.
- Electroplating methods, apparatuses, and anodes, particularly for use in forming a metal layer on a semiconductor wafer are described.
- the methods, apparatuses, and anodes are described for the formation of a copper layer in a damascene process. It will be apparent that the present invention may be used for forming other layers.
- numerous specific details known in the art, such as for the formation of barrier and seed layers in a damascene process, and electroplating chemistry are not set forth in detail in order not to obscure the present invention.
- a relatively uniform current density is achieved between the anode of the electroplating apparatus and the surface of the semiconductor wafer upon which the layer is plated.
- This uniform current provides a layer of relatively uniform thickness.
- less polishing is required to provide a flat surface and to define the inlaid conductors.
- the need for a hard mask may be eliminated in some processes because of the uniform layer. Less polishing is needed which shortens the processing time.
- FIG. 2 a wafer 20 clamped within a first electrode 22 is illustrated.
- the clamp 22 of FIG. 2 may be similar to the clamp 12 , shown in the prior art apparatus of FIG. 1 .
- a layer is formed on the surface 21 of the wafer, such as a copper layer.
- a barrier layer or seed layer is formed on the surface 21 , particularly where a damascene interconnect structure for an integrated circuit is formed.
- the barrier layer is often a tantalum or TaN layer used to prevent the subsequently formed copper from diffusing into the interlayer dielectric (ILD) and into other regions of the integrated circuit.
- a seed layer is formed on the barrier layer, such as by sputtering copper, to increase the conductivity of the barrier layer.
- the barrier layer even with the seed layer, are not particularly conductive. Consequently, as described above, there is a significant voltage drop associated with the current flow between the first electrode 22 and the anode 26 as a function of the distance the current must travel.
- the anode 26 of FIG. 2 comprises a generally disc-like member having a pair of parallel surfaces, one surface of which faces the surface 21 of wafer 20 , as illustrated in FIG. 2 .
- a plurality of rods, such as rod 27 are disposed between the faces of the anode 26 and are generally perpendicular to the surface 21 of the wafer 20 .
- the rods are all of the same diameter for the illustrated embodiment. For copper plating, these rods are fabricated from copper.
- the body of the anode 26 may be formed from an insulative member such as Teflon, with the rods 27 inserted into the Teflon member.
- the density of the rods is greater at the center of the anode 26 than it is at a distance away from the center.
- the rods indicated by the bracket 28 are more densely disposed than those indicated by the bracket 29 . Any number of different densities may be used even though in FIG. 2 , only three different densities are shown.
- the rods are coupled to a source of potential with respect to the clamp/electrode 22 .
- the rods of each density are coupled to a different potential.
- the different potentials provide an additional parameter that can be varied to achieve a uniform current density.
- the rods 28 are coupled to a potential V 3 and the rods 29 are coupled to a potential V 4 .
- V 3 may be a higher potential than V 4 .
- five different potentials are illustrated. Again, any number of different potentials may be used.
- the potentials V 1 and V 5 may be equal to one another, and similarly, the potentials V 2 and V 4 may be equal to one another. These voltages such as V 1 and V 5 are illustrated as being different from one another. Different potentials may be used to balance the currents at different regions of the wafer surface equidistant from the center.
- the anode 26 of FIG. 2 may also be used where all the rods are coupled to the same potential since the different densities of the conducting rods will tend to cause a uniform current density across the surface 21 of wafer 20 .
- the rods may be of uniform density within the anode 26 and the different voltages shown in FIG. 2 may be used to achieve the uniform current density between the anode and the wafer surface 21 .
- the same result can be achieved by varying the diameter of the rods. For instance, a higher “density” of rods can be obtained by increasing the diameter of the rods in one region when compared to other regions of the anode.
- annular, ring-like conductive elements 33 fabricated from, for instance copper, may be used for the anode 30 .
- the elements are separated from one another by annular shaped Teflon members 32 , as an example.
- the annular conductive elements may have a uniform density or may have a greater density towards the center of the electrode similar to the dispersal shown for the rods of FIG. 2 .
- the conductive rings 33 are uniformly spaced. A uniform current density across the surface of the wafer is obtained by using different voltages. The rings closer to the center of the anode 30 receive a higher potential than the potential applied to the rings with a larger diameter.
- a reduction reaction occurs at the wafer and an oxidation reaction occurs at the anode.
- the wafer is negative relative to the anode and the Cu +2 ions in the plating solution, in which the electrode and wafer are submerged, are attracted to the wafer surface.
- the anode 36 has a lenticular shape, more specifically, it has a convex surface facing the surface 35 of the wafer 34 .
- the voltage gradient between the wafer 34 and the anode is greater at the center of the wafer than at distances on the surface 35 spaced apart from the center. This compensates for the fact that there is more resistance between the electrodes at the wafer center.
- the shape of the anode 35 is selected to provide a uniform current density between the surface 35 and the electrode 36 . Again as mentioned, this provides a uniform thickness of a layer plated onto surface 35 .
- a wafer 41 is again held by an electrode/clamp 52 .
- the surface 41 that is to be plated is facing downward for the illustrated embodiment.
- a volume 50 is defined by, for instance, a cylindrical cell 42 having an inlet 52 and an outlet 53 .
- An anode, such as a copper electrode 51 is disposed within the volume 50 .
- a voltage is applied between the anode 51 and the electrode 52 .
- the cylindrical cell 42 is moved relative to the surface 41 such that the outlet 53 can be, in effect, swept over the entire surface 41 of the wafer 40 .
- the cell 42 is filled with a plating solution.
- the outlet 53 is a relatively short distance from the surface 41 . Enough space is provided to allow the plating fluid to escape from a gap between the surface 41 and the outlet 53 , as shown by the arrows.
- the plating solution first flows upward and then escapes through the gap between the cell and the wafer surface 41 . Once the liquid has escaped the cell, it drains downward and away from the surface of the wafer. Consequently, only a fraction of the wafer surface is exposed to the electroplating solution at any given time.
- the entire surface 41 can be electroplated by moving the cell relative to the surface 41 .
- the anode voltage 60 is varied as the electroplating cell is moved. More voltage is applied near the center region than at the region near the electrode 52 . This voltage variation provides a constant current density, and consequently, a constant plating rate. This results in a layer of uniform thickness.
- the voltage 60 may remain constant and the rate at which the cell 40 is moved can be varied.
- the cell can be moved at a slower rate near the center of the wafer than at the periphery of the wafer. This again allows for a layer of uniform thickness since the plating rate at the center will be slower than at the periphery because of the added resistance at the center from the barrier or seed layer.
- a combination of the varied voltages and varied rate of movement can be used.
- the method of the present invention is to provide an anode the results in a uniform layer being formed on a wafer surface.
- this is achieved by having a greater voltage drop between the anode and wafer surface at the peripheral regions of the surface. For instance, this occurs with the anode of the FIG. 3 .
- more sources of current are provided near the center of the wafer than at the periphery, such as shown in FIG. 2 .
- a uniform current density is also achieved in some embodiments by having different voltages applied to different conductive elements in the anode, again to provide a uniform current density between the wafer surface and anode.
- the uniform layer thickness is obtained by moving an anode and either changing the rate of movement and/or the voltage applied to the anode as it is moved.
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Life Sciences & Earth Sciences (AREA)
- Sustainable Development (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Electroplating Methods And Accessories (AREA)
Abstract
A method, apparatus and anode for plating copper or other metals onto a barrier or seed layer of a wafer surface is described. A copper layer of uniform thickness is plated on the surface by, for instance, maintaining a constant current density between the anode and wafer surface. Several configurations of anodes are described for obtaining the constant current density.
Description
- This invention relates to the field of electroplating metals onto a semiconductor wafer.
- In the fabrication of integrated circuits, metal layers are often formed on semiconductor wafers as part of a process for forming conductive lines. More recently, the electroplating of copper is used in a damascene process because of the high conductivity of copper when compared, for instance, to aluminum.
- As shown in
FIG. 1 , in the process for electroplating copper, a copper electrode (an anode) 10 is disposed above asurface 14 of asemiconductor wafer 13. Asecond electrode 12 is clamped about the outer edge of thewafer 13 and provides a conductive path to the first electrode through a barrier layer or seed layer formed onsurface 14. When a potential 16 is applied between theelectrodes surface 14, thereby plating thesurface 14 with copper. - The deposition rate of copper in a given area on the
surface 14 is directly related to the current density, that is, the more current the more copper is deposited. The seed layer or barrier layer on thesurface 14 has a relatively high resistivity. As a result, the current path betweenelectrode 10 toelectrode 12 follows paths of different resistance depending upon where on the wafer surface the current enters the barrier or seed layer as it moves toward theelectrode 12. The path, for example, that includes the center of the wafer has more resistance because the current must travel the full radius of the wafer. In contrast, the path nearer theelectrode 12 andelectrode 10 has a relatively short path, and consequently, encounters a lower resistance. For this reason, the current flow between the anode and thewafer surface 14 is not uniform across the surface of the wafer. Less current flows in the center of the wafer and more current flows toward the periphery of the wafer per unit area. This causes the thickness of the copper layer to be thicker nearelectrode 12 and thinner in the center of the wafer. - The generally concave shaped copper layer formed on the
wafer 13 is made uniform by polishing the layer using, for instance, chemical-mechanical polishing (CMP). There are numerous disadvantages with depositing a non-uniform layer and polishing it, some of these disadvantages are discussed later. -
FIG. 1 is a schematic of a prior art electroplating apparatus. -
FIG. 2 is a schematic of an electroplating apparatus in accordance with one embodiment of the present invention. -
FIG. 2A is a plan view of a segment of the anode ofFIG. 2 . -
FIG. 2B is a plan view of a segment of an alternate embodiment of an anode. -
FIG. 3 is a schematic of another embodiment of an electroplating apparatus. -
FIG. 4 is a schematic of yet another embodiment of an electroplating apparatus in accordance with the present invention. - Electroplating methods, apparatuses, and anodes, particularly for use in forming a metal layer on a semiconductor wafer are described. The methods, apparatuses, and anodes are described for the formation of a copper layer in a damascene process. It will be apparent that the present invention may be used for forming other layers. Moreover, in the following description, numerous specific details known in the art, such as for the formation of barrier and seed layers in a damascene process, and electroplating chemistry are not set forth in detail in order not to obscure the present invention.
- With some of the methods, apparatuses, and anodes described below, a relatively uniform current density is achieved between the anode of the electroplating apparatus and the surface of the semiconductor wafer upon which the layer is plated. Several anode configurations are discussed below for providing this uniform current density. This uniform current provides a layer of relatively uniform thickness. Thus, for instance, in the formation of a copper layer in a damascene process, less polishing is required to provide a flat surface and to define the inlaid conductors. This more readily allows the use of mechanically weaker, lower k dielectrics. The need for a hard mask may be eliminated in some processes because of the uniform layer. Less polishing is needed which shortens the processing time. Other advantages will be apparent to one skilled in the art.
- Referring first to
FIG. 2 , awafer 20 clamped within afirst electrode 22 is illustrated. Theclamp 22 ofFIG. 2 may be similar to theclamp 12, shown in the prior art apparatus ofFIG. 1 . A layer is formed on thesurface 21 of the wafer, such as a copper layer. - While not specifically shown in
FIG. 2 , prior to placing thewafer 20 in theelectrode 22, a barrier layer or seed layer is formed on thesurface 21, particularly where a damascene interconnect structure for an integrated circuit is formed. The barrier layer is often a tantalum or TaN layer used to prevent the subsequently formed copper from diffusing into the interlayer dielectric (ILD) and into other regions of the integrated circuit. In some instances, a seed layer is formed on the barrier layer, such as by sputtering copper, to increase the conductivity of the barrier layer. - The barrier layer, even with the seed layer, are not particularly conductive. Consequently, as described above, there is a significant voltage drop associated with the current flow between the
first electrode 22 and theanode 26 as a function of the distance the current must travel. - The
anode 26 ofFIG. 2 comprises a generally disc-like member having a pair of parallel surfaces, one surface of which faces thesurface 21 ofwafer 20, as illustrated inFIG. 2 . A plurality of rods, such asrod 27, are disposed between the faces of theanode 26 and are generally perpendicular to thesurface 21 of thewafer 20. The rods are all of the same diameter for the illustrated embodiment. For copper plating, these rods are fabricated from copper. The body of theanode 26 may be formed from an insulative member such as Teflon, with therods 27 inserted into the Teflon member. - In one embodiment, the density of the rods is greater at the center of the
anode 26 than it is at a distance away from the center. For instance, as shown inFIGS. 2 and 2 A, the rods indicated by thebracket 28 are more densely disposed than those indicated by thebracket 29. Any number of different densities may be used even though inFIG. 2 , only three different densities are shown. - The rods are coupled to a source of potential with respect to the clamp/
electrode 22. InFIG. 2 , the rods of each density are coupled to a different potential. The different potentials provide an additional parameter that can be varied to achieve a uniform current density. For instance, therods 28 are coupled to a potential V3 and therods 29 are coupled to a potential V4. To provide a more uniform current flow, V3 may be a higher potential than V4. InFIG. 2 , five different potentials are illustrated. Again, any number of different potentials may be used. Moreover, the potentials V1 and V5 may be equal to one another, and similarly, the potentials V2 and V4 may be equal to one another. These voltages such as V1 and V5 are illustrated as being different from one another. Different potentials may be used to balance the currents at different regions of the wafer surface equidistant from the center. - The
anode 26 ofFIG. 2 may also be used where all the rods are coupled to the same potential since the different densities of the conducting rods will tend to cause a uniform current density across thesurface 21 ofwafer 20. - In another embodiment, the rods may be of uniform density within the
anode 26 and the different voltages shown inFIG. 2 may be used to achieve the uniform current density between the anode and thewafer surface 21. The same result can be achieved by varying the diameter of the rods. For instance, a higher “density” of rods can be obtained by increasing the diameter of the rods in one region when compared to other regions of the anode. - In yet another embodiment shown in
FIG. 2B , rather than rods, annular, ring-likeconductive elements 33 fabricated from, for instance copper, may be used for theanode 30. The elements are separated from one another by annular shapedTeflon members 32, as an example. The annular conductive elements may have a uniform density or may have a greater density towards the center of the electrode similar to the dispersal shown for the rods ofFIG. 2 . For the embodiment ofFIG. 2B , the conductive rings 33 are uniformly spaced. A uniform current density across the surface of the wafer is obtained by using different voltages. The rings closer to the center of theanode 30 receive a higher potential than the potential applied to the rings with a larger diameter. - For all the embodiments, including the prior art, a reduction reaction occurs at the wafer and an oxidation reaction occurs at the anode. The wafer is negative relative to the anode and the Cu+2 ions in the plating solution, in which the electrode and wafer are submerged, are attracted to the wafer surface.
- In the embodiment of
FIG. 3 , theanode 36 has a lenticular shape, more specifically, it has a convex surface facing thesurface 35 of thewafer 34. When a potential is applied between the clampingelectrode 38 and the copper electrode/anode 36, the voltage gradient between thewafer 34 and the anode is greater at the center of the wafer than at distances on thesurface 35 spaced apart from the center. This compensates for the fact that there is more resistance between the electrodes at the wafer center. The shape of theanode 35 is selected to provide a uniform current density between thesurface 35 and theelectrode 36. Again as mentioned, this provides a uniform thickness of a layer plated ontosurface 35. - In the embodiment of
FIG. 4 , awafer 41 is again held by an electrode/clamp 52. This time, however, thesurface 41 that is to be plated is facing downward for the illustrated embodiment. Avolume 50 is defined by, for instance, acylindrical cell 42 having aninlet 52 and anoutlet 53. An anode, such as acopper electrode 51, is disposed within thevolume 50. A voltage is applied between theanode 51 and theelectrode 52. Thecylindrical cell 42 is moved relative to thesurface 41 such that theoutlet 53 can be, in effect, swept over theentire surface 41 of thewafer 40. - The
cell 42 is filled with a plating solution. In practice, while not illustrated, theoutlet 53 is a relatively short distance from thesurface 41. Enough space is provided to allow the plating fluid to escape from a gap between thesurface 41 and theoutlet 53, as shown by the arrows. The plating solution first flows upward and then escapes through the gap between the cell and thewafer surface 41. Once the liquid has escaped the cell, it drains downward and away from the surface of the wafer. Consequently, only a fraction of the wafer surface is exposed to the electroplating solution at any given time. - The
entire surface 41 can be electroplated by moving the cell relative to thesurface 41. Theanode voltage 60 is varied as the electroplating cell is moved. More voltage is applied near the center region than at the region near theelectrode 52. This voltage variation provides a constant current density, and consequently, a constant plating rate. This results in a layer of uniform thickness. - Alternatively, the
voltage 60 may remain constant and the rate at which thecell 40 is moved can be varied. For instance, the cell can be moved at a slower rate near the center of the wafer than at the periphery of the wafer. This again allows for a layer of uniform thickness since the plating rate at the center will be slower than at the periphery because of the added resistance at the center from the barrier or seed layer. A combination of the varied voltages and varied rate of movement can be used. - Thus, the method of the present invention is to provide an anode the results in a uniform layer being formed on a wafer surface. In some cases, as shown above, this is achieved by having a greater voltage drop between the anode and wafer surface at the peripheral regions of the surface. For instance, this occurs with the anode of the
FIG. 3 . In other instances, more sources of current are provided near the center of the wafer than at the periphery, such as shown inFIG. 2 . A uniform current density is also achieved in some embodiments by having different voltages applied to different conductive elements in the anode, again to provide a uniform current density between the wafer surface and anode. In the embodiment ofFIG. 4 , the uniform layer thickness is obtained by moving an anode and either changing the rate of movement and/or the voltage applied to the anode as it is moved.
Claims (16)
1-9. (canceled)
10. An apparatus for electroplating a wafer comprising:
a conductive clamp for engaging the periphery of a wafer; and
an anode disposed above the wafer, comprising a plurality of conductive elements disposed in an insulative member, the conductive elements being coupled to at least one source of potential.
11. The apparatus of claim 10 , wherein the conductive elements comprise a plurality of rods having a uniform density in the insulative member.
12. The apparatus of claim 10 , wherein the conductive elements comprise a plurality of rods having a higher density in a center of the anode when compared to a distance away from the center of the anode.
13. The apparatus of claim 10 , wherein the conductive elements include a plurality of concentric, annular members.
14. The apparatus of claim 10 , wherein a plurality of voltages are applied to the conductive elements with a higher voltage being applied to conductive elements disposed at a center of the anode, when compared to conductive elements disposed at a distance away from the center of the anode.
15. The apparatus of claim 10 , wherein the conductive elements comprise copper.
16. The apparatus of claim 11 , wherein the conductive elements comprise copper.
17. The apparatus of claim 12 , wherein the conductive elements comprise copper.
18. The apparatus of claim 13 , wherein the conductive elements comprise copper.
19. The apparatus of claim 14 , wherein the conductive elements comprise copper.
20. An apparatus for electroplating a wafer comprising:
a conductive clamp disposed about the periphery of the electrode,
a lenticular shaped anode disposed above a surface of the wafer such that the anode is closer to the wafer at a center of the wafer when compared to the periphery of the wafer.
21. The apparatus of claim 20 , wherein the anode is copper.
22. An apparatus for electroplating a wafer comprising:
an electrode disposed about the periphery of the wafer;
a cell having an inlet and an outlet facing a surface of the wafer, the cell carrying an electroplating fluid and being movable such that the outlet of the cell, sweeps over substantially the entire surface of the wafer;
an anode disposed within the cell; and
a source of potential applied between the electrode and the anode.
23. The apparatus of claim 22 , wherein the source of potential is varied as the cell moves.
24. The apparatus of claim 23 , wherein the rate at which the cell moves is varied.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/114,312 US20050189229A1 (en) | 2002-11-27 | 2005-04-25 | Method and apparatus for electroplating a semiconductor wafer |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/306,641 US20040099534A1 (en) | 2002-11-27 | 2002-11-27 | Method and apparatus for electroplating a semiconductor wafer |
US11/114,312 US20050189229A1 (en) | 2002-11-27 | 2005-04-25 | Method and apparatus for electroplating a semiconductor wafer |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/306,641 Division US20040099534A1 (en) | 2002-11-27 | 2002-11-27 | Method and apparatus for electroplating a semiconductor wafer |
Publications (1)
Publication Number | Publication Date |
---|---|
US20050189229A1 true US20050189229A1 (en) | 2005-09-01 |
Family
ID=32325746
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/306,641 Abandoned US20040099534A1 (en) | 2002-11-27 | 2002-11-27 | Method and apparatus for electroplating a semiconductor wafer |
US11/114,312 Abandoned US20050189229A1 (en) | 2002-11-27 | 2005-04-25 | Method and apparatus for electroplating a semiconductor wafer |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/306,641 Abandoned US20040099534A1 (en) | 2002-11-27 | 2002-11-27 | Method and apparatus for electroplating a semiconductor wafer |
Country Status (1)
Country | Link |
---|---|
US (2) | US20040099534A1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI414640B (en) * | 2010-09-06 | 2013-11-11 | Grand Plastic Technology Co Ltd | Wafer clamping apparatus with vertical haning arm for plating |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2049710A4 (en) * | 2005-11-18 | 2012-07-04 | Replisaurus Group Sas | Master electrode and method of forming it |
US7655126B2 (en) * | 2006-03-27 | 2010-02-02 | Federal Mogul World Wide, Inc. | Fabrication of topical stopper on MLS gasket by active matrix electrochemical deposition |
CN102383174B (en) * | 2010-09-01 | 2014-09-24 | 中芯国际集成电路制造(上海)有限公司 | Electroplating anode |
WO2012174732A1 (en) * | 2011-06-24 | 2012-12-27 | Acm Research (Shanghai) Inc. | Methods and apparatus for uniformly metallization on substrates |
CN107034506B (en) * | 2017-03-31 | 2019-01-01 | 北京半导体专用设备研究所(中国电子科技集团公司第四十五研究所) | Wafer electroplating device and electroplating method |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4269690A (en) * | 1980-01-28 | 1981-05-26 | Nancy Swartz Hammond | Electrolytic apparatus for reclaiming dissolved metal from liquid |
US5443707A (en) * | 1992-07-10 | 1995-08-22 | Nec Corporation | Apparatus for electroplating the main surface of a substrate |
US6071388A (en) * | 1998-05-29 | 2000-06-06 | International Business Machines Corporation | Electroplating workpiece fixture having liquid gap spacer |
US6143155A (en) * | 1998-06-11 | 2000-11-07 | Speedfam Ipec Corp. | Method for simultaneous non-contact electrochemical plating and planarizing of semiconductor wafers using a bipiolar electrode assembly |
US6296753B1 (en) * | 1999-07-07 | 2001-10-02 | Technic Inc. | Apparatus and method for plating wafers, substrates and other articles |
US6402923B1 (en) * | 2000-03-27 | 2002-06-11 | Novellus Systems Inc | Method and apparatus for uniform electroplating of integrated circuits using a variable field shaping element |
US6500325B2 (en) * | 1997-04-28 | 2002-12-31 | Mitsubishi Denki Kabushiki Kaisha | Method of plating semiconductor wafer and plated semiconductor wafer |
US7147760B2 (en) * | 1998-07-10 | 2006-12-12 | Semitool, Inc. | Electroplating apparatus with segmented anode array |
US7160421B2 (en) * | 1999-04-13 | 2007-01-09 | Semitool, Inc. | Turning electrodes used in a reactor for electrochemically processing a microelectronic workpiece |
-
2002
- 2002-11-27 US US10/306,641 patent/US20040099534A1/en not_active Abandoned
-
2005
- 2005-04-25 US US11/114,312 patent/US20050189229A1/en not_active Abandoned
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4269690A (en) * | 1980-01-28 | 1981-05-26 | Nancy Swartz Hammond | Electrolytic apparatus for reclaiming dissolved metal from liquid |
US5443707A (en) * | 1992-07-10 | 1995-08-22 | Nec Corporation | Apparatus for electroplating the main surface of a substrate |
US6500325B2 (en) * | 1997-04-28 | 2002-12-31 | Mitsubishi Denki Kabushiki Kaisha | Method of plating semiconductor wafer and plated semiconductor wafer |
US6071388A (en) * | 1998-05-29 | 2000-06-06 | International Business Machines Corporation | Electroplating workpiece fixture having liquid gap spacer |
US6143155A (en) * | 1998-06-11 | 2000-11-07 | Speedfam Ipec Corp. | Method for simultaneous non-contact electrochemical plating and planarizing of semiconductor wafers using a bipiolar electrode assembly |
US7147760B2 (en) * | 1998-07-10 | 2006-12-12 | Semitool, Inc. | Electroplating apparatus with segmented anode array |
US7160421B2 (en) * | 1999-04-13 | 2007-01-09 | Semitool, Inc. | Turning electrodes used in a reactor for electrochemically processing a microelectronic workpiece |
US6296753B1 (en) * | 1999-07-07 | 2001-10-02 | Technic Inc. | Apparatus and method for plating wafers, substrates and other articles |
US6402923B1 (en) * | 2000-03-27 | 2002-06-11 | Novellus Systems Inc | Method and apparatus for uniform electroplating of integrated circuits using a variable field shaping element |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI414640B (en) * | 2010-09-06 | 2013-11-11 | Grand Plastic Technology Co Ltd | Wafer clamping apparatus with vertical haning arm for plating |
Also Published As
Publication number | Publication date |
---|---|
US20040099534A1 (en) | 2004-05-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6132587A (en) | Uniform electroplating of wafers | |
US6103085A (en) | Electroplating uniformity by diffuser design | |
US6500324B1 (en) | Process for depositing a layer of material on a substrate | |
US7854828B2 (en) | Method and apparatus for electroplating including remotely positioned second cathode | |
US7622024B1 (en) | High resistance ionic current source | |
US6802946B2 (en) | Apparatus for controlling thickness uniformity of electroplated and electroetched layers | |
US6610190B2 (en) | Method and apparatus for electrodeposition of uniform film with minimal edge exclusion on substrate | |
KR102018915B1 (en) | Method and apparatus for filling interconnect structures | |
US20050145499A1 (en) | Plating of a thin metal seed layer | |
US20010035354A1 (en) | Method of and apparatus for making electrical contact to wafer surface for full-face electroplating or electropolishing | |
US20030209425A1 (en) | Device providing electrical contact to the surface of a semiconductor workpiece during processing | |
EP1010780A2 (en) | Cathode contact ring for electrochemical deposition | |
US8623193B1 (en) | Method of electroplating using a high resistance ionic current source | |
CN101265606A (en) | Apparatuses for electrochemical deposition, and method for forming conductive layer | |
US20050189229A1 (en) | Method and apparatus for electroplating a semiconductor wafer | |
JP2005501963A5 (en) | ||
WO2012158966A2 (en) | Electrochemical processor | |
JP3255145B2 (en) | Plating equipment | |
US20050034994A1 (en) | Method and apparatus for full surface electrotreating of a wafer | |
US20180119302A1 (en) | Electroplating apparatus and electroplating method | |
KR20010051787A (en) | Plating analysis method | |
US6344126B1 (en) | Electroplating apparatus and method | |
KR20070027753A (en) | Electrochemical plating cell with an auxiliary electrode in an isolated anolyte compartment | |
KR100755661B1 (en) | Electroplating apparatus and electroplating method using the same | |
US20050173241A1 (en) | Apparatus having plating solution container with current applying anodes |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |