US20050056615A1 - Selective plasma etching process for aluminum oxide patterning - Google Patents
Selective plasma etching process for aluminum oxide patterning Download PDFInfo
- Publication number
- US20050056615A1 US20050056615A1 US10/911,294 US91129404A US2005056615A1 US 20050056615 A1 US20050056615 A1 US 20050056615A1 US 91129404 A US91129404 A US 91129404A US 2005056615 A1 US2005056615 A1 US 2005056615A1
- Authority
- US
- United States
- Prior art keywords
- aluminum oxide
- etching
- silicon
- approximately
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 238000000034 method Methods 0.000 title claims abstract description 70
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 title claims abstract description 61
- 238000001020 plasma etching Methods 0.000 title claims abstract description 7
- 230000008569 process Effects 0.000 title claims description 22
- 238000000059 patterning Methods 0.000 title claims description 13
- 238000005530 etching Methods 0.000 claims abstract description 66
- 239000000470 constituent Substances 0.000 claims abstract description 19
- 239000000203 mixture Substances 0.000 claims abstract description 14
- 239000007789 gas Substances 0.000 claims abstract description 12
- 150000001875 compounds Chemical class 0.000 claims abstract description 8
- 230000000379 polymerizing effect Effects 0.000 claims abstract description 7
- 239000012159 carrier gas Substances 0.000 claims abstract description 6
- 150000002430 hydrocarbons Chemical class 0.000 claims abstract description 5
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 4
- 239000001301 oxygen Substances 0.000 claims abstract description 4
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 24
- 229910052710 silicon Inorganic materials 0.000 claims description 21
- 239000010703 silicon Substances 0.000 claims description 21
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 20
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 14
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 14
- RWRIWBAIICGTTQ-UHFFFAOYSA-N difluoromethane Chemical compound FCF RWRIWBAIICGTTQ-UHFFFAOYSA-N 0.000 claims description 8
- 238000004519 manufacturing process Methods 0.000 claims description 8
- 230000015654 memory Effects 0.000 claims description 7
- 239000004065 semiconductor Substances 0.000 claims description 7
- 239000000758 substrate Substances 0.000 claims description 7
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 6
- 230000004888 barrier function Effects 0.000 claims description 6
- 229910052786 argon Inorganic materials 0.000 claims description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 19
- 229910052593 corundum Inorganic materials 0.000 description 19
- 229910001845 yogo sapphire Inorganic materials 0.000 description 19
- 239000000463 material Substances 0.000 description 11
- 239000005380 borophosphosilicate glass Substances 0.000 description 5
- 238000001459 lithography Methods 0.000 description 5
- 239000000377 silicon dioxide Substances 0.000 description 5
- 229910052681 coesite Inorganic materials 0.000 description 4
- 229910052906 cristobalite Inorganic materials 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 210000002381 plasma Anatomy 0.000 description 4
- 229910052682 stishovite Inorganic materials 0.000 description 4
- 229910052905 tridymite Inorganic materials 0.000 description 4
- 235000012431 wafers Nutrition 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 3
- 238000010790 dilution Methods 0.000 description 3
- 239000012895 dilution Substances 0.000 description 3
- 238000001312 dry etching Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000005755 formation reaction Methods 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- 238000006116 polymerization reaction Methods 0.000 description 3
- 238000000231 atomic layer deposition Methods 0.000 description 2
- 210000004027 cell Anatomy 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 229920000642 polymer Polymers 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- LGPPATCNSOSOQH-UHFFFAOYSA-N 1,1,2,3,4,4-hexafluorobuta-1,3-diene Chemical compound FC(F)=C(F)C(F)=C(F)F LGPPATCNSOSOQH-UHFFFAOYSA-N 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000006117 anti-reflective coating Substances 0.000 description 1
- 230000006399 behavior Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000000572 ellipsometry Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 229910052754 neon Inorganic materials 0.000 description 1
- GKAOGPIIYCISHV-UHFFFAOYSA-N neon atom Chemical compound [Ne] GKAOGPIIYCISHV-UHFFFAOYSA-N 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 125000002524 organometallic group Chemical group 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000002243 precursor Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000012925 reference material Substances 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- -1 silicon nitrides Chemical class 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 238000007704 wet chemistry method Methods 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
- H01L21/31122—Etching inorganic layers by chemical means by dry-etching of layers not containing Si, e.g. PZT, Al2O3
Definitions
- the present invention encompasses the use of the method according to the invention for etching barrier layers or tunnel layers made of aluminum oxide that are used e.g. in magnetic memories or in hard disk read heads.
- the Al 2 O 3 may be patterned by the above-described process according to the invention together with the Si 3 N 4 patterning in one etching step. The resist stripping is then performed.
- FIG. 2 shows an exemplary silicon semiconductor substrate 1 with a memory cell arrangement that is not illustrated in greater detail.
- 60 designates an active region, for example a common source/drain region of two memory cells.
- GS 1 , GS 2 are two gate stacks lying next to one another, which are constructed from a polysilicon layer 10 with underlying (not illustrated) gate dielectric layer (e.g. gate oxide), if appropriate a silicide layer 20 and a silicon nitride cap 30 and also a sidewall oxide layer 40 .
- CB designates the position at which a contact to the active region 60 is to be fabricated.
- the contact type CB which makes electrical contact with the active region 60 between the two gate stacks GS 1 , GS 2 .
- the contact hole for the contact CB is etched separately from other contacts. In this case, the distance results, as is known, from the increasing miniaturization that leads to an increase in the number of chips per wafer and thus to a reduction of costs.
- a planarizing ARC coating (anti-reflective coating) may be spun on, which compensates for the remaining unevennesses of the surface of the BPSG 100 . If this does not suffice, a planarization, for example by means of chemical mechanical polishing (CMP), may also be effected after the heat treatment of the BPSG layer 100 .
- CMP chemical mechanical polishing
- FIG. 5 shows the state after exposure of the resist in order to form a mask for the patterning of the Al 2 O 3 layer.
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Inorganic Chemistry (AREA)
- Physics & Mathematics (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
This invention relates to a method for the selective and directed plasma etching of aluminum oxide, in which a mixture having the following constituents is used for etching: a. a polymerizing gas comprising at least partially unsaturated, perfluorinated hydrocarbon compounds;
-
- b. optionally a compound having the formula CHxFy, where x=1-3 and y=4-x; c. oxygen; and d. a suitable carrier gas; and this mixture as a plasma, is brought into contact with the aluminum oxide to be etched.
Description
- The present invention relates to a method for the selective and directed plasma etching of aluminum oxide, and to the use of the method, in particular in semiconductor manufacturing.
- Aluminum oxide has a high etching resistance toward etching plasmas used for etching silicon, silicon oxide, silicon oxynitride or silicon nitride. On account of this etching resistance, aluminum oxide is proposed as a hard mask or stop layer. However, an expedient use has failed hitherto primarily owing to the lack of a selective and anisotropic dry etching process for aluminum oxide.
- There is likewise difficulty in classifying the dry etching of aluminum oxide in use as high-k dielectric (gate material in field-effect transistors or capacitory dielectric), as well as tunnel barrier (such as e.g. hard disk read heads), or in electroluminescent materials. In these cases, too, it would be desirable to have a method for etching aluminum oxide available.
- On account of the poor selectivity of customary processes for anisotropic etching, thicker hard or resist mask layers are currently required for patterning the aluminum oxide and, moreover, the etching attack on the underlying material is relatively large due to the necessary overetch and the poor selectivity.
- The sole selective etching process which is currently established is only a wet-chemical and thus isotropic process for removal of aluminum oxide. The disadvantages of this method includes an isotropic, i.e. undirected etching behavior, for which reason material removals and faults occur in particular at edge and boundary layer regions, which contributes to the poor controllability of the feature sizes. Wet-chemical processes are therefore suitable only to a greater extent for structures decreasing in size.
- An anisotropic process for etching aluminum oxide with high selectivity has not yet been described heretofore.
- Instead, high mask layer thicknesses are currently used in attempts to achieve as far as possible anisotropic patternings, and the removal of aluminum oxide often takes place by means of unadapted recipes, e.g. with Ar-based sputtering recipes.
- Therefore, it is an object of the present invention to provide a method for the controlled etching of aluminum oxide.
- This object is achieved by means of a method in accordance with
Claim 1. - The present invention furthermore relates to the use of the etching method according to the invention for the selective etching of aluminum oxide with respect to silicon, photoresists and/or metals.
- Furthermore, the present invention encompasses the use of the method according to the invention for etching barrier layers or tunnel layers made of aluminum oxide that are used e.g. in magnetic memories or in hard disk read heads.
- The present invention also relates to the use of the method according to the invention in semiconductor manufacturing, in particular in the context of fabricating contact holes.
- The present invention furthermore relates to a method for fabricating an aluminum oxide hard mask.
-
Claim 1 relates to a method for the selective and directed plasma etching of aluminum oxide, in which a mixture having the following constituents is used for etching: -
- a. a polymerizing gas comprising at least partially unsaturated, perfluorinated hydrocarbon compounds;
- b. optionally a compound having the formula CHxFy, where x=1, 2 or 3 and y=4-x;
- c. oxygen; and
- d. a suitable carrier gas;
- and this mixture as a plasma, is brought into contact with the aluminum oxide to be etched.
- Although an optional constituent is specified under b., it is preferred for the volumetric proportion of b. to be greater than 0.
- For the first time, a selective and anisotropic etching process for aluminum oxide has hereby been found, which at the same time is compatible with customary plasma etching chambers and can be used with utilization of customary gases, parameters and temperatures. This has been made possible by means of the adapted combination of the constituents, in particular by virtue of the simultaneous presence of polymerizing components and components effecting removal in sputtering/oxidizing fashion. It is assumed that the polymerization provides an at least temporary protection of surfaces against an excessively high degree of etching, while on the other hand removing constituents effect the etching and prevent an excessive formation of polymers. Constituent a. is a polymerizing constituent. Constituent b. presumably likewise contributes to polymerization, but due to the F component probably also effects a degree of removal. Constituent c. acts in oxidizing removing fashion and constituent d. acts principally as a dilution gas. It could not be expected that such a combination of constituents would enable a selective etching of aluminum oxide.
- In a preferred embodiment of the present invention, C4F6 (1,1,2,3,4,4-hexafluoro-1,3-butadiene) and/or C5F8 is used as at least partially unsaturated, perfluorinated hydrocarbon compound. Noncyclic compounds are involved in this case. Particularly good selectivities with respect to silicon and resist materials have been observed with these compounds. C4F8 can likewise be used according to the invention.
- According to the invention, aluminum oxide is understood to be Al2O3; however, the term also encompasses nonstoichiometric aluminum oxide as may occur in aluminum layer formations, if appropriate. Equally, the term silicon oxide is to be understood as silicon dioxide; nonstoichiometric ratios may be present in this case, too. The term silicon nitride encompasses various silicon nitrides, in particular Si3N4.
- The compounds CHxFy are likewise predominantly contained in the gas mixture as a gas that supports the polymerization. In a preferred embodiment, CH2F2 is used as compound having the formula CHxFy.
- According to the invention, the carrier gas or dilution gas that is used may be any inert or largely inert gases, such as argon, xenon, helium and/or neon. The use of argon as carrier gas has turned out to be preferred, however. It is presumed that Ar is ionized in small proportions in the plasma and thus contributes to the removal of polymers forming on the surface.
- The ratio of the constituents can be varied according to the invention. Preferably, the volumetric ratio of the constituents a:b:c:d is approximately 0.7-1.3:0-1:0.5-2:5-200, preferably approximately 0.8-1.2:0.4-0.8:0.6-1.4:10-100.
- Although b. may be 0 in the first volumetric ratio specification, a value of approximately 0.1 is preferred as further lower limit.
- A particularly preferred combination of constituents is the following composition:
-
- a: C4F6; b:CH2F2; c:O2; d:Ar. It is preferred, particularly in the case of this composition, for the constituents a. to d. to be present approximately in the following ratios: a:b:c:d=1:0.6:0.8:20.
- According to the invention, the process pressure may be varied by the person skilled in the art in accordance with the requirements. By lowering the pressure it is possible to improve the uniformity (at the same time with a reduced selectivity); conversely, higher pressure permits a higher selectivity with respect to resist with poorer uniformity of the etching. This may be compensated for by the person skilled in the art through adaptation of other process parameters (power, magnetic field strength, etc.).
- According to the invention, it is preferred for the process pressure during the etching of aluminum oxide to be approximately 5 to 200 mtorr, more preferably approximately 15 to approximately 100 mtorr, even more preferably approximately 40 to approximately 80 mtorr.
- The plasma power may be chosen and set by the person skilled in the art in accordance with the apparatus used and the etching requirements. When using an Applied Materials eMax 200 mm, (a magnetically enhanced reactive ion etch chamber), a power of approximately 1800 W at a process pressure of 40 mtorr and a temperature of −15° C. is a preferred value. The etching process may be carried out using a magnetic field or without a magnetic field. The magnetic field strength may be varied by the person skilled in the art. If a magnetic field is used, a value of approximately 100 gauss is a preferred guide value when using the above apparatus and at 1800 W and 40 mtorr.
- Generally, preferred ranges of parameters within which the person skilled in the art may effect variation (relative to said type of installation and 200 mm wafers) are:
-
- Power 500-2500 watts, pressure 5-200 mT, temperature −25 to 15° C., magnetic field 0-120G, gas flow (total) 50-1000 sccm.
- In the case of the composition that turned out to be particularly preferred above, where a:C4F6; b:CH2F2; c:O2; d:Ar and where a:b:c:d=1:0.6:0.8:20, a selectivity of 4.6:1 with respect to Si and 3:1 for resist results at a process pressure of 40 mT (see examples).
- The etching method according to the invention can thus be integrated well in semiconductor manufacturing methods and may be employed particularly where a selective etching with respect to silicon and resist is required. One important possibility for application of the method is in the formation of contact holes (contact hole etching), where it is possible to use aluminum oxide as a hard mask, an etching that is selective with respect to silicon, silicon nitride, silicon oxynitride or silicon oxide being carried out. Contact hole etching involves etching the aluminum oxide layer according to resist lithography in accordance with the method according to the invention, which is possible selectively with respect to Si or resist. The subsequent patterning of the underlying layer, such as e.g. silicon oxide or silicon nitride, is effected according to conventional methods using the patterned aluminum oxide layer as a hard mask. These etching methods attack the aluminum oxide layer only insignificantly or not at all, with the result that a good selectivity is ensured here as well.
- After the etching, the etched aluminum oxide layer is preferably used as a hard mask for patterning an underlying layer, preferably made of silicon, silicon nitride or silicon oxide.
- The method of the present invention is well suited to the controlled removal of aluminum oxide on Si, silicon oxynitride, silicon oxide and/or silicon nitride.
- The method according to the invention may be used in particular for the directed, selective dry etching of aluminum oxide layers, preferably for the selective etching of aluminum oxide layers with respect to silicon and photoresist.
- Aluminum oxide layers occur for example as tunnel layers or barrier layers in hard disk read heads or in magnetic memories. The method of the present invention may preferably be used for etching barrier layers or tunnel layers made of aluminum oxide that occur in magnetic memories or in hard disk read heads.
- Generally the method according to the invention may preferably be used in semiconductor manufacturing in order to etch and/or pattern aluminum oxide layers in that context. Such a patterned layer may preferably be used as a hard mask for patterning underlying layers made of silicon, silicon nitride and/or silicon oxide, e.g. during contact hole etching.
- Consequently, a further aspect of the present invention relates to a method for fabricating an aluminum oxide hard mask, having the steps of:
-
- a. providing an aluminum oxide layer on a substrate, preferably a silicon, silicon nitride, silicon oxynitride and/or silicon oxide substrate;
- b. providing a mask on the aluminum oxide layer;
- c. etching the aluminum oxide layer by the method according to one of
Claims 1 to 8.
- The use of highly polymerizing gases such as C4F6 or C5F8 in a mixture with Ar and CHxFy and O2 enables, according to the invention, an aluminum oxide etching which is highly selective with respect to Si and resist. A factor that influences the etching is the selected ratio of the polymerizing gases (C4F6, C5F8, CHxFy) to oxygen and the corresponding dilution by Ar. Preferred ratios are specified above.
- Advantages of the present invention are e.g.:
-
- 1. The etching process described facilitates the use of aluminum oxide as a hard mask that has a good selectivity with respect to Si, SiN and SiO2.
- 2. Improved or controlled removal of aluminum oxide on Si, SiO and SiN (high-K dielectrics e.g. as trench-dielectric or as gate dielectric).
- 3. Etching of the tunnel barrier in magnetic memories (MRAM) is made possible or improved.
-
FIG. 1 shows a diagram of the selectivity of Al2O3 with respect to Si3N4, SiO2, a resist and Si when using the etching method according to the invention. - FIGS. 2 to 7 diagrammatically show various stages in the production of contact holes using aluminum oxide as a hard mask, in order to elucidate the present invention by way of example.
- 1. Etching and Selectivity Tests
- Unpatterned wafer slices to which an Al2O3 layer having a thickness of approximately 100 nm was applied by means of ALD (Atomic Layer Deposition with organometallic precursor) were provided with layers made of Si3N4, SiO2, a resist (MUV (365 nm) resist from JSR; MUV=middle UV range) and Si at selected regions in the conventional manner. It may be assumed that other types of resist (e.g. for 248 nm/193 nm lithography) behave similarly.
- Afterward, with each of the wafer slices coated in this way, a plasma etching was carried out with the following parameters:
Pressure: 15, 40 and 100 mT Time: 60 s Power: 1800 W Magnetic field 100 G. - The apparatus used was the Applied Materials eMax 200 mm described above.
- After etching, the surface alterations, i.e. etching rate and uniformity of the surface, were determined by ellipsometry. The uniformity is specified in percent as (maximum etching rate minus minimum etching rate)/(2×average etching rate).
- The following results were obtained:
Etching rate Pressure nm/min Uniformity/% 15 mT 74.1 ±20.9 40 mT 50.8 ±37.9 100 mT 22.6 ±56.4 - The selectivities S were furthermore determined. S=etching rate Al2O3/etching rate reference material. The results of the selectivities of aluminum oxide with respect to various tested materials are illustrated graphically in
FIG. 1 . The illustration in each case shows mean values from two tests. At 40 mT, selectivities of approximately 4.6 and 3 were obtained with respect to Si and the resist. At 100 mT the values were >10:1. - 2. Contact Hole Patterning
- A following layer construction was produced according to conventional methods known to the person skilled in the art (from top to bottom):
-
- Resist
- Al2O3
- Oxide
- Si (or metal)
- The following method steps were carried out:
- Firstly, a contact hole lithography was effected in a conventional manner. Afterward, the Al2O3 was patterned by a process according to the invention, i.e. an etching method was carried out with a mixture comprising C4F6:CH2F2:O2:Ar in the ratio 1:0.6:0.8:20 at a process pressure of 40 mT. Further parameters:
Time: 60 s Power: 1800 W Magnetic field 100 G. - The apparatus used was the Applied Materials eMax 200 mm.
- The resist was then removed (resist stripping) in a conventional manner and the oxide was then patterned using the Al2O3 as a hard mask. Stop on Si/metal. The Al2O3 may subsequently be removed wet-chemically, if required for process integration reasons.
- In this way, the oxide lying below Al2O3 was able to be patterned and etched simply and effectively using Al2O3 as a hard mask. This example shows that the method according to the invention can generally be used for contact hole etching.
- 3. Deep Trench with Al2O3 Hard Mask (Storage Capacitor Patterning for DRAM)
- A deep trench patterning is an etching with a very high aspect ratio into the crystalline Si. This etching may be effected, according to the invention, with very high selectivity with respect to the Al2O3 hard mask.
- A following layer construction was produced according to conventional methods known to the person skilled in the art (from top to bottom):
-
- Resist (˜150-350 nm)
- Al2O3 (˜50-200 nm)
- Si3N4 (pad nitride ˜100-200 nm)
- SiO2 (thin pad oxide)
- The following method steps were carried out:
- Firstly, a contact hole lithography was effected in a conventional manner. The Al2O3 was subsequently patterned by a process according to the invention, i.e. an etching method was carried out with a mixture comprising C4F6:CH2F2:O2: Ar in the ratio 1:0.6:0.8:20 at a process pressure of 40 mT. Further parameters:
Time: 60 s Power: 1800 W Magnetic field 100 G. - The apparatus used was the Applied Materials eMax 200 mm.
- The resist was then removed (resist stripping) in a conventional manner and the silicon nitride was then patterned.
- As an alternative, after contact hole lithography, the Al2O3 may be patterned by the above-described process according to the invention together with the Si3N4 patterning in one etching step. The resist stripping is then performed.
- In accordance with this example, a relatively thick Si3N4 layer could be etched effectively using Al2O3 as a hard mask.
- 4. Contact Hole Etching
- An exemplary embodiment of the present invention is illustrated diagrammatically in FIGS. 2 to 7 and explained in more detail below. A method for fabricating self-aligned contacts is involved in this case.
-
FIG. 2 shows an exemplarysilicon semiconductor substrate 1 with a memory cell arrangement that is not illustrated in greater detail. 60 designates an active region, for example a common source/drain region of two memory cells. GS1, GS2 are two gate stacks lying next to one another, which are constructed from apolysilicon layer 10 with underlying (not illustrated) gate dielectric layer (e.g. gate oxide), if appropriate asilicide layer 20 and asilicon nitride cap 30 and also asidewall oxide layer 40. CB designates the position at which a contact to theactive region 60 is to be fabricated. - Between the two gate stacks GS1, GS2 it is necessary to provide a contact type CB, which makes electrical contact with the
active region 60 between the two gate stacks GS1, GS2. Usually, the contact hole for the contact CB is etched separately from other contacts. In this case, the distance results, as is known, from the increasing miniaturization that leads to an increase in the number of chips per wafer and thus to a reduction of costs. - Afterward, as illustrated in
FIG. 3 , a silicon oxide layer, e.g. a BPSG layer (borophosphosilicate glass), designated byreference symbol 100, is deposited over the resulting structure. SaidBPSG layer 100 is made to flow in a subsequent heat treatment, so that it does not leave any voids in particular between the closely adjacent gate stacks GS1, GS2. - In a subsequent method step (not illustrated), a planarizing ARC coating (anti-reflective coating) may be spun on, which compensates for the remaining unevennesses of the surface of the
BPSG 100. If this does not suffice, a planarization, for example by means of chemical mechanical polishing (CMP), may also be effected after the heat treatment of theBPSG layer 100. - Afterward, as illustrated in
FIG. 4 , an Al2O3 layer, designated byreference symbol 110, is deposited on the resulting structure. This Al2O3 layer later serves as a hard mask for the selective etching of the underlying silicon oxide. Furthermore, as is illustrated inFIG. 4 , a resistlayer 120 for the later patterning of thealuminum oxide layer 110 is applied. -
FIG. 5 shows the state after exposure of the resist in order to form a mask for the patterning of the Al2O3 layer. -
FIG. 6 shows the state after carrying out the etching method according to the invention, e.g. with a mixture comprising C4F6:CH2F2:O2:Ar in the ratio 1:0.6:0.8:20, at a process pressure of 40 mT. the method according to the invention is thus utilized for producing a hard mask made of aluminum oxide. -
FIG. 7 then shows the state after selective etching of the contact hole and removal of the resist layer. The contact hole is subsequently filled. The aluminum oxide layer may be removed prior to the contact hole being filled, e.g. with tungsten, but may also remain and serve as a spacer from the substrate in order to keep capacitive couplings low. - The selection of the substrate material and the geometry are only by way of example and may be varied in many different ways. In particular, the present invention can be employed not only for the fabrication of contact holes but wherever aluminum oxide layers have to be etched selectively with respect to silicon, photoresists or metals or wherever silicon oxide, silicon nitride and/or silicon oxynitride have to be etched selectively with respect to aluminum oxide.
Claims (14)
1. Method for the selective and directed plasma etching of aluminum oxide, having the step of etching with a mixture having the following constituents:
a. a polymerizing gas comprising at least partially unsaturated, perfluorinated hydrocarbon compounds;
b. optionally a compound having the formula CHxFy, where x=1, 2 or 3 and y=4-x;
c. oxygen; and
d. a suitable carrier gas;
and this mixture as a plasma, is brought into contact with the aluminum oxide to be etched.
2. Method according to claim 1 , wherein C4F6 and/or C5F8 are used as the at least partially unsaturated, perfluorinated hydrocarbon compounds for gas a.
3. Method according to claim 1 , wherein CH2F2 is used as compound having the formula CHxFy.
4. Method according to claim 1 , wherein argon is used as carrier gas.
5. Method according to claim 1 wherein the volumetric ratio of the constituents a:b:c:d is approximately 0.7-1.3:0-1:0.5-2:5-200, preferably approximately 0.8-1.2:0.4-0.8:0.6-1.4:10-100.
6. Method according to claim 1 wherein the following combination of constituents is used:
a: C4F6;
b: CH2F2;
c: O2;
d: Ar.
7. Method according to claim 1 , wherein the constituents a. to d. are present in approximately the following ratios: a:b:c:d=1:0.6:0.8:20.
8. Method according to claim 1 , wherein the process pressure during the etching of aluminum oxide is approximately 15 to approximately 100 mtorr, preferably approximately 40 to approximately 80 mtorr.
9. Method according to claim 1 , wherein the method is effected as part of the fabrication of a semiconductor structure in order to produce an etched aluminum oxide layer.
10. Method according to claim 9 , wherein the etching for producing an etched aluminum oxide layer is followed by a patterning of an underlying layer, preferably made of silicon, silicon nitride or silicon oxide, the etched aluminum oxide layer being used as a mask.
11. Use of the method according to claim 1 , for controlled removal of aluminum oxide on Si, silicon oxide, silicon oxynitride or silicon nitride.
12. Use of the method according to claim 1 , for etching barrier layers or tunnel layers made of aluminum oxide that occur in magnetic memories or in hard disk read heads.
13. Use of the method according to claim 1 in semiconductor manufacturing, in particular in the course of contact hole etching.
14. Method for fabricating an aluminum oxide hard mask, having the steps of:
a. providing an aluminum oxide layer on a substrate, preferably a silicon, silicon nitride, silicon oxynitride and/or silicon oxide substrate;
b. providing a mask on the aluminum oxide layer; and
c. etching the aluminum oxide layer by the method according to claim 1.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10338422A DE10338422B4 (en) | 2003-08-18 | 2003-08-18 | Selective plasma etching process for alumina structuring and its use |
DE10338422.7 | 2003-08-18 |
Publications (1)
Publication Number | Publication Date |
---|---|
US20050056615A1 true US20050056615A1 (en) | 2005-03-17 |
Family
ID=34201786
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/911,294 Abandoned US20050056615A1 (en) | 2003-08-18 | 2004-08-04 | Selective plasma etching process for aluminum oxide patterning |
Country Status (2)
Country | Link |
---|---|
US (1) | US20050056615A1 (en) |
DE (1) | DE10338422B4 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20130260105A1 (en) * | 2012-03-30 | 2013-10-03 | Samsung Display Co., Ltd. | Glass substrate for display device and method of manufacturing the same |
US20140103498A1 (en) * | 2007-08-16 | 2014-04-17 | Micron Technology, Inc. | Selective wet etching of hafnium aluminum oxide films |
US20140175369A1 (en) * | 2012-12-26 | 2014-06-26 | Panasonic Corporation | Manufacturing method of nonvolatile memory device and nonvolatile memory device |
US20180323209A1 (en) * | 2010-11-05 | 2018-11-08 | Samsung Electronics Co., Ltd. | Three-dimensional semiconductor devices |
US20220392765A1 (en) * | 2021-06-04 | 2022-12-08 | Tokyo Electron Limited | Cyclic plasma processing |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5384287A (en) * | 1991-12-13 | 1995-01-24 | Nec Corporation | Method of forming a semiconductor device having self-aligned contact holes |
US6297983B1 (en) * | 2000-02-29 | 2001-10-02 | Hewlett-Packard Company | Reference layer structure in a magnetic storage cell |
US20010055843A1 (en) * | 2000-05-24 | 2001-12-27 | Jeong Ho Kim | Method for fabricating semiconductor device |
US20020113310A1 (en) * | 2000-10-31 | 2002-08-22 | Kim Ji-Soo | Conducting line of semiconductor device and manufacturing method thereof using aluminum oxide layer as hard mask |
US6500707B2 (en) * | 2001-03-19 | 2002-12-31 | Infineon Technologies Ag | Method for manufacturing a trench capacitor of a memory cell of a semiconductor memory |
US6511918B2 (en) * | 1998-12-04 | 2003-01-28 | Infineon Technologies Ag | Method of structuring a metal-containing layer |
US6558999B2 (en) * | 2000-05-24 | 2003-05-06 | Hyundai Electronics Industries, Co., Ltd. | Method for forming a storage electrode on a semiconductor device |
US20030104704A1 (en) * | 2001-11-12 | 2003-06-05 | Hynix Semiconductor Inc. | Method for fabricating semiconductor device |
US20040235259A1 (en) * | 2003-05-19 | 2004-11-25 | Celii Francis Gabriel | Via0 etch process for fram integration |
-
2003
- 2003-08-18 DE DE10338422A patent/DE10338422B4/en not_active Expired - Fee Related
-
2004
- 2004-08-04 US US10/911,294 patent/US20050056615A1/en not_active Abandoned
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5384287A (en) * | 1991-12-13 | 1995-01-24 | Nec Corporation | Method of forming a semiconductor device having self-aligned contact holes |
US6511918B2 (en) * | 1998-12-04 | 2003-01-28 | Infineon Technologies Ag | Method of structuring a metal-containing layer |
US6297983B1 (en) * | 2000-02-29 | 2001-10-02 | Hewlett-Packard Company | Reference layer structure in a magnetic storage cell |
US20010055843A1 (en) * | 2000-05-24 | 2001-12-27 | Jeong Ho Kim | Method for fabricating semiconductor device |
US6448179B2 (en) * | 2000-05-24 | 2002-09-10 | Hyundai Electronics Industries Co., Ltd. | Method for fabricating semiconductor device |
US6558999B2 (en) * | 2000-05-24 | 2003-05-06 | Hyundai Electronics Industries, Co., Ltd. | Method for forming a storage electrode on a semiconductor device |
US20020113310A1 (en) * | 2000-10-31 | 2002-08-22 | Kim Ji-Soo | Conducting line of semiconductor device and manufacturing method thereof using aluminum oxide layer as hard mask |
US6500707B2 (en) * | 2001-03-19 | 2002-12-31 | Infineon Technologies Ag | Method for manufacturing a trench capacitor of a memory cell of a semiconductor memory |
US20030104704A1 (en) * | 2001-11-12 | 2003-06-05 | Hynix Semiconductor Inc. | Method for fabricating semiconductor device |
US20040235259A1 (en) * | 2003-05-19 | 2004-11-25 | Celii Francis Gabriel | Via0 etch process for fram integration |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20140103498A1 (en) * | 2007-08-16 | 2014-04-17 | Micron Technology, Inc. | Selective wet etching of hafnium aluminum oxide films |
US20180323209A1 (en) * | 2010-11-05 | 2018-11-08 | Samsung Electronics Co., Ltd. | Three-dimensional semiconductor devices |
US10559590B2 (en) * | 2010-11-05 | 2020-02-11 | Samsung Electronics Co., Ltd. | Three-dimensional semiconductor devices |
US10748929B2 (en) | 2010-11-05 | 2020-08-18 | Samsung Electronics Co., Ltd. | Three-dimensional semiconductor devices |
US11107833B2 (en) | 2010-11-05 | 2021-08-31 | Samsung Electronics Co., Ltd. | Semiconductor devices |
US20130260105A1 (en) * | 2012-03-30 | 2013-10-03 | Samsung Display Co., Ltd. | Glass substrate for display device and method of manufacturing the same |
US20140175369A1 (en) * | 2012-12-26 | 2014-06-26 | Panasonic Corporation | Manufacturing method of nonvolatile memory device and nonvolatile memory device |
US9076959B2 (en) * | 2012-12-26 | 2015-07-07 | Panasonic Intellectual Property Management Co., Ltd. | Manufacturing method of nonvolatile memory device and nonvolatile memory device |
US20220392765A1 (en) * | 2021-06-04 | 2022-12-08 | Tokyo Electron Limited | Cyclic plasma processing |
US11961735B2 (en) * | 2021-06-04 | 2024-04-16 | Tokyo Electron Limited | Cyclic plasma processing |
Also Published As
Publication number | Publication date |
---|---|
DE10338422B4 (en) | 2007-08-16 |
DE10338422A1 (en) | 2005-03-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10868143B2 (en) | Spacers with rectangular profile and methods of forming the same | |
US7105431B2 (en) | Masking methods | |
US11508583B2 (en) | Selective high-k formation in gate-last process | |
US7109085B2 (en) | Etching process to avoid polysilicon notching | |
US20060199370A1 (en) | Method of in-situ ash strip to eliminate memory effect and reduce wafer damage | |
US6716766B2 (en) | Process variation resistant self aligned contact etch | |
KR102171265B1 (en) | Patterning method using metal mask, and method for fabricating semiconductor device comprising the same patterning method | |
US8324061B2 (en) | Method for manufacturing semiconductor device | |
TW202013490A (en) | Semiconductor devices and methods of forming the same | |
US20240072128A1 (en) | Sacrificial Layer for Semiconductor Process | |
US6693042B1 (en) | Method for etching a dielectric layer formed upon a barrier layer | |
KR100763506B1 (en) | Method of manufacturing a capacitor | |
US20050056615A1 (en) | Selective plasma etching process for aluminum oxide patterning | |
US20230077541A1 (en) | Selective High-K Formation in Gate-Last Process | |
KR20060136191A (en) | Method of manufacturing a capacitor | |
US20060292883A1 (en) | Etching of silicon nitride with improved nitride-to-oxide selectivity utilizing halogen bromide/chlorine plasma | |
JPH10116904A (en) | Manufacture of semiconductor device | |
US7557045B2 (en) | Manufacture of semiconductor device with good contact holes | |
US20010034136A1 (en) | Method for improving contact resistance of silicide layer in a semiconductor device | |
US10224414B2 (en) | Method for providing a low-k spacer | |
KR100670666B1 (en) | Method for manufacturing semiconductor device | |
KR20010004177A (en) | Method for fabricating semiconductor device | |
US7842608B2 (en) | Method for manufacturing semiconductor device having via plug | |
KR20080089030A (en) | Method for fabricating recess gate in semiconductor device | |
KR20030057862A (en) | Method for etching a storage node contact of semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: INFINEON TECHNOLOGIES AG, GERMANY Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:MOLL, PETER;TEGEN, STEFAN;REEL/FRAME:015155/0059;SIGNING DATES FROM 20040816 TO 20040902 |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |