US20040180523A1 - Method for making a semiconductor device having a high-k gate dielectric - Google Patents
Method for making a semiconductor device having a high-k gate dielectric Download PDFInfo
- Publication number
- US20040180523A1 US20040180523A1 US10/771,267 US77126704A US2004180523A1 US 20040180523 A1 US20040180523 A1 US 20040180523A1 US 77126704 A US77126704 A US 77126704A US 2004180523 A1 US2004180523 A1 US 2004180523A1
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- United States
- Prior art keywords
- gate dielectric
- dielectric layer
- hydroxide
- oxide
- solution
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 238000000034 method Methods 0.000 title claims abstract description 48
- 239000004065 semiconductor Substances 0.000 title claims abstract description 10
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 23
- 239000001301 oxygen Substances 0.000 claims abstract description 23
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 23
- 239000012535 impurity Substances 0.000 claims abstract description 17
- 239000000758 substrate Substances 0.000 claims abstract description 17
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 27
- XLYOFNOQVPJJNP-UHFFFAOYSA-M hydroxide Chemical compound [OH-] XLYOFNOQVPJJNP-UHFFFAOYSA-M 0.000 claims description 21
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 claims description 14
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 14
- 229920005591 polysilicon Polymers 0.000 claims description 14
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical group [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 claims description 14
- 238000011282 treatment Methods 0.000 claims description 14
- 239000000463 material Substances 0.000 claims description 12
- 239000000126 substance Substances 0.000 claims description 12
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 11
- 239000000908 ammonium hydroxide Substances 0.000 claims description 10
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 claims description 8
- 239000000460 chlorine Substances 0.000 claims description 8
- 229910052801 chlorine Inorganic materials 0.000 claims description 8
- 239000008367 deionised water Substances 0.000 claims description 6
- 229910021641 deionized water Inorganic materials 0.000 claims description 6
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 5
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 5
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims description 5
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 5
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 claims description 5
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 claims description 5
- 229910001928 zirconium oxide Inorganic materials 0.000 claims description 5
- 238000000277 atomic layer chemical vapour deposition Methods 0.000 claims description 4
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum(3+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 claims description 4
- 150000005622 tetraalkylammonium hydroxides Chemical class 0.000 claims description 4
- XWCMFHPRATWWFO-UHFFFAOYSA-N [O-2].[Ta+5].[Sc+3].[O-2].[O-2].[O-2] Chemical compound [O-2].[Ta+5].[Sc+3].[O-2].[O-2].[O-2] XWCMFHPRATWWFO-UHFFFAOYSA-N 0.000 claims description 2
- ILCYGSITMBHYNK-UHFFFAOYSA-N [Si]=O.[Hf] Chemical compound [Si]=O.[Hf] ILCYGSITMBHYNK-UHFFFAOYSA-N 0.000 claims description 2
- VKJLWXGJGDEGSO-UHFFFAOYSA-N barium(2+);oxygen(2-);titanium(4+) Chemical compound [O-2].[O-2].[O-2].[Ti+4].[Ba+2] VKJLWXGJGDEGSO-UHFFFAOYSA-N 0.000 claims description 2
- 238000005530 etching Methods 0.000 claims description 2
- JQJCSZOEVBFDKO-UHFFFAOYSA-N lead zinc Chemical compound [Zn].[Pb] JQJCSZOEVBFDKO-UHFFFAOYSA-N 0.000 claims description 2
- 239000007800 oxidant agent Substances 0.000 claims description 2
- SIWVEOZUMHYXCS-UHFFFAOYSA-N oxo(oxoyttriooxy)yttrium Chemical compound O=[Y]O[Y]=O SIWVEOZUMHYXCS-UHFFFAOYSA-N 0.000 claims description 2
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 claims description 2
- VEALVRVVWBQVSL-UHFFFAOYSA-N strontium titanate Chemical compound [Sr+2].[O-][Ti]([O-])=O VEALVRVVWBQVSL-UHFFFAOYSA-N 0.000 claims description 2
- CZXRMHUWVGPWRM-UHFFFAOYSA-N strontium;barium(2+);oxygen(2-);titanium(4+) Chemical compound [O-2].[O-2].[O-2].[O-2].[Ti+4].[Sr+2].[Ba+2] CZXRMHUWVGPWRM-UHFFFAOYSA-N 0.000 claims description 2
- 229910001936 tantalum oxide Inorganic materials 0.000 claims description 2
- GFQYVLUOOAAOGM-UHFFFAOYSA-N zirconium(iv) silicate Chemical compound [Zr+4].[O-][Si]([O-])([O-])[O-] GFQYVLUOOAAOGM-UHFFFAOYSA-N 0.000 claims description 2
- 230000003247 decreasing effect Effects 0.000 claims 1
- 239000000243 solution Substances 0.000 description 25
- 239000007864 aqueous solution Substances 0.000 description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 8
- 239000003989 dielectric material Substances 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- 235000012239 silicon dioxide Nutrition 0.000 description 4
- 238000000151 deposition Methods 0.000 description 3
- 229910001510 metal chloride Inorganic materials 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000000356 contaminant Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000003993 interaction Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 239000002243 precursor Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910000673 Indium arsenide Inorganic materials 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- 238000007792 addition Methods 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- VTGARNNDLOTBET-UHFFFAOYSA-N gallium antimonide Chemical compound [Sb]#[Ga] VTGARNNDLOTBET-UHFFFAOYSA-N 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 230000003301 hydrolyzing effect Effects 0.000 description 1
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 1
- WPYVAWXEWQSOGY-UHFFFAOYSA-N indium antimonide Chemical compound [Sb]#[In] WPYVAWXEWQSOGY-UHFFFAOYSA-N 0.000 description 1
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000012804 iterative process Methods 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000012702 metal oxide precursor Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 239000012466 permeate Substances 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- OCGWQDWYSQAFTO-UHFFFAOYSA-N tellanylidenelead Chemical compound [Pb]=[Te] OCGWQDWYSQAFTO-UHFFFAOYSA-N 0.000 description 1
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/28194—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
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- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31691—Inorganic layers composed of oxides or glassy oxides or oxide based glass with perovskite structure
Definitions
- the present invention relates to methods for making semiconductor devices, in particular, semiconductor devices that include high-k gate dielectric layers.
- MOS field-effect transistors with very thin silicon dioxide based gate dielectrics may experience unacceptable gate leakage currents.
- Forming the gate dielectric from certain high-k dielectric materials, instead of silicon dioxide, can reduce gate leakage.
- Such a dielectric may not, however, be compatible with polysilicon—the preferred material for making the device's gate electrode.
- Such a high-k film comprises an oxide, it may manifest oxygen vacancies and excess impurity levels. Oxygen vacancies may permit undesirable interaction between the high-k film and the gate electrode. When the gate electrode comprises polysilicon, such interaction may alter the electrode's workfunction or cause the device to short through the dielectric. If the process for forming the high-k film uses a metal chloride precursor, residual chlorine may adversely affect the device's electrical properties.
- FIGS. 1 a - 1 c represent cross-sections of structures that may be formed when carrying out an embodiment of the method of the present invention. Features shown in these figures are not intended to be drawn to scale.
- a method for making a semiconductor device comprises forming on a substrate a high-k gate dielectric layer, then removing impurities from the high-k gate dielectric layer, and increasing the oxygen content of the high-k gate dielectric layer.
- a gate electrode is then formed on the high-k gate dielectric layer.
- high-k gate dielectric layer 110 is formed on substrate 100 , as shown in FIG. 1 a .
- Substrate 100 may comprise a bulk silicon or silicon-on-insulator substructure.
- substrate 100 may comprise other materials—which may or may not be combined with silicon—such as: germanium, indium antimonide, lead telluride, indium arsenide, indium phosphide, gallium arsenide, or gallium antimonide.
- germanium, indium antimonide, lead telluride, indium arsenide, indium phosphide, gallium arsenide, or gallium antimonide such as: germanium, indium antimonide, lead telluride, indium arsenide, indium phosphide, gallium arsenide, or gallium antimonide.
- substrate 100 comprises a silicon wafer
- the wafer may be cleaned before forming high-k gate dielectric layer 110 on its surface.
- a dilute hydrofluoric acid (“HF”) solution e.g., a 50:1 water to HF solution.
- the wafer may then be placed in a megasonic tank, and exposed first to a water/H 2 O 2 /NH 4 OH solution, then to a water/H 202 /HCl solution.
- the water/H 2 O 2 /NH 4 OH solution may remove particles and organic contaminants, and the water/H 2 O 2 /HCl solution may remove metallic contaminants.
- high-k gate dielectric layer 110 may be formed on substrate 100 , generating the FIG. 1 a structure.
- High-k gate dielectric layer 110 comprises a material with a dielectric constant that is greater than the dielectric constant of silicon dioxide.
- Dielectric layer 110 preferably has a dielectric constant that is at least about twice that of silicon dioxide, i.e., a dielectric constant that is greater than about 8.
- Materials that may be used to make high-k gate dielectrics include: hafnium oxide, hafnium silicon oxide, lanthanum oxide, zirconium oxide, zirconium silicon oxide, titanium oxide, tantalum oxide, barium strontium titanium oxide, barium titanium oxide, strontium titanium oxide, yttrium oxide, aluminum oxide, lead scandium tantalum oxide, and lead zinc niobate. Particularly preferred are hafnium oxide, zirconium oxide, titanium oxide, and aluminum oxide. Although a few examples of materials that may be used to form dielectric layer 110 are described here, that layer may be made from other materials that serve to reduce gate leakage.
- High-k gate dielectric layer 110 may be formed on substrate 100 using a conventional deposition method, e.g., a conventional chemical vapor deposition (“CVD”), low pressure CVD, or physical vapor deposition (“PVD”) process.
- a conventional atomic layer CVD process is used.
- a metal oxide precursor e.g., a metal chloride
- steam may be fed at selected flow rates into a CVD reactor, which is then operated at a selected temperature and pressure to generate an atomically smooth interface between substrate 100 and dielectric layer 110 .
- the CVD reactor should be operated long enough to form a layer with the desired thickness.
- dielectric layer 110 should be less than about 60 angstroms thick, and more preferably between about 5 angstroms and about 40 angstroms thick.
- high-k gate dielectric layer 110 may be incompatible with polysilicon due to the presence of unacceptable numbers of oxygen vacancies and excess impurity levels.
- a metal chloride precursor is used to form high-k gate dielectric layer 110 .
- chlorine may permeate through that layer.
- a transistor with a high-k gate dielectric layer that includes a significant amount of chlorine may exhibit inferior electrical properties.
- impurities are removed from high-k gate dielectric layer 110 and that layer's oxygen content is increased, after it is formed on substrate 100 . After removing impurities and increasing the oxygen content, the resulting high-k gate dielectric layer 110 may be compatible with polysilicon, or other materials that may be used to form the gate electrode.
- a wet chemical treatment is applied to high-k gate dielectric layer 110 to remove impurities from that layer and to increase that layer's oxygen content.
- the wet chemical treatment may comprise exposing high-k gate dielectric layer 110 to a solution that comprises a source of hydroxide at a sufficient temperature for a sufficient time to remove impurities from high-k gate dielectric layer 110 and to increase the oxygen content of high-k gate dielectric layer 110 .
- That solution preferably has a pH of at least about 7, and more preferably a pH of between about 11 and about 13.
- the source of hydroxide may comprise, for example, deionized water, hydrogen peroxide, ammonium hydroxide, and/or a tetraalkyl ammonium hydroxide, such as tetramethyl ammonium hydroxide (“TMAH”).
- TMAH tetramethyl ammonium hydroxide
- the appropriate time and temperature at which high-k gate dielectric layer 110 is exposed may depend upon the source of hydroxide that is included in the solution, and upon the desired thickness and other properties for high-k gate dielectric layer 110 .
- high-k gate dielectric layer 110 When high-k gate dielectric layer 110 is exposed to a solution that consists essentially of deionized water, high-k gate dielectric layer 110 should be exposed to such a solution for at least about one minute at a temperature of at least about 35° C. In a particularly preferred embodiment, high-k gate dielectric layer 110 may be exposed to such a solution for about 20 minutes at a temperature of about 40° C.
- high-k gate dielectric layer 110 When high-k gate dielectric layer 110 is exposed to a hydrogen peroxide based solution, an aqueous solution that contains between about 2% and about 30% hydrogen peroxide by volume may be used. That exposure step should take place at between about 15° C. and about 40° C. for at least about one minute. In a particularly preferred embodiment, high-k gate dielectric layer 110 is exposed to an aqueous solution that contains about 6.7% H 2 O 2 by volume for about 10 minutes at a temperature of about 25° C.
- high-k gate dielectric layer 110 When high-k gate dielectric layer 110 is exposed to an ammonium hydroxide based solution, an aqueous solution that contains between about 2% and about 30% ammonium hydroxide by volume may be used. That exposure step should take place at between about 15° C. and about 90° C. for at least about one minute. In a particularly preferred embodiment, high-k gate dielectric layer 110 is exposed to an aqueous solution that contains about 15% NH 4 OH by volume for about 30 minutes at a temperature of about 25° C.
- high-k gate dielectric layer 110 When high-k gate dielectric layer 110 is exposed to a hydrogen peroxide/ammonium hydroxide based solution, an aqueous solution that contains between about 1% and about 10% hydrogen peroxide by volume, and between about 1% and about 10% ammonium hydroxide by volume, may be used. That exposure step should take place at between about 15° C. and about 40° C. for at least about one minute. In a particularly preferred embodiment, high-k gate dielectric layer 110 is exposed to an aqueous solution that contains about 4.2% H 2 O 2 by volume and about 4.2% NH 4 OH by volume for about 10 minutes at a temperature of about 25° C.
- high-k gate dielectric layer 110 When high-k gate dielectric layer 110 is exposed to a TMAH based solution, an aqueous solution that contains between about 2% and about 30% TMAH by volume may be used. That exposure step should take place at between about 15° C. and about 90° C. for at least about one minute. In a particularly preferred embodiment, high-k gate dielectric layer 110 is exposed to an aqueous solution that contains about 25% TMAH by volume for about 2 minutes at a temperature of about 80° C.
- high-k gate dielectric layer 110 is exposed to a solution that comprises a source of hydroxide, it may be desirable to apply sonic energy at a frequency of between about 10 KHz and about 2,000 KHz, while dissipating at between about 1 and about 10 watts/cm 2 .
- sonic energy may be applied at a frequency of about 1,000 KHz, while dissipating at about 5 watts/cm 2 .
- the chlorine content of that layer may decrease by at least about 80 percent, and perhaps as much as 90 percent.
- a hydrogen peroxide containing solution may act as an oxidizer.
- the oxygen content of layer 110 may increase by at least about 10 percent.
- high-k gate dielectric layer 110 When high-k gate dielectric layer 110 is exposed to the solutions described above, that layer may be partially etched. Using the method of the present invention to reduce the thickness of layer 110 , while simultaneously increasing that layer's oxygen content and reducing its chlorine content, may be particularly advantageous when a slightly thinner layer is desired. At least about 10% of high-k gate dielectric layer 110 (and perhaps as much as 30% or more) may be partially etched, when that layer is exposed to certain of these solutions. When exposing high-k gate dielectric layer 110 to the above described solutions, a negligible amount of oxide, if any, may grow on substrate 100 . In a preferred embodiment, less than about 3 angstroms of oxide, if any, will grow on substrate 100 , when layer 110 is exposed to these solutions.
- a single wet chemical treatment may be applied after high-k gate dielectric layer 110 has been completed.
- an iterative approach may be applied, in which a series of deposition steps alternate with wet chemical treatment steps.
- a second high-k gate dielectric layer is formed after the initial wet chemical treatment, and that second high-k gate dielectric layer is exposed to a second solution that includes a source of hydroxide.
- a third layer may then be formed followed by a third wet chemical treatment, and so on, until the desired thickness for the high-k gate dielectric layer is achieved.
- a gate electrode is formed on layer 110 .
- the gate electrode may be formed by initially depositing polysilicon layer 120 on high-k gate dielectric layer 110 —generating the FIG. 1 b structure.
- Polysilicon layer 120 may be deposited using conventional methods and preferably is between about 500 angstroms and about 4,000 angstroms thick.
- additional steps that are generally used to complete the gate electrode e.g., forming a silicide (not shown) on the upper part of etched polysilicon structure 130 . As such steps are well known to those skilled in the art, they will not be described in more detail here.
- the gate electrode preferably comprises polysilicon, it may alternatively be formed from various metals with which the above described high-k gate dielectrics may be used.
- the method of the present invention may enable a high-k gate dielectric to be used with a polysilicon-based gate electrode.
- a high-k gate dielectric By removing impurities from high-k gate dielectric layer 110 and increasing that layer's oxygen content, the dielectric layer's surface and electrical properties may be enhanced, which may render it suitable for use with polysilicon and other gate electrode materials.
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Abstract
A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate. After removing impurities from that layer, and increasing its oxygen content, a gate electrode is formed on the high-k gate dielectric layer.
Description
- The present invention relates to methods for making semiconductor devices, in particular, semiconductor devices that include high-k gate dielectric layers.
- MOS field-effect transistors with very thin silicon dioxide based gate dielectrics may experience unacceptable gate leakage currents. Forming the gate dielectric from certain high-k dielectric materials, instead of silicon dioxide, can reduce gate leakage. Such a dielectric may not, however, be compatible with polysilicon—the preferred material for making the device's gate electrode.
- If such a high-k film comprises an oxide, it may manifest oxygen vacancies and excess impurity levels. Oxygen vacancies may permit undesirable interaction between the high-k film and the gate electrode. When the gate electrode comprises polysilicon, such interaction may alter the electrode's workfunction or cause the device to short through the dielectric. If the process for forming the high-k film uses a metal chloride precursor, residual chlorine may adversely affect the device's electrical properties.
- Accordingly, there is a need for an improved process for making a semiconductor device that includes a high-k gate dielectric. There is a need for such a process for forming a very thin high-k gate dielectric that improves the interface between the high-k film and the gate electrode by minimizing oxygen vacancies in the high-k film. There is a need for a process for forming a high-k gate dielectric with acceptable impurity levels. The method of the present invention provides such a process.
- FIGS. 1a-1 c represent cross-sections of structures that may be formed when carrying out an embodiment of the method of the present invention. Features shown in these figures are not intended to be drawn to scale.
- A method for making a semiconductor device is described. That method comprises forming on a substrate a high-k gate dielectric layer, then removing impurities from the high-k gate dielectric layer, and increasing the oxygen content of the high-k gate dielectric layer. A gate electrode is then formed on the high-k gate dielectric layer. In the following description, a number of details are set forth to provide a thorough understanding of the present invention. It will be apparent to those skilled in the art, however, that the invention may be practiced in many ways other than those expressly described here. The invention is thus not limited by the specific details disclosed below.
- In an embodiment of the method of the present invention, high-k gate
dielectric layer 110 is formed onsubstrate 100, as shown in FIG. 1a.Substrate 100 may comprise a bulk silicon or silicon-on-insulator substructure. Alternatively,substrate 100 may comprise other materials—which may or may not be combined with silicon—such as: germanium, indium antimonide, lead telluride, indium arsenide, indium phosphide, gallium arsenide, or gallium antimonide. Although several examples of materials from whichsubstrate 100 may be formed are described here, any material that may serve as a foundation upon which a semiconductor device may be built falls within the spirit and scope of the present invention. - When
substrate 100 comprises a silicon wafer, the wafer may be cleaned before forming high-k gatedielectric layer 110 on its surface. To clean the wafer, it may initially be exposed to a dilute hydrofluoric acid (“HF”) solution, e.g., a 50:1 water to HF solution. The wafer may then be placed in a megasonic tank, and exposed first to a water/H2O2/NH4OH solution, then to a water/H202/HCl solution. The water/H2O2/NH4OH solution may remove particles and organic contaminants, and the water/H2O2/HCl solution may remove metallic contaminants. - After that cleaning treatment, high-k gate
dielectric layer 110 may be formed onsubstrate 100, generating the FIG. 1a structure. High-k gatedielectric layer 110 comprises a material with a dielectric constant that is greater than the dielectric constant of silicon dioxide.Dielectric layer 110 preferably has a dielectric constant that is at least about twice that of silicon dioxide, i.e., a dielectric constant that is greater than about 8. Materials that may be used to make high-k gate dielectrics include: hafnium oxide, hafnium silicon oxide, lanthanum oxide, zirconium oxide, zirconium silicon oxide, titanium oxide, tantalum oxide, barium strontium titanium oxide, barium titanium oxide, strontium titanium oxide, yttrium oxide, aluminum oxide, lead scandium tantalum oxide, and lead zinc niobate. Particularly preferred are hafnium oxide, zirconium oxide, titanium oxide, and aluminum oxide. Although a few examples of materials that may be used to formdielectric layer 110 are described here, that layer may be made from other materials that serve to reduce gate leakage. - High-k gate
dielectric layer 110 may be formed onsubstrate 100 using a conventional deposition method, e.g., a conventional chemical vapor deposition (“CVD”), low pressure CVD, or physical vapor deposition (“PVD”) process. Preferably, a conventional atomic layer CVD process is used. In such a process, a metal oxide precursor (e.g., a metal chloride) and steam may be fed at selected flow rates into a CVD reactor, which is then operated at a selected temperature and pressure to generate an atomically smooth interface betweensubstrate 100 anddielectric layer 110. The CVD reactor should be operated long enough to form a layer with the desired thickness. In most applications,dielectric layer 110 should be less than about 60 angstroms thick, and more preferably between about 5 angstroms and about 40 angstroms thick. - As deposited, high-k gate
dielectric layer 110 may be incompatible with polysilicon due to the presence of unacceptable numbers of oxygen vacancies and excess impurity levels. For example, when a metal chloride precursor is used to form high-k gatedielectric layer 110, chlorine may permeate through that layer. A transistor with a high-k gate dielectric layer that includes a significant amount of chlorine may exhibit inferior electrical properties. In the method of the present invention, impurities are removed from high-k gatedielectric layer 110 and that layer's oxygen content is increased, after it is formed onsubstrate 100. After removing impurities and increasing the oxygen content, the resulting high-k gatedielectric layer 110 may be compatible with polysilicon, or other materials that may be used to form the gate electrode. - In an embodiment of the present invention, a wet chemical treatment is applied to high-k gate
dielectric layer 110 to remove impurities from that layer and to increase that layer's oxygen content. The wet chemical treatment may comprise exposing high-k gatedielectric layer 110 to a solution that comprises a source of hydroxide at a sufficient temperature for a sufficient time to remove impurities from high-k gatedielectric layer 110 and to increase the oxygen content of high-k gatedielectric layer 110. That solution preferably has a pH of at least about 7, and more preferably a pH of between about 11 and about 13. The source of hydroxide may comprise, for example, deionized water, hydrogen peroxide, ammonium hydroxide, and/or a tetraalkyl ammonium hydroxide, such as tetramethyl ammonium hydroxide (“TMAH”). The appropriate time and temperature at which high-k gatedielectric layer 110 is exposed may depend upon the source of hydroxide that is included in the solution, and upon the desired thickness and other properties for high-k gatedielectric layer 110. - When high-k gate
dielectric layer 110 is exposed to a solution that consists essentially of deionized water, high-k gatedielectric layer 110 should be exposed to such a solution for at least about one minute at a temperature of at least about 35° C. In a particularly preferred embodiment, high-k gatedielectric layer 110 may be exposed to such a solution for about 20 minutes at a temperature of about 40° C. - When high-k gate
dielectric layer 110 is exposed to a hydrogen peroxide based solution, an aqueous solution that contains between about 2% and about 30% hydrogen peroxide by volume may be used. That exposure step should take place at between about 15° C. and about 40° C. for at least about one minute. In a particularly preferred embodiment, high-k gatedielectric layer 110 is exposed to an aqueous solution that contains about 6.7% H2O2 by volume for about 10 minutes at a temperature of about 25° C. - When high-k gate
dielectric layer 110 is exposed to an ammonium hydroxide based solution, an aqueous solution that contains between about 2% and about 30% ammonium hydroxide by volume may be used. That exposure step should take place at between about 15° C. and about 90° C. for at least about one minute. In a particularly preferred embodiment, high-k gatedielectric layer 110 is exposed to an aqueous solution that contains about 15% NH4OH by volume for about 30 minutes at a temperature of about 25° C. - When high-k gate
dielectric layer 110 is exposed to a hydrogen peroxide/ammonium hydroxide based solution, an aqueous solution that contains between about 1% and about 10% hydrogen peroxide by volume, and between about 1% and about 10% ammonium hydroxide by volume, may be used. That exposure step should take place at between about 15° C. and about 40° C. for at least about one minute. In a particularly preferred embodiment, high-kgate dielectric layer 110 is exposed to an aqueous solution that contains about 4.2% H2O2 by volume and about 4.2% NH4OH by volume for about 10 minutes at a temperature of about 25° C. - When high-k
gate dielectric layer 110 is exposed to a TMAH based solution, an aqueous solution that contains between about 2% and about 30% TMAH by volume may be used. That exposure step should take place at between about 15° C. and about 90° C. for at least about one minute. In a particularly preferred embodiment, high-kgate dielectric layer 110 is exposed to an aqueous solution that contains about 25% TMAH by volume for about 2 minutes at a temperature of about 80° C. - While high-k
gate dielectric layer 110 is exposed to a solution that comprises a source of hydroxide, it may be desirable to apply sonic energy at a frequency of between about 10 KHz and about 2,000 KHz, while dissipating at between about 1 and about 10 watts/cm2. In a preferred embodiment, sonic energy may be applied at a frequency of about 1,000 KHz, while dissipating at about 5 watts/cm2. - When the wet chemical treatment of the present invention is applied to high-k
gate dielectric layer 110, the chlorine content of that layer may decrease by at least about 80 percent, and perhaps as much as 90 percent. In addition to providing a source of hydroxide, a hydrogen peroxide containing solution may act as an oxidizer. When such a solution is used, the oxygen content oflayer 110 may increase by at least about 10 percent. (Other sources of hydroxide, which serve to replace impurities with hydroxyl groups, may also increaselayer 110's oxygen content to some extent.) - When high-k
gate dielectric layer 110 is exposed to the solutions described above, that layer may be partially etched. Using the method of the present invention to reduce the thickness oflayer 110, while simultaneously increasing that layer's oxygen content and reducing its chlorine content, may be particularly advantageous when a slightly thinner layer is desired. At least about 10% of high-k gate dielectric layer 110 (and perhaps as much as 30% or more) may be partially etched, when that layer is exposed to certain of these solutions. When exposing high-kgate dielectric layer 110 to the above described solutions, a negligible amount of oxide, if any, may grow onsubstrate 100. In a preferred embodiment, less than about 3 angstroms of oxide, if any, will grow onsubstrate 100, whenlayer 110 is exposed to these solutions. - In the method of the present invention, a single wet chemical treatment may be applied after high-k
gate dielectric layer 110 has been completed. Alternatively, an iterative approach may be applied, in which a series of deposition steps alternate with wet chemical treatment steps. In such an iterative process, a second high-k gate dielectric layer is formed after the initial wet chemical treatment, and that second high-k gate dielectric layer is exposed to a second solution that includes a source of hydroxide. A third layer may then be formed followed by a third wet chemical treatment, and so on, until the desired thickness for the high-k gate dielectric layer is achieved. - Although a few examples of wet chemical treatments that may be used to remove impurities from high-k
gate dielectric layer 110, and to increase that layer's oxygen content, are described here, other treatments that serve to modify high-kgate dielectric layer 110 in that way may be used instead, as will be apparent to those skilled in the art. Examples include exposing high-kgate dielectric layer 110 to aqueous solutions that contain ozone, or to other solutions that contain other types of oxidizing and/or hydrolyzing agents. - After removing impurities from high-k
gate dielectric layer 110, and increasing that layer's oxygen content, a gate electrode is formed onlayer 110. In a preferred embodiment, the gate electrode may be formed by initially depositingpolysilicon layer 120 on high-kgate dielectric layer 110—generating the FIG. 1b structure.Polysilicon layer 120 may be deposited using conventional methods and preferably is between about 500 angstroms and about 4,000 angstroms thick. After etching bothlayers - The method of the present invention may enable a high-k gate dielectric to be used with a polysilicon-based gate electrode. By removing impurities from high-k
gate dielectric layer 110 and increasing that layer's oxygen content, the dielectric layer's surface and electrical properties may be enhanced, which may render it suitable for use with polysilicon and other gate electrode materials. - Although the foregoing description has specified certain steps and materials that may be used in the method of the present invention, those skilled in the art will appreciate that many modifications and substitutions may be made. Accordingly, it is intended that all such modifications, alterations, substitutions and additions be considered to fall within the spirit and scope of the invention as defined by the appended claims.
Claims (26)
1. A method for making a semiconductor device comprising:
forming on a substrate a high-k gate dielectric layer;
removing impurities from the high-k gate dielectric layer, and increasing the oxygen content of the high-k gate dielectric layer; and then
forming a gate electrode on the high-k gate dielectric layer.
2. The method of claim 1 wherein the high-k gate dielectric layer is formed by atomic layer chemical vapor deposition, and wherein the high-k gate dielectric layer comprises a material selected from the group consisting of hafnium oxide, hafnium silicon oxide, lanthanum oxide, zirconium oxide, zirconium silicon oxide, titanium oxide, tantalum oxide, barium strontium titanium oxide, barium titanium oxide, strontium titanium oxide, yttrium oxide, aluminum oxide, lead scandium tantalum oxide, and lead zinc niobate.
3. The method of claim 1 wherein a wet chemical treatment is applied to the high-k gate dielectric layer to remove impurities from that layer and to increase the oxygen content of that layer.
4. The method of claim 3 wherein the wet chemical treatment comprises exposing the high-k gate dielectric layer to a solution that comprises a source of hydroxide at a sufficient temperature for a sufficient time to remove impurities from the high-k gate dielectric layer and to increase the oxygen content of the high-k gate dielectric layer.
5. The method of claim 4 wherein the source of hydroxide is selected from the group consisting of deionized water, hydrogen peroxide, ammonium hydroxide, and a tetraalkyl ammonium hydroxide.
6. The method of claim 5 wherein the source of hydroxide is tetramethyl ammonium hydroxide.
7. The method of claim 6 wherein the gate electrode comprises polysilicon.
8. A method for making a semiconductor device comprising:
forming on a substrate a high-k gate dielectric layer;
applying a wet chemical treatment to the high-k gate dielectric layer to remove impurities from the high-k gate dielectric layer, and to increase the oxygen content of the high-k gate dielectric layer; and then
forming a layer that comprises polysilicon on the high-k gate dielectric layer.
9. The method of claim 8 wherein the high-k gate dielectric layer is formed by atomic layer chemical vapor deposition, and is between about 5 angstroms and about 40 angstroms thick.
10. The method of claim 9 wherein the high-k gate dielectric layer comprises a material selected from the group consisting of hafnium oxide, zirconium oxide, titanium oxide, and aluminum oxide.
11. The method of claim 10 wherein the wet chemical treatment comprises exposing the high-k gate dielectric layer to a solution that comprises a source of hydroxide at a sufficient temperature for a sufficient time to remove chlorine from the high-k gate dielectric layer and to increase the oxygen content of the high-k gate dielectric layer.
12. The method of claim 11 wherein the source of hydroxide is selected from the group consisting of deionized water, hydrogen peroxide, ammonium hydroxide, and a tetraalkyl ammonium hydroxide.
13. A method for making a semiconductor device comprising:
forming a high-k gate dielectric layer on a substrate, the high-k gate dielectric layer being less than about 60 angstroms thick and comprising a material selected from the group consisting of hafnium oxide, zirconium oxide, titanium oxide, and aluminum oxide;
exposing the high-k gate dielectric layer to a solution that comprises a source of hydroxide at a sufficient temperature for a sufficient time to remove chlorine from the high-k gate dielectric layer and to increase the oxygen content of the high-k gate dielectric layer;
forming a layer that comprises polysilicon on the high-k gate dielectric layer; and
etching the polysilicon containing layer and the high-k gate dielectric layer.
14. The method of claim 13 wherein the high-k gate dielectric layer is formed by atomic layer chemical vapor deposition and is between about 5 angstroms and about 40 angstroms thick.
15. The method of claim 14 wherein the source of hydroxide is selected from the group consisting of deionized water, hydrogen peroxide, ammonium hydroxide, and a tetraalkyl ammonium hydroxide.
16. The method of claim 15 wherein the high-k gate dielectric layer is exposed to a solution that comprises hydrogen peroxide at a temperature that is between about 15° C. and about 40° C. for at least about one minute.
17. The method of claim 15 wherein the high-k gate dielectric layer is exposed to a solution that comprises hydrogen peroxide and ammonium hydroxide at a temperature that is between about 15° C. and about 40° C. for at least about one minute.
18. The method of claim 15 wherein the high-k gate dielectric layer is exposed to a solution that comprises ammonium hydroxide at a temperature that is between about 15° C. and about 90° C. for at least about one minute.
19. The method of claim 15 wherein the high-k gate dielectric layer is exposed to a solution that comprises tetramethyl ammonium hydroxide at a temperature that is between about 15° C. and about 90° C. for at least about one minute.
20. The method of claim 15 wherein the high-k gate dielectric layer is exposed to a solution that comprises deionized water at a temperature of at least about 35° C. for at least about one minute.
21. The method of claim 15 wherein the source of hydroxide acts as an oxidizer and wherein the oxygen content of the high-k gate dielectric layer is increased by at least about 10 percent, when the high-k gate dielectric layer is exposed to the solution that includes the source of hydroxide.
22. The method of claim 15 wherein the chlorine content of the high-k gate dielectric layer is decreased by at least about 80 percent, when the high-k gate dielectric layer is exposed to the solution that includes the source of hydroxide.
23. The method of claim 15 wherein the high-k gate dielectric layer is partially etched, when the high-k gate dielectric layer is exposed to the solution that includes the source of hydroxide.
24. The method of claim 15 wherein at least about 10% of the high-k gate dielectric layer is partially etched, when the high-k gate dielectric layer is exposed to the solution that includes the source of hydroxide.
25. The method of claim 15 wherein less than about 3 angstroms of oxide grows on the substrate, when the high-k gate dielectric layer is exposed to the solution that includes the source of hydroxide.
26. The method of claim 15 further comprising forming a second high-k gate dielectric layer, and exposing the second high-k gate dielectric layer to a second solution that includes a source of hydroxide, prior to forming the layer that comprises polysilicon.
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US10/387,303 US6716707B1 (en) | 2003-03-11 | 2003-03-11 | Method for making a semiconductor device having a high-k gate dielectric |
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