US20030082031A1 - Wafer handling device and method for testing wafers - Google Patents
Wafer handling device and method for testing wafers Download PDFInfo
- Publication number
- US20030082031A1 US20030082031A1 US10/016,638 US1663801A US2003082031A1 US 20030082031 A1 US20030082031 A1 US 20030082031A1 US 1663801 A US1663801 A US 1663801A US 2003082031 A1 US2003082031 A1 US 2003082031A1
- Authority
- US
- United States
- Prior art keywords
- wafers
- station
- wafer
- handling device
- metrology equipment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
- G01R31/2887—Features relating to contacting the IC under test, e.g. probe heads; chucks involving moving the probe head or the IC under test; docking stations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67184—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the presence of more than one transfer chamber
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67763—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations the wafers being stored in a carrier, involving loading and unloading
- H01L21/67769—Storage means
Definitions
- the present invention generally relates to the field of semiconductor production, and more particularly to a wafer handling device and methods for testing wafers.
- Semiconductor wafers or other such substrates are typically subjected to many processing steps that involve moving said wafers from one type of processing tool to another.
- wafers that have been subjected to one process in a wafer deposition chamber may have to be moved for cleaning and drying to another processing tool, and then they may have to be transferred to a different processing tool for additional processing steps.
- the wafers have to be stored between different processing steps.
- To ensure high quality standards it is necessary to test control and monitor wafers between different processing steps.
- the present invention seeks to provide a wafer handling device and a method for testing wafers reducing the logistical efforts for testing selected wafers, especially control and monitor wafers.
- FIGURE is a schematic top view of a wafer handling device in accordance with the present invention.
- a wafer handling device comprising metrology equipment 410 , 420 , 430 , 440 , 450 , 460 for testing selected wafers and a stationary wafer storage system 300 , said stationary wafer storage system 300 having a buffer 310 for storing a plurality of wafers and at least a load-and-unload station 320 for transferring said selected wafers between said buffer 310 and wafer transport means 330 , wherein said wafer transport means are provided for transferring one or more of said selected wafers between said load-and-unload station 320 and said metrology equipment 410 , 420 , 430 , 440 , 450 , 460 .
- the present invention further provides a method for testing wafers, said method comprising the following steps:
- the wafer handling device and the method for testing wafers in accordance with the present invention it is easier to perform the necessary wafer testing since the logistical effort to transport the wafers to be tested from the actual storage place to the metrology equipment may be reduced.
- a stationary storage system is designated with numeral 300 and comprises a buffer 310 for storing a few thousands of wafers, for example 1000, 5000 or 10000 wafers.
- the wafers are stored within pods in said buffer 310 .
- These pods may for example be FOUPs (Front Opening Unified Pods) or SMIF (Standard Mechanical InterFace) boxes generally known in the art.
- the stationary storage system 300 further comprises a load-and-unload station 320 .
- the stationary storage system 300 is capable of tracking single wafers and/or lots of wafers to provide a fast access, for example to wafers that have to be tested.
- the wafer transport means are realized by robots 330 . At least one of these robots 330 is able to interact with the load-and-unload station 320 to transfer one or more wafers that have to be tested. The robots 330 transport the wafers to be tested to metrology equipment and between single stations thereof.
- this metrology equipment comprises the following stations: a particle monitoring station 410 , a stress test station 420 , a thickness test station 430 , an X-ray fluorescence analysis station and an atomic force microscopy station 440 , an orienter and map station 450 , and an opaque film thickness test station 460 .
- the test stations 410 , 420 , and 430 form a first group 480
- the test stations 440 , 450 , and 460 form a second group 490 .
- the groups formed by different test stations are arranged adjacent to each other.
- each of the groups 480 , 490 there is assigned a robot 330 for transferring the wafers between the corresponding test stations.
- intermediate storage means 470 For storing one or more wafers between different testing steps there are provided intermediate storage means 470 .
- these intermediate storage means 470 are realized by pods 470 .
- the wafer handling device in accordance with the FIGURE provides a more optimal handling of single wafers or groups of wafers for metrology and a more optimal storage of test, calibration, and control wafers.
- the embodiment in accordance with the FIGURE provides a more optimal rooting of single wafers through different metrology steps.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- General Engineering & Computer Science (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
- The present invention generally relates to the field of semiconductor production, and more particularly to a wafer handling device and methods for testing wafers.
- Semiconductor wafers or other such substrates are typically subjected to many processing steps that involve moving said wafers from one type of processing tool to another. For example, wafers that have been subjected to one process in a wafer deposition chamber may have to be moved for cleaning and drying to another processing tool, and then they may have to be transferred to a different processing tool for additional processing steps. In many cases the wafers have to be stored between different processing steps. To ensure high quality standards it is necessary to test control and monitor wafers between different processing steps. However, it is complicated and expensive to perform these tests. This is for example due to the fact that the wafers to be tested usually are spread over many pods where they are stored. Therefore, it is logistically difficult to transport the wafers to be tested to the respective metrology equipment or between single test stations forming the metrology equipment.
- The present invention seeks to provide a wafer handling device and a method for testing wafers reducing the logistical efforts for testing selected wafers, especially control and monitor wafers.
- The sole FIGURE is a schematic top view of a wafer handling device in accordance with the present invention.
- In accordance with the present invention there is provided a wafer handling device, comprising
metrology equipment wafer storage system 300, said stationarywafer storage system 300 having abuffer 310 for storing a plurality of wafers and at least a load-and-unload station 320 for transferring said selected wafers between saidbuffer 310 and wafer transport means 330, wherein said wafer transport means are provided for transferring one or more of said selected wafers between said load-and-unload station 320 and saidmetrology equipment - The present invention further provides a method for testing wafers, said method comprising the following steps:
- a) selecting wafers to be tested from a plurality of wafers stored in a
stationary storage system 300; - b) transferring at least some of said wafers to be tested from said
stationary storage system 300 to wafer transport means 330 via a load-and-unload station 320 assigned to saidstationary storage system 300; and - c) transferring at least some of said wafers to be tested to
metrology equipment - With both, the wafer handling device and the method for testing wafers in accordance with the present invention, it is easier to perform the necessary wafer testing since the logistical effort to transport the wafers to be tested from the actual storage place to the metrology equipment may be reduced.
- The sole FIGURE shows a schematic top view of a wafer handling device in accordance with the present invention. A stationary storage system is designated with
numeral 300 and comprises abuffer 310 for storing a few thousands of wafers, for example 1000, 5000 or 10000 wafers. Preferably the wafers are stored within pods in saidbuffer 310. These pods may for example be FOUPs (Front Opening Unified Pods) or SMIF (Standard Mechanical InterFace) boxes generally known in the art. Thestationary storage system 300 further comprises a load-and-unload station 320. It is preferred that thestationary storage system 300 is capable of tracking single wafers and/or lots of wafers to provide a fast access, for example to wafers that have to be tested. With the embodiment of the FIGURE the wafer transport means are realized byrobots 330. At least one of theserobots 330 is able to interact with the load-and-unload station 320 to transfer one or more wafers that have to be tested. Therobots 330 transport the wafers to be tested to metrology equipment and between single stations thereof. In accordance with the FIGURE, this metrology equipment comprises the following stations: aparticle monitoring station 410, astress test station 420, athickness test station 430, an X-ray fluorescence analysis station and an atomicforce microscopy station 440, an orienter andmap station 450, and an opaque filmthickness test station 460. Thetest stations first group 480, while thetest stations second group 490. Preferably, the groups formed by different test stations are arranged adjacent to each other. - To each of the
groups robot 330 for transferring the wafers between the corresponding test stations. For storing one or more wafers between different testing steps there are provided intermediate storage means 470. In accordance with the embodiment shown in the FIGURE these intermediate storage means 470 are realized bypods 470. The wafer handling device in accordance with the FIGURE provides a more optimal handling of single wafers or groups of wafers for metrology and a more optimal storage of test, calibration, and control wafers. Furthermore, the embodiment in accordance with the FIGURE provides a more optimal rooting of single wafers through different metrology steps. - While the invention has been described in terms of particular structures, devices and methods, those of skill in the art will understand, based on the description herein, that the invention is not limited merely to such examples and that the full scope of the invention is properly determined by the claims that follow.
Claims (14)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/016,638 US20030082031A1 (en) | 2001-10-30 | 2001-10-30 | Wafer handling device and method for testing wafers |
JP2002315861A JP2003163254A (en) | 2001-10-30 | 2002-10-30 | Wafer handling device for wafer test and method therefor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/016,638 US20030082031A1 (en) | 2001-10-30 | 2001-10-30 | Wafer handling device and method for testing wafers |
Publications (1)
Publication Number | Publication Date |
---|---|
US20030082031A1 true US20030082031A1 (en) | 2003-05-01 |
Family
ID=21778166
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/016,638 Abandoned US20030082031A1 (en) | 2001-10-30 | 2001-10-30 | Wafer handling device and method for testing wafers |
Country Status (2)
Country | Link |
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US (1) | US20030082031A1 (en) |
JP (1) | JP2003163254A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004008494A2 (en) * | 2002-07-15 | 2004-01-22 | Aviza Technology, Inc. | Servomotor control system and method in a semiconductor manufacturing environment |
WO2006004718A1 (en) * | 2004-06-28 | 2006-01-12 | Brooks Automation, Inc. | Non productive wafer buffer module for substrate processing apparatus |
US20080156069A1 (en) * | 2006-12-22 | 2008-07-03 | Asyst Technologies Japan, Inc | Container transport system and measurement container |
US20090053017A1 (en) * | 2006-03-17 | 2009-02-26 | Shlomo Shmuelov | Storage and purge system for semiconductor wafers |
-
2001
- 2001-10-30 US US10/016,638 patent/US20030082031A1/en not_active Abandoned
-
2002
- 2002-10-30 JP JP2002315861A patent/JP2003163254A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004008494A2 (en) * | 2002-07-15 | 2004-01-22 | Aviza Technology, Inc. | Servomotor control system and method in a semiconductor manufacturing environment |
WO2004008494A3 (en) * | 2002-07-15 | 2005-04-21 | Aviza Tech Inc | Servomotor control system and method in a semiconductor manufacturing environment |
WO2006004718A1 (en) * | 2004-06-28 | 2006-01-12 | Brooks Automation, Inc. | Non productive wafer buffer module for substrate processing apparatus |
US8292563B2 (en) | 2004-06-28 | 2012-10-23 | Brooks Automation, Inc. | Nonproductive wafer buffer module for substrate processing apparatus |
US20090053017A1 (en) * | 2006-03-17 | 2009-02-26 | Shlomo Shmuelov | Storage and purge system for semiconductor wafers |
US20080156069A1 (en) * | 2006-12-22 | 2008-07-03 | Asyst Technologies Japan, Inc | Container transport system and measurement container |
US7918122B2 (en) * | 2006-12-22 | 2011-04-05 | Muratec Automation Co., Ltd. | Container transport system and measurement container |
Also Published As
Publication number | Publication date |
---|---|
JP2003163254A (en) | 2003-06-06 |
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Legal Events
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AS | Assignment |
Owner name: INFINEON TECHNOLOGIES AG, GERMANY Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:VATEL, OLIVIER;SHAHVANDI, IRAJ;ADERHOLD, DIRK;AND OTHERS;REEL/FRAME:013324/0057;SIGNING DATES FROM 20020403 TO 20020423 Owner name: MOTOROLA, INC., ILLINOIS Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:VATEL, OLIVIER;SHAHVANDI, IRAJ;ADERHOLD, DIRK;AND OTHERS;REEL/FRAME:013324/0057;SIGNING DATES FROM 20020403 TO 20020423 Owner name: SEMICONDUCTOR 300 GMBH & CO. KG, GERMANY Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:VATEL, OLIVIER;SHAHVANDI, IRAJ;ADERHOLD, DIRK;AND OTHERS;REEL/FRAME:013324/0057;SIGNING DATES FROM 20020403 TO 20020423 |
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AS | Assignment |
Owner name: FREESCALE SEMICONDUCTOR, INC., TEXAS Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MOTOROLA, INC;REEL/FRAME:015360/0718 Effective date: 20040404 Owner name: FREESCALE SEMICONDUCTOR, INC.,TEXAS Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MOTOROLA, INC;REEL/FRAME:015360/0718 Effective date: 20040404 |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |
|
AS | Assignment |
Owner name: QIMONDA AG, GERMANY Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:INFINEON TECHNOLOGIES AG;SEMICONDUCTOR 300 GMBH & CO. KG;REEL/FRAME:023785/0396 Effective date: 20060425 |